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| author | Patrick Georgi <pgeorgi@google.com> | 2014-11-29 10:38:17 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2014-12-02 10:25:55 +0100 |
| commit | 546953c0c553465761705fb0747964c08d634461 (patch) | |
| tree | 6cbd36b46d1230bb36a557849ac9e711a16917f1 /src/northbridge/intel/nehalem | |
| parent | 24cca75b47f516e2ad226c37da1e71aef5036fce (diff) | |
| download | coreboot-staging-546953c0c553465761705fb0747964c08d634461.zip coreboot-staging-546953c0c553465761705fb0747964c08d634461.tar.gz | |
Replace hlt with halt()
There were instances of unneeded arch/hlt.h includes,
various hlt() calls that weren't supposed to exit (but
might have) and various forms of endless loops around
hlt() calls.
All these are sorted out now: unnecessary includes are
dropped, hlt() is uniformly replaced with halt() (except
in assembly, obviously).
Change-Id: I3d38fed6e8d67a28fdeb17be803d8c4b62d383c5
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7608
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/northbridge/intel/nehalem')
| -rw-r--r-- | src/northbridge/intel/nehalem/raminit.c | 20 |
1 files changed, 6 insertions, 14 deletions
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index 74ddb4b..fb82484 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -28,7 +28,6 @@ #include <stdlib.h> #include <console/console.h> #include <string.h> -#include <arch/hlt.h> #include <arch/io.h> #include <cpu/x86/msr.h> #include <cbmem.h> @@ -38,6 +37,7 @@ #include <pc80/mc146818rtc.h> #include <device/pci_def.h> #include <arch/cpu.h> +#include <halt.h> #include <spd.h> #include "raminit.h" #include <timestamp.h> @@ -3805,9 +3805,7 @@ void chipset_init(const int s3resume) write_mchbar8(0x2ca8, 0); outb(0x6, 0xcf9); #if REAL - while (1) { - asm volatile ("hlt"); - } + halt(); #else printf("CP5\n"); exit(0); @@ -4041,9 +4039,7 @@ void raminit(const int s3resume, const u8 *spd_addrmap) "Interrupted RAM init, reset required.\n"); outb(0x6, 0xcf9); #if REAL - while (1) { - asm volatile ("hlt"); - } + halt(); #endif } } @@ -4407,9 +4403,7 @@ void raminit(const int s3resume, const u8 *spd_addrmap) write_mchbar8(0x2ca8, read_mchbar8(0x2ca8) + 4); write_mchbar32(0x1af0, read_mchbar32(0x1af0) | 0x10); #if REAL - while (1) { - asm volatile ("hlt"); - } + halt(); #else printf("CP5\n"); exit(0); @@ -4510,9 +4504,7 @@ void raminit(const int s3resume, const u8 *spd_addrmap) outb(0xe, 0xcf9); #if REAL - while (1) { - asm volatile ("hlt"); - } + halt(); #else printf("CP5\n"); exit(0); @@ -4990,7 +4982,7 @@ void raminit(const int s3resume, const u8 *spd_addrmap) /* Failed S3 resume, reset to come up cleanly */ outb(0xe, 0xcf9); - hlt(); + halt(); } #endif } |
