diff options
author | Kevin Paul Herbert <kph@meraki.net> | 2014-12-24 18:43:20 -0800 |
---|---|---|
committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-15 08:50:22 +0100 |
commit | bde6d309dfafe58732ec46314a2d4c08974b62d4 (patch) | |
tree | 17ba00565487ddfbb5759c96adfbb3fffe2a4550 /src/northbridge/intel/nehalem/gma.c | |
parent | 4b10dec1a66122b515b2191f823d7fd379ec655f (diff) | |
download | coreboot-staging-bde6d309dfafe58732ec46314a2d4c08974b62d4.zip coreboot-staging-bde6d309dfafe58732ec46314a2d4c08974b62d4.tar.gz |
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.
Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/intel/nehalem/gma.c')
-rw-r--r-- | src/northbridge/intel/nehalem/gma.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c index c3e2a49..9fc4bd4 100644 --- a/src/northbridge/intel/nehalem/gma.c +++ b/src/northbridge/intel/nehalem/gma.c @@ -274,12 +274,12 @@ static struct resource *gtt_res = NULL; u32 gtt_read(u32 reg) { - return read32(gtt_res->base + reg); + return read32(res2mmio(gtt_res, reg, 0)); } void gtt_write(u32 reg, u32 data) { - write32(gtt_res->base + reg, data); + write32(res2mmio(gtt_res, reg, 0), data); } static inline void gtt_write_powermeter(const struct gt_powermeter *pm) @@ -561,7 +561,7 @@ static void gma_pm_init_post_vbios(struct device *dev) #if IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) -static void train_link(u32 mmio) +static void train_link(u8 *mmio) { /* Clear interrupts. */ write32(mmio + DEIIR, 0xffffffff); @@ -584,7 +584,7 @@ static void train_link(u32 mmio) read32(mmio + 0x000f0014); // = 0x00000600 } -static void power_port(u32 mmio) +static void power_port(u8 *mmio) { read32(mmio + 0x000e1100); // = 0x00000000 write32(mmio + 0x000e1100, 0x00000000); @@ -639,7 +639,7 @@ static void power_port(u32 mmio) } static void intel_gma_init(const struct northbridge_intel_nehalem_config *info, - u32 mmio, u32 physbase, u16 piobase, u32 lfb) + u8 *mmio, u32 physbase, u16 piobase, u32 lfb) { int i; u8 edid_data[128]; @@ -1020,8 +1020,8 @@ static void gma_func0_init(struct device *dev) && lfb_res && lfb_res->base) { printk(BIOS_SPEW, "Initializing VGA without OPROM. MMIO 0x%llx\n", gtt_res->base); - intel_gma_init(conf, gtt_res->base, physbase, pio_res->base, - lfb_res->base); + intel_gma_init(conf, res2mmio(gtt_res, 0, 0), physbase, + pio_res->base, lfb_res->base); } /* Linux relies on VBT for panel info. */ |