summaryrefslogtreecommitdiffstats
path: root/src/northbridge/intel/i945/Config.lb
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2009-03-11 16:20:39 +0000
committerStefan Reinauer <stepan@openbios.org>2009-03-11 16:20:39 +0000
commit30140a59f7c34b583b670401a205338e0c8e3311 (patch)
tree07b6d6f8c10c804ae3d0e0e9b6eb6f73511a29d7 /src/northbridge/intel/i945/Config.lb
parentd229677b6191868661676658d84d7325d8f69f23 (diff)
downloadcoreboot-staging-30140a59f7c34b583b670401a205338e0c8e3311.zip
coreboot-staging-30140a59f7c34b583b670401a205338e0c8e3311.tar.gz
i945 northbridge update
- lots of PCIe updates - various bug fixes to early init - some fixes for typos and warnings - initial support for PCIe x16 - some minor fixes to memory init code - some subsystem vendor id patches, to be consistent with ICH7 Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i945/Config.lb')
-rw-r--r--src/northbridge/intel/i945/Config.lb3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/Config.lb b/src/northbridge/intel/i945/Config.lb
index 7444379..15a9e8f 100644
--- a/src/northbridge/intel/i945/Config.lb
+++ b/src/northbridge/intel/i945/Config.lb
@@ -1,7 +1,7 @@
#
# This file is part of the coreboot project.
#
-# Copyright (C) 2007-2008 coresystems GmbH
+# Copyright (C) 2007-2009 coresystems GmbH
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -19,3 +19,4 @@
config chip.h
driver northbridge.o
+driver gma.o
OpenPOWER on IntegriCloud