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| author | Eric Biederman <ebiederm@xmission.com> | 2004-11-04 11:04:33 +0000 |
|---|---|---|
| committer | Eric Biederman <ebiederm@xmission.com> | 2004-11-04 11:04:33 +0000 |
| commit | 018d8dd60f2cc0c82faac0ee2657daa163dd43e7 (patch) | |
| tree | 528de120d262a9df05ce8b6119f593c85fa6b809 /src/northbridge/intel/i855pm/raminit.c | |
| parent | 4403f6082372d069e3cabe0918d9af5f9c1dccf6 (diff) | |
| download | coreboot-staging-018d8dd60f2cc0c82faac0ee2657daa163dd43e7.zip coreboot-staging-018d8dd60f2cc0c82faac0ee2657daa163dd43e7.tar.gz | |
- Update abuild.sh so it will rebuild successfull builds
- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
enabled. All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i855pm/raminit.c')
| -rw-r--r-- | src/northbridge/intel/i855pm/raminit.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/i855pm/raminit.c b/src/northbridge/intel/i855pm/raminit.c index 5a59922..136e3cb 100644 --- a/src/northbridge/intel/i855pm/raminit.c +++ b/src/northbridge/intel/i855pm/raminit.c @@ -19,6 +19,7 @@ /* converted to C 6/2004 yhlu */ #define DEBUG_RAM_CONFIG 1 +#undef ASM_CONSOLE_LOGLEVEL #define ASM_CONSOLE_LOGLEVEL 9 #define dumpnorth() dump_pci_device(PCI_DEV(0, 0, 1)) |
