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| author | Patrick Georgi <pgeorgi@google.com> | 2014-11-28 22:35:36 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2014-11-30 12:20:07 +0100 |
| commit | bd79c5eaf1f13f33c43c99657f24fa4c0330619a (patch) | |
| tree | c20d6e5e00fcf3494d1c3fdd2d84b97ae34a21ea /src/northbridge/intel/haswell/raminit.c | |
| parent | 1b2f2a071488bd15ce80194e85d318cd44659e54 (diff) | |
| download | coreboot-staging-bd79c5eaf1f13f33c43c99657f24fa4c0330619a.zip coreboot-staging-bd79c5eaf1f13f33c43c99657f24fa4c0330619a.tar.gz | |
Replace hlt() loops with halt()
Change-Id: I8486e70615f4c404a342cb86963b5357a934c41d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7606
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/northbridge/intel/haswell/raminit.c')
| -rw-r--r-- | src/northbridge/intel/haswell/raminit.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index 1577e68..197dc0f 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -20,11 +20,11 @@ #include <console/console.h> #include <bootmode.h> #include <string.h> -#include <arch/hlt.h> #include <arch/io.h> #include <cbmem.h> #include <arch/cbfs.h> #include <cbfs.h> +#include <halt.h> #include <ip_checksum.h> #include <pc80/mc146818rtc.h> #include <device/pci_def.h> @@ -155,9 +155,7 @@ void sdram_initialize(struct pei_data *pei_data) printk(BIOS_DEBUG, "Giving up in sdram_initialize: " "No MRC data\n"); outb(0x6, 0xcf9); - while(1) { - hlt(); - } + halt(); } /* Pass console handler in pei_data */ |
