diff options
| author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-02-08 19:00:54 +0100 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-06-01 11:11:26 +0200 |
| commit | ee62164bb2052b065e72c5202c221b600401e0bc (patch) | |
| tree | d542abaddfbef56da89611f1e1f545aeb4a4e838 /src/mainboard | |
| parent | 25b55f3d1ceb4fdf67ffb29ed4080dfd5f4e5916 (diff) | |
| download | coreboot-staging-ee62164bb2052b065e72c5202c221b600401e0bc.zip coreboot-staging-ee62164bb2052b065e72c5202c221b600401e0bc.tar.gz | |
lenovo/x201: Fix order of SPI init.
The lock bit for UVSVC/LVSVC was set before both registers were programmed.
Change-Id: I000440db5c8dd2f260ebc1b69108b75621faf7b3
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5167
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/lenovo/x201/mainboard.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c index 332b2aa..786d560 100644 --- a/src/mainboard/lenovo/x201/mainboard.c +++ b/src/mainboard/lenovo/x201/mainboard.c @@ -136,9 +136,9 @@ static void mainboard_init(device_t dev) RCBA32(0x389c) = 0x0601209f; RCBA32(0x38b0) = 0x00000004; RCBA32(0x38b4) = 0x03040002; - RCBA32(0x38c0) = 0x00000007; - RCBA32(0x38c4) = 0x00802005; RCBA32(0x38c8) = 0x00002005; + RCBA32(0x38c4) = 0x00802005; + RCBA32(0x38c0) = 0x00000007; RCBA32(0x3804) = 0x3f04e008; printk(BIOS_SPEW, "SPI configured\n"); |
