From ee62164bb2052b065e72c5202c221b600401e0bc Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Sat, 8 Feb 2014 19:00:54 +0100 Subject: lenovo/x201: Fix order of SPI init. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The lock bit for UVSVC/LVSVC was set before both registers were programmed. Change-Id: I000440db5c8dd2f260ebc1b69108b75621faf7b3 Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/5167 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan Reviewed-by: Kyösti Mälkki --- src/mainboard/lenovo/x201/mainboard.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c index 332b2aa..786d560 100644 --- a/src/mainboard/lenovo/x201/mainboard.c +++ b/src/mainboard/lenovo/x201/mainboard.c @@ -136,9 +136,9 @@ static void mainboard_init(device_t dev) RCBA32(0x389c) = 0x0601209f; RCBA32(0x38b0) = 0x00000004; RCBA32(0x38b4) = 0x03040002; - RCBA32(0x38c0) = 0x00000007; - RCBA32(0x38c4) = 0x00802005; RCBA32(0x38c8) = 0x00002005; + RCBA32(0x38c4) = 0x00802005; + RCBA32(0x38c0) = 0x00000007; RCBA32(0x3804) = 0x3f04e008; printk(BIOS_SPEW, "SPI configured\n"); -- cgit v1.1