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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2011-04-11 20:17:22 +0000
committerStefan Reinauer <stepan@openbios.org>2011-04-11 20:17:22 +0000
commit5005bb06c17461ef75cd1fef55c24dffaa05e580 (patch)
tree2c38986a89152225ad56cb44227f5bc6ddbecd06 /src/mainboard
parent1fa61ebb3344105ae633ed7eb1be05cc574b666c (diff)
downloadcoreboot-staging-5005bb06c17461ef75cd1fef55c24dffaa05e580.zip
coreboot-staging-5005bb06c17461ef75cd1fef55c24dffaa05e580.tar.gz
Unify use of post_code
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6487 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/db800/romstage.c2
-rw-r--r--src/mainboard/amd/norwich/romstage.c2
-rw-r--r--src/mainboard/amd/rumba/romstage.c1
-rw-r--r--src/mainboard/artecgroup/dbe61/romstage.c2
-rw-r--r--src/mainboard/digitallogic/msm800sev/romstage.c3
-rw-r--r--src/mainboard/iei/pcisa-lx-800-r10/romstage.c2
-rw-r--r--src/mainboard/lippert/frontrunner/romstage.c1
-rw-r--r--src/mainboard/lippert/hurricane-lx/romstage.c2
-rw-r--r--src/mainboard/lippert/literunner-lx/romstage.c2
-rw-r--r--src/mainboard/lippert/roadrunner-lx/romstage.c2
-rw-r--r--src/mainboard/lippert/spacerunner-lx/romstage.c2
-rw-r--r--src/mainboard/pcengines/alix1c/romstage.c3
-rw-r--r--src/mainboard/pcengines/alix2d/romstage.c3
-rw-r--r--src/mainboard/traverse/geos/romstage.c3
-rw-r--r--src/mainboard/winent/pl6064/romstage.c2
-rw-r--r--src/mainboard/wyse/s50/romstage.c1
16 files changed, 0 insertions, 33 deletions
diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c
index a811cd9..60ed7c7 100644
--- a/src/mainboard/amd/db800/romstage.c
+++ b/src/mainboard/amd/db800/romstage.c
@@ -28,7 +28,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -56,7 +55,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
void main(unsigned long bist)
{
- post_code(0x01);
static const struct mem_controller memctrl[] = {
{.channel0 = {DIMM0, DIMM1}}
diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c
index 7350c44..d385074 100644
--- a/src/mainboard/amd/norwich/romstage.c
+++ b/src/mainboard/amd/norwich/romstage.c
@@ -28,7 +28,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -53,7 +52,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
void main(unsigned long bist)
{
- post_code(0x01);
static const struct mem_controller memctrl[] = {
{.channel0 = {DIMM0, DIMM1}}
diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c
index 7da3647..b81f386 100644
--- a/src/mainboard/amd/rumba/romstage.c
+++ b/src/mainboard/amd/rumba/romstage.c
@@ -8,7 +8,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/gx2def.h>
-#include <cpu/amd/geode_post_code.h>
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
#include "southbridge/amd/cs5536/early_setup.c"
diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c
index 4df61a2..465fb7d 100644
--- a/src/mainboard/artecgroup/dbe61/romstage.c
+++ b/src/mainboard/artecgroup/dbe61/romstage.c
@@ -29,7 +29,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include "spd_table.h"
#include <spd.h>
@@ -68,7 +67,6 @@ static int spd_read_byte(unsigned device, unsigned address)
void main(unsigned long bist)
{
- post_code(0x01);
msr_t msr;
static const struct mem_controller memctrl[] = {
diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c
index a68e4fc..f043ee8 100644
--- a/src/mainboard/digitallogic/msm800sev/romstage.c
+++ b/src/mainboard/digitallogic/msm800sev/romstage.c
@@ -9,7 +9,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -37,7 +36,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
void main(unsigned long bist)
{
- post_code(0x01);
static const struct mem_controller memctrl [] = {
{.channel0 = {DIMM0, DIMM1}}
@@ -79,7 +77,6 @@ void main(unsigned long bist)
We use method 1 on Norwich.
*/
post_code(0x02);
- print_err("POST 02\n");
__asm__("wbinvd\n");
print_err("Past wbinvd\n");
/* we are finding the return does not work on this board. Explicitly call the label that is
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
index b5dcf22..57d51e3 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
+++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
@@ -28,7 +28,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -60,7 +59,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
void main(unsigned long bist)
{
- post_code(0x01);
static const struct mem_controller memctrl[] = {
{.channel0 = {DIMM0, DIMM1}}
diff --git a/src/mainboard/lippert/frontrunner/romstage.c b/src/mainboard/lippert/frontrunner/romstage.c
index 3047ceb..413b86a 100644
--- a/src/mainboard/lippert/frontrunner/romstage.c
+++ b/src/mainboard/lippert/frontrunner/romstage.c
@@ -9,7 +9,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/gx2def.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5535/cs5535.h"
#include "southbridge/amd/cs5535/early_smbus.c"
#include "southbridge/amd/cs5535/early_setup.c"
diff --git a/src/mainboard/lippert/hurricane-lx/romstage.c b/src/mainboard/lippert/hurricane-lx/romstage.c
index e0157ab..50b49cb 100644
--- a/src/mainboard/lippert/hurricane-lx/romstage.c
+++ b/src/mainboard/lippert/hurricane-lx/romstage.c
@@ -31,7 +31,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -118,7 +117,6 @@ static void mb_gpio_init(void)
void main(unsigned long bist)
{
- post_code(0x01);
static const struct mem_controller memctrl[] = {
{.channel0 = {DIMM0, DIMM1}}
diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c
index 8c7d506..31720f4 100644
--- a/src/mainboard/lippert/literunner-lx/romstage.c
+++ b/src/mainboard/lippert/literunner-lx/romstage.c
@@ -32,7 +32,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include "southbridge/amd/cs5536/early_smbus.c"
#include "southbridge/amd/cs5536/early_setup.c"
@@ -161,7 +160,6 @@ static void mb_gpio_init(void)
void main(unsigned long bist)
{
int err;
- post_code(0x01);
static const struct mem_controller memctrl[] = {
{.channel0 = {DIMM0, DIMM1}}
diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c
index 413e1f0..94eb285 100644
--- a/src/mainboard/lippert/roadrunner-lx/romstage.c
+++ b/src/mainboard/lippert/roadrunner-lx/romstage.c
@@ -31,7 +31,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -93,7 +92,6 @@ static void mb_gpio_init(void)
void main(unsigned long bist)
{
- post_code(0x01);
static const struct mem_controller memctrl[] = {
{.channel0 = {DIMM0, DIMM1}}
diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c
index cb2e27d..bb104e2 100644
--- a/src/mainboard/lippert/spacerunner-lx/romstage.c
+++ b/src/mainboard/lippert/spacerunner-lx/romstage.c
@@ -32,7 +32,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include "southbridge/amd/cs5536/early_smbus.c"
#include "southbridge/amd/cs5536/early_setup.c"
@@ -158,7 +157,6 @@ static void mb_gpio_init(void)
void main(unsigned long bist)
{
int err;
- post_code(0x01);
static const struct mem_controller memctrl[] = {
{.channel0 = {DIMM0, DIMM1}}
diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c
index 68f6f84..9806ff4 100644
--- a/src/mainboard/pcengines/alix1c/romstage.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -30,7 +30,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
@@ -118,8 +117,6 @@ void main(unsigned long bist)
{.channel0 = {DIMM0}},
};
- post_code(0x01);
-
SystemPreInit();
msr_init();
diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c
index 1a0acf2..308066d 100644
--- a/src/mainboard/pcengines/alix2d/romstage.c
+++ b/src/mainboard/pcengines/alix2d/romstage.c
@@ -30,7 +30,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
@@ -142,8 +141,6 @@ void main(unsigned long bist)
{.channel0 = {DIMM0}},
};
- post_code(0x01);
-
SystemPreInit();
msr_init();
diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c
index 07962d3..44623db 100644
--- a/src/mainboard/traverse/geos/romstage.c
+++ b/src/mainboard/traverse/geos/romstage.c
@@ -29,7 +29,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -54,8 +53,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
void main(unsigned long bist)
{
- post_code(0x01);
-
static const struct mem_controller memctrl[] = {
{.channel0 = {DIMM0, DIMM1}}
};
diff --git a/src/mainboard/winent/pl6064/romstage.c b/src/mainboard/winent/pl6064/romstage.c
index 7efb83f..a3c9234 100644
--- a/src/mainboard/winent/pl6064/romstage.c
+++ b/src/mainboard/winent/pl6064/romstage.c
@@ -30,7 +30,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -58,7 +57,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
void main(unsigned long bist)
{
- post_code(0x01);
static const struct mem_controller memctrl[] = {
{.channel0 = {DIMM0, DIMM1}}
diff --git a/src/mainboard/wyse/s50/romstage.c b/src/mainboard/wyse/s50/romstage.c
index 6865877..a5feddb 100644
--- a/src/mainboard/wyse/s50/romstage.c
+++ b/src/mainboard/wyse/s50/romstage.c
@@ -29,7 +29,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/gx2def.h>
-#include <cpu/amd/geode_post_code.h>
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
#include "southbridge/amd/cs5536/early_setup.c"
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