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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-04 17:23:49 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-26 09:27:51 +0200 |
commit | f1bb19abee7a81d5463c5885b57fe2cbc5d21715 (patch) | |
tree | 316945170202105f160d384bd5910ababfedf887 /src/mainboard/lippert/toucan-af | |
parent | c459f9658b73ccb6a4300a00eafef90412fc4984 (diff) | |
download | coreboot-staging-f1bb19abee7a81d5463c5885b57fe2cbc5d21715.zip coreboot-staging-f1bb19abee7a81d5463c5885b57fe2cbc5d21715.tar.gz |
AGESA fam14: Comment lack of PCI-e slot resets
These boards return with AGESA_UNSUPPORTED, while other boards return
AGESA_SUCCESS here when there is no hardware for external reset signalling.
Change-Id: I5aed211b1812888af55a691cfbfa8d7b5aff91bc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5679
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/lippert/toucan-af')
-rw-r--r-- | src/mainboard/lippert/toucan-af/BiosCallOuts.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/src/mainboard/lippert/toucan-af/BiosCallOuts.c b/src/mainboard/lippert/toucan-af/BiosCallOuts.c index 0f292c1..a9570bc 100644 --- a/src/mainboard/lippert/toucan-af/BiosCallOuts.c +++ b/src/mainboard/lippert/toucan-af/BiosCallOuts.c @@ -23,6 +23,12 @@ #include "heapManager.h" #include <northbridge/amd/agesa/family14/dimmSpd.h> +/* Should AGESA_GNB_PCIE_SLOT_RESET use agesa_NoopSuccess? + * + * COM Express doesn't provide dedicated resets for individual lanes + * and it's not needed for the on-board Intel I210 GbE controller. + */ + STATIC BIOS_CALLOUT_STRUCT BiosCallouts[] = { {AGESA_ALLOCATE_BUFFER, BiosAllocateBuffer }, @@ -32,7 +38,7 @@ STATIC BIOS_CALLOUT_STRUCT BiosCallouts[] = {AGESA_READ_SPD, BiosReadSpd }, {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, {AGESA_RUNFUNC_ONAP, BiosRunFuncOnAp }, - {AGESA_GNB_PCIE_SLOT_RESET, BiosGnbPcieSlotReset }, + {AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopUnsupported }, {AGESA_HOOKBEFORE_DRAM_INIT, BiosHookBeforeDramInit}, {AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY, agesa_NoopSuccess }, {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, @@ -85,11 +91,3 @@ AGESA_STATUS BiosHookBeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) return AGESA_SUCCESS; } - -/* PCIE slot reset control */ -AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) -{ - // COM Express doesn't provide dedicated resets for individual lanes - // and it's not needed for the on-board Intel I210 GbE controller. - return AGESA_UNSUPPORTED; -} |