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author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-11-15 20:40:04 +0100 |
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committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-12-06 21:35:32 +0100 |
commit | c746dcbe91bc3c30c424238104d80c831ffe2ca8 (patch) | |
tree | c54d61c6811911fdf20bec7b69c31ffda7c546bf /src/mainboard/kontron | |
parent | 845e17c3f773d138e01cfd923395d7baf98057ae (diff) | |
download | coreboot-staging-c746dcbe91bc3c30c424238104d80c831ffe2ca8.zip coreboot-staging-c746dcbe91bc3c30c424238104d80c831ffe2ca8.tar.gz |
kontron/986lcd-m: Fix PCI interrupt routing.
The current interrupt routing shares interrupt 5 between LPC and PCI which
isn't possible.
Use IRQ 11 for all devices in PCI mode. Move conflicting LPC to free IRQ.
Change-Id: I3ac8c2f19195ef6b07f4ee7dde64dd038d024126
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7477
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/kontron')
-rw-r--r-- | src/mainboard/kontron/986lcd-m/devicetree.cb | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb index dee2fda..6a5b221 100644 --- a/src/mainboard/kontron/986lcd-m/devicetree.cb +++ b/src/mainboard/kontron/986lcd-m/devicetree.cb @@ -13,14 +13,14 @@ chip northbridge/intel/i945 device pci 02.1 on end # display controller chip southbridge/intel/i82801gx - register "pirqa_routing" = "0x05" - register "pirqb_routing" = "0x07" - register "pirqc_routing" = "0x05" - register "pirqd_routing" = "0x07" - register "pirqe_routing" = "0x80" - register "pirqf_routing" = "0x80" - register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x06" + register "pirqa_routing" = "0x0b" + register "pirqb_routing" = "0x0b" + register "pirqc_routing" = "0x0b" + register "pirqd_routing" = "0x0b" + register "pirqe_routing" = "0x0b" + register "pirqf_routing" = "0x0b" + register "pirqg_routing" = "0x0b" + register "pirqh_routing" = "0x0b" # GPI routing # 0 No effect (default) @@ -101,11 +101,11 @@ chip northbridge/intel/i945 end device pnp 4e.2 on # COM3 io 0x60 = 0x3e8 - irq 0x70 = 11 + irq 0x70 = 6 end device pnp 4e.3 on # COM4 io 0x60 = 0x2e8 - irq 0x70 = 10 + irq 0x70 = 6 irq 0xf1 = 4 # set IRMODE 0 # XXX not an irq end device pnp 4e.5 off # Keyboard |