diff options
author | Aaron Durbin <adurbin@chromium.org> | 2014-08-14 08:35:11 -0500 |
---|---|---|
committer | Aaron Durbin <adurbin@google.com> | 2014-08-15 03:44:46 +0200 |
commit | a0a3727dbbd7f3ae9f9021e0797ce2fc61d1b79e (patch) | |
tree | a0233b3d5b638eb05bf5a4d57ee64e73187da677 /src/mainboard/iei | |
parent | b7f1bfcf289f218f05dfb17561a5b868eea65b92 (diff) | |
download | coreboot-staging-a0a3727dbbd7f3ae9f9021e0797ce2fc61d1b79e.zip coreboot-staging-a0a3727dbbd7f3ae9f9021e0797ce2fc61d1b79e.tar.gz |
intel/cpu: rename car.h to romstage.h
This header has nothing to do with cache-as-ram. Therefore, 'car'
is the wrong term to use. It is about providing a prototype for
*romstage*.
Change-Id: Ibc5bc6f3c38e74d6337c12f246846853ceae4743
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/6661
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/iei')
-rw-r--r-- | src/mainboard/iei/juki-511p/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/iei/nova4899r/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/iei/pcisa-lx-800-r10/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/iei/pm-lx-800-r11/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/iei/pm-lx2-800-r10/romstage.c | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/iei/juki-511p/romstage.c b/src/mainboard/iei/juki-511p/romstage.c index b8daac4..1b8e952 100644 --- a/src/mainboard/iei/juki-511p/romstage.c +++ b/src/mainboard/iei/juki-511p/romstage.c @@ -32,7 +32,7 @@ #define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1) -#include <cpu/intel/car.h> +#include <cpu/intel/romstage.h> static void main(unsigned long bist) { w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/iei/nova4899r/romstage.c b/src/mainboard/iei/nova4899r/romstage.c index 9a89107..2b6caf3 100644 --- a/src/mainboard/iei/nova4899r/romstage.c +++ b/src/mainboard/iei/nova4899r/romstage.c @@ -32,7 +32,7 @@ #include "northbridge/amd/gx1/raminit.c" -#include <cpu/intel/car.h> +#include <cpu/intel/romstage.h> static void main(unsigned long bist) { w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c index 2af0b2f..9f42232 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c +++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c @@ -49,7 +49,7 @@ int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/car.h> +#include <cpu/intel/romstage.h> void main(unsigned long bist) { diff --git a/src/mainboard/iei/pm-lx-800-r11/romstage.c b/src/mainboard/iei/pm-lx-800-r11/romstage.c index d2e331e..ac68b1d 100644 --- a/src/mainboard/iei/pm-lx-800-r11/romstage.c +++ b/src/mainboard/iei/pm-lx-800-r11/romstage.c @@ -53,7 +53,7 @@ int spd_read_byte(unsigned int device, unsigned int address) #include <cpu/amd/geode_lx/syspreinit.c> #include <cpu/amd/geode_lx/msrinit.c> -#include <cpu/intel/car.h> +#include <cpu/intel/romstage.h> void main(unsigned long bist) { static const struct mem_controller memctrl[] = { diff --git a/src/mainboard/iei/pm-lx2-800-r10/romstage.c b/src/mainboard/iei/pm-lx2-800-r10/romstage.c index 947b52d..a83bf7e 100644 --- a/src/mainboard/iei/pm-lx2-800-r10/romstage.c +++ b/src/mainboard/iei/pm-lx2-800-r10/romstage.c @@ -53,7 +53,7 @@ int spd_read_byte(unsigned int device, unsigned int address) #include <cpu/amd/geode_lx/syspreinit.c> #include <cpu/amd/geode_lx/msrinit.c> -#include <cpu/intel/car.h> +#include <cpu/intel/romstage.h> void main(unsigned long bist) { static const struct mem_controller memctrl[] = { |