diff options
author | Patrick Georgi <patrick@georgi-clan.de> | 2012-11-20 18:20:56 +0100 |
---|---|---|
committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-11-28 07:45:05 +0100 |
commit | bbc880eee702fc175d4a3c3e87b682c26c38f940 (patch) | |
tree | a5a55d36dc52758723f0426e3189e0084bedb348 /src/mainboard/hp | |
parent | 721265b87ac1e70dea72c5b1ae7f5878214557cf (diff) | |
download | coreboot-staging-bbc880eee702fc175d4a3c3e87b682c26c38f940.zip coreboot-staging-bbc880eee702fc175d4a3c3e87b682c26c38f940.tar.gz |
amdk8/amdfam10: Use CAR_GLOBAL for sysinfo
This gets rid of the somewhat unstructured placement of AMD's
sysinfo structure in CAR.
We used to carve out some CAR space using a Kconfig variable,
and then put sysinfo there manually (by "virtue" of pointer magic).
Now it's a variable with the CAR_GLOBAL qualifier, and build
system magic.
For this, the following steps were done (but must happen together
since the intermediates won't build):
- Add new CAR_GLOBAL sysinfo_car
- point all sysinfo pointers to sysinfo_car instead of GLOBAL_VAR
- remove DCACHE_RAM_GLOBAL_VAR_SIZE
- from CAR setup (no need to reserve the space)
- commented out code (that was commented out for years)
- only copy sizeof(sysinfo) into RAM after ram init, where
before it copied the whole GLOBAL_VAR area.
- from Kconfig
Change-Id: I3cbcccd883ca6751326c8e32afde2eb0c91229ed
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1887
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/mainboard/hp')
-rw-r--r-- | src/mainboard/hp/dl145_g1/romstage.c | 3 | ||||
-rw-r--r-- | src/mainboard/hp/dl145_g3/Kconfig | 4 | ||||
-rw-r--r-- | src/mainboard/hp/dl145_g3/romstage.c | 3 | ||||
-rw-r--r-- | src/mainboard/hp/dl165_g6_fam10/Kconfig | 4 | ||||
-rw-r--r-- | src/mainboard/hp/dl165_g6_fam10/romstage.c | 2 |
5 files changed, 3 insertions, 13 deletions
diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c index 97e1e30..60ffb19 100644 --- a/src/mainboard/hp/dl145_g1/romstage.c +++ b/src/mainboard/hp/dl145_g1/romstage.c @@ -101,8 +101,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) RC1|DIMM1, RC1|DIMM3, 0, 0, #endif }; - struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE - + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); + struct sys_info *sysinfo = &sysinfo_car; int needs_reset = 0; unsigned bsp_apicid = 0; diff --git a/src/mainboard/hp/dl145_g3/Kconfig b/src/mainboard/hp/dl145_g3/Kconfig index 6f491f2..bee23f7 100644 --- a/src/mainboard/hp/dl145_g3/Kconfig +++ b/src/mainboard/hp/dl145_g3/Kconfig @@ -34,10 +34,6 @@ config DCACHE_RAM_SIZE hex default 0x04000 -config DCACHE_RAM_GLOBAL_VAR_SIZE - hex - default 0x01000 - config APIC_ID_OFFSET hex default 0x8 diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c index 7decb72..e3c397c 100644 --- a/src/mainboard/hp/dl145_g3/romstage.c +++ b/src/mainboard/hp/dl145_g3/romstage.c @@ -134,8 +134,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) DIMM5, DIMM7, 0, 0, }; - struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE - + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); + struct sys_info *sysinfo = &sysinfo_car; int needs_reset; unsigned bsp_apicid = 0; diff --git a/src/mainboard/hp/dl165_g6_fam10/Kconfig b/src/mainboard/hp/dl165_g6_fam10/Kconfig index a1dd681..32abeec 100644 --- a/src/mainboard/hp/dl165_g6_fam10/Kconfig +++ b/src/mainboard/hp/dl165_g6_fam10/Kconfig @@ -33,10 +33,6 @@ config DCACHE_RAM_SIZE hex default 0x0c000 -config DCACHE_RAM_GLOBAL_VAR_SIZE - hex - default 0x04000 - config APIC_ID_OFFSET hex default 0 diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c index 443fa4e..c32728b 100644 --- a/src/mainboard/hp/dl165_g6_fam10/romstage.c +++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c @@ -101,7 +101,7 @@ static const u8 spd_addr[] = { void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { - struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); + struct sys_info *sysinfo = &sysinfo_car; u32 bsp_apicid = 0, val; msr_t msr; |