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author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-03-13 20:36:11 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-03-13 20:36:11 +0000 |
commit | 53c7276bd1a18160f022c468b7ce021c5386577c (patch) | |
tree | 3aaae550b28a2b50c3e1770e84ba816a37646357 /src/mainboard/gigabyte/ga-6bxc | |
parent | 9c1e1f0d3a562d6f1fb1a1bad5a8f58f62bf4613 (diff) | |
download | coreboot-staging-53c7276bd1a18160f022c468b7ce021c5386577c.zip coreboot-staging-53c7276bd1a18160f022c468b7ce021c5386577c.tar.gz |
Use CPU_INTEL_SLOT_1 for Slot 1 boards (trivial).
This fixes a longstanding TODO item.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5205 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/gigabyte/ga-6bxc')
-rw-r--r-- | src/mainboard/gigabyte/ga-6bxc/Kconfig | 2 | ||||
-rw-r--r-- | src/mainboard/gigabyte/ga-6bxc/devicetree.cb | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/gigabyte/ga-6bxc/Kconfig b/src/mainboard/gigabyte/ga-6bxc/Kconfig index 5e297e9..9843b78 100644 --- a/src/mainboard/gigabyte/ga-6bxc/Kconfig +++ b/src/mainboard/gigabyte/ga-6bxc/Kconfig @@ -21,7 +21,7 @@ config BOARD_GIGABYTE_GA_6BXC bool "GA-6BXC" select ARCH_X86 - select CPU_INTEL_SLOT_2 + select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB select SUPERIO_ITE_IT8671F diff --git a/src/mainboard/gigabyte/ga-6bxc/devicetree.cb b/src/mainboard/gigabyte/ga-6bxc/devicetree.cb index d75ae19..729b6b8 100644 --- a/src/mainboard/gigabyte/ga-6bxc/devicetree.cb +++ b/src/mainboard/gigabyte/ga-6bxc/devicetree.cb @@ -1,6 +1,6 @@ chip northbridge/intel/i440bx # Northbridge device apic_cluster 0 on # APIC cluster - chip cpu/intel/slot_2 # CPU (FIXME: It's slot 1, actually) + chip cpu/intel/slot_1 # CPU device apic 0 on end # APIC end end |