Attached patch removes unnecessary IRQ routing info (for ACPI, mptable etc needs to be fixed too). The devicetree.cb changes should reflect now the real board configuration. It has one 16x slot and 1x slot (GPP device 9) and GPP device a is onboard ethernet. The mainboard.c now presents the board name and

I removed the gpio asserts - I think those are not used here.

The pcie 1x slot works, the x1 card I have does not work in 16x slot, but in orig bios I cannot see it any slot, so it is kind of better.

The classic PCI slot works fine too. However it seems SATA has some issues.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz> 
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5720 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 28 insertions, 143 deletions

diff --git a/src/mainboard/asrock/939a785gmh/acpi/routing.asl b/src/mainboard/asrock/939a785gmh/acpi/routing.asl
index 8907460..fa3760e 100644
--- a/src/mainboard/asrock/939a785gmh/acpi/routing.asl
+++ b/src/mainboard/asrock/939a785gmh/acpi/routing.asl
@@ -32,31 +32,12 @@ Scope(\_SB) {
 		/* Bus 0, Dev 0 - RS780 Host Controller */
 		/* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
 		/* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
+		
 		Package(){0x0002FFFF, 0, INTC, 0 },
 		Package(){0x0002FFFF, 1, INTD, 0 },
 		Package(){0x0002FFFF, 2, INTA, 0 },
 		Package(){0x0002FFFF, 3, INTB, 0 },
-		/* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
-		/* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
-		Package(){0x0004FFFF, 0, INTA, 0 },
-		Package(){0x0004FFFF, 1, INTB, 0 },
-		Package(){0x0004FFFF, 2, INTC, 0 },
-		Package(){0x0004FFFF, 3, INTD, 0 },
-		/* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
-		/* Package(){0x0005FFFF, 0, INTB, 0 }, */
-		/* Package(){0x0005FFFF, 1, INTC, 0 }, */
-		/* Package(){0x0005FFFF, 2, INTD, 0 }, */
-		/* Package(){0x0005FFFF, 3, INTA, 0 }, */
-		/* Bus 0, Dev 6 - PCIe Bridge for Ethernet Chip */
-		Package(){0x0006FFFF, 0, INTC, 0 },
-		Package(){0x0006FFFF, 1, INTD, 0 },
-		Package(){0x0006FFFF, 2, INTA, 0 },
-		Package(){0x0006FFFF, 3, INTB, 0 },
-		/* Bus 0, Dev 7 - PCIe Bridge for x1 PCIe Slot */
-		Package(){0x0007FFFF, 0, INTD, 0 },
-		Package(){0x0007FFFF, 1, INTA, 0 },
-		Package(){0x0007FFFF, 2, INTB, 0 },
-		Package(){0x0007FFFF, 3, INTC, 0 },
+		
 		/* Bus 0, Funct 8 - Southbridge port (normally hidden) */
 
 		/* SB devices */
@@ -69,12 +50,12 @@ Scope(\_SB) {
 		Package(){0x0012FFFF, 0, INTA, 0 },
 		Package(){0x0012FFFF, 1, INTB, 0 },
 		Package(){0x0012FFFF, 2, INTC, 0 },
+		Package(){0x0012FFFF, 3, INTD, 0 },
 
 		Package(){0x0013FFFF, 0, INTC, 0 },
 		Package(){0x0013FFFF, 1, INTD, 0 },
 		Package(){0x0013FFFF, 2, INTA, 0 },
-
-		/* Package(){0x0014FFFF, 1, INTA, 0 }, */
+		Package(){0x0013FFFF, 3, INTB, 0 },
 
 		/* Bus 0, Dev 20 - F0:SMBus/ACPI,F1:IDE;F2:HDAudio;F3:LPC;F4:PCIBridge;F5:USB */
 		Package(){0x0014FFFF, 0, INTA, 0 },
@@ -93,47 +74,21 @@ Scope(\_SB) {
 
 		/* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
 		Package(){0x0002FFFF, 0, 0, 18 },
-		/* Package(){0x0002FFFF, 1, 0, 19 }, */
-		/* Package(){0x0002FFFF, 2, 0, 16 }, */
-		/* Package(){0x0002FFFF, 3, 0, 17 }, */
-
-		/* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
-		Package(){0x0003FFFF, 0, 0, 19 },
-
-		/* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
-		Package(){0x0004FFFF, 0, 0, 16 },
-		/* Package(){0x0004FFFF, 1, 0, 17 }, */
-		/* Package(){0x0004FFFF, 2, 0, 18 }, */
-		/* Package(){0x0004FFFF, 3, 0, 19 }, */
-
-		/* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
-		/* Package(){0x0005FFFF, 0, 0, 17 }, */
-		/* Package(){0x0005FFFF, 1, 0, 18 }, */
-		/* Package(){0x0005FFFF, 2, 0, 19 }, */
-		/* Package(){0x0005FFFF, 3, 0, 16 }, */
-
-		/* Bus 0, Dev 6 - General purpose PCIe bridge 6 */
-		/* Package(){0x0006FFFF, 0, 0, 18 }, */
-		/* Package(){0x0006FFFF, 1, 0, 19 }, */
-		/* Package(){0x0006FFFF, 2, 0, 16 }, */
-		/* Package(){0x0006FFFF, 3, 0, 17 }, */
-
-		/* Bus 0, Dev 7 - PCIe Bridge for network card */
-		/* Package(){0x0007FFFF, 0, 0, 19 }, */
-		/* Package(){0x0007FFFF, 1, 0, 16 }, */
-		/* Package(){0x0007FFFF, 2, 0, 17 }, */
-		/* Package(){0x0007FFFF, 3, 0, 18 }, */
+		Package(){0x0002FFFF, 1, 0, 19 },
+		Package(){0x0002FFFF, 2, 0, 16 },
+		Package(){0x0002FFFF, 3, 0, 17 },
 
-		/* Bus 0, Dev 9 - PCIe Bridge for network card */
+		/* Bus 0, Dev 9 - PCIe x1 slot  */
 		Package(){0x0009FFFF, 0, 0, 17 },
-		/* Package(){0x0009FFFF, 1, 0, 16 }, */
-		/* Package(){0x0009FFFF, 2, 0, 17 }, */
-		/* Package(){0x0009FFFF, 3, 0, 18 }, */
-		/* Bus 0, Dev A - PCIe Bridge for network card */
+		Package(){0x0009FFFF, 1, 0, 18 },
+		Package(){0x0009FFFF, 2, 0, 19 },
+		Package(){0x0009FFFF, 3, 0, 10 },
+		
+		/* Bus 0, Dev A - PCIe internal ethernet */
 		Package(){0x000AFFFF, 0, 0, 18 },
-		/* Package(){0x000AFFFF, 1, 0, 16 }, */
-		/* Package(){0x000AFFFF, 2, 0, 17 }, */
-		/* Package(){0x000AFFFF, 3, 0, 18 }, */
+		Package(){0x000AFFFF, 1, 0, 19 },
+		Package(){0x000AFFFF, 2, 0, 16 },
+		Package(){0x000AFFFF, 3, 0, 17 },
 		/* Bus 0, Funct 8 - Southbridge port (normally hidden) */
 
 		/* SB devices in APIC mode */
@@ -146,41 +101,34 @@ Scope(\_SB) {
 		Package(){0x0012FFFF, 0, 0, 16 },
 		Package(){0x0012FFFF, 1, 0, 17 },
 		Package(){0x0012FFFF, 2, 0, 18 },
+		Package(){0x0012FFFF, 3, 0, 19 },
 
 		Package(){0x0013FFFF, 0, 0, 18 },
 		Package(){0x0013FFFF, 1, 0, 19 },
 		Package(){0x0013FFFF, 2, 0, 16 },
-
-		/* Package(){0x00140000, 0, 0, 16 }, */
-
-		/* Package(){0x00130004, 2, 0, 18 }, */
-		/* Package(){0x00130005, 3, 0, 19 }, */
+		Package(){0x0013FFFF, 3, 0, 17 },
 
 		/* Bus 0, Dev 20 - F0:SMBus/ACPI, F1:IDE; F2:HDAudio; F3:LPC; F4:PCIBridge; F5:USB */
 		Package(){0x0014FFFF, 0, 0, 16 },
 		Package(){0x0014FFFF, 1, 0, 17 },
 		Package(){0x0014FFFF, 2, 0, 18 },
 		Package(){0x0014FFFF, 3, 0, 19 },
-		/* Package(){0x00140004, 2, 0, 18 }, */
-		/* Package(){0x00140004, 3, 0, 19 }, */
-		/* Package(){0x00140005, 1, 0, 17 }, */
-		/* Package(){0x00140006, 1, 0, 17 }, */
 	})
 
 	Name(PR1, Package(){
 		/* Internal graphics - RS780 VGA, Bus1, Dev5 */
-		Package(){0x0005FFFF, 0, INTA, 0 },
-		Package(){0x0005FFFF, 1, INTB, 0 },
-		Package(){0x0005FFFF, 2, INTC, 0 },
-		Package(){0x0005FFFF, 3, INTD, 0 },
+		Package(){0x0005FFFF, 0, INTC, 0 },
+		Package(){0x0005FFFF, 1, INTD, 0 },
+		Package(){0x0005FFFF, 2, INTA, 0 },
+		Package(){0x0005FFFF, 3, INTB, 0 },
 	})
 
 	Name(APR1, Package(){
 		/* Internal graphics - RS780 VGA, Bus1, Dev5 */
 		Package(){0x0005FFFF, 0, 0, 18 },
 		Package(){0x0005FFFF, 1, 0, 19 },
-		/* Package(){0x0005FFFF, 2, 0, 20 }, */
-		/* Package(){0x0005FFFF, 3, 0, 17 }, */
+		Package(){0x0005FFFF, 2, 0, 16 },
+		Package(){0x0005FFFF, 3, 0, 11 },
 	})
 
 	Name(PS2, Package(){
@@ -198,72 +146,9 @@ Scope(\_SB) {
 		Package(){0x0000FFFF, 2, 0, 16 },
 		Package(){0x0000FFFF, 3, 0, 17 },
 	})
-
-	Name(PS4, Package(){
-		/* PCIe slot - Hooked to PCIe slot 4 */
-		Package(){0x0000FFFF, 0, INTA, 0 },
-		Package(){0x0000FFFF, 1, INTB, 0 },
-		Package(){0x0000FFFF, 2, INTC, 0 },
-		Package(){0x0000FFFF, 3, INTD, 0 },
-	})
-
-	Name(APS4, Package(){
-		/* PCIe slot - Hooked to PCIe slot 4 */
-		Package(){0x0000FFFF, 0, 0, 16 },
-		Package(){0x0000FFFF, 1, 0, 17 },
-		Package(){0x0000FFFF, 2, 0, 18 },
-		Package(){0x0000FFFF, 3, 0, 19 },
-	})
-
-	Name(PS5, Package(){
-		/* PCIe slot - Hooked to PCIe slot 5 */
-		Package(){0x0000FFFF, 0, INTB, 0 },
-		Package(){0x0000FFFF, 1, INTC, 0 },
-		Package(){0x0000FFFF, 2, INTD, 0 },
-		Package(){0x0000FFFF, 3, INTA, 0 },
-	})
-
-	Name(APS5, Package(){
-		/* PCIe slot - Hooked to PCIe slot 5 */
-		Package(){0x0000FFFF, 0, 0, 17 },
-		Package(){0x0000FFFF, 1, 0, 18 },
-		Package(){0x0000FFFF, 2, 0, 19 },
-		Package(){0x0000FFFF, 3, 0, 16 },
-	})
-
-	Name(PS6, Package(){
-		/* PCIe slot - Hooked to PCIe slot 6 */
-		Package(){0x0000FFFF, 0, INTC, 0 },
-		Package(){0x0000FFFF, 1, INTD, 0 },
-		Package(){0x0000FFFF, 2, INTA, 0 },
-		Package(){0x0000FFFF, 3, INTB, 0 },
-	})
-
-	Name(APS6, Package(){
-		/* PCIe slot - Hooked to PCIe slot 6 */
-		Package(){0x0000FFFF, 0, 0, 18 },
-		Package(){0x0000FFFF, 1, 0, 19 },
-		Package(){0x0000FFFF, 2, 0, 16 },
-		Package(){0x0000FFFF, 3, 0, 17 },
-	})
-
-	Name(PS7, Package(){
-		/* The onboard Ethernet chip - Hooked to PCIe slot 7 */
-		Package(){0x0000FFFF, 0, INTD, 0 },
-		Package(){0x0000FFFF, 1, INTA, 0 },
-		Package(){0x0000FFFF, 2, INTB, 0 },
-		Package(){0x0000FFFF, 3, INTC, 0 },
-	})
-
-	Name(APS7, Package(){
-		/* The onboard Ethernet chip - Hooked to PCIe slot 7 */
-		Package(){0x0000FFFF, 0, 0, 19 },
-		Package(){0x0000FFFF, 1, 0, 16 },
-		Package(){0x0000FFFF, 2, 0, 17 },
-		Package(){0x0000FFFF, 3, 0, 18 },
-	})
+	
 	Name(PS9, Package(){
-		/* PCIe slot - Hooked to PCIe slot 9 */
+		/* PCIe slot - Hooked to PCIe x1 */
 		Package(){0x0000FFFF, 0, INTD, 0 },
 		Package(){0x0000FFFF, 1, INTA, 0 },
 		Package(){0x0000FFFF, 2, INTB, 0 },
@@ -271,14 +156,14 @@ Scope(\_SB) {
 	})
 
 	Name(APS9, Package(){
-		/* PCIe slot - Hooked to PCIe slot 9 */
+		/* PCIe slot - Hooked to PCIe x1 */
 		Package(){0x0000FFFF, 0, 0, 17 },
 		Package(){0x0000FFFF, 1, 0, 18 },
 		Package(){0x0000FFFF, 2, 0, 19 },
 		Package(){0x0000FFFF, 3, 0, 16 },
 	})
 	Name(PSa, Package(){
-		/* PCIe slot - Hooked to PCIe slot 10 */
+		/* PCIe slot - Hooked to ethernet */
 		Package(){0x0000FFFF, 0, INTD, 0 },
 		Package(){0x0000FFFF, 1, INTA, 0 },
 		Package(){0x0000FFFF, 2, INTB, 0 },