update failover handling of some amd64 boards

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1699 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 4 insertions, 15 deletions

diff --git a/src/mainboard/amd/serenade/failover.c b/src/mainboard/amd/serenade/failover.c
index b22abfe..e351cae 100644
--- a/src/mainboard/amd/serenade/failover.c
+++ b/src/mainboard/amd/serenade/failover.c
@@ -4,22 +4,15 @@
 #include <device/pci_ids.h>
 #include <arch/io.h>
 #include <arch/romcc_io.h>
-#include <arch/smp/lapic.h>
+#include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
-#include "cpu/p6/boot_cpu.c"
+#include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 
-#define HAVE_REGPARM_SUPPORT 0
-#if HAVE_REGPARM_SUPPORT
 static unsigned long main(unsigned long bist)
 {
-#else
-static void main(void)
-{
-	unsigned long bist = 0;
-#endif
 	/* Make cerain my local apic is useable */
 	enable_lapic();
 
@@ -60,21 +53,17 @@ static void main(void)
 		goto fallback_image;
 	}
  normal_image:
-	asm("jmp __normal_image" 
+	asm volatile ("jmp __normal_image" 
 		: /* outputs */ 
 		: "a" (bist) /* inputs */
 		: /* clobbers */
 		);
  cpu_reset:
-	asm("jmp __cpu_reset"
+	asm volatile ("jmp __cpu_reset"
 		: /* outputs */ 
 		: "a"(bist) /* inputs */
 		: /* clobbers */
 		);
  fallback_image:
-#if HAVE_REGPARM_SUPPORT
 	return bist;
-#else
-	return;
-#endif
 }