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| author | Vladimir Serbinenko <phcoder@gmail.com> | 2013-11-14 18:49:26 +0100 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2013-11-23 13:08:50 +0100 |
| commit | 75b90a1f50f15b8ccb814d005c840d189d512f26 (patch) | |
| tree | 286c32480c0585cf51e6e19b7cb7124a9c1412e3 /src/ec | |
| parent | 533ad1058363a14f0ad2f4c7b0a30b940b757ef5 (diff) | |
| download | coreboot-staging-75b90a1f50f15b8ccb814d005c840d189d512f26.zip coreboot-staging-75b90a1f50f15b8ccb814d005c840d189d512f26.tar.gz | |
Remove MRC variables from 2065x CAR init.
2065x boards don't use MRC. And the space in question isn't used either.
Read number of variable range MTRRs from MSR rather than hardcoding it.
2ff is still zeroed out as unless you zero-out undocumented bits as well
boot fails.
Tested on Lenovo X201.
Change-Id: Ic574193094e7d27c2d6a4d7d3e387d989578532e
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4080
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/ec')
0 files changed, 0 insertions, 0 deletions
