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author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-05-05 11:14:02 -0700 |
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committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2015-05-12 19:55:52 +0200 |
commit | 3dad489cac181381b211a0fbf3a6538e32cd5dc2 (patch) | |
tree | d477af260000bc71d5ed591a3a1c89d181638f77 /src/drivers/intel/fsp1_1/fsp_values.h | |
parent | 3961834f66eed2f4d5bb37334d9e54a294e16c50 (diff) | |
download | coreboot-staging-3dad489cac181381b211a0fbf3a6538e32cd5dc2.zip coreboot-staging-3dad489cac181381b211a0fbf3a6538e32cd5dc2.tar.gz |
FSP 1.1 Comparison Base
Add FSP 1.0 source for comparison with FSP 1.1.
BRANCH=none
BUG=None
TEST=None
Change-Id: I8df349f97acfa74f4de3607d49633da3d4884546
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10116
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/drivers/intel/fsp1_1/fsp_values.h')
-rw-r--r-- | src/drivers/intel/fsp1_1/fsp_values.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp1_1/fsp_values.h b/src/drivers/intel/fsp1_1/fsp_values.h new file mode 100644 index 0000000..e5098bb --- /dev/null +++ b/src/drivers/intel/fsp1_1/fsp_values.h @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Sage Electronic Engineering, LLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef FSP_VALUES_H +#define FSP_VALUES_H + +#ifndef FSP_DEBUG_LEVEL +# define FSP_DEBUG_LEVEL BIOS_SPEW +#endif + +#ifndef FSP_INFO_LEVEL +# define FSP_INFO_LEVEL BIOS_DEBUG +#endif + +#define INCREMENT_FOR_DEFAULT(x) (x+1) + +#define UPD_DEFAULT 0x00 +#define UPD_DISABLE INCREMENT_FOR_DEFAULT(0) +#define UPD_ENABLE INCREMENT_FOR_DEFAULT(1) +#define UPD_USE_DEVICETREE 0xff + +#define UPD_SPD_ADDR_DEFAULT UPD_DEFAULT +#define UPD_SPD_ADDR_DISABLED 0xFF + +#endif |