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| author | Stefan Reinauer <stepan@openbios.org> | 2005-12-01 11:01:01 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2005-12-01 11:01:01 +0000 |
| commit | f5183cfa19ea4d235ac9e1206c8510c8c83ace0e (patch) | |
| tree | a5d408e2f57eeea14a64edab0a25de587e9835aa /src/cpu/amd/model_fxx/model_fxx_msr.h | |
| parent | 806e146e754a44f96c693cde707065b14f80d8a2 (diff) | |
| download | coreboot-staging-f5183cfa19ea4d235ac9e1206c8510c8c83ace0e.zip coreboot-staging-f5183cfa19ea4d235ac9e1206c8510c8c83ace0e.tar.gz | |
Applying YhLu's patch from issue 37.
a. apic id liftting to way that kernel like and let bsp
to stay with 0
b. hw memhole: solve if hole_startk == some node
basek
This, together with the previous one will break most of
the tree, but Yinghai Lu is really good
at fixing things, so...
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2116 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/model_fxx/model_fxx_msr.h')
| -rw-r--r-- | src/cpu/amd/model_fxx/model_fxx_msr.h | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/src/cpu/amd/model_fxx/model_fxx_msr.h b/src/cpu/amd/model_fxx/model_fxx_msr.h index b4795cb..e69de29 100644 --- a/src/cpu/amd/model_fxx/model_fxx_msr.h +++ b/src/cpu/amd/model_fxx/model_fxx_msr.h @@ -1,21 +0,0 @@ -#ifndef CPU_AMD_MODEL_FXX_MSR_H -#define CPU_AMD_MODEL_FXX_MSR_H - -#define HWCR_MSR 0xC0010015 -#define NB_CFG_MSR 0xC001001f -#define LS_CFG_MSR 0xC0011020 -#define IC_CFG_MSR 0xC0011021 -#define DC_CFG_MSR 0xC0011022 -#define BU_CFG_MSR 0xC0011023 - - -#define CPU_ID_FEATURES_MSR 0xc0011004 - -/* D0 only */ -#define CPU_ID_HYPER_EXT_FEATURES 0xc001100d -/* E0 only */ -#define LOGICAL_CPUS_NUM_MSR 0xc001100d - -#define CPU_ID_EXT_FEATURES_MSR 0xc0011005 - -#endif /* CPU_AMD_MODEL_FXX_MSR_H */ |
