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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-12-08 07:20:48 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-12-09 23:28:43 +0100 |
| commit | f0a13ceb639f7a7d5a6e84a2c89f3deab0de757a (patch) | |
| tree | a049b25d82afe909b08fa46b4c4ade23f829d29c /src/cpu/amd/model_10xxx/init_cpus.c | |
| parent | 299c26510202faa3cf7383040f330d502d224fdf (diff) | |
| download | coreboot-staging-f0a13ceb639f7a7d5a6e84a2c89f3deab0de757a.zip coreboot-staging-f0a13ceb639f7a7d5a6e84a2c89f3deab0de757a.tar.gz | |
AMD boards: Fix includes for microcode updates
No ROMCC involved, no need to include .c files in romstage.c.
Change-Id: I8a2aaf84276f2931d0a0557ba29e359fa06e2fba
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/4501
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/amd/model_10xxx/init_cpus.c')
| -rw-r--r-- | src/cpu/amd/model_10xxx/init_cpus.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c index eb047b8..3ebd7f2 100644 --- a/src/cpu/amd/model_10xxx/init_cpus.c +++ b/src/cpu/amd/model_10xxx/init_cpus.c @@ -325,9 +325,8 @@ static u32 init_cpus(u32 cpu_init_detectedx) * This happens after HTinit. * The BSP runs this code in it's own path. */ -#if CONFIG_UPDATE_CPU_MICROCODE update_microcode(cpuid_eax(1)); -#endif + cpuSetAMDMSR(); #if CONFIG_SET_FIDVID |
