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| author | Xavi Drudis Ferran <xdrudis@tinet.cat> | 2011-02-26 23:29:44 +0000 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2011-02-26 23:29:44 +0000 |
| commit | 4c28a6f01870e017dbedb4a0bba1e91148077040 (patch) | |
| tree | bf45e9ef2d9d7755cdf70321ae371ab395b631d7 /src/cpu/amd/model_10xxx/init_cpus.c | |
| parent | 837403dddf7b05b1a2b1a09a2cd57975484c7568 (diff) | |
| download | coreboot-staging-4c28a6f01870e017dbedb4a0bba1e91148077040.zip coreboot-staging-4c28a6f01870e017dbedb4a0bba1e91148077040.tar.gz | |
Make AMD Fam10h CPU microcode updates optional in Expert mode
Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6385 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/model_10xxx/init_cpus.c')
| -rw-r--r-- | src/cpu/amd/model_10xxx/init_cpus.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c index cd3c234..c21a135 100644 --- a/src/cpu/amd/model_10xxx/init_cpus.c +++ b/src/cpu/amd/model_10xxx/init_cpus.c @@ -325,7 +325,9 @@ static u32 init_cpus(u32 cpu_init_detectedx) * This happens after HTinit. * The BSP runs this code in it's own path. */ +#if CONFIG_UPDATE_CPU_MICROCODE update_microcode(cpuid_eax(1)); +#endif cpuSetAMDMSR(); #if CONFIG_SET_FIDVID |
