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authorStefan Reinauer <stepan@coresystems.de>2009-05-29 13:08:27 +0000
committerStefan Reinauer <stepan@openbios.org>2009-05-29 13:08:27 +0000
commitf8a5c6ec02f1e21d62756bda07f755b3a2f4865f (patch)
tree8b3a82e4c402666fe2d4c195f277b30d60b4cc05 /src/arch
parent43bc5a9c74c701b2a13dbe603c6983a13db622da (diff)
downloadcoreboot-staging-f8a5c6ec02f1e21d62756bda07f755b3a2f4865f.zip
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drop most of the crappy vm86 code and replace it with a rewritten
version that has all assembler in a .S file and all C code in a .c file. Also, remove requirement to move around between GDTs. This version includes the suggestions from Peter to clean up CR0 manipulation and to guard critical code paths by cli/sti. Tested and working on my hardware. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4323 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/i386/lib/c_start.S9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/arch/i386/lib/c_start.S b/src/arch/i386/lib/c_start.S
index 3145931..d2d8b43 100644
--- a/src/arch/i386/lib/c_start.S
+++ b/src/arch/i386/lib/c_start.S
@@ -253,7 +253,7 @@ gdtaddr:
/* This is the gdt for GCC part of coreboot.
* It is different from the gdt in ROMCC/ASM part of coreboot
- * which is defined in entry32.inc */
+ * which is defined in entry32.inc */ /* BUT WHY?? */
gdt:
/* selgdt 0, unused */
.word 0x0000, 0x0000 /* dummy */
@@ -275,6 +275,13 @@ gdt:
.word 0x0000, 0x0000 /* dummy */
.byte 0x00, 0x00, 0x00, 0x00
+ /* selgdt 0x28 16-bit 64k code at 0x00000000 */
+ .word 0xffff, 0x0000
+ .byte 0, 0x9a, 0, 0
+
+ /* selgdt 0x30 16-bit 64k data at 0x00000000 */
+ .word 0xffff, 0x0000
+ .byte 0, 0x92, 0, 0
gdt_end:
idtarg:
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