build system: run linker scripts through the preprocessor

This allows combining and simplifying linker scripts.

This is inspired by the commit listed below, but rewritten to match
upstream, and split in smaller pieces to keep intent clear.

Change-Id: Ie5c11bd8495a399561cefde2f3e8dd300f4feb98
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b
Based-On-Signed-off-by: Julius Werner <jwerner@chromium.org>
Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170
Reviewed-on: http://review.coreboot.org/9303
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

4 files changed, 14 insertions, 21 deletions

diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc
index 599c7af..643facf 100644
--- a/src/arch/riscv/Makefile.inc
+++ b/src/arch/riscv/Makefile.inc
@@ -28,8 +28,6 @@ riscv_asm_flags =
 ################################################################################
 ifeq ($(CONFIG_ARCH_BOOTBLOCK_RISCV),y)
 
-bootblock-y += bootblock.ld
-
 bootblock-y = bootblock.S stages.c
 bootblock-y += boot.c
 bootblock-y += rom_media.c
@@ -40,11 +38,13 @@ bootblock-y += \
 	$(top)/src/lib/memmove.c \
 	$(top)/src/lib/memset.c
 
-$(objcbfs)/bootblock.debug: $(src)/arch/riscv/bootblock.ld $(obj)/ldoptions $$(bootblock-objs)
+bootblock-y += bootblock.ld
+
+$(objcbfs)/bootblock.debug: $(obj)/arch/riscv/bootblock.bootblock.ld $$(bootblock-objs)
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
-	$(CC_bootblock) $(CFLAGS_bootblock) -nostartfiles -Wl,--gc-sections -static -o $@ -L$(obj) \
-		-T $(src)/arch/riscv/bootblock.ld -Wl,--start-group $(bootblock-objs) \
-		$(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group
+	$(LD_bootblock) --gc-sections -static -o $@ -L$(obj) \
+		-T $(obj)/arch/riscv/bootblock.bootblock.ld --start-group $(bootblock-objs) \
+		$(LIBGCC_FILE_NAME_bootblock) --end-group
 
 endif
 
@@ -65,11 +65,13 @@ romstage-y += \
 
 romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
 
+romstage-y += romstage.ld
+
 # Build the romstage
 
-$(objcbfs)/romstage.debug: $$(romstage-objs) $(src)/arch/riscv/romstage.ld $(obj)/ldoptions
+$(objcbfs)/romstage.debug: $$(romstage-objs) $(obj)/arch/riscv/romstage.romstage.ld
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
-	$(CC_romstage) $(CFLAGS_romstage) -nostdlib -Wl,--gc-sections -static -o $@ -L$(obj) -T $(src)/arch/riscv/romstage.ld -Wl,--start-group $(romstage-objs) -Wl,--end-group
+	$(LD_romstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/arch/riscv/romstage.romstage.ld --start-group $(romstage-objs) --end-group
 
 romstage-c-ccopts += $(riscv_flags)
 romstage-S-ccopts += $(riscv_asm_flags)
@@ -101,13 +103,15 @@ $(eval $(call create_class_compiler,rmodules,riscv))
 
 ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
 
+ramstage-y += ramstage.ld
+
 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
 
 # Build the ramstage
 
-$(objcbfs)/ramstage.debug: $$(ramstage-objs) $(src)/arch/riscv/ramstage.ld $(obj)/ldoptions
+$(objcbfs)/ramstage.debug: $$(ramstage-objs) $(obj)/arch/riscv/ramstage.ramstage.ld
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -Wl,--gc-sections -static -o $@ -L$(obj) -Wl,--start-group $(ramstage-objs) -Wl,--end-group -T $(src)/arch/riscv/ramstage.ld
+	$(LD_ramstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/arch/riscv/ramstage.ramstage.ld --start-group $(ramstage-objs) --end-group
 
 ramstage-c-ccopts += $(riscv_flags)
 ramstage-S-ccopts += $(riscv_asm_flags)
diff --git a/src/arch/riscv/bootblock.ld b/src/arch/riscv/bootblock.ld
index 9f5f53b..e5cb851 100644
--- a/src/arch/riscv/bootblock.ld
+++ b/src/arch/riscv/bootblock.ld
@@ -21,7 +21,6 @@
 /* We use ELF as output format. So that we can debug the code in some form. */
 OUTPUT_FORMAT("elf64-littleriscv", "elf64-littleriscv", "elf64-littleriscv")
 OUTPUT_ARCH(riscv)
-INCLUDE ldoptions
 
 PHDRS
 {
@@ -29,7 +28,6 @@ PHDRS
 }
 
 ENTRY(_start)
-TARGET(binary)
 SECTIONS
 {
 	. = CONFIG_BOOTBLOCK_BASE;
diff --git a/src/arch/riscv/ramstage.ld b/src/arch/riscv/ramstage.ld
index 2e97a7e..21c9638 100644
--- a/src/arch/riscv/ramstage.ld
+++ b/src/arch/riscv/ramstage.ld
@@ -20,9 +20,6 @@
  *  2005.12 yhlu add ramstage cross the vga font buffer handling
  */
 
-/* We use ELF as output format. So that we can debug the code in some form. */
-INCLUDE ldoptions
-
 ENTRY(stage_entry)
 
 PHDRS
diff --git a/src/arch/riscv/romstage.ld b/src/arch/riscv/romstage.ld
index 4cb0050..e49d1c1 100644
--- a/src/arch/riscv/romstage.ld
+++ b/src/arch/riscv/romstage.ld
@@ -20,14 +20,8 @@
  */
 
 /* We use ELF as output format. So that we can debug the code in some form. */
-/*
- INCLUDE ldoptions
- */
-
-/* We use ELF as output format. So that we can debug the code in some form. */
 OUTPUT_FORMAT("elf64-littleriscv", "elf64-littleriscv", "elf64-littleriscv")
 OUTPUT_ARCH(riscv)
-INCLUDE ldoptions
 
 PHDRS
 {