diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2009-04-01 13:43:21 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-04-01 13:43:21 +0000 |
| commit | 3081bdfa44b89c2fa34eee902c13e0d1d618bff3 (patch) | |
| tree | ecbc109bd40a63fc168355b0fff859f9a0473e20 | |
| parent | 77cf00850f457e799f7b05ee9c98fb6b990b2514 (diff) | |
| download | coreboot-staging-3081bdfa44b89c2fa34eee902c13e0d1d618bff3.zip coreboot-staging-3081bdfa44b89c2fa34eee902c13e0d1d618bff3.tar.gz | |
Drop CONFIG_CHIP_NAME. Those config statements in Config.lb should
be used unconditionally, and the names don't hurt.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4042 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
126 files changed, 45 insertions, 381 deletions
diff --git a/src/config/Options.lb b/src/config/Options.lb index ee0b2ce..0acf8a4 100644 --- a/src/config/Options.lb +++ b/src/config/Options.lb @@ -854,12 +854,6 @@ end # Misc options ############################################### -define CONFIG_CHIP_NAME - default 0 - export always - comment "Compile in the chip name" -end - define CONFIG_GDB_STUB default 0 export used diff --git a/src/cpu/amd/socket_754/Config.lb b/src/cpu/amd/socket_754/Config.lb index 60a735a..bd96105 100644 --- a/src/cpu/amd/socket_754/Config.lb +++ b/src/cpu/amd/socket_754/Config.lb @@ -1,7 +1,4 @@ -uses CONFIG_CHIP_NAME -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h object socket_754.o dir /cpu/amd/model_fxx diff --git a/src/cpu/amd/socket_939/Config.lb b/src/cpu/amd/socket_939/Config.lb index e0c3cce..963a27e 100644 --- a/src/cpu/amd/socket_939/Config.lb +++ b/src/cpu/amd/socket_939/Config.lb @@ -1,8 +1,4 @@ -uses CONFIG_CHIP_NAME - -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h object socket_939.o diff --git a/src/cpu/amd/socket_940/Config.lb b/src/cpu/amd/socket_940/Config.lb index cff1c6e..34d1405 100644 --- a/src/cpu/amd/socket_940/Config.lb +++ b/src/cpu/amd/socket_940/Config.lb @@ -1,8 +1,4 @@ -uses CONFIG_CHIP_NAME - -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h object socket_940.o diff --git a/src/cpu/amd/socket_AM2/Config.lb b/src/cpu/amd/socket_AM2/Config.lb index 4b12629..de3c046 100644 --- a/src/cpu/amd/socket_AM2/Config.lb +++ b/src/cpu/amd/socket_AM2/Config.lb @@ -1,12 +1,9 @@ -uses CONFIG_CHIP_NAME uses K8_REV_F_SUPPORT uses K8_HT_FREQ_1G_SUPPORT uses DIMM_SUPPORT uses CPU_SOCKET_TYPE -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h default K8_REV_F_SUPPORT=1 #Opteron K8 1G HT Support diff --git a/src/cpu/amd/socket_F/Config.lb b/src/cpu/amd/socket_F/Config.lb index 7406391..42afda1 100644 --- a/src/cpu/amd/socket_F/Config.lb +++ b/src/cpu/amd/socket_F/Config.lb @@ -1,12 +1,9 @@ -uses CONFIG_CHIP_NAME uses K8_REV_F_SUPPORT uses K8_HT_FREQ_1G_SUPPORT uses DIMM_SUPPORT uses CPU_SOCKET_TYPE -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h default K8_REV_F_SUPPORT=1 #Opteron K8 1G HT Support diff --git a/src/cpu/amd/socket_F_1207/Config.lb b/src/cpu/amd/socket_F_1207/Config.lb index cc3e221..5777e35 100644 --- a/src/cpu/amd/socket_F_1207/Config.lb +++ b/src/cpu/amd/socket_F_1207/Config.lb @@ -17,7 +17,6 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # -uses CONFIG_CHIP_NAME uses PCI_IO_CFG_EXT uses MMCONF_SUPPORT uses HT3_SUPPORT @@ -30,9 +29,7 @@ uses CDB uses PCI_BUS_SEGN_BITS uses CAR_FAM10 -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h default PCI_IO_CFG_EXT=1 diff --git a/src/cpu/amd/socket_S1G1/Config.lb b/src/cpu/amd/socket_S1G1/Config.lb index 0ebfb8a..5cdc3bf 100644 --- a/src/cpu/amd/socket_S1G1/Config.lb +++ b/src/cpu/amd/socket_S1G1/Config.lb @@ -1,12 +1,9 @@ -uses CONFIG_CHIP_NAME uses K8_REV_F_SUPPORT uses K8_HT_FREQ_1G_SUPPORT uses DIMM_SUPPORT uses CPU_SOCKET_TYPE -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h default K8_REV_F_SUPPORT=1 #Opteron K8 1G HT Support diff --git a/src/cpu/intel/socket_mPGA604_533Mhz/Config.lb b/src/cpu/intel/socket_mPGA604_533Mhz/Config.lb index 1271d16..986e70b 100644 --- a/src/cpu/intel/socket_mPGA604_533Mhz/Config.lb +++ b/src/cpu/intel/socket_mPGA604_533Mhz/Config.lb @@ -1,6 +1,3 @@ -uses CONFIG_CHIP_NAME -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h object socket_mPGA604_533Mhz.o dir /cpu/intel/model_f2x diff --git a/src/drivers/generic/debug/debug_dev.c b/src/drivers/generic/debug/debug_dev.c index 210600c..94ff870 100644 --- a/src/drivers/generic/debug/debug_dev.c +++ b/src/drivers/generic/debug/debug_dev.c @@ -231,13 +231,11 @@ static void print_tsc(void) { static void debug_init(device_t dev) { -#if CONFIG_CHIP_NAME device_t parent; -#endif + if (!dev->enabled) return; switch(dev->path.pnp.device) { -#if CONFIG_CHIP_NAME case 0: parent = dev->bus->dev; printk_debug("DEBUG: %s", dev_path(parent)); @@ -247,7 +245,6 @@ static void debug_init(device_t dev) printk_debug("\n"); } break; -#endif case 1: print_pci_regs_all(); diff --git a/src/drivers/pci/onboard/onboard.c b/src/drivers/pci/onboard/onboard.c index e09c90b..17e0a13 100644 --- a/src/drivers/pci/onboard/onboard.c +++ b/src/drivers/pci/onboard/onboard.c @@ -73,8 +73,6 @@ static void onboard_enable(device_t dev) } struct chip_operations drivers_pci_onboard_ops = { -#if CONFIG_CHIP_NAME == 1 CHIP_NAME("Onboard PCI") -#endif .enable_dev = onboard_enable, }; diff --git a/src/include/device/device.h b/src/include/device/device.h index 4109c00..7d7a6bc 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -15,16 +15,10 @@ struct smbus_bus_operations; /* Chip operations */ struct chip_operations { void (*enable_dev)(struct device *dev); -#if CONFIG_CHIP_NAME == 1 char *name; -#endif }; -#if CONFIG_CHIP_NAME == 1 #define CHIP_NAME(X) .name = X, -#else -#define CHIP_NAME(X) -#endif struct bus; diff --git a/src/mainboard/amd/dbm690t/Config.lb b/src/mainboard/amd/dbm690t/Config.lb index fa0ae51..fdff4bd 100644 --- a/src/mainboard/amd/dbm690t/Config.lb +++ b/src/mainboard/amd/dbm690t/Config.lb @@ -178,9 +178,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h #The variables belong to mainboard are defined here. diff --git a/src/mainboard/amd/dbm690t/Options.lb b/src/mainboard/amd/dbm690t/Options.lb index 29bd86a..8369254 100644 --- a/src/mainboard/amd/dbm690t/Options.lb +++ b/src/mainboard/amd/dbm690t/Options.lb @@ -73,7 +73,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -157,9 +156,6 @@ default CONFIG_MAX_CPUS=2 default CONFIG_MAX_PHYSICAL_CPUS=1 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #1G memory hole default HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/amd/dbm690t/mainboard.c b/src/mainboard/amd/dbm690t/mainboard.c index 4332099..b0d088d 100644 --- a/src/mainboard/amd/dbm690t/mainboard.c +++ b/src/mainboard/amd/dbm690t/mainboard.c @@ -263,9 +263,6 @@ int add_mainboard_resources(struct lb_memory *mem) #endif } -/* -* CONFIG_CHIP_NAME defined in Option.lb. -*/ struct chip_operations mainboard_ops = { CHIP_NAME("AMD DBM690T Mainboard") .enable_dev = dbm690t_enable, diff --git a/src/mainboard/amd/pistachio/Config.lb b/src/mainboard/amd/pistachio/Config.lb index 224b7ae..186a609 100644 --- a/src/mainboard/amd/pistachio/Config.lb +++ b/src/mainboard/amd/pistachio/Config.lb @@ -178,9 +178,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h #The variables belong to mainboard are defined here. diff --git a/src/mainboard/amd/pistachio/Options.lb b/src/mainboard/amd/pistachio/Options.lb index e3d1453..39c598b 100644 --- a/src/mainboard/amd/pistachio/Options.lb +++ b/src/mainboard/amd/pistachio/Options.lb @@ -73,7 +73,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -157,9 +156,6 @@ default CONFIG_MAX_CPUS=2 default CONFIG_MAX_PHYSICAL_CPUS=1 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #1G memory hole default HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/amd/pistachio/mainboard.c b/src/mainboard/amd/pistachio/mainboard.c index afa953d..c7c539b 100644 --- a/src/mainboard/amd/pistachio/mainboard.c +++ b/src/mainboard/amd/pistachio/mainboard.c @@ -335,9 +335,6 @@ int add_mainboard_resources(struct lb_memory *mem) #endif } -/* -* CONFIG_CHIP_NAME defined in Option.lb. -*/ struct chip_operations mainboard_ops = { CHIP_NAME("AMD Pistachio Mainboard") .enable_dev = pistachio_enable, diff --git a/src/mainboard/amd/serengeti_cheetah/Config.lb b/src/mainboard/amd/serengeti_cheetah/Config.lb index ac9c972..039bf4b 100644 --- a/src/mainboard/amd/serengeti_cheetah/Config.lb +++ b/src/mainboard/amd/serengeti_cheetah/Config.lb @@ -253,9 +253,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for amd/serengeti_cheetah chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/amd/serengeti_cheetah/Options.lb b/src/mainboard/amd/serengeti_cheetah/Options.lb index c229c1b..fc1dc85 100644 --- a/src/mainboard/amd/serengeti_cheetah/Options.lb +++ b/src/mainboard/amd/serengeti_cheetah/Options.lb @@ -57,7 +57,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -171,9 +170,6 @@ default ENABLE_APIC_EXT_ID=0 default APIC_ID_OFFSET=0x8 default LIFT_BSP_APIC_ID=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. #2G #default HW_MEM_HOLE_SIZEK=0x200000 diff --git a/src/mainboard/amd/serengeti_cheetah/mainboard.c b/src/mainboard/amd/serengeti_cheetah/mainboard.c index c9ba095..4fb715f 100644 --- a/src/mainboard/amd/serengeti_cheetah/mainboard.c +++ b/src/mainboard/amd/serengeti_cheetah/mainboard.c @@ -1,9 +1,7 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("AMD Serengeti Cheetah Mainboard") }; -#endif diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb b/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb index a865875..3689ba2 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb +++ b/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb @@ -263,9 +263,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h dir /southbridge/amd/amd8151 diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb index ae8fc35..369af76 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb +++ b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb @@ -76,7 +76,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -197,9 +196,6 @@ default ENABLE_APIC_EXT_ID=1 default APIC_ID_OFFSET=0x00 default LIFT_BSP_APIC_ID=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. #2G #default HW_MEM_HOLE_SIZEK=0x200000 diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.c b/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.c index de6e139..ba1ee9c 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.c @@ -25,8 +25,6 @@ #include <device/pci_ops.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("AMD family 10 Cheetah mainboard") }; -#endif diff --git a/src/mainboard/asus/a8n_e/Config.lb b/src/mainboard/asus/a8n_e/Config.lb index 2df9218..410971c 100644 --- a/src/mainboard/asus/a8n_e/Config.lb +++ b/src/mainboard/asus/a8n_e/Config.lb @@ -146,9 +146,7 @@ if USE_DCACHE_RAM mainboardinit ./auto.inc end end -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h chip northbridge/amd/amdk8/root_complex # Root complex device apic_cluster 0 on # APIC cluster diff --git a/src/mainboard/asus/a8n_e/Options.lb b/src/mainboard/asus/a8n_e/Options.lb index 9d5503c..d4f1bf9 100644 --- a/src/mainboard/asus/a8n_e/Options.lb +++ b/src/mainboard/asus/a8n_e/Options.lb @@ -77,7 +77,6 @@ uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_CONSOLE_BTEXT uses HAVE_INIT_TIMER uses CONFIG_GDB_STUB -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK diff --git a/src/mainboard/asus/a8n_e/mainboard.c b/src/mainboard/asus/a8n_e/mainboard.c index 4468325..4bd6311 100644 --- a/src/mainboard/asus/a8n_e/mainboard.c +++ b/src/mainboard/asus/a8n_e/mainboard.c @@ -22,8 +22,6 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("ASUS A8N-E Mainboard") }; -#endif diff --git a/src/mainboard/asus/a8v-e_se/Config.lb b/src/mainboard/asus/a8v-e_se/Config.lb index 6bb2cbe..08be016 100644 --- a/src/mainboard/asus/a8v-e_se/Config.lb +++ b/src/mainboard/asus/a8v-e_se/Config.lb @@ -112,9 +112,7 @@ if USE_DCACHE_RAM end end -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h chip northbridge/amd/amdk8/root_complex # Root complex device apic_cluster 0 on # APIC cluster diff --git a/src/mainboard/asus/a8v-e_se/Options.lb b/src/mainboard/asus/a8v-e_se/Options.lb index a856eeb..cc2cf32 100644 --- a/src/mainboard/asus/a8v-e_se/Options.lb +++ b/src/mainboard/asus/a8v-e_se/Options.lb @@ -71,7 +71,6 @@ uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 uses HAVE_INIT_TIMER uses CONFIG_GDB_STUB -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN # bx_b001- uses K8_HW_MEM_HOLE_SIZEK @@ -111,7 +110,6 @@ default CONFIG_MAX_CPUS = 2 default CONFIG_MAX_PHYSICAL_CPUS = 1 default CONFIG_LOGICAL_CPUS = 1 default HAVE_ACPI_TABLES = 1 -# default CONFIG_CHIP_NAME = 1 # 1G memory hole # bx_b001- default K8_HW_MEM_HOLE_SIZEK = 0x100000 diff --git a/src/mainboard/asus/a8v-e_se/mainboard.c b/src/mainboard/asus/a8v-e_se/mainboard.c index 2a3fd3b..50b8163 100644 --- a/src/mainboard/asus/a8v-e_se/mainboard.c +++ b/src/mainboard/asus/a8v-e_se/mainboard.c @@ -23,8 +23,6 @@ #include <device/pci_ids.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("ASUS A8V-E SE Mainboard") }; -#endif diff --git a/src/mainboard/asus/m2v-mx_se/Config.lb b/src/mainboard/asus/m2v-mx_se/Config.lb index a1f291f..fec2300 100644 --- a/src/mainboard/asus/m2v-mx_se/Config.lb +++ b/src/mainboard/asus/m2v-mx_se/Config.lb @@ -115,9 +115,7 @@ if USE_DCACHE_RAM end end -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h chip northbridge/amd/amdk8/root_complex # Root complex device apic_cluster 0 on # APIC cluster diff --git a/src/mainboard/asus/m2v-mx_se/Options.lb b/src/mainboard/asus/m2v-mx_se/Options.lb index 0e0a9d9..974903b 100644 --- a/src/mainboard/asus/m2v-mx_se/Options.lb +++ b/src/mainboard/asus/m2v-mx_se/Options.lb @@ -74,7 +74,6 @@ uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 uses HAVE_INIT_TIMER uses CONFIG_GDB_STUB -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN # bx_b001- uses K8_HW_MEM_HOLE_SIZEK @@ -118,8 +117,6 @@ default HAVE_MAINBOARD_RESOURCES = 1 default HAVE_HIGH_TABLES = 1 default HAVE_LOW_TABLES = 0 -# default CONFIG_CHIP_NAME = 1 - # 1G memory hole # bx_b001- default K8_HW_MEM_HOLE_SIZEK = 0x100000 diff --git a/src/mainboard/asus/m2v-mx_se/mainboard.c b/src/mainboard/asus/m2v-mx_se/mainboard.c index 4735d7c..1d2094f 100644 --- a/src/mainboard/asus/m2v-mx_se/mainboard.c +++ b/src/mainboard/asus/m2v-mx_se/mainboard.c @@ -37,8 +37,6 @@ int add_mainboard_resources(struct lb_memory *mem) return 0; } -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("ASUS M2V-MX SE Mainboard") }; -#endif diff --git a/src/mainboard/bcom/winnetp680/Options.lb b/src/mainboard/bcom/winnetp680/Options.lb index fbddf37..119a413 100644 --- a/src/mainboard/bcom/winnetp680/Options.lb +++ b/src/mainboard/bcom/winnetp680/Options.lb @@ -64,7 +64,6 @@ uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 uses CONFIG_PCI_ROM_RUN uses CONFIG_CONSOLE_VGA uses CONFIG_MAX_PCI_BUSES -uses CONFIG_CHIP_NAME uses CONFIG_VIDEO_MB uses CONFIG_IOAPIC @@ -74,7 +73,6 @@ default CONFIG_VIDEO_MB = 32 default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_PCI_ROM_RUN = 0 default CONFIG_CONSOLE_VGA = 0 -default CONFIG_CHIP_NAME = 1 default HAVE_FALLBACK_BOOT = 1 default HAVE_MP_TABLE = 0 default CONFIG_UDELAY_TSC = 1 diff --git a/src/mainboard/broadcom/blast/Config.lb b/src/mainboard/broadcom/blast/Config.lb index deaba1a..d77d099 100644 --- a/src/mainboard/broadcom/blast/Config.lb +++ b/src/mainboard/broadcom/blast/Config.lb @@ -145,9 +145,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for broadcom/blast chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/broadcom/blast/Options.lb b/src/mainboard/broadcom/blast/Options.lb index aec8fda..f4e165f 100644 --- a/src/mainboard/broadcom/blast/Options.lb +++ b/src/mainboard/broadcom/blast/Options.lb @@ -53,7 +53,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -128,9 +127,6 @@ default CONFIG_MAX_CPUS=4 default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #1G memory hole default HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/broadcom/blast/mainboard.c b/src/mainboard/broadcom/blast/mainboard.c index 5217473..5f4b525 100644 --- a/src/mainboard/broadcom/blast/mainboard.c +++ b/src/mainboard/broadcom/blast/mainboard.c @@ -1,9 +1,7 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Broadcom Blast Mainboard") }; -#endif diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Config.lb b/src/mainboard/gigabyte/ga_2761gxdk/Config.lb index 0f0a8e3..73f4d6e 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/Config.lb +++ b/src/mainboard/gigabyte/ga_2761gxdk/Config.lb @@ -223,9 +223,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h chip northbridge/amd/amdk8/root_complex device apic_cluster 0 on diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Options.lb b/src/mainboard/gigabyte/ga_2761gxdk/Options.lb index ab6cdb2..6b3db4b 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/Options.lb +++ b/src/mainboard/gigabyte/ga_2761gxdk/Options.lb @@ -81,7 +81,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_USBDEBUG_DIRECT uses CONFIG_PCI_ROM_RUN @@ -195,9 +194,6 @@ default ENABLE_APIC_EXT_ID=0 default APIC_ID_OFFSET=0x10 default LIFT_BSP_APIC_ID=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. #2G #default HW_MEM_HOLE_SIZEK=0x200000 diff --git a/src/mainboard/gigabyte/ga_2761gxdk/mainboard.c b/src/mainboard/gigabyte/ga_2761gxdk/mainboard.c index 89fd895..e365575 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/mainboard.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/mainboard.c @@ -26,8 +26,6 @@ #include <device/pci_ops.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("GIGABYTE GA-2761GXDK Mainboard") }; -#endif diff --git a/src/mainboard/gigabyte/m57sli/Config.lb b/src/mainboard/gigabyte/m57sli/Config.lb index 6a60aae..b8ca49f 100644 --- a/src/mainboard/gigabyte/m57sli/Config.lb +++ b/src/mainboard/gigabyte/m57sli/Config.lb @@ -225,9 +225,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h chip northbridge/amd/amdk8/root_complex device apic_cluster 0 on diff --git a/src/mainboard/gigabyte/m57sli/Options.lb b/src/mainboard/gigabyte/m57sli/Options.lb index 2e89510..79c6380 100644 --- a/src/mainboard/gigabyte/m57sli/Options.lb +++ b/src/mainboard/gigabyte/m57sli/Options.lb @@ -79,7 +79,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_USBDEBUG_DIRECT uses CONFIG_PCI_ROM_RUN @@ -199,9 +198,6 @@ default ENABLE_APIC_EXT_ID=0 default APIC_ID_OFFSET=0x10 default LIFT_BSP_APIC_ID=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. #2G #default HW_MEM_HOLE_SIZEK=0x200000 diff --git a/src/mainboard/gigabyte/m57sli/mainboard.c b/src/mainboard/gigabyte/m57sli/mainboard.c index 3a68876..74bfbc0 100644 --- a/src/mainboard/gigabyte/m57sli/mainboard.c +++ b/src/mainboard/gigabyte/m57sli/mainboard.c @@ -26,8 +26,6 @@ #include <device/pci_ops.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("GIGABYTE GA-M57SLI Mainboard") }; -#endif diff --git a/src/mainboard/intel/xe7501devkit/Config.lb b/src/mainboard/intel/xe7501devkit/Config.lb index eec15cd..1a46ec9 100644 --- a/src/mainboard/intel/xe7501devkit/Config.lb +++ b/src/mainboard/intel/xe7501devkit/Config.lb @@ -142,9 +142,7 @@ mainboardinit cpu/x86/mmx/disable_mmx.inc ## dir /pc80 -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # based on sample config for tyan/s2735 chip northbridge/intel/e7501 diff --git a/src/mainboard/intel/xe7501devkit/Options.lb b/src/mainboard/intel/xe7501devkit/Options.lb index ea03ea8..5e7a647 100644 --- a/src/mainboard/intel/xe7501devkit/Options.lb +++ b/src/mainboard/intel/xe7501devkit/Options.lb @@ -40,7 +40,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses DEBUG @@ -238,7 +237,6 @@ default CONFIG_IDE=1 default DEBUG=1 # default CPU_OPT="-g" -default CONFIG_CHIP_NAME=1 ### End Options.lb # diff --git a/src/mainboard/intel/xe7501devkit/mainboard.c b/src/mainboard/intel/xe7501devkit/mainboard.c index 1d0a1d0..3b757d6 100644 --- a/src/mainboard/intel/xe7501devkit/mainboard.c +++ b/src/mainboard/intel/xe7501devkit/mainboard.c @@ -1,9 +1,7 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Intel Xeon E7501 DevKit Mainboard") }; -#endif diff --git a/src/mainboard/iwill/dk8_htx/Config.lb b/src/mainboard/iwill/dk8_htx/Config.lb index dd3b2dd..d9bed6d 100644 --- a/src/mainboard/iwill/dk8_htx/Config.lb +++ b/src/mainboard/iwill/dk8_htx/Config.lb @@ -261,9 +261,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h dir /southbridge/amd/amd8132 diff --git a/src/mainboard/iwill/dk8_htx/Options.lb b/src/mainboard/iwill/dk8_htx/Options.lb index 8c4166f..dcd68ed 100644 --- a/src/mainboard/iwill/dk8_htx/Options.lb +++ b/src/mainboard/iwill/dk8_htx/Options.lb @@ -57,7 +57,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -171,9 +170,6 @@ default ENABLE_APIC_EXT_ID=0 default APIC_ID_OFFSET=0x10 default LIFT_BSP_APIC_ID=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. #2G #default HW_MEM_HOLE_SIZEK=0x200000 diff --git a/src/mainboard/iwill/dk8_htx/mainboard.c b/src/mainboard/iwill/dk8_htx/mainboard.c index 484290b..cbbd3f2 100644 --- a/src/mainboard/iwill/dk8_htx/mainboard.c +++ b/src/mainboard/iwill/dk8_htx/mainboard.c @@ -1,9 +1,6 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("IWILL DK8-HTX Mainboard") }; -#endif - diff --git a/src/mainboard/jetway/j7f24/Options.lb b/src/mainboard/jetway/j7f24/Options.lb index 4e011a9..eda0310 100644 --- a/src/mainboard/jetway/j7f24/Options.lb +++ b/src/mainboard/jetway/j7f24/Options.lb @@ -65,7 +65,6 @@ uses CONFIG_PCI_ROM_RUN uses CONFIG_CONSOLE_VGA uses CONFIG_MAX_PCI_BUSES uses TTYS0_BAUD -uses CONFIG_CHIP_NAME uses CONFIG_VIDEO_MB uses CONFIG_IOAPIC @@ -75,7 +74,6 @@ default CONFIG_VIDEO_MB = 32 default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_PCI_ROM_RUN = 0 default CONFIG_CONSOLE_VGA = 0 -default CONFIG_CHIP_NAME = 1 default HAVE_FALLBACK_BOOT = 1 default HAVE_MP_TABLE = 0 default CONFIG_UDELAY_TSC = 1 diff --git a/src/mainboard/kontron/986lcd-m/Options.lb b/src/mainboard/kontron/986lcd-m/Options.lb index cfe94f3..edf2979 100644 --- a/src/mainboard/kontron/986lcd-m/Options.lb +++ b/src/mainboard/kontron/986lcd-m/Options.lb @@ -58,7 +58,6 @@ uses _RAMBASE uses _ROMBASE uses STACK_SIZE uses HEAP_SIZE -uses CONFIG_CHIP_NAME uses USE_DCACHE_RAM uses DCACHE_RAM_BASE uses DCACHE_RAM_SIZE @@ -324,11 +323,6 @@ default MAXIMUM_CONSOLE_LOGLEVEL=9 ## Select power on after power fail setting default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" -## -## chip name -## -default CONFIG_CHIP_NAME=1 - # # ROMFS # diff --git a/src/mainboard/msi/ms7135/Config.lb b/src/mainboard/msi/ms7135/Config.lb index d42e9ea..1feec7f 100644 --- a/src/mainboard/msi/ms7135/Config.lb +++ b/src/mainboard/msi/ms7135/Config.lb @@ -223,9 +223,7 @@ end ## ## Include the secondary configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h chip northbridge/amd/amdk8/root_complex # Root complex device apic_cluster 0 on # APIC cluster diff --git a/src/mainboard/msi/ms7135/Options.lb b/src/mainboard/msi/ms7135/Options.lb index e3ae6ef..c4c3102 100644 --- a/src/mainboard/msi/ms7135/Options.lb +++ b/src/mainboard/msi/ms7135/Options.lb @@ -77,7 +77,6 @@ uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_CONSOLE_BTEXT uses HAVE_INIT_TIMER uses CONFIG_GDB_STUB -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK diff --git a/src/mainboard/msi/ms7135/mainboard.c b/src/mainboard/msi/ms7135/mainboard.c index ac0bace..586f9c5 100644 --- a/src/mainboard/msi/ms7135/mainboard.c +++ b/src/mainboard/msi/ms7135/mainboard.c @@ -21,8 +21,6 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("MSI MS7135 Mainboard") }; -#endif diff --git a/src/mainboard/msi/ms7260/Config.lb b/src/mainboard/msi/ms7260/Config.lb index 1fd67af..992a424 100644 --- a/src/mainboard/msi/ms7260/Config.lb +++ b/src/mainboard/msi/ms7260/Config.lb @@ -164,9 +164,7 @@ if USE_DCACHE_RAM end end -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h chip northbridge/amd/amdk8/root_complex # Root complex device apic_cluster 0 on # APIC cluster diff --git a/src/mainboard/msi/ms7260/Options.lb b/src/mainboard/msi/ms7260/Options.lb index 5192870..ddd2252 100644 --- a/src/mainboard/msi/ms7260/Options.lb +++ b/src/mainboard/msi/ms7260/Options.lb @@ -74,7 +74,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses CONFIG_USBDEBUG_DIRECT @@ -120,7 +119,6 @@ default CONFIG_LOGICAL_CPUS = 1 default ENABLE_APIC_EXT_ID = 0 default APIC_ID_OFFSET = 0x10 default LIFT_BSP_APIC_ID = 1 -default CONFIG_CHIP_NAME = 1 # Move the default coreboot CMOS range off of AMD RTC registers. default LB_CKS_RANGE_START = 49 diff --git a/src/mainboard/msi/ms7260/mainboard.c b/src/mainboard/msi/ms7260/mainboard.c index a6c6e08..710e59e 100644 --- a/src/mainboard/msi/ms7260/mainboard.c +++ b/src/mainboard/msi/ms7260/mainboard.c @@ -21,8 +21,6 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("MSI K9N Neo (MS-7260) Mainboard") }; -#endif diff --git a/src/mainboard/msi/ms9185/Config.lb b/src/mainboard/msi/ms9185/Config.lb index 092c516..99f8b77 100644 --- a/src/mainboard/msi/ms9185/Config.lb +++ b/src/mainboard/msi/ms9185/Config.lb @@ -172,9 +172,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for amd/serengeti_cheetah chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/msi/ms9185/Options.lb b/src/mainboard/msi/ms9185/Options.lb index 4db5f6a..500b18f 100644 --- a/src/mainboard/msi/ms9185/Options.lb +++ b/src/mainboard/msi/ms9185/Options.lb @@ -78,7 +78,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -180,9 +179,6 @@ default ENABLE_APIC_EXT_ID=0 default APIC_ID_OFFSET=0x8 default LIFT_BSP_APIC_ID=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. #2G #default HW_MEM_HOLE_SIZEK=0x200000 diff --git a/src/mainboard/msi/ms9185/mainboard.c b/src/mainboard/msi/ms9185/mainboard.c index e681d74..873a490 100644 --- a/src/mainboard/msi/ms9185/mainboard.c +++ b/src/mainboard/msi/ms9185/mainboard.c @@ -26,8 +26,6 @@ #include <device/pci_ops.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("MSI MS-9185 Mainboard") }; -#endif diff --git a/src/mainboard/msi/ms9282/Config.lb b/src/mainboard/msi/ms9282/Config.lb index 76e00c8..00be55c 100644 --- a/src/mainboard/msi/ms9282/Config.lb +++ b/src/mainboard/msi/ms9282/Config.lb @@ -222,9 +222,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for msi/ms9282 diff --git a/src/mainboard/msi/ms9282/Options.lb b/src/mainboard/msi/ms9282/Options.lb index 2560003..61afebe 100644 --- a/src/mainboard/msi/ms9282/Options.lb +++ b/src/mainboard/msi/ms9282/Options.lb @@ -74,7 +74,6 @@ uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 uses HAVE_INIT_TIMER uses CONFIG_GDB_STUB -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN #bx_b001- uses K8_HW_MEM_HOLE_SIZEK @@ -164,9 +163,6 @@ default CONFIG_MAX_CPUS=4 default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -#default CONFIG_CHIP_NAME=1 - #1G memory hole #bx_b001- default K8_HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/msi/ms9282/mainboard.c b/src/mainboard/msi/ms9282/mainboard.c index 91bbffd..4906554 100644 --- a/src/mainboard/msi/ms9282/mainboard.c +++ b/src/mainboard/msi/ms9282/mainboard.c @@ -26,8 +26,6 @@ #include <device/pci_ops.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("MSI MS-9282 Mainboard") }; -#endif diff --git a/src/mainboard/newisys/khepri/Options.lb b/src/mainboard/newisys/khepri/Options.lb index 6bf9d8a..0095182 100644 --- a/src/mainboard/newisys/khepri/Options.lb +++ b/src/mainboard/newisys/khepri/Options.lb @@ -51,7 +51,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -121,9 +120,6 @@ default CONFIG_MAX_CPUS=4 default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #1G memory hole default HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/nvidia/l1_2pvv/Config.lb b/src/mainboard/nvidia/l1_2pvv/Config.lb index c30dbcd..bb1b99b 100644 --- a/src/mainboard/nvidia/l1_2pvv/Config.lb +++ b/src/mainboard/nvidia/l1_2pvv/Config.lb @@ -252,9 +252,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h chip northbridge/amd/amdk8/root_complex device apic_cluster 0 on diff --git a/src/mainboard/nvidia/l1_2pvv/Options.lb b/src/mainboard/nvidia/l1_2pvv/Options.lb index 2ef8f68..9362b5f 100644 --- a/src/mainboard/nvidia/l1_2pvv/Options.lb +++ b/src/mainboard/nvidia/l1_2pvv/Options.lb @@ -79,7 +79,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_USBDEBUG_DIRECT uses CONFIG_PCI_ROM_RUN @@ -193,9 +192,6 @@ default ENABLE_APIC_EXT_ID=0 default APIC_ID_OFFSET=0x10 default LIFT_BSP_APIC_ID=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. #2G #default HW_MEM_HOLE_SIZEK=0x200000 diff --git a/src/mainboard/nvidia/l1_2pvv/mainboard.c b/src/mainboard/nvidia/l1_2pvv/mainboard.c index 5fa84b0..697fc7c 100644 --- a/src/mainboard/nvidia/l1_2pvv/mainboard.c +++ b/src/mainboard/nvidia/l1_2pvv/mainboard.c @@ -26,8 +26,6 @@ #include <device/pci_ops.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("NVIDIA l1_2pvv Mainboard") }; -#endif diff --git a/src/mainboard/sunw/ultra40/Config.lb b/src/mainboard/sunw/ultra40/Config.lb index 2dd9203..50743d3 100644 --- a/src/mainboard/sunw/ultra40/Config.lb +++ b/src/mainboard/sunw/ultra40/Config.lb @@ -188,9 +188,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for tyan/s2895 chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/sunw/ultra40/Options.lb b/src/mainboard/sunw/ultra40/Options.lb index 64aecaa..9a44422 100644 --- a/src/mainboard/sunw/ultra40/Options.lb +++ b/src/mainboard/sunw/ultra40/Options.lb @@ -52,7 +52,6 @@ uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 uses HAVE_INIT_TIMER uses CONFIG_GDB_STUB -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -134,9 +133,6 @@ default CONFIG_MAX_CPUS=4 default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -#default CONFIG_CHIP_NAME=1 - #1G memory hole default HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/sunw/ultra40/mainboard.c b/src/mainboard/sunw/ultra40/mainboard.c index 2d4b77a..b5e865d 100644 --- a/src/mainboard/sunw/ultra40/mainboard.c +++ b/src/mainboard/sunw/ultra40/mainboard.c @@ -1,9 +1,7 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Sun Ultra 40 Mainboard") }; -#endif diff --git a/src/mainboard/supermicro/h8dme/Config.lb b/src/mainboard/supermicro/h8dme/Config.lb index 820e0e3..616e582 100644 --- a/src/mainboard/supermicro/h8dme/Config.lb +++ b/src/mainboard/supermicro/h8dme/Config.lb @@ -218,9 +218,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h chip northbridge/amd/amdk8/root_complex device apic_cluster 0 on diff --git a/src/mainboard/supermicro/h8dme/Options.lb b/src/mainboard/supermicro/h8dme/Options.lb index 4dcd01d..2260eae 100644 --- a/src/mainboard/supermicro/h8dme/Options.lb +++ b/src/mainboard/supermicro/h8dme/Options.lb @@ -79,7 +79,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -192,9 +191,6 @@ default ENABLE_APIC_EXT_ID=0 default APIC_ID_OFFSET=0x10 default LIFT_BSP_APIC_ID=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. #2G #default HW_MEM_HOLE_SIZEK=0x200000 diff --git a/src/mainboard/supermicro/h8dme/mainboard.c b/src/mainboard/supermicro/h8dme/mainboard.c index 6098ee4..98bbd3a 100644 --- a/src/mainboard/supermicro/h8dme/mainboard.c +++ b/src/mainboard/supermicro/h8dme/mainboard.c @@ -23,8 +23,6 @@ #include <device/pci_ops.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Supermicro H8DME Mainboard") }; -#endif diff --git a/src/mainboard/supermicro/h8dmr/Config.lb b/src/mainboard/supermicro/h8dmr/Config.lb index f9867b9..ed0c110 100644 --- a/src/mainboard/supermicro/h8dmr/Config.lb +++ b/src/mainboard/supermicro/h8dmr/Config.lb @@ -221,9 +221,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h chip northbridge/amd/amdk8/root_complex device apic_cluster 0 on diff --git a/src/mainboard/supermicro/h8dmr/Options.lb b/src/mainboard/supermicro/h8dmr/Options.lb index 430f252..b0aa085 100644 --- a/src/mainboard/supermicro/h8dmr/Options.lb +++ b/src/mainboard/supermicro/h8dmr/Options.lb @@ -79,7 +79,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -192,9 +191,6 @@ default ENABLE_APIC_EXT_ID=0 default APIC_ID_OFFSET=0x10 default LIFT_BSP_APIC_ID=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. #2G #default HW_MEM_HOLE_SIZEK=0x200000 diff --git a/src/mainboard/supermicro/h8dmr/mainboard.c b/src/mainboard/supermicro/h8dmr/mainboard.c index 0f74205..03eed8f 100644 --- a/src/mainboard/supermicro/h8dmr/mainboard.c +++ b/src/mainboard/supermicro/h8dmr/mainboard.c @@ -26,8 +26,6 @@ #include <device/pci_ops.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Supermicro H8DMR Mainboard") }; -#endif diff --git a/src/mainboard/technologic/ts5300/Options.lb b/src/mainboard/technologic/ts5300/Options.lb index b23bfef..1179ac6 100644 --- a/src/mainboard/technologic/ts5300/Options.lb +++ b/src/mainboard/technologic/ts5300/Options.lb @@ -39,7 +39,6 @@ uses OBJCOPY uses TTYS0_BAUD uses TTYS0_BASE uses TTYS0_LCS -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_SERIAL8250 @@ -137,10 +136,6 @@ default CONFIG_ROM_PAYLOAD = 1 default CC="$(CROSS_COMPILE)gcc -m32" default HOSTCC="gcc" -default CONFIG_CHIP_NAME = 1 - - - # # ROMFS # diff --git a/src/mainboard/tyan/s2735/Config.lb b/src/mainboard/tyan/s2735/Config.lb index aa82053..8c90c1d 100644 --- a/src/mainboard/tyan/s2735/Config.lb +++ b/src/mainboard/tyan/s2735/Config.lb @@ -175,10 +175,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end - +config chip.h # sample config for tyan/s2735 chip northbridge/intel/e7501 diff --git a/src/mainboard/tyan/s2735/Options.lb b/src/mainboard/tyan/s2735/Options.lb index f08de75..05c0b42 100644 --- a/src/mainboard/tyan/s2735/Options.lb +++ b/src/mainboard/tyan/s2735/Options.lb @@ -56,7 +56,6 @@ uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 uses CONFIG_CONSOLE_BTEXT uses HAVE_INIT_TIMER uses CONFIG_GDB_STUB -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN diff --git a/src/mainboard/tyan/s2735/mainboard.c b/src/mainboard/tyan/s2735/mainboard.c index e27a6a0..267755c 100644 --- a/src/mainboard/tyan/s2735/mainboard.c +++ b/src/mainboard/tyan/s2735/mainboard.c @@ -1,9 +1,7 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2735 Mainboard") }; -#endif diff --git a/src/mainboard/tyan/s2850/Config.lb b/src/mainboard/tyan/s2850/Config.lb index 5a121db..2a3bffe 100644 --- a/src/mainboard/tyan/s2850/Config.lb +++ b/src/mainboard/tyan/s2850/Config.lb @@ -185,9 +185,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for tyan/s2850 chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/tyan/s2850/Options.lb b/src/mainboard/tyan/s2850/Options.lb index 0ec9f55..030cea6 100644 --- a/src/mainboard/tyan/s2850/Options.lb +++ b/src/mainboard/tyan/s2850/Options.lb @@ -52,7 +52,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -122,9 +121,6 @@ default CONFIG_MAX_CPUS=2 default CONFIG_MAX_PHYSICAL_CPUS=1 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #1G memory hole default HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/tyan/s2850/mainboard.c b/src/mainboard/tyan/s2850/mainboard.c index 735e8d3..8afa8f0 100644 --- a/src/mainboard/tyan/s2850/mainboard.c +++ b/src/mainboard/tyan/s2850/mainboard.c @@ -1,9 +1,7 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2850 Mainboard") }; -#endif diff --git a/src/mainboard/tyan/s2875/Config.lb b/src/mainboard/tyan/s2875/Config.lb index cf5fab9..1ea34f2 100644 --- a/src/mainboard/tyan/s2875/Config.lb +++ b/src/mainboard/tyan/s2875/Config.lb @@ -185,9 +185,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for tyan/s2875 chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/tyan/s2875/Options.lb b/src/mainboard/tyan/s2875/Options.lb index ef31867..66622c2 100644 --- a/src/mainboard/tyan/s2875/Options.lb +++ b/src/mainboard/tyan/s2875/Options.lb @@ -52,7 +52,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -123,9 +122,6 @@ default CONFIG_MAX_CPUS=4 default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #1G memory hole default HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/tyan/s2875/mainboard.c b/src/mainboard/tyan/s2875/mainboard.c index 8e2a960..49e1092 100644 --- a/src/mainboard/tyan/s2875/mainboard.c +++ b/src/mainboard/tyan/s2875/mainboard.c @@ -1,9 +1,7 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2875 Mainboard") }; -#endif diff --git a/src/mainboard/tyan/s2880/Config.lb b/src/mainboard/tyan/s2880/Config.lb index 9d5fe20..7e8007d 100644 --- a/src/mainboard/tyan/s2880/Config.lb +++ b/src/mainboard/tyan/s2880/Config.lb @@ -185,9 +185,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for tyan/s2880 chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/tyan/s2880/Options.lb b/src/mainboard/tyan/s2880/Options.lb index 69bf055..6eaeadd 100644 --- a/src/mainboard/tyan/s2880/Options.lb +++ b/src/mainboard/tyan/s2880/Options.lb @@ -52,7 +52,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -122,9 +121,6 @@ default CONFIG_MAX_CPUS=2 default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_LOGICAL_CPUS=0 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #1G memory hole default HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/tyan/s2880/mainboard.c b/src/mainboard/tyan/s2880/mainboard.c index 9d6ad07..7fc8615 100644 --- a/src/mainboard/tyan/s2880/mainboard.c +++ b/src/mainboard/tyan/s2880/mainboard.c @@ -1,9 +1,7 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2880 Mainboard") }; -#endif diff --git a/src/mainboard/tyan/s2881/Config.lb b/src/mainboard/tyan/s2881/Config.lb index 0290bb7..283d8c6 100644 --- a/src/mainboard/tyan/s2881/Config.lb +++ b/src/mainboard/tyan/s2881/Config.lb @@ -185,9 +185,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for tyan/s2881 chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/tyan/s2881/Options.lb b/src/mainboard/tyan/s2881/Options.lb index a7eea4a..47a7cd1 100644 --- a/src/mainboard/tyan/s2881/Options.lb +++ b/src/mainboard/tyan/s2881/Options.lb @@ -52,7 +52,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -127,9 +126,6 @@ default CONFIG_MAX_CPUS=4 default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - ##HT Unit ID offset, default is 1, the typical one default HT_CHAIN_UNITID_BASE=0x0a diff --git a/src/mainboard/tyan/s2881/mainboard.c b/src/mainboard/tyan/s2881/mainboard.c index 79c68b7..1c86e86 100644 --- a/src/mainboard/tyan/s2881/mainboard.c +++ b/src/mainboard/tyan/s2881/mainboard.c @@ -158,9 +158,7 @@ static void enable_dev(struct device *dev) dev->ops = &mainboard_operations; } -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2881 Mainboard") .enable_dev = enable_dev, }; -#endif diff --git a/src/mainboard/tyan/s2882/Config.lb b/src/mainboard/tyan/s2882/Config.lb index f49dc18..2e98c64 100644 --- a/src/mainboard/tyan/s2882/Config.lb +++ b/src/mainboard/tyan/s2882/Config.lb @@ -185,9 +185,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for tyan/s2882 chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/tyan/s2882/Options.lb b/src/mainboard/tyan/s2882/Options.lb index 1788608..415a65f 100644 --- a/src/mainboard/tyan/s2882/Options.lb +++ b/src/mainboard/tyan/s2882/Options.lb @@ -52,7 +52,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -122,9 +121,6 @@ default CONFIG_MAX_CPUS=4 default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #1G memory hole default HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/tyan/s2882/mainboard.c b/src/mainboard/tyan/s2882/mainboard.c index 5cc3b97..0779df1 100644 --- a/src/mainboard/tyan/s2882/mainboard.c +++ b/src/mainboard/tyan/s2882/mainboard.c @@ -1,9 +1,7 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2882 Mainboard") }; -#endif diff --git a/src/mainboard/tyan/s2885/Config.lb b/src/mainboard/tyan/s2885/Config.lb index 2885a87..a763e01 100644 --- a/src/mainboard/tyan/s2885/Config.lb +++ b/src/mainboard/tyan/s2885/Config.lb @@ -185,9 +185,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for tyan/s2885 chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/tyan/s2885/Options.lb b/src/mainboard/tyan/s2885/Options.lb index 0e6b9c9..ece2a78 100644 --- a/src/mainboard/tyan/s2885/Options.lb +++ b/src/mainboard/tyan/s2885/Options.lb @@ -52,7 +52,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -133,9 +132,6 @@ default CONFIG_MAX_CPUS=4 default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - ##HT Unit ID offset, default is 1, the typical one default HT_CHAIN_UNITID_BASE=0x0a diff --git a/src/mainboard/tyan/s2885/mainboard.c b/src/mainboard/tyan/s2885/mainboard.c index fbdcc4c..27da722 100644 --- a/src/mainboard/tyan/s2885/mainboard.c +++ b/src/mainboard/tyan/s2885/mainboard.c @@ -1,9 +1,7 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2885 Mainboard") }; -#endif diff --git a/src/mainboard/tyan/s2891/Config.lb b/src/mainboard/tyan/s2891/Config.lb index 4768724..e7a8ac3 100644 --- a/src/mainboard/tyan/s2891/Config.lb +++ b/src/mainboard/tyan/s2891/Config.lb @@ -205,9 +205,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for tyan/s2891 chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/tyan/s2891/Options.lb b/src/mainboard/tyan/s2891/Options.lb index 2101b3e..e99c889 100644 --- a/src/mainboard/tyan/s2891/Options.lb +++ b/src/mainboard/tyan/s2891/Options.lb @@ -59,7 +59,6 @@ uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_CONSOLE_BTEXT uses HAVE_INIT_TIMER uses CONFIG_GDB_STUB -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_VGA_ROM_RUN uses CONFIG_PCI_ROM_RUN diff --git a/src/mainboard/tyan/s2891/mainboard.c b/src/mainboard/tyan/s2891/mainboard.c index df0f006..cb6aea1 100644 --- a/src/mainboard/tyan/s2891/mainboard.c +++ b/src/mainboard/tyan/s2891/mainboard.c @@ -17,9 +17,7 @@ int add_mainboard_resources(struct lb_memory *mem) } -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2891 Mainboard") }; -#endif diff --git a/src/mainboard/tyan/s2892/Config.lb b/src/mainboard/tyan/s2892/Config.lb index 8663ab6..bcc444d 100644 --- a/src/mainboard/tyan/s2892/Config.lb +++ b/src/mainboard/tyan/s2892/Config.lb @@ -206,9 +206,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for tyan/s2892 chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/tyan/s2892/Options.lb b/src/mainboard/tyan/s2892/Options.lb index 3159455..560d405 100644 --- a/src/mainboard/tyan/s2892/Options.lb +++ b/src/mainboard/tyan/s2892/Options.lb @@ -59,7 +59,6 @@ uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_CONSOLE_BTEXT uses HAVE_INIT_TIMER uses CONFIG_GDB_STUB -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_VGA_ROM_RUN uses CONFIG_PCI_ROM_RUN diff --git a/src/mainboard/tyan/s2892/mainboard.c b/src/mainboard/tyan/s2892/mainboard.c index 26fb8f0..eba339f 100644 --- a/src/mainboard/tyan/s2892/mainboard.c +++ b/src/mainboard/tyan/s2892/mainboard.c @@ -17,9 +17,7 @@ int add_mainboard_resources(struct lb_memory *mem) } -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2892 Mainboard") }; -#endif diff --git a/src/mainboard/tyan/s2895/Config.lb b/src/mainboard/tyan/s2895/Config.lb index 78fc5b7..bc50075 100644 --- a/src/mainboard/tyan/s2895/Config.lb +++ b/src/mainboard/tyan/s2895/Config.lb @@ -242,9 +242,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for tyan/s2895 chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/tyan/s2895/Options.lb b/src/mainboard/tyan/s2895/Options.lb index e30a73e..a34d1d7 100644 --- a/src/mainboard/tyan/s2895/Options.lb +++ b/src/mainboard/tyan/s2895/Options.lb @@ -61,7 +61,6 @@ uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 uses HAVE_INIT_TIMER uses CONFIG_GDB_STUB -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_VGA_ROM_RUN uses CONFIG_PCI_ROM_RUN @@ -169,9 +168,6 @@ default CONFIG_LOGICAL_CPUS=1 default SERIAL_CPU_INIT=0 -#CHIP_NAME ? -#default CONFIG_CHIP_NAME=1 - #1G memory hole default HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/tyan/s2895/mainboard.c b/src/mainboard/tyan/s2895/mainboard.c index 5f38556..08be91f 100644 --- a/src/mainboard/tyan/s2895/mainboard.c +++ b/src/mainboard/tyan/s2895/mainboard.c @@ -17,9 +17,7 @@ int add_mainboard_resources(struct lb_memory *mem) } -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2895 Mainboard") }; -#endif diff --git a/src/mainboard/tyan/s2912/Config.lb b/src/mainboard/tyan/s2912/Config.lb index 4938d14..28adac4 100644 --- a/src/mainboard/tyan/s2912/Config.lb +++ b/src/mainboard/tyan/s2912/Config.lb @@ -222,9 +222,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h chip northbridge/amd/amdk8/root_complex device apic_cluster 0 on diff --git a/src/mainboard/tyan/s2912/Options.lb b/src/mainboard/tyan/s2912/Options.lb index 0bde942..ab745f4 100644 --- a/src/mainboard/tyan/s2912/Options.lb +++ b/src/mainboard/tyan/s2912/Options.lb @@ -79,7 +79,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_USBDEBUG_DIRECT uses CONFIG_PCI_ROM_RUN @@ -195,9 +194,6 @@ default ENABLE_APIC_EXT_ID=0 default APIC_ID_OFFSET=0x10 default LIFT_BSP_APIC_ID=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. #2G #default HW_MEM_HOLE_SIZEK=0x200000 diff --git a/src/mainboard/tyan/s2912/mainboard.c b/src/mainboard/tyan/s2912/mainboard.c index 67aed12..b8fee1c 100644 --- a/src/mainboard/tyan/s2912/mainboard.c +++ b/src/mainboard/tyan/s2912/mainboard.c @@ -26,8 +26,6 @@ #include <device/pci_ops.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2912 Mainboard") }; -#endif diff --git a/src/mainboard/tyan/s2912_fam10/Config.lb b/src/mainboard/tyan/s2912_fam10/Config.lb index e200290..b9f1a5f 100644 --- a/src/mainboard/tyan/s2912_fam10/Config.lb +++ b/src/mainboard/tyan/s2912_fam10/Config.lb @@ -223,9 +223,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h dir /southbridge/nvidia/mcp55 diff --git a/src/mainboard/tyan/s2912_fam10/Options.lb b/src/mainboard/tyan/s2912_fam10/Options.lb index f6c6efe..368d58d 100644 --- a/src/mainboard/tyan/s2912_fam10/Options.lb +++ b/src/mainboard/tyan/s2912_fam10/Options.lb @@ -78,7 +78,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_USBDEBUG_DIRECT uses CONFIG_PCI_ROM_RUN @@ -197,9 +196,6 @@ default ENABLE_APIC_EXT_ID=1 default APIC_ID_OFFSET=0x00 default LIFT_BSP_APIC_ID=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. #2G #default HW_MEM_HOLE_SIZEK=0x200000 diff --git a/src/mainboard/tyan/s2912_fam10/mainboard.c b/src/mainboard/tyan/s2912_fam10/mainboard.c index f4a07c3..5101677 100644 --- a/src/mainboard/tyan/s2912_fam10/mainboard.c +++ b/src/mainboard/tyan/s2912_fam10/mainboard.c @@ -26,8 +26,6 @@ #include <device/pci_ops.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2912 Mainboard (Family 10)") }; -#endif diff --git a/src/mainboard/tyan/s4880/Config.lb b/src/mainboard/tyan/s4880/Config.lb index 1363872..cf728b8 100644 --- a/src/mainboard/tyan/s4880/Config.lb +++ b/src/mainboard/tyan/s4880/Config.lb @@ -186,9 +186,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for tyan/s4880 chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/tyan/s4880/Options.lb b/src/mainboard/tyan/s4880/Options.lb index 2c8e14d..604733e 100644 --- a/src/mainboard/tyan/s4880/Options.lb +++ b/src/mainboard/tyan/s4880/Options.lb @@ -52,7 +52,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -126,9 +125,6 @@ default CONFIG_MAX_CPUS=8 default CONFIG_MAX_PHYSICAL_CPUS=4 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #1G memory hole default HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/tyan/s4880/mainboard.c b/src/mainboard/tyan/s4880/mainboard.c index 0174cd6..f2f865b 100644 --- a/src/mainboard/tyan/s4880/mainboard.c +++ b/src/mainboard/tyan/s4880/mainboard.c @@ -1,9 +1,7 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S4880 Mainboard") }; -#endif diff --git a/src/mainboard/tyan/s4882/Config.lb b/src/mainboard/tyan/s4882/Config.lb index 91824a3..88ae617 100644 --- a/src/mainboard/tyan/s4882/Config.lb +++ b/src/mainboard/tyan/s4882/Config.lb @@ -186,9 +186,7 @@ end ## ## Include the secondary Configuration files ## -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h # sample config for tyan/s4882 chip northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/tyan/s4882/Options.lb b/src/mainboard/tyan/s4882/Options.lb index dd40b17..f7b3bfe 100644 --- a/src/mainboard/tyan/s4882/Options.lb +++ b/src/mainboard/tyan/s4882/Options.lb @@ -52,7 +52,6 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY -uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK @@ -126,9 +125,6 @@ default CONFIG_MAX_CPUS=8 default CONFIG_MAX_PHYSICAL_CPUS=4 default CONFIG_LOGICAL_CPUS=1 -#CHIP_NAME ? -default CONFIG_CHIP_NAME=1 - #1G memory hole default HW_MEM_HOLE_SIZEK=0x100000 diff --git a/src/mainboard/tyan/s4882/mainboard.c b/src/mainboard/tyan/s4882/mainboard.c index 267d3d2..8d626c7 100644 --- a/src/mainboard/tyan/s4882/mainboard.c +++ b/src/mainboard/tyan/s4882/mainboard.c @@ -1,9 +1,7 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S4882 Mainboard") }; -#endif diff --git a/src/mainboard/via/epia-cn/Options.lb b/src/mainboard/via/epia-cn/Options.lb index 7342d84..e6cd7ee 100644 --- a/src/mainboard/via/epia-cn/Options.lb +++ b/src/mainboard/via/epia-cn/Options.lb @@ -65,7 +65,6 @@ uses CONFIG_PCI_ROM_RUN uses CONFIG_CONSOLE_VGA uses CONFIG_MAX_PCI_BUSES uses TTYS0_BAUD -uses CONFIG_CHIP_NAME uses CONFIG_VIDEO_MB uses CONFIG_IOAPIC @@ -75,7 +74,6 @@ default CONFIG_VIDEO_MB = 32 default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_PCI_ROM_RUN = 0 default CONFIG_CONSOLE_VGA = 0 -default CONFIG_CHIP_NAME = 1 default HAVE_FALLBACK_BOOT = 1 default HAVE_MP_TABLE = 0 default CONFIG_UDELAY_TSC = 1 diff --git a/src/mainboard/via/epia/Options.lb b/src/mainboard/via/epia/Options.lb index 6733938..8338434 100644 --- a/src/mainboard/via/epia/Options.lb +++ b/src/mainboard/via/epia/Options.lb @@ -5,7 +5,6 @@ uses CONFIG_CONSOLE_SERIAL8250 uses TTYS0_BAUD uses TTYS0_BASE uses TTYS0_LCS -uses CONFIG_CHIP_NAME uses HAVE_MP_TABLE uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE @@ -64,7 +63,6 @@ default TTYS0_BASE=0x3f8 # This defaults to 8 data bits, 1 stop bit, and no parity default TTYS0_LCS=0x3 -default CONFIG_CHIP_NAME=1 ## ROM_SIZE is the size of boot ROM that this board will use. default ROM_SIZE = 256*1024 diff --git a/src/mainboard/via/pc2500e/Options.lb b/src/mainboard/via/pc2500e/Options.lb index be09c47..ff4d901 100644 --- a/src/mainboard/via/pc2500e/Options.lb +++ b/src/mainboard/via/pc2500e/Options.lb @@ -68,7 +68,6 @@ uses CONFIG_MAX_PCI_BUSES uses TTYS0_BAUD uses TTYS0_BASE uses TTYS0_LCS -uses CONFIG_CHIP_NAME uses CONFIG_VIDEO_MB uses CONFIG_IOAPIC @@ -80,7 +79,6 @@ default CONFIG_VIDEO_MB = 32 default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_PCI_ROM_RUN = 0 default CONFIG_CONSOLE_VGA = 0 -default CONFIG_CHIP_NAME = 1 default HAVE_FALLBACK_BOOT = 1 default CONFIG_SMP = 1 default HAVE_MP_TABLE = 1 diff --git a/src/northbridge/amd/amdfam10/Config.lb b/src/northbridge/amd/amdfam10/Config.lb index 2ddbc6f..5e90819 100644 --- a/src/northbridge/amd/amdfam10/Config.lb +++ b/src/northbridge/amd/amdfam10/Config.lb @@ -17,15 +17,12 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # -uses CONFIG_CHIP_NAME uses AGP_APERTURE_SIZE uses HAVE_ACPI_TABLES default AGP_APERTURE_SIZE=0x4000000 -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h driver northbridge.o driver misc_control.o diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 95e09f4..92f9ea3 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -652,15 +652,11 @@ static struct pci_driver mcf0_driver __pci_driver = { .device = 0x1200, }; -#if CONFIG_CHIP_NAME == 1 - struct chip_operations northbridge_amd_amdfam10_ops = { CHIP_NAME("AMD FAM10 Northbridge") .enable_dev = 0, }; -#endif - static void pci_domain_read_resources(device_t dev) { struct resource *resource; diff --git a/src/northbridge/amd/amdk8/Config.lb b/src/northbridge/amd/amdk8/Config.lb index 99bb337..272c7fd 100644 --- a/src/northbridge/amd/amdk8/Config.lb +++ b/src/northbridge/amd/amdk8/Config.lb @@ -1,12 +1,9 @@ -uses CONFIG_CHIP_NAME uses AGP_APERTURE_SIZE uses HAVE_ACPI_TABLES default AGP_APERTURE_SIZE=0x4000000 -if CONFIG_CHIP_NAME - config chip.h -end +config chip.h driver northbridge.o driver misc_control.o diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 59cbbff..ac9dc20 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -629,15 +629,11 @@ static const struct pci_driver mcf0_driver __pci_driver = { .device = 0x1100, }; -#if CONFIG_CHIP_NAME == 1 - struct chip_operations northbridge_amd_amdk8_ops = { CHIP_NAME("AMD K8 Northbridge") .enable_dev = 0, }; -#endif - static void pci_domain_read_resources(device_t dev) { struct resource *resource; |
