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authorVarad Gautam <varadgautam@gmail.com>2015-03-11 09:54:41 +0530
committerMarc Jones <marc.jones@se-eng.com>2015-04-06 19:40:00 +0200
commit06ef04604570d402687245521731053c66888b15 (patch)
treece0fd5b994094f7228d7c18245f8758fd48676ee
parent015f0aea5dc0cd391ddc34c1db6591d93d08e8a9 (diff)
downloadcoreboot-staging-06ef04604570d402687245521731053c66888b15.zip
coreboot-staging-06ef04604570d402687245521731053c66888b15.tar.gz
global: Refactor get_option usage
Restructure get_option() calls to avoid unnecessary return value checks by pre-assigning defaults to the options being retrieved. Change-Id: I9159afe149a8eeed0785d1efd6eee8420b88b8f4 Signed-off-by: Varad Gautam <varadgautam@gmail.com> Reviewed-on: http://review.coreboot.org/8631 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Marc Jones <marc.jones@se-eng.com>
-rw-r--r--src/console/init.c4
-rw-r--r--src/cpu/amd/model_fxx/model_fxx_init.c5
-rw-r--r--src/mainboard/ibase/mb899/superio_hwm.c26
-rw-r--r--src/mainboard/kontron/986lcd-m/mainboard.c26
-rw-r--r--src/northbridge/amd/amdk8/misc_control.c5
-rw-r--r--src/southbridge/amd/sb600/sata.c6
-rw-r--r--src/southbridge/intel/i82801dx/lpc.c4
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c4
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c4
9 files changed, 40 insertions, 44 deletions
diff --git a/src/console/init.c b/src/console/init.c
index ee64d87..dc727b0 100644
--- a/src/console/init.c
+++ b/src/console/init.c
@@ -37,8 +37,8 @@ int console_log_level(int msg_level)
void console_init(void)
{
#if !defined(__PRE_RAM__)
- if(get_option(&console_loglevel, "debug_level") != CB_SUCCESS)
- console_loglevel=CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
+ console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
+ get_option(&console_loglevel, "debug_level");
#endif
#if CONFIG_EARLY_PCI_BRIDGE && !defined(__SMM__)
diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c
index 341bb62..a6561ee 100644
--- a/src/cpu/amd/model_fxx/model_fxx_init.c
+++ b/src/cpu/amd/model_fxx/model_fxx_init.c
@@ -250,9 +250,8 @@ static void init_ecc_memory(unsigned node_id)
}
/* See if we scrubbing should be enabled */
- enable_scrubbing = 1;
- if (get_option(&enable_scrubbing, "hw_scrubber") != CB_SUCCESS)
- enable_scrubbing = CONFIG_HW_SCRUBBER;
+ enable_scrubbing = CONFIG_HW_SCRUBBER;
+ get_option(&enable_scrubbing, "hw_scrubber");
/* Enable cache scrubbing at the lowest possible rate */
if (enable_scrubbing) {
diff --git a/src/mainboard/ibase/mb899/superio_hwm.c b/src/mainboard/ibase/mb899/superio_hwm.c
index 7864264..4c7d123 100644
--- a/src/mainboard/ibase/mb899/superio_hwm.c
+++ b/src/mainboard/ibase/mb899/superio_hwm.c
@@ -80,19 +80,19 @@ void hwm_setup(void)
int cpufan_speed = 0, sysfan_speed = 0;
int cpufan_temperature = 0, sysfan_temperature = 0;
- if (get_option(&cpufan_control, "cpufan_cruise_control") != CB_SUCCESS)
- cpufan_control = FAN_CRUISE_CONTROL_DISABLED;
- if (get_option(&cpufan_speed, "cpufan_speed") != CB_SUCCESS)
- cpufan_speed = FAN_SPEED_5625;
- //if (get_option(&cpufan_temperature, "cpufan_temperature") != CB_SUCCESS)
- // cpufan_temperature = FAN_TEMPERATURE_30DEGC;
-
- if (get_option(&sysfan_control, "sysfan_cruise_control") != CB_SUCCESS)
- sysfan_control = FAN_CRUISE_CONTROL_DISABLED;
- if (get_option(&sysfan_speed, "sysfan_speed") != CB_SUCCESS)
- sysfan_speed = FAN_SPEED_5625;
- //if (get_option(&sysfan_temperature, "sysfan_temperature") != CB_SUCCESS)
- // sysfan_temperature = FAN_TEMPERATURE_30DEGC;
+ cpufan_control = FAN_CRUISE_CONTROL_DISABLED;
+ get_option(&cpufan_control, "cpufan_cruise_control");
+ cpufan_speed = FAN_SPEED_5625;
+ get_option(&cpufan_speed, "cpufan_speed");
+ //cpufan_temperature = FAN_TEMPERATURE_30DEGC;
+ //get_option(&cpufan_temperature, "cpufan_temperature");
+
+ sysfan_control = FAN_CRUISE_CONTROL_DISABLED;
+ get_option(&sysfan_control, "sysfan_cruise_control");
+ sysfan_speed = FAN_SPEED_5625;
+ get_option(&sysfan_speed, "sysfan_speed");
+ //sysfan_temperature = FAN_TEMPERATURE_30DEGC;
+ //get_option(&sysfan_temperature, "sysfan_temperature");
// hwm_write(0x31, 0x20); // AVCC high limit
// hwm_write(0x34, 0x06); // VIN2 low limit
diff --git a/src/mainboard/kontron/986lcd-m/mainboard.c b/src/mainboard/kontron/986lcd-m/mainboard.c
index afca796..d943127 100644
--- a/src/mainboard/kontron/986lcd-m/mainboard.c
+++ b/src/mainboard/kontron/986lcd-m/mainboard.c
@@ -79,19 +79,19 @@ static void hwm_setup(void)
int cpufan_speed = 0, sysfan_speed = 0;
int cpufan_temperature = 0, sysfan_temperature = 0;
- if (get_option(&cpufan_control, "cpufan_cruise_control") != CB_SUCCESS)
- cpufan_control = FAN_CRUISE_CONTROL_DISABLED;
- if (get_option(&cpufan_speed, "cpufan_speed") != CB_SUCCESS)
- cpufan_speed = FAN_SPEED_5625;
- //if (get_option(&cpufan_temperature, "cpufan_temperature") != CB_SUCCESS)
- // cpufan_temperature = FAN_TEMPERATURE_30DEGC;
-
- if (get_option(&sysfan_control, "sysfan_cruise_control") != CB_SUCCESS)
- sysfan_control = FAN_CRUISE_CONTROL_DISABLED;
- if (get_option(&sysfan_speed, "sysfan_speed") != CB_SUCCESS)
- sysfan_speed = FAN_SPEED_5625;
- //if (get_option(&sysfan_temperature, "sysfan_temperature") != CB_SUCCESS)
- // sysfan_temperature = FAN_TEMPERATURE_30DEGC;
+ cpufan_control = FAN_CRUISE_CONTROL_DISABLED;
+ get_option(&cpufan_control, "cpufan_cruise_control");
+ cpufan_speed = FAN_SPEED_5625;
+ get_option(&cpufan_speed, "cpufan_speed");
+ //cpufan_temperature = FAN_TEMPERATURE_30DEGC;
+ //get_option(&cpufan_temperature, "cpufan_temperature");
+
+ sysfan_control = FAN_CRUISE_CONTROL_DISABLED;
+ get_option(&sysfan_control, "sysfan_cruise_control");
+ sysfan_speed = FAN_SPEED_5625;
+ get_option(&sysfan_speed, "sysfan_speed");
+ //sysfan_temperature = FAN_TEMPERATURE_30DEGC;
+ //get_option(&sysfan_temperature, "sysfan_temperature");
// hwm_write(0x31, 0x20); // AVCC high limit
// hwm_write(0x34, 0x06); // VIN2 low limit
diff --git a/src/northbridge/amd/amdk8/misc_control.c b/src/northbridge/amd/amdk8/misc_control.c
index 956692d..9b521ee 100644
--- a/src/northbridge/amd/amdk8/misc_control.c
+++ b/src/northbridge/amd/amdk8/misc_control.c
@@ -47,9 +47,8 @@ static void mcf3_read_resources(device_t dev)
return;
}
- iommu = 1;
- if (get_option(&iommu, "iommu") != CB_SUCCESS)
- iommu = CONFIG_IOMMU;
+ iommu = CONFIG_IOMMU;
+ get_option(&iommu, "iommu");
if (iommu) {
/* Add a GART aperture resource */
diff --git a/src/southbridge/amd/sb600/sata.c b/src/southbridge/amd/sb600/sata.c
index 2ff7182..34ac0ac 100644
--- a/src/southbridge/amd/sb600/sata.c
+++ b/src/southbridge/amd/sb600/sata.c
@@ -119,10 +119,8 @@ static void sata_init(struct device *dev)
pci_write_config8(dev, 0x40, byte);
// 1 means IDE, 0 means AHCI
- if (get_option(&i, "sata_mode") != CB_SUCCESS) {
- // no cmos option
- i = CONFIG_SATA_MODE;
- }
+ i = CONFIG_SATA_MODE;
+ get_option(&i, "sata_mode");
printk(BIOS_INFO, "%s: setting sata mode = %s\n", __func__, (i == SATA_MODE_IDE)?"ide":"ahci" );
dword = pci_read_config32(dev, 0x8);
diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c
index 83d6178..2f3db86 100644
--- a/src/southbridge/intel/i82801dx/lpc.c
+++ b/src/southbridge/intel/i82801dx/lpc.c
@@ -116,8 +116,8 @@ static void i82801dx_power_options(device_t dev)
*
* If the option is not existent (Laptops), use MAINBOARD_POWER_ON.
*/
- if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS)
- pwr_on = MAINBOARD_POWER_ON;
+ pwr_on = MAINBOARD_POWER_ON;
+ get_option(&pwr_on, "power_on_after_fail");
reg8 = pci_read_config8(dev, GEN_PMCON_3);
reg8 &= 0xfe;
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index cbc0106..b8edfe3 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -179,8 +179,8 @@ static void i82801gx_power_options(device_t dev)
*
* If the option is not existent (Laptops), use MAINBOARD_POWER_ON.
*/
- if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS)
- pwr_on = MAINBOARD_POWER_ON;
+ pwr_on = MAINBOARD_POWER_ON;
+ get_option(&pwr_on, "power_on_after_fail");
reg8 = pci_read_config8(dev, GEN_PMCON_3);
reg8 &= 0xfe;
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 0ba33d6..4f576c4 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -186,8 +186,8 @@ static void i82801ix_power_options(device_t dev)
*
* If the option is not existent (Laptops), use MAINBOARD_POWER_ON.
*/
- if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS)
- pwr_on = MAINBOARD_POWER_ON;
+ pwr_on = MAINBOARD_POWER_ON;
+ get_option(&pwr_on, "power_on_after_fail");
reg8 = pci_read_config8(dev, D31F0_GEN_PMCON_3);
reg8 &= 0xfe;
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