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This patch attempts to resolve some programmer shutdown ordering issues
by having the programmer init functions register shutdown callbacks explicitly
wherever it makes most sense. Before, assumptions were made that could lead to
the internal programmer's state changing before the external programmer could be
shut down properly. Now, each programmer cleans up after itself and (hopefully)
performs each operation in the correct order.
As a side-effect, this patch gives us a better usage model for reverse
operations such as rpci_* and rmmio_*. In the long-run, this should make
reversing the initialization process easier to understand, less tedious, and
less error-prone.
In short, this patch does the following:
- Registers a shutdown callback during initialization for each programmer.
- Kills the .shutdown function pointer from programmer_entry struct. Also,
make most shutdown functions static.
- Adds a few minor clean-ups and corrections (e.g. missing physunmap() calls).
TODO: Remove forward declaration of serprog_shutdown() (added to simplify diff)
Corresponding to flashrom svn r1338.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Remove the array spi_programmer, replace it by dynamic registration
instead. Also initially start with no busses supported, and switch to
the default non-SPI only for the internal programmer.
Also this patch changes the initialization for the buses_supported variable
from "everything-except-SPI" to "nothing". All programmers have to set the
bus type on their own, and this enables register_spi_programmer to just add
the SPI both for on-board SPI interfaces (where the internal programmer
already detected the other bus types), as well as for external programmers
(where we have the default "none").
Corresponding to flashrom svn r1299.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Corresponding to flashrom svn r1298.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Flashrom currently only supports exactly one Super I/O or Embedded
Controller, and this means quite a few notebooks and a small subset of
desktop/server boards cannot be handled reliably and easily.
Allow detection and initialization of up to 3 Super I/O and/or EC chips.
WARNING! If a Super I/O or EC responds on multiple ports (0x2e and
0x4e), the code will do the wrong thing (namely, initialize the hardware
twice). I have no idea if we should handle such situations, and whether
we should ignore the second chip with identical ID or not. Initializing
the hardware twice for the IT87* family is _not_ a problem, but I don't
know how well IT85* can handle it (and whether IT85* would listen at
more than one port anyway).
Corresponding to flashrom svn r1289.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Thanks to Thomas Schneider for testing on a board with ITE IT87* SPI.
Test report (success) is here: http://paste.flashrom.org/view.php?id=379
Thanks to David Hendricks for testing on a Google Cr-48 laptop with
ITE IT85* EC SPI. Test report (success) is here:
http://www.flashrom.org/pipermail/flashrom/2011-April/006275.html
Acked-by: David Hendricks <dhendrix@google.com>
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Fix a few typos.
Change the EC memory region mapping name.
Drop unused function parameter.
Use mmio_writeb()/mmio_readb() to get reliable access to volatile memory
locations instead of plain pointer access which is optimized away by gcc.
Use own it85_* SPI high-level chip read/write functions instead of
relying on unrelated ICH functions.
Corresponding to flashrom svn r1279.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
David writes:
I applied the patch against the Chromium OS branch and
successfully tested read and write operations on a Cr48.
Acked-by: David Hendricks <dhendrix@google.com>
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flashrom-chromium tree
This code has been deployed and tested to work on the Cr-48.
There are a few caveats, though:
- The boot BIOS straps register must be modified to select LPC. This
can be done with the "select_bbs.sh" script (Install iotools at
http://code.google.com/p/iotools/ before using select_bbs).
- It is very important to disable power management daemons before
running flashrom on this EC. I commented out the brute force method
we use in the Chromium OS branch that disables powerd, since IIRC
Carl-Daniel has a better approach in the works.
- Due to dependencies which may be introduced by the OEM/ODM EC
firmware, the code is not guaranteed to work for anything other than
the Cr-48.
Corresponding to flashrom svn r1263.
Signed-off-by: David Hendricks <dhendrix@google.com>
Carl-Daniel comments:
Code is not hooked up yet because probing needs to be sorted out.
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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The patch was developed by Google.
It was tested for IT8500E on a Chrome OS platform and may require
modification depending on ODM/OEM customization and EC firmware version.
This patch is not officially supported by ITE Tech Inc.
Corresponding to flashrom svn r1262.
Signed-off-by: Donald Huang <donald.huang@ite.com.tw>
Signed-off-by: Yung-chieh Lo <yjlou@google.com>
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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