diff options
| author | Boris Baykov <dev@borisbaykov.com> | 2016-08-26 16:25:06 -0500 |
|---|---|---|
| committer | Timothy Pearson <tpearson@raptorengineering.com> | 2017-05-02 14:20:15 -0500 |
| commit | 9dedbdb2bc4a96ae864b64cbb15fa9945695f3dc (patch) | |
| tree | 1ac40f7bc28856f73a44be208ba83d2d5678c4cd /spi.c | |
| parent | f5dd7ce11b65ffd6ead214b4b4cbe90f3eb110dd (diff) | |
| download | ast2050-flashrom-9dedbdb2bc4a96ae864b64cbb15fa9945695f3dc.zip ast2050-flashrom-9dedbdb2bc4a96ae864b64cbb15fa9945695f3dc.tar.gz | |
4ba patches
https://patchwork.coreboot.org/patch/4459
https://patchwork.coreboot.org/patch/4461
https://patchwork.coreboot.org/patch/4463
https://patchwork.coreboot.org/patch/4460
https://patchwork.coreboot.org/patch/4464
https://patchwork.coreboot.org/patch/4462
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Change-Id: I2b69a7a537726349742edc3a00054c39b732ac36
Diffstat (limited to 'spi.c')
| -rw-r--r-- | spi.c | 5 |
1 files changed, 4 insertions, 1 deletions
@@ -110,7 +110,10 @@ int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, * means 0xffffff, the highest unsigned 24bit number. */ addrbase = spi_get_valid_read_addr(flash); - if (addrbase + flash->chip->total_size * 1024 > (1 << 24)) { + /* Show flash chip size warning if flash chip doesn't support + 4-Bytes Addressing mode and last address excedes 24 bits */ + if (!(flash->chip->feature_bits & FEATURE_4BA_SUPPORT) && + addrbase + flash->chip->total_size * 1024 > (1 << 24)) { msg_perr("Flash chip size exceeds the allowed access window. "); msg_perr("Read will probably fail.\n"); /* Try to get the best alignment subject to constraints. */ |
