From 9dedbdb2bc4a96ae864b64cbb15fa9945695f3dc Mon Sep 17 00:00:00 2001 From: Boris Baykov Date: Fri, 26 Aug 2016 16:25:06 -0500 Subject: 4ba patches https://patchwork.coreboot.org/patch/4459 https://patchwork.coreboot.org/patch/4461 https://patchwork.coreboot.org/patch/4463 https://patchwork.coreboot.org/patch/4460 https://patchwork.coreboot.org/patch/4464 https://patchwork.coreboot.org/patch/4462 Signed-off-by: Timothy Pearson Change-Id: I2b69a7a537726349742edc3a00054c39b732ac36 --- spi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'spi.c') diff --git a/spi.c b/spi.c index 894f73f..0a4a618 100644 --- a/spi.c +++ b/spi.c @@ -110,7 +110,10 @@ int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, * means 0xffffff, the highest unsigned 24bit number. */ addrbase = spi_get_valid_read_addr(flash); - if (addrbase + flash->chip->total_size * 1024 > (1 << 24)) { + /* Show flash chip size warning if flash chip doesn't support + 4-Bytes Addressing mode and last address excedes 24 bits */ + if (!(flash->chip->feature_bits & FEATURE_4BA_SUPPORT) && + addrbase + flash->chip->total_size * 1024 > (1 << 24)) { msg_perr("Flash chip size exceeds the allowed access window. "); msg_perr("Read will probably fail.\n"); /* Try to get the best alignment subject to constraints. */ -- cgit v1.1