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* Fix i386 LINT build broken by r209371.mav2010-06-211-0/+3
* Implement new event timers infrastructure. It provides unified APIs formav2010-06-204-354/+845
* Core i5, same as previously Core2Duo, found to not set P-state for singlemav2010-06-191-6/+2
* Restore the machine check register banks on resume. For banks beingjhb2010-06-151-19/+66
* Virtualize pci_remap_msi_irq() call from general MSI code. It allows MSImav2010-06-141-1/+2
* Update several places that iterate over CPUs to use CPU_FOREACH().jhb2010-06-111-4/+2
* Do not disable edge-triggered interrupts before migration. DELAY() withmav2010-06-101-1/+1
* Move the MD support for PCI message signalled interrupts to the x86 treejhb2010-06-081-0/+602
* Move the machine check support code to the x86 tree since it is identicaljhb2010-06-081-0/+889
* Move the I/O APIC code to the x86 tree since it is identical on i386 andjhb2010-06-081-0/+922
* Add support for corrected machine check interrupts. CMCI is a new localjhb2010-05-241-1/+39
* - Implement MI helper functions, dividing one or two timer interrupts withmav2010-05-242-83/+16
* Restore different APIC init orders for i386 and amd64 unified in r208452.mav2010-05-241-2/+24
* Unify local_apic.c for x86 archs,mav2010-05-231-0/+1437
* Fix another instance of lapic_cyclic_clock_func.rpaulo2010-04-201-2/+2
* Default the machdep.lapic_allclocks to be enabled in order to cope withattilio2010-04-091-1/+1
* Improving the clocks auto-tunning by firstly checking if the atrtc may beattilio2010-03-031-5/+20
* Introduce the new kernel sub-tree x86 which should contain all the codeattilio2010-02-2517-0/+7491
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