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* Revert "Revert "MFC r319871:""Luiz Souza2018-02-231-4/+0
* Revert "MFC r319871:"Luiz Souza2018-02-211-0/+4
* MFC r319871:kib2018-02-191-4/+0
* MFC efivar(8) (by imp):kib2017-05-201-0/+14
* MFC r311169,r311898,r312925,r312973,r312975,r313007,r313040,r313080,mjg2017-03-161-0/+101
* MFC r313194:kib2017-02-111-2/+0
* Remove duplicate define.br2016-06-081-1/+0
* Increase the size and alignment of the setjmp buffer.br2016-05-261-3/+3
* Add initial DTrace support for RISC-V.br2016-05-242-0/+10
* Rework the list of all pmaps: embed the list link into pmap.br2016-04-261-7/+1
* Add the non-standard "IO interrupt" vector used by lowRISC.br2016-04-262-1/+5
* Move arm's devmap to some generic place, so it can be usedbr2016-04-261-0/+2
* o Implement shared pagetables and switch from 4 to 3 levels pagebr2016-04-253-7/+12
* Add support for ddb(4).br2016-03-104-4/+216
* o Use uint64_t for page number as it doesn't fit uint32_t.br2016-02-261-0/+1
* Add support for symmetric multiprocessing (SMP).br2016-02-245-12/+99
* Remove duplicates.br2016-02-221-4/+0
* Increase kernel and user VA space.br2016-02-181-17/+20
* Add the implementation of atomic_swap_32().br2016-02-171-0/+13
* Use better form representing 32 x 128-bit floating-point registers.br2016-02-171-1/+1
* Use __uint64_t type for floating point registersbr2016-02-121-1/+1
* Access pcpup using gp register.br2016-02-041-3/+1
* Reuse gp register for pcpu pointer.br2016-02-041-2/+5
* Correct RISC-V exception types.br2016-01-181-4/+6
* Import RISC-V machine headers. This is a minimal set required to compilebr2015-12-1757-0/+4616
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