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path: root/sys/powerpc/aim/machdep.c
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* Reduce the frequency that the PowerPC/AIM pmaps invalidate instructionnwhitehorn2012-04-061-0/+3
* Rework SLB trap handling so that double-faults into an SLB trap handler arenwhitehorn2012-01-151-2/+3
* Implement hwpmc counting PMC support for PowerPC G4+ (MPC745x/MPC744x).jhibbits2011-12-241-0/+1
* Use a global __pure2 function instead of a global register variable fornwhitehorn2011-11-171-1/+6
* Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)nwhitehorn2011-06-231-2/+2
* The POWER7 has only 32 SLB slots instead of 64, like other supportednwhitehorn2011-06-021-9/+13
* Explicitly initialize the first thread's MSR to PSL_KERNSET.nwhitehorn2011-06-021-1/+1
* Include the modules area in the mapped kernel code. This fixes the kernel'snwhitehorn2011-06-021-3/+2
* Add leading zeros when printing the physical memory chunks on __powerpc64__.andreast2011-04-191-1/+1
* Mostly revert r219468, as I had misremembered the C standard regardingmdf2011-03-111-1/+1
* Use MAXPATHLEN rather than the size of an extern array when copying themdf2011-03-101-1/+1
* Make MSGBUF_SIZE kernel option a loader tunable kern.msgbufsize.pluknet2011-01-211-2/+1
* Remove use of a separate ofw_pmap on 32-bit CPUs. Many Open Firmwarenwhitehorn2010-11-121-2/+0
* Centralize CPU idle routines into powerpc/cpu.c and use the samenwhitehorn2010-11-121-58/+0
* Add support for the IMISS, DLMISS, and DSMISS traps required to runnwhitehorn2010-11-111-0/+9
* Adjust the order of operations in spinlock_enter() and spinlock_exit() tojhb2010-11-051-4/+10
* Handle vector assist traps without a kernel panic, by setting denormalizednwhitehorn2010-10-051-2/+2
* Resurrect PSIM support by moving the cacheline size-detection warninggrehan2010-09-141-2/+10
* Refactor timer management code with priority to one-shot operation mode.mav2010-09-131-0/+12
* Update PowerPC event timer code to use new event timers infrastructure.mav2010-09-111-2/+1
* Restructure how reset and poweroff are handled on PowerPC systems, sincenwhitehorn2010-08-311-12/+0
* MFppc64:nwhitehorn2010-07-131-30/+61
* Unify ABI-related bits of the Book-E and AIM machdep routinesnwhitehorn2010-07-121-408/+0
* Move prototypes for kern_sigtimedwait() and kern_sigprocmask() tojhb2010-06-301-0/+1
* Change the arguments of exec_setregs() so that it receives a pointernwhitehorn2010-03-251-2/+2
* Reduce KVA pressure on OEA64 systems running in bridge mode by mappingnwhitehorn2010-02-201-0/+5
* The first argument of dcbz interprets r0 as a literal zero, not the second.nwhitehorn2009-12-031-1/+1
* Add a CPU features framework on PowerPC and simplify CPU setup a littlenwhitehorn2009-11-281-3/+6
* Turn off Altivec data-stream prefetching before going into power-savenwhitehorn2009-10-291-3/+21
* In r197963, a race with thread being selected for signal deliverykib2009-10-271-7/+1
* Add some more paranoia to setting HID registers, and update the AIMnwhitehorn2009-10-231-0/+2
* Get the gdb/psim emulator functioning again.grehan2009-06-101-1/+7
* Introduce support for cpufreq on PowerPC with the dynamic frequencynwhitehorn2009-05-311-8/+0
* Add cpu_flush_dcache() for use after non-DMA based I/O so that amarcel2009-05-181-0/+10
* Factor out platform dependent things unrelated to device drivers into anwhitehorn2009-05-141-4/+11
* Zero PCB during early AIM PowerPC init.raj2009-04-241-0/+1
* Rework the way we get the cacheline size. Instead of having a table ofnwhitehorn2009-04-121-13/+38
* Fix the build when KDB is disabled. The second instance of rfi innwhitehorn2009-04-051-0/+3
* Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge modenwhitehorn2009-04-041-26/+119
* Add Altivec support for supported CPUs. This is derived from the FPU supportnwhitehorn2009-02-201-4/+28
* Modularize the Open Firmware client interface to allow run-time switchingnwhitehorn2008-12-201-2/+10
* Allow the cacheline size on PowerPC to be set at runtime. This is essential fornwhitehorn2008-09-241-4/+4
* Call powerpc_sync() instead of using an asm statement.marcel2008-08-301-1/+1
* The VM system no longer uses setPQL2(). Remove it and its helpers.alc2008-05-231-8/+0
* MFp4: SMP supportmarcel2008-04-271-4/+11
* - Add an integer argument to idle to indicate how likely we are to wakejeff2008-04-251-1/+8
* Now that all platforms use genclock, shuffle things around slightlyphk2008-04-221-1/+0
* Allocate a stack (with optional guard pages) for thread0 andmarcel2008-04-161-14/+9
* In keeping with style(9)'s recommendations on macros, use a ';'rwatson2008-03-161-1/+1
* For AIM, have cpu_idle() set MSR_POW when the powerpc_pow_enabledmarcel2008-03-071-2/+10
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