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path: root/sys/mips/atheros/ar71xx_pci.c
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* As <machine/pmap.h> is included from <vm/pmap.h>, there is no need toskra2016-02-221-1/+0
* Convert rman to use rman_res_t instead of u_longjhibbits2016-01-271-1/+1
* Remove unused variable leading to compile errors.bz2015-09-171-1/+0
* Add domain support to PCI bus allocationzbb2015-09-161-1/+1
* Reshuffle all of the DDR flush operations into a single switch/mux,adrian2015-07-041-2/+2
* Devices that rely on hints or identify routines for discovery need tonwhitehorn2013-10-291-1/+1
* Mips Atheros AR71XX: make PCI base slot configurable through hints.monthadar2013-01-061-2/+15
* Introduce the matching PCI ath(4) fixup code from ar71xx_pci intoadrian2012-04-201-62/+18
* Style(9) and white space fixes.adrian2012-04-171-31/+26
* Protect the PCI space registers behind a mutex.adrian2012-04-171-1/+22
* Fix the mask logic when reading PCI configuration space registers.adrian2012-04-151-2/+6
* (ab)Use the firmware API to store away EEPROM calibration data foradrian2012-04-131-6/+72
* Remove an unused variable. Grr.adrian2012-04-131-1/+1
* Sync this code against what's in OpenWRT trunk.adrian2012-04-131-27/+28
* Stop overloading opt_global.h.adrian2012-01-161-0/+2
* Some of the atheros based embedded devices use one or more PCI NICsadrian2012-01-151-0/+81
* - There's no need to overwrite the default device method with the defaultmarius2011-11-221-2/+1
* Call the DDR FIFO flush method when IP2 interrupts occur.adrian2011-04-301-0/+3
* Make the PCI initialisation path use the new cpuops rather than directlyadrian2010-08-191-8/+4
* - Add interrupts counter for PCI devicesgonzo2010-08-051-2/+12
* - Increase timeouts to 100 milliseconds, 1 millisecond is definitely notgonzo2010-01-281-3/+3
* - Fix PCI routing codegonzo2009-07-081-1/+4
* - Flush PCI register write before delaygonzo2009-06-191-2/+2
* - Take into account only unmasked bits in interrupt status registergonzo2009-06-161-2/+12
* - Fix functions prototypes to make compiler happygonzo2009-06-121-4/+4
* - style(9) fixesgonzo2009-05-261-7/+9
* - Add pci bus space that translates byte order to little endian,gonzo2009-05-151-3/+27
* - Add interrupt handling for AR71XX PCI bridgegonzo2009-05-071-11/+102
* - Revert changes accidentally killed by merge operationgonzo2009-04-141-0/+429
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