| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
| |
There are still a couple references to imx51 ccm driver functions that will
need to be changed after an imx6 ccm driver is written.
Reviewed by: ray
|
|
|
|
| |
are unaligned on cache lines boundary, as we will never need more.
|
|
|
|
|
| |
Pointy hat to: cognet
Spotted out by: alc
|
|
|
|
|
|
| |
- Use the right address when calling kva_free()
(Is there any reason why the s3c2xx0 comes with its own version of bs_map/
bs_unmap ? It seems to be just the same as in bus_space_generic.c)
|
|
|
|
|
|
| |
aligned in kmeminit(), where it'll work for any arch.
Suggested by: alc
|
|
|
|
| |
- Use the right address when calling kva_free()
|
|
|
|
| |
expects.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Unify the 2 concept into a real, minimal, sxlock where the shared
acquisition represent the soft busy and the exclusive acquisition
represent the hard busy.
The old VPO_WANTED mechanism becames the hard-path for this new lock
and it becomes per-page rather than per-object.
The vm_object lock becames an interlock for this functionality:
it can be held in both read or write mode.
However, if the vm_object lock is held in read mode while acquiring
or releasing the busy state, the thread owner cannot make any
assumption on the busy state unless it is also busying it.
Also:
- Add a new flag to directly shared busy pages while vm_page_alloc
and vm_page_grab are being executed. This will be very helpful
once these functions happen under a read object lock.
- Move the swapping sleep into its own per-object flag
The KPI is heavilly changed this is why the version is bumped.
It is very likely that some VM ports users will need to change
their own code.
Sponsored by: EMC / Isilon storage division
Discussed with: alc
Reviewed by: jeff, kib
Tested by: gavin, bapt (older version)
Tested by: pho, scottl
|
|
|
|
|
|
|
|
|
|
| |
line boundary. It has never been 100% correct, and it can't work on SMP,
because nothing prevents another core from accessing data from an unrelated
buffer in the same cache line while we invalidated it. Just use bounce pages
instead.
Reviewed by: ian
Approved by: mux (mentor) (implicit)
|
|
|
|
|
|
|
|
|
|
|
| |
Add support for A20 timer.
Correct interrupt offset depending from chip.
Add basic code for CPU configuration module.
For now, add kernel config and dts file
(only FDT blob related problem needs to be solved later in
order to have one kernel for both cubieboard1 and 2).
Approved by: ray@
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
transparent layering and better fragmentation.
- Normalize functions that allocate memory to use kmem_*
- Those that allocate address space are named kva_*
- Those that operate on maps are named kmap_*
- Implement recursive allocation handling for kmem_arena in vmem.
Reviewed by: alc
Tested by: pho
Sponsored by: EMC / Isilon Storage Division
|
|
|
|
| |
already aligned correctly in the PUSHFRAME macro.
|
|
|
|
| |
the omap4, instead of relying on the (wrong) value provided in the dts.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
because an exception may happen at any time. The stack alignment rules on
ARM EABI state the only place the stack must be 8-byte aligned is on a
function boundary.
If an exception happens while a function is setting up or tearing down it's
stack frame it may not be correctly aligned. There is also no requirement
for it to be when the function is a leaf node.
The fix is to align the stack after we have stored a backup of the old stack
pointer, but before we have stored anything in the trapframe. Along with
this we need to adjust the size of the trapframe by 4 bytes to ensure the
stack below it is also correctly aligned.
|
|
|
|
|
|
|
| |
Instead of hard-coding the uart register addresses for the imx51, use
a variable that defaults to the imx51 address. When debugging another
imx-family SoC, the variable can be set early in initarm() to provide
full console/printf support for debugging early boot.
|
| |
|
|
|
|
| |
Reviewed by: cognet@
|
| |
|
| |
|
|
|
|
| |
explicitely clean/invalidate every cache line using way/set operations.
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
* Make Yarrow an optional kernel component -- enabled by "YARROW_RNG" option.
The files sha2.c, hash.c, randomdev_soft.c and yarrow.c comprise yarrow.
* random(4) device doesn't really depend on rijndael-*. Yarrow, however, does.
* Add random_adaptors.[ch] which is basically a store of random_adaptor's.
random_adaptor is basically an adapter that plugs in to random(4).
random_adaptor can only be plugged in to random(4) very early in bootup.
Unplugging random_adaptor from random(4) is not supported, and is probably a
bad idea anyway, due to potential loss of entropy pools.
We currently have 3 random_adaptors:
+ yarrow
+ rdrand (ivy.c)
+ nehemeiah
* Remove platform dependent logic from probe.c, and move it into
corresponding registration routines of each random_adaptor provider.
probe.c doesn't do anything other than picking a specific random_adaptor
from a list of registered ones.
* If the kernel doesn't have any random_adaptor adapters present then the
creation of /dev/random is postponed until next random_adaptor is kldload'ed.
* Fix randomdev_soft.c to refer to its own random_adaptor, instead of a
system wide one.
Submitted by: arthurmesh@gmail.com, obrien
Obtained from: Juniper Networks
Reviewed by: obrien
|
|
|
|
|
|
|
| |
struct pcb.
Submitted by: Zbyszek Bodek <zbb@semihalf.com>
Pointy hat to: cognet
|
|
|
|
| |
on other cores.
|
|
|
|
|
|
| |
This WIP should not have been committed yet.
Pointyhat to: avg
|
|
|
|
|
|
| |
no userland-serviceable parts inside
MFC after: 20 days
|
|
|
|
| |
pave the way for adding imx6 support.
|
| |
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
instruction set. Thumb-2 requires an if-then instruction to implement
conditional codes.
When building for ARM mode the it-then instructions do not generate any
assembled instruction as per the ARMv7-A Architecture Reference Manual, and
are safe to use.
While this allows the atomic instructions to be built, it doesn't mean we
fully support Thumb code. It works in small tests, but is still known to
fail in a large number of places.
While here add a check for the armv6t2 architecture.
|
|
|
|
|
|
|
|
|
| |
- We should check is_d32 to see howmany registers we have
- In vfp_restore mark vfpscr as an output register
Without the second part it appears we can return the incorrect value from
vfp_bounce if the VFP condition flags are set as it may override the
register holding the return value.
|
|
|
|
|
|
| |
std.rpi + std.bcm2835.
Reviewed by: imp
|
|
|
|
|
|
|
| |
and remove corresponding fields from struct mbstat. Use PCPU counters
and SFSTAT_INC() macro for update these statistics.
Discussed with: glebius
|
| |
|
| |
|
| |
|
|
|
|
| |
Submitted by: wxs@
|
| |
|
| |
|
|
|
|
| |
Reviewed by: gonzo
|
| |
|
| |
|
| |
|
| |
|
|
|
|
| |
USB OTG core.
|
|
|
|
|
|
| |
This follows section 18.4.2.2 SD Soft Reset Flow in the TI AM335x Technical
Reference Manual and seems to fix the "ti_mmchs0: Error: current cmd NULL,
already done?" messages.
|
|
|
|
|
|
|
|
|
|
| |
Gcc outputs pre-UAL asm and expects the ldcl instruction with a condition
in the form ldc<c>l, where the code produces the instruction in the UAL
form ldcl<c>. Work around this by checking if we are using clang or gcc and
adjusting the instruction.
While here correct the cmp instruction's value to include the # before the
immediate value.
|
|
|
|
| |
o Slim down reg fields comments.
|
|
|
|
|
|
|
|
|
| |
ePWM is controlled by sysctl nodes dev.am335x_pwm.N.period,
dev.am335x_pwm.N.dutyA and dev.am335x_pwm.N.dutyB that controls
PWM period and duty cycles for channels A and B respectively.
Period and duty cycle are measured in clock ticks. Default
clock frequency for AM335x PWM subsystem is 100MHz
|
|
|
|
|
|
|
|
|
| |
pmap_remove_all()
This flag should already be cleared by pmap_nuke_pv()
Submitted by: Zbigniew Bodek <zbb@semihalf.com>
Sponsored by: The FreeBSD Foundation, Semihalf
|