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* Now that we have an U-Boot for RPI2, do not use the static DTB compiledloos2015-04-231-2/+2
| | | | | | | | | | | | | | | | into the kernel, which is used mostly on early development stages. On RPI(2) the DTB is loaded and modified by firmware and then handed to kernel via U-Boot and ubldr. The RPI firmware adds (or modify) a few valuable data to the in memory DTB, like: - System memory; - Ethernet MAC address; - framebuffer settings; - Board serial and revision; - clock-frequency for most of devices.
* Fetch the SDHCI frequency from videocore (our prefered source) and only ifloos2015-04-221-7/+6
| | | | | | it fails, fetch the clock-frequency from DTB. If both methods fail, use the hardcoded default.
* Build and install the DTB for all the supported AllWinner SoCs.loos2015-04-202-2/+2
| | | | We will need them when we start booting using ubldr.
* Make a comment reflect reality.marius2015-04-191-1/+2
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* Move the items common to all SoCs to a single file.loos2015-04-185-30/+20
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* Fix the style(9) and adds two missing parentheses on the licence.loos2015-04-181-81/+81
| | | | | | Reduce the differences to bring in the MMC/SD driver. Approved by: ganbold (licence change)
* Simplify the receiver code a bit.loos2015-04-182-54/+60
| | | | Drain the RX FIFO and continue on failure.
* Add the necessary support to use both TX queues available on if_emac.loos2015-04-172-12/+29
| | | | | | | | | | | | Each TX queue can hold one packet (yes, if_emac can send only two(!) packets at a time). Even with this change the very limited FIFO buffer (3 KiB for TX and 13 KiB for RX) fill up too quick to sustain higher throughput. For the TCP case it turns out that TX isn't the limiting factor, but the RX side is (the FIFO fill up and starts to discard packets, so the sender has to slow down).
* Remove unnecessary checks and fix an issue where the interrupt handlerloos2015-04-171-10/+6
| | | | could return with lock held.
* Remove support for reading the syscall code in OABI. This is unneeded nowandrew2015-04-171-4/+0
| | | | we can only build for EABI.
* Use cp15_ifar_get to get the instruction fault address. When using Thumb-2andrew2015-04-171-0/+5
| | | | | the instruction may be over two pages so the program counter could point to the wrong page.
* Fix the 'wrong packet header' errors for if_emac.loos2015-04-171-3/+1
| | | | | | | | | | | Do not strip the ethernet CRC until we read all data from FIFO, otherwise the CRC bytes would be left in FIFO causing the failure of next packet (wrong packet header). When this error happens the receiver has to be disabled and the RX FIFO flushed, discarding valid packets. With this fix if_emac behaves a lot better.
* Update the arm devmap code to also work with arm64.andrew2015-04-131-7/+36
| | | | | | | | | | There are a few differences between the two. On arm we need to provide a list of addresses we may be mapping before we have initialised the virtual memory subsystem, however on arm64 we allocate a small (2MiB for a 4k granule) range to be used for such purposes. Differential Revision: https://reviews.freebsd.org/D2249 Sponsored by: The FreeBSD Foundation
* Add a driver for the ARM Power State Coordination Interface (PSCI). Thisandrew2015-04-121-0/+1
| | | | | | | | | | | handles versions 0.1 and 0.2 of the standard on 32-bit ARM. With this driver we can shutdown in QEMU. Further work is needed to turn secondary cores on on boot and to support later revisions of the specification. Submitted by: Robin Randhawa <Robin.Randhawa at ARM.com> Sponsored by: The FreeBSD Foundation
* Switch to the new v6 pmap code to increase its testing. It will now beandrew2015-04-121-0/+1
| | | | built as part of universe.
* Change the virtual address used to not be 0xc0000000, the arm loaderandrew2015-04-111-2/+2
| | | | doesn't handle this address.
* Add support for the QEMU virt SoC. This is a SoC built depending on theandrew2015-04-115-0/+263
| | | | | | | command line arguments passed in. It will then generate a dtb on the fly, as such no dts will be added as it may be incorrect. Relnotes: yes
* Add support for the uart classes to set their default register shift value.andrew2015-04-114-2/+6
| | | | | | | | | | | This is needed with the pl011 driver. Before this change it would default to a shift of 0, however the hardware places the registers at 4-byte addresses meaning the value should be 2. This patch fixes this for the pl011 when configured using the fdt. The other drivers have a default value of 0 to keep this a no-op. MFC after: 1 week
* This modifies several FreeBSD drivers to use the GNU approach toganbold2015-04-116-31/+110
| | | | | | | | supply clk81 information. It also changes the hardware strings in some of the drivers to match what's present in the GNU files. Submitted by: John Wehle Reviewed by: imp
* This modifies several FreeBSD drivers to use the hardware stringsganbold2015-04-113-3/+3
| | | | | | | present in the GNU dts files. Submitted by: John Wehle Reviewed by: imp
* Add a pmap_kremove_device() to undo mappings made with pmap_kenter_device().ian2015-04-106-30/+95
| | | | | | | | | Previously we used pmap_kremove(), but with ARM_NEW_PMAP it does the remove in a way that isn't SMP-coherent (which is appropriate in some circumstances such as mapping/unmapping sf buffers). With matching enter/remove routines for device mappings, each low-level implementation can do the right thing. Reviewed by: Svatopluk Kraus <onwahe@gmail.com>
* Add support to the efi boot1 and loader for 32-bit ARM. This will be usedandrew2015-04-061-0/+7
| | | | | | | by the future qemu virt support. Differential Revision: https://reviews.freebsd.org/D2238 Reviewed by: emaste
* dev/ofw/openfirm.h is not needed in the arm machine/fdt.handrew2015-04-051-2/+0
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* Re-add machine/bus.h to machine/fdt.h on arm, it's still needed.andrew2015-04-041-0/+2
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* Include vm/pmap.h for pmap_kextract.andrew2015-04-0414-0/+41
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* Include machine/intr.h for arm_post_filter.andrew2015-04-041-0/+7
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* Don't include unneeded files in the arm machine/fdt.h. While here, removeandrew2015-04-044-8/+1
| | | | it from more files.
* Move the definition of fdt_localbus_devmap to a Marvell specific file asandrew2015-04-043-4/+2
| | | | it's only used there.
* Stop using machine/fdt.h in the arm kernel code when we don't need it.andrew2015-04-0456-56/+0
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* Add support for arm64 to the existing arm generic timer driver:andrew2015-04-041-15/+35
| | | | | | | | | | | | - Add macros to handle the differences in accessing these registers on arm and arm64. - Use the fdt data to detect if we are on an ARMv7 or ARMv8. - Use the virtual timer by default on arm64, we may not have access to the physical timer. Differential Revision: https://reviews.freebsd.org/D2208 Reviewed by: emaste Sponsored by: The FreeBSD Foundation
* Merge the common parts of the SOCKIT and SOCKIT-BERI kerenel, and mark theandrew2015-04-033-228/+140
| | | | former as NO_UNIVERSE.
* Stop including machine/fdt.h, it's not needed.andrew2015-04-021-1/+0
| | | | Sponsored by: The FreeBSD Foundation
* We may not be using gcc to compile this.andrew2015-04-021-1/+1
| | | | Sponsored by: The FreeBSD Foundation
* Add the generic timer registers to sysreg.h and cpu-v6.h, and use theandrew2015-04-023-28/+80
| | | | | | | access functions in the generic timer driver. Differential Revision: https://reviews.freebsd.org/D2198 Sponsored by: The FreeBSD Foundation
* - Make interrupt resource optional: some upstream FDT blobs (e.g. TI's) dogonzo2015-04-021-8/+13
| | | | | | | not have interupt property in pl310 node. Interrupt is used only to detect cache activity when L2 cache is disabled, it's not vital for normal operations. - Fix intrhook allocation/initialization
* Add kernel config files for Hardkernel Odroid-C1 and Visson ATV-102 devices.ganbold2015-03-312-0/+266
| | | | | Submitted by: John Wehle Approved by: stas (mentor)
* Add necessary changes to support various Amlogic SoC devicesganbold2015-03-3135-1/+10776
| | | | | | | | | | | | | | | | | | | | | | | | | | | | specially aml8726-m6 and aml8726-m8b SoC based devices. aml8726-m6 SoC exist in devices such as Visson ATV-102. Hardkernel ODROID-C1 board has aml8726-m8b SoC. The following support is included: Basic machdep code SMP Interrupt controller Clock control driver (aka gate) Pinctrl Timer Real time clock UART GPIO I2C SD controller SDXC controller USB Watchdog Random number generator PLL / Clock frequency measurement Frame buffer Submitted by: John Wehle Approved by: stas (mentor)
* Restore setting cpufuncs on arm1176, it was removed by accident with theandrew2015-03-301-0/+1
| | | | | | arm1136 code. Reviewed by: ian
* Remove support for CPU_XSCALE_80200. None of our configs support it, andandrew2015-03-304-62/+14
| | | | | | | there wasn;t an option to enable it. While here remove a check for CPU_ARM10 being defined as it has also been removed.
* Remove support for CPU_FA626TE. It's unused by any of our kernel configs.andrew2015-03-304-15/+12
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* arm11_sleep is no longer needed, remove it.andrew2015-03-291-7/+0
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* pj4b_config and pj4bv7_setup are only used when CPU_MV_PJ4B is defined.andrew2015-03-291-2/+4
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* Build the cpufunc_asm_* files based on the cpu type, not which config fileandrew2015-03-2925-35/+0
| | | | we happen to be building.
* Remove cpufunc_asm_arm11.S from the ARMv7 configs, it's not used.andrew2015-03-2911-11/+0
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* Remove arm1136 support. We don't have any configs that use it, and I don'tandrew2015-03-295-108/+14
| | | | expect us to add support for any more arm11 SoCs.
* Remove the bootconfig parsing. We never used it and always passed either anandrew2015-03-2914-344/+29
| | | | empty string or NULL to the setup functions that called into it.
* We only need cpufunc_asm_arm11.S on bcm2835, not bcm2836andrew2015-03-292-1/+1
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* Remove ARM9_CACHE_WRITE_THROUGH, none of our configs define it.andrew2015-03-293-28/+1
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* Remove the unused armv5 cpufunc code.andrew2015-03-291-247/+0
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* Remove unused cpufunc arm11 and armv6 code. While here only define theandrew2015-03-293-80/+22
| | | | remaining functions in the context we use them in.
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