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path: root/sys/amd64/vmm/vmm_lapic.c
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* Relax the check on which vectors can be delivered through the APIC. Accordingneel2015-04-161-1/+5
* Use lapic_ipi_alloc() to dynamically allocate IPI slots needed by bhyve whenneel2015-03-141-1/+0
* Local APIC access via 32-bit naturally-aligned loads is merelytychon2014-04-151-3/+5
* Simplify APIC mode switching from MMIO to x2APIC. In part this is done toneel2014-02-201-6/+5
* Allow vlapic_set_intr_ready() to return a value that indicates whether or notneel2014-01-071-2/+2
* vlapic code restructuring to make it easy to support hardware-assist for APICneel2013-12-251-23/+1
* Extend the support for local interrupts on the local APIC:jhb2013-12-231-0/+27
* Add an API to deliver message signalled interrupts to vcpus. This allowsneel2013-12-161-0/+47
* Fix x2apic support in bhyve.neel2013-12-101-6/+6
* Use callout(9) to drive the vlapic timer instead of clocking it on each VM exit.neel2013-12-071-10/+0
* Rename 'vm_interrupt_hostcpu()' to 'vcpu_notify_event()' because the functionneel2013-12-031-1/+1
* Add support for level triggered interrupt pins on the vioapic. Prior to thisneel2013-11-271-2/+2
* Remove the 'vdev' abstraction that was meant to sit on top of device modelsneel2013-11-041-4/+4
* Change emulate_rdmsr() and emulate_wrmsr() to return 0 on sucess and errno onneel2012-11-281-36/+16
* Revamp the x86 instruction emulation in bhyve.neel2012-11-281-51/+32
* Calculate the number of host ticks until the next guest timer interrupt.neel2012-10-201-2/+2
* Intel VT-x provides the length of the instruction at the time of the nestedneel2012-09-271-20/+13
* Add support for trapping MMIO writes to local apic registers and emulating them.neel2012-09-251-0/+71
* Restructure the x2apic access code in preparation for supporting memory mappedneel2012-09-211-12/+66
* IFC @ r222830grehan2011-06-281-0/+1
* Import of bhyve hypervisor and utilities, part 1.grehan2011-05-131-0/+121
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