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:
FreeBSD-src
RELENG_2_2
RELENG_2_3
RELENG_2_3_0
RELENG_2_3_1
RELENG_2_3_2
RELENG_2_3_3
RELENG_2_3_4
RELENG_2_4
RELENG_2_4_4
RELENG_2_4_OLD
devel
devel-11
releng/10.1
releng/10.3
releng/11.0
releng/11.1
stable/10
stable/11
Raptor Engineering's fork of pfsense FreeBSD src with pfSense changes
Raptor Engineering, LLC
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sys
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amd64
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vmm
/
intel
Commit message (
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)
Author
Age
Files
Lines
*
Emulate machine check related MSRs to allow guest OSes like Windows to boot.
neel
2015-05-02
1
-0
/
+7
*
Don't require <sys/cpuset.h> to be always included before <machine/vmm.h>.
neel
2015-04-30
1
-1
/
+0
*
Advertise the MTRR feature via CPUID and emulate the minimal set of MTRR MSRs.
neel
2015-04-30
1
-0
/
+15
*
When fetching an instruction in non-64bit mode, consider the value of the
tychon
2015-03-24
1
-0
/
+6
*
Use lapic_ipi_alloc() to dynamically allocate IPI slots needed by bhyve when
neel
2015-03-14
2
-7
/
+5
*
Always emulate MSR_PAT on Intel processors and don't rely on PAT save/restore
neel
2015-02-24
4
-22
/
+56
*
Simplify instruction restart logic in bhyve.
neel
2015-01-18
1
-0
/
+1
*
'struct vm_exception' was intended to be used only as the collateral for the
neel
2015-01-13
1
-9
/
+9
*
Clear blocking due to STI or MOV SS in the hypervisor when an instruction is
neel
2015-01-06
2
-10
/
+29
*
Allow ktr(4) tracing of all guest exceptions via the tunable
neel
2014-12-23
3
-13
/
+71
*
Emulate writes to the IA32_MISC_ENABLE MSR.
neel
2014-12-20
1
-2
/
+24
*
IFC @r273214
neel
2014-10-20
1
-1
/
+1
*
IFC @r272887
neel
2014-10-10
2
-0
/
+108
|
\
|
*
Support Intel-specific MSRs that are accessed when booting up a linux in bhyve:
neel
2014-10-09
1
-0
/
+100
|
*
Inject #UD into the guest when it executes either 'MONITOR' or 'MWAIT'.
neel
2014-10-06
1
-0
/
+8
*
|
IFC @r272481
neel
2014-10-05
1
-55
/
+17
|
\
\
|
|
/
|
*
Get rid of code that dealt with the hardware not being able to save/restore
neel
2014-10-02
1
-55
/
+17
*
|
IFC @r272185
neel
2014-09-27
1
-7
/
+0
|
\
\
|
|
/
|
*
MSR_KGSBASE is no longer saved and restored from the guest MSR save area. This
neel
2014-09-20
1
-7
/
+0
|
*
Restructure the MSR handling so it is entirely handled by processor-specific
neel
2014-09-20
6
-41
/
+201
*
|
IFC r271888.
neel
2014-09-20
6
-41
/
+201
*
|
IFC @r271694
neel
2014-09-17
1
-0
/
+46
|
\
\
|
|
/
|
*
Optimize the common case of injecting an interrupt into a vcpu after a HLT
neel
2014-09-12
1
-0
/
+46
*
|
AMD processors that have the SVM decode assist capability will store the
neel
2014-09-13
1
-0
/
+1
*
|
IFC @r269962
neel
2014-09-02
6
-196
/
+496
|
\
\
|
|
/
|
*
Use the max guest memory address when creating its iommu domain.
neel
2014-08-14
1
-0
/
+5
|
*
- Output a summary of optional VT-x features in dmesg similar to CPU
jhb
2014-07-30
3
-30
/
+27
|
*
If a vcpu has issued a HLT instruction with interrupts disabled then it sleeps
neel
2014-07-26
1
-1
/
+1
|
*
Fix build without INVARIANTS defined by getting rid of unused variable 'exc'.
neel
2014-07-20
1
-2
/
+1
|
*
Handle nested exceptions in bhyve.
neel
2014-07-19
1
-47
/
+75
|
*
Add emulation for legacy x86 task switching mechanism.
neel
2014-07-16
3
-5
/
+88
|
*
Add support for operand size and address size override prefixes in bhyve's
neel
2014-07-15
1
-1
/
+16
|
*
Accurately identify the vcpu's operating mode as 64-bit, compatibility,
neel
2014-07-08
1
-4
/
+12
|
*
Invalidate guest TLB mappings as a side-effect of its CR3 being updated.
neel
2014-07-08
1
-27
/
+68
|
*
Bring an overly enthusiastic KASSERT inline with the Intel SDM.
tychon
2014-06-16
1
-2
/
+18
|
*
Add helper functions to populate VM exit information for rendezvous and
neel
2014-06-10
1
-32
/
+8
|
*
Turn on interrupt window exiting unconditionally when an ExtINT is being
neel
2014-06-10
1
-2
/
+6
|
*
Add reserved bit checking when doing %CR8 emulation and inject #GP if required.
neel
2014-06-09
1
-6
/
+9
|
*
Support guest accesses to %cr8.
tychon
2014-06-06
1
-50
/
+144
|
*
If VMX isn't enabled so long as the lock bit isn't set yet in MSR
tychon
2014-05-30
1
-1
/
+10
|
*
- Rework the XSAVE/XRSTOR emulation to only expose XCR0 features to the
jhb
2014-05-27
1
-2
/
+24
*
|
ins/outs support for SVM. Modelled on the Intel VT-x code.
grehan
2014-06-06
1
-2
/
+0
|
/
*
Do the linear address calculation for the ins/outs emulation using a new
neel
2014-05-25
1
-1
/
+0
*
Consolidate all the information needed by the guest page table walker into
neel
2014-05-24
1
-10
/
+14
*
When injecting a page fault into the guest also update the guest's %cr2 to
neel
2014-05-24
1
-0
/
+2
*
Add emulation of the "outsb" instruction. NetBSD guests use this to write to
neel
2014-05-23
1
-8
/
+99
*
Allow vmx_getdesc() and vmx_setdesc() to be called for a vcpu that is in the
neel
2014-05-22
3
-10
/
+24
*
Add PG_U (user/supervisor) checks when translating a guest linear address
neel
2014-05-19
1
-12
/
+27
*
Make the vmx asm code dtrace-fbt-friendly by
grehan
2014-05-18
2
-7
/
+19
*
Ignore writes to microcode update MSR. This MSR is accessed by RHEL7 guest.
neel
2014-04-30
1
-0
/
+3
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