| Commit message (Expand) | Author | Age | Files | Lines |
* | Revert "Revert "MFC r328083,328096,328116,328119,328120,328128,328135,328153,... | Luiz Souza | 2018-02-23 | 1 | -1/+2 |
* | Revert "Revert "MFC r322762, r322799, r322832, r322833:"" | Luiz Souza | 2018-02-23 | 1 | -1/+4 |
* | Revert "MFC r322762, r322799, r322832, r322833:" | Luiz Souza | 2018-02-21 | 1 | -4/+1 |
* | Revert "MFC r328083,328096,328116,328119,328120,328128,328135,328153,328157," | Luiz Souza | 2018-02-21 | 1 | -2/+1 |
* | MFC r328083,328096,328116,328119,328120,328128,328135,328153,328157, | kib | 2018-02-19 | 1 | -1/+2 |
* | MFC r322762, r322799, r322832, r322833: | kib | 2018-02-19 | 1 | -1/+4 |
* | vmm(4): Small spelling fixes. | pfg | 2016-05-03 | 1 | -1/+1 |
* | Restructure memory allocation in bhyve to support "devmem". | neel | 2015-06-18 | 1 | -1/+1 |
* | Support guest writes to the TSC by enabling the "use TSC offsetting" | tychon | 2015-06-09 | 3 | -4/+26 |
* | Fix non-deterministic delays when accessing a vcpu that was in "running" or | neel | 2015-05-28 | 1 | -3/+9 |
* | Don't rely on the 'VM-exit instruction length' field in the VMCS to always | neel | 2015-05-22 | 1 | -0/+1 |
* | Emulate machine check related MSRs to allow guest OSes like Windows to boot. | neel | 2015-05-02 | 1 | -0/+7 |
* | Don't require <sys/cpuset.h> to be always included before <machine/vmm.h>. | neel | 2015-04-30 | 1 | -1/+0 |
* | Advertise the MTRR feature via CPUID and emulate the minimal set of MTRR MSRs. | neel | 2015-04-30 | 1 | -0/+15 |
* | When fetching an instruction in non-64bit mode, consider the value of the | tychon | 2015-03-24 | 1 | -0/+6 |
* | Use lapic_ipi_alloc() to dynamically allocate IPI slots needed by bhyve when | neel | 2015-03-14 | 2 | -7/+5 |
* | Always emulate MSR_PAT on Intel processors and don't rely on PAT save/restore | neel | 2015-02-24 | 4 | -22/+56 |
* | Simplify instruction restart logic in bhyve. | neel | 2015-01-18 | 1 | -0/+1 |
* | 'struct vm_exception' was intended to be used only as the collateral for the | neel | 2015-01-13 | 1 | -9/+9 |
* | Clear blocking due to STI or MOV SS in the hypervisor when an instruction is | neel | 2015-01-06 | 2 | -10/+29 |
* | Allow ktr(4) tracing of all guest exceptions via the tunable | neel | 2014-12-23 | 3 | -13/+71 |
* | Emulate writes to the IA32_MISC_ENABLE MSR. | neel | 2014-12-20 | 1 | -2/+24 |
* | IFC @r273214 | neel | 2014-10-20 | 1 | -1/+1 |
* | IFC @r272887 | neel | 2014-10-10 | 2 | -0/+108 |
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| * | Support Intel-specific MSRs that are accessed when booting up a linux in bhyve: | neel | 2014-10-09 | 1 | -0/+100 |
| * | Inject #UD into the guest when it executes either 'MONITOR' or 'MWAIT'. | neel | 2014-10-06 | 1 | -0/+8 |
* | | IFC @r272481 | neel | 2014-10-05 | 1 | -55/+17 |
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| * | Get rid of code that dealt with the hardware not being able to save/restore | neel | 2014-10-02 | 1 | -55/+17 |
* | | IFC @r272185 | neel | 2014-09-27 | 1 | -7/+0 |
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| * | MSR_KGSBASE is no longer saved and restored from the guest MSR save area. This | neel | 2014-09-20 | 1 | -7/+0 |
| * | Restructure the MSR handling so it is entirely handled by processor-specific | neel | 2014-09-20 | 6 | -41/+201 |
* | | IFC r271888. | neel | 2014-09-20 | 6 | -41/+201 |
* | | IFC @r271694 | neel | 2014-09-17 | 1 | -0/+46 |
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| * | Optimize the common case of injecting an interrupt into a vcpu after a HLT | neel | 2014-09-12 | 1 | -0/+46 |
* | | AMD processors that have the SVM decode assist capability will store the | neel | 2014-09-13 | 1 | -0/+1 |
* | | IFC @r269962 | neel | 2014-09-02 | 6 | -196/+496 |
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| * | Use the max guest memory address when creating its iommu domain. | neel | 2014-08-14 | 1 | -0/+5 |
| * | - Output a summary of optional VT-x features in dmesg similar to CPU | jhb | 2014-07-30 | 3 | -30/+27 |
| * | If a vcpu has issued a HLT instruction with interrupts disabled then it sleeps | neel | 2014-07-26 | 1 | -1/+1 |
| * | Fix build without INVARIANTS defined by getting rid of unused variable 'exc'. | neel | 2014-07-20 | 1 | -2/+1 |
| * | Handle nested exceptions in bhyve. | neel | 2014-07-19 | 1 | -47/+75 |
| * | Add emulation for legacy x86 task switching mechanism. | neel | 2014-07-16 | 3 | -5/+88 |
| * | Add support for operand size and address size override prefixes in bhyve's | neel | 2014-07-15 | 1 | -1/+16 |
| * | Accurately identify the vcpu's operating mode as 64-bit, compatibility, | neel | 2014-07-08 | 1 | -4/+12 |
| * | Invalidate guest TLB mappings as a side-effect of its CR3 being updated. | neel | 2014-07-08 | 1 | -27/+68 |
| * | Bring an overly enthusiastic KASSERT inline with the Intel SDM. | tychon | 2014-06-16 | 1 | -2/+18 |
| * | Add helper functions to populate VM exit information for rendezvous and | neel | 2014-06-10 | 1 | -32/+8 |
| * | Turn on interrupt window exiting unconditionally when an ExtINT is being | neel | 2014-06-10 | 1 | -2/+6 |
| * | Add reserved bit checking when doing %CR8 emulation and inject #GP if required. | neel | 2014-06-09 | 1 | -6/+9 |
| * | Support guest accesses to %cr8. | tychon | 2014-06-06 | 1 | -50/+144 |