1 files changed, 0 insertions, 134 deletions
diff --git a/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8960.h b/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8960.h
deleted file mode 100644
index 47c8686..0000000
--- a/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8960.h
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_RESET_MSM_GCC_8960_H
-#define _DT_BINDINGS_RESET_MSM_GCC_8960_H
-
-#define SFAB_MSS_Q6_SW_RESET				0
-#define SFAB_MSS_Q6_FW_RESET				1
-#define QDSS_STM_RESET					2
-#define AFAB_SMPSS_S_RESET				3
-#define AFAB_SMPSS_M1_RESET				4
-#define AFAB_SMPSS_M0_RESET				5
-#define AFAB_EBI1_CH0_RESET				6
-#define AFAB_EBI1_CH1_RESET				7
-#define SFAB_ADM0_M0_RESET				8
-#define SFAB_ADM0_M1_RESET				9
-#define SFAB_ADM0_M2_RESET				10
-#define ADM0_C2_RESET					11
-#define ADM0_C1_RESET					12
-#define ADM0_C0_RESET					13
-#define ADM0_PBUS_RESET					14
-#define ADM0_RESET					15
-#define QDSS_CLKS_SW_RESET				16
-#define QDSS_POR_RESET					17
-#define QDSS_TSCTR_RESET				18
-#define QDSS_HRESET_RESET				19
-#define QDSS_AXI_RESET					20
-#define QDSS_DBG_RESET					21
-#define PCIE_A_RESET					22
-#define PCIE_AUX_RESET					23
-#define PCIE_H_RESET					24
-#define SFAB_PCIE_M_RESET				25
-#define SFAB_PCIE_S_RESET				26
-#define SFAB_MSS_M_RESET				27
-#define SFAB_USB3_M_RESET				28
-#define SFAB_RIVA_M_RESET				29
-#define SFAB_LPASS_RESET				30
-#define SFAB_AFAB_M_RESET				31
-#define AFAB_SFAB_M0_RESET				32
-#define AFAB_SFAB_M1_RESET				33
-#define SFAB_SATA_S_RESET				34
-#define SFAB_DFAB_M_RESET				35
-#define DFAB_SFAB_M_RESET				36
-#define DFAB_SWAY0_RESET				37
-#define DFAB_SWAY1_RESET				38
-#define DFAB_ARB0_RESET					39
-#define DFAB_ARB1_RESET					40
-#define PPSS_PROC_RESET					41
-#define PPSS_RESET					42
-#define DMA_BAM_RESET					43
-#define SPS_TIC_H_RESET					44
-#define SLIMBUS_H_RESET					45
-#define SFAB_CFPB_M_RESET				46
-#define SFAB_CFPB_S_RESET				47
-#define TSIF_H_RESET					48
-#define CE1_H_RESET					49
-#define CE1_CORE_RESET					50
-#define CE1_SLEEP_RESET					51
-#define CE2_H_RESET					52
-#define CE2_CORE_RESET					53
-#define SFAB_SFPB_M_RESET				54
-#define SFAB_SFPB_S_RESET				55
-#define RPM_PROC_RESET					56
-#define PMIC_SSBI2_RESET				57
-#define SDC1_RESET					58
-#define SDC2_RESET					59
-#define SDC3_RESET					60
-#define SDC4_RESET					61
-#define SDC5_RESET					62
-#define DFAB_A2_RESET					63
-#define USB_HS1_RESET					64
-#define USB_HSIC_RESET					65
-#define USB_FS1_XCVR_RESET				66
-#define USB_FS1_RESET					67
-#define USB_FS2_XCVR_RESET				68
-#define USB_FS2_RESET					69
-#define GSBI1_RESET					70
-#define GSBI2_RESET					71
-#define GSBI3_RESET					72
-#define GSBI4_RESET					73
-#define GSBI5_RESET					74
-#define GSBI6_RESET					75
-#define GSBI7_RESET					76
-#define GSBI8_RESET					77
-#define GSBI9_RESET					78
-#define GSBI10_RESET					79
-#define GSBI11_RESET					80
-#define GSBI12_RESET					81
-#define SPDM_RESET					82
-#define TLMM_H_RESET					83
-#define SFAB_MSS_S_RESET				84
-#define MSS_SLP_RESET					85
-#define MSS_Q6SW_JTAG_RESET				86
-#define MSS_Q6FW_JTAG_RESET				87
-#define MSS_RESET					88
-#define SATA_H_RESET					89
-#define SATA_RXOOB_RESE					90
-#define SATA_PMALIVE_RESET				91
-#define SATA_SFAB_M_RESET				92
-#define TSSC_RESET					93
-#define PDM_RESET					94
-#define MPM_H_RESET					95
-#define MPM_RESET					96
-#define SFAB_SMPSS_S_RESET				97
-#define PRNG_RESET					98
-#define RIVA_RESET					99
-#define USB_HS3_RESET					100
-#define USB_HS4_RESET					101
-#define CE3_RESET					102
-#define PCIE_EXT_PCI_RESET				103
-#define PCIE_PHY_RESET					104
-#define PCIE_PCI_RESET					105
-#define PCIE_POR_RESET					106
-#define PCIE_HCLK_RESET					107
-#define PCIE_ACLK_RESET					108
-#define CE3_H_RESET					109
-#define SFAB_CE3_M_RESET				110
-#define SFAB_CE3_S_RESET				111
-#define SATA_RESET					112
-#define CE3_SLEEP_RESET					113
-#define GSS_SLP_RESET					114
-#define GSS_RESET					115
-
-#endif