diff options
| author | imp <imp@FreeBSD.org> | 2001-09-04 05:50:08 +0000 |
|---|---|---|
| committer | imp <imp@FreeBSD.org> | 2001-09-04 05:50:08 +0000 |
| commit | 6b5eb4a0bda0d93e6cbcc6da091eece120754e11 (patch) | |
| tree | 1e85c70a99253b83d6348ad7aa22253250a77492 /sys/pccard/pcic_pci.h | |
| parent | b2ea2b171b8f6407d574462ca2013565079904ec (diff) | |
| download | FreeBSD-src-6b5eb4a0bda0d93e6cbcc6da091eece120754e11.zip FreeBSD-src-6b5eb4a0bda0d93e6cbcc6da091eece120754e11.tar.gz | |
Add support for changing the way that ToPIC csc interrupts are routed.
# Note: The ToPIC 100 and the ToPIC 97 datasheets are in disagreement
# as to if this bit is supposed to be set or cleared to enable INTA routing
# so I made my best guess.
Also, comments about the various chipsets, including some grumpy ones
about how vague the O2micro datasheets are.
Diffstat (limited to 'sys/pccard/pcic_pci.h')
| -rw-r--r-- | sys/pccard/pcic_pci.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sys/pccard/pcic_pci.h b/sys/pccard/pcic_pci.h index 38a9c86..1d49cea 100644 --- a/sys/pccard/pcic_pci.h +++ b/sys/pccard/pcic_pci.h @@ -98,6 +98,12 @@ #define R5C47X_MISC_CONTROL_REGISTER_2 0xa0 #define R5C47X_MCR2_CSC_TO_INTX_DISABLE 0x0010 /* Bit 7 */ +/* + * ToPIC specific stuff. + */ +#define TOPIC_INTERRUPT_CONTROL 0xa1 +#define TOPIC_ICR_INTA 0x1 + /* sanpei */ /* For Bridge Control register (CB_PCI_BRIDGE_CTRL) */ |
