Move to using a chip function + function pointers to deal with the

function and csc interrupt routing path (eg, ISA or PCI) so that we
can more easily switch between the two.

When we don't have a card ISR, put the function interrupt into ISA
mode.  This effectively masks the interrupt since it happens once, and
not again until we have an ISR.  This should help hangs, and might
help people that unwisely update the kernel w/o updating pccardd.
This is done at mapirq time.

Force CL-PD6729/30 to use ISA interrupt routing and maybe even detect
the number of pccard slots properly (this is still WIP).  We aren't
going to support PCI interrupts for this release.  A future release
should support them, however.  Shibata-san's 3.3V fixes are not
included.

Add a hack which should, in i386, rewrite IRQ 0 cardbus bridges to be
IRQ 255, which should cause interrupts to be routed.  This is mostly
untested since my one tester disappeared after reporting nothing
changed.

Implement, but do not use, a power method called cardbus.  It looked
like a great way to get around the 3.3V problem, but it seems that you
can only use it to power cardbus cards (I get no CIS when I enable it,
so maybe we're programming things bogusly).

GC the intr and argp stuff from the slot database.

Improve the ToPIC support with the power hacks that Nakagawa-san
published in FreeBSD Press and that Hiroyuki Aizu-san ported to
-stable.  The ToPIC hacks were for 3.3V support in ToPIC 100, but it
looks like the '97 also has identical registers, so use them too.

Add some #defines for the cardbus power stuff.

Finally implement making CSC on the Ricoh chips ISA or PCI.  This will
allow polling mode to work on vaios, I think.

Add some minor debugging.  This should likely be cleaned up or put
behing a bootverbose.

Some of this work, and earlier work, was influanced by Chiharu
Shibata-san's power handing patches posted to bsd-nomads:15866.

MFC: Soon, if possible.

1 files changed, 24 insertions, 2 deletions

diff --git a/sys/pccard/pcic_pci.h b/sys/pccard/pcic_pci.h
index 928f478..38a9c86 100644
--- a/sys/pccard/pcic_pci.h
+++ b/sys/pccard/pcic_pci.h
@@ -91,6 +91,13 @@
 #define	TI113X_ExCA_IO_OFFSET1		0x38	/* Offset of I/O window */
 #define	TI113X_ExCA_MEM_WINDOW_PAGE	0x3C	/* Memory Window Page */
 
+/*
+ * Ricoh R5C47[5678] parts have these registers.  Maybe the 46x also use
+ * them, but I can't find out for sure without datasheets...
+ */
+#define	R5C47X_MISC_CONTROL_REGISTER_2	0xa0
+#define R5C47X_MCR2_CSC_TO_INTX_DISABLE 0x0010	/* Bit 7 */
+
 /* sanpei */
 
 /* For Bridge Control register (CB_PCI_BRIDGE_CTRL) */
@@ -140,12 +147,14 @@
 #define CB_SOCKET_MASK		0x04
 #define CB_SOCKET_STATE		0x08
 #define CB_SOCKET_FORCE		0x0c
-#define CB_SOCKET_CONTROL	0x10
-#define CB_SOCKET_POWER		0x14
+#define CB_SOCKET_POWER		0x10
 #define CB_EXCA_OFFSET		0x800	/* Offset for ExCA registers */
 
 #define CB_SE_CD		0x6	/* Socket Event Card detect */
+#define CB_SE_POWER		0x8
+
 #define CB_SM_CD		0x6	/* Socket MASK Card detect */
+#define CB_SM_POWER		0x8
 
 #define CB_SS_CARDSTS		0x00000001 /* Card Status Change */
 #define CB_SS_CD1		0x00000002 /* Card Detect 1 */
@@ -166,3 +175,16 @@
 #define CB_SS_3VSOCK		0x20000000 /* 3.3 V Socket */
 #define CB_SS_XVSOCK		0x40000000 /* X.X V Socket */
 #define CB_SS_YVSOCK		0x80000000 /* Y.Y V Socket */
+
+#define CB_SP_CLKSTOP		0x80	/* Cardbus clock stop protocol */
+#define CB_SP_VCC_0V		0x00
+#define CB_SP_VCC_5V		0x20
+#define CB_SP_VCC_3V		0x30
+#define CB_SP_VCC_XV		0x40
+#define CB_SP_VCC_YV		0x50
+#define CB_SP_VPP_0V		0x00
+#define CB_SP_VPP_12V		0x01
+#define CB_SP_VPP_5V		0x02
+#define CB_SP_VPP_3V		0x03
+#define CB_SP_VPP_XV		0x04
+#define CB_SP_VPP_YV		0x05