Use FreeBSD/arm approach for handling bus space access: space tag is a pointer

to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.

2 files changed, 3 insertions, 3 deletions

diff --git a/sys/mips/alchemy/obio.c b/sys/mips/alchemy/obio.c
index 03e098d..7e61ff5 100644
--- a/sys/mips/alchemy/obio.c
+++ b/sys/mips/alchemy/obio.c
@@ -269,7 +269,7 @@ obio_activate_resource(device_t bus, device_t child, int type, int rid,
 
 		vaddr = (void *)MIPS_PHYS_TO_KSEG1((intptr_t)rman_get_start(r));
 		rman_set_virtual(r, vaddr);
-		rman_set_bustag(r, MIPS_BUS_SPACE_MEM);
+		rman_set_bustag(r, &mips_bus_space_generic);
 		rman_set_bushandle(r, (bus_space_handle_t)vaddr);
 	}
 
diff --git a/sys/mips/alchemy/uart_cpu_alchemy.c b/sys/mips/alchemy/uart_cpu_alchemy.c
index 931aed6..d38d4cd 100644
--- a/sys/mips/alchemy/uart_cpu_alchemy.c
+++ b/sys/mips/alchemy/uart_cpu_alchemy.c
@@ -63,7 +63,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 
 	di->ops = uart_getops(&uart_ns8250_class);
 	di->bas.chan = 0;
-	di->bas.bst = 0;
+	di->bas.bst = &mips_bus_space_generic;
 	di->bas.regshft = 0;
 	di->bas.rclk = 0;
 	di->baudrate = 115200;
@@ -72,7 +72,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 	di->parity = UART_PARITY_NONE;
 
 	uart_bus_space_io = 0;
-	uart_bus_space_mem = MIPS_PHYS_TO_KSEG1(UART0_BASE);
+	uart_bus_space_mem = &mips_bus_space_generic;
 	di->bas.bsh = MIPS_PHYS_TO_KSEG1(UART0_BASE);
 
 	return (0);