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authorscottl <scottl@FreeBSD.org>2008-08-02 13:04:26 +0000
committerscottl <scottl@FreeBSD.org>2008-08-02 13:04:26 +0000
commit02392e305a759c070ed6d6dd7a87602b3006effa (patch)
treef0ec10eaecba13372d823b4ddd207b94dfe5cb55 /sys/dev/ciss/ciss.c
parent3bbb49a345a9c362ea68b1c84998da2b606ff342 (diff)
downloadFreeBSD-src-02392e305a759c070ed6d6dd7a87602b3006effa.zip
FreeBSD-src-02392e305a759c070ed6d6dd7a87602b3006effa.tar.gz
Correctly set the interrupt enable and disable bits. The previous
code interfered with Performant mode and legacy interrupts. Also remove a register read operation on the Simplq code that was effectively a time-wasting no-op.
Diffstat (limited to 'sys/dev/ciss/ciss.c')
-rw-r--r--sys/dev/ciss/ciss.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/sys/dev/ciss/ciss.c b/sys/dev/ciss/ciss.c
index 58c590c..9073e7b 100644
--- a/sys/dev/ciss/ciss.c
+++ b/sys/dev/ciss/ciss.c
@@ -2028,10 +2028,6 @@ ciss_done(struct ciss_softc *sc, cr_qhead_t *qh)
*/
for (;;) {
- /* see if the OPQ contains anything */
- if (!CISS_TL_SIMPLE_OPQ_INTERRUPT(sc))
- break;
-
tag = CISS_TL_SIMPLE_FETCH_CMD(sc);
if (tag == CISS_TL_SIMPLE_OPQ_EMPTY)
break;
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