Update clang, llvm, lld, lldb, compiler-rt and libc++ to 4.0.0 release:

MFC r309142 (by emaste):

Add WITH_LLD_AS_LD build knob

If set it installs LLD as /usr/bin/ld.  LLD (as of version 3.9) is not
capable of linking the world and kernel, but can self-host and link many
substantial applications. GNU ld continues to be used for the world and
kernel build, regardless of how this knob is set.

It is on by default for arm64, and off for all other CPU architectures.

Sponsored by:	The FreeBSD Foundation

MFC r310840:

Reapply 310775, now it also builds correctly if lldb is disabled:

Move llvm-objdump from CLANG_EXTRAS to installed by default

We currently install three tools from binutils 2.17.50: as, ld, and
objdump. Work is underway to migrate to a permissively-licensed
tool-chain, with one goal being the retirement of binutils 2.17.50.

LLVM's llvm-objdump is intended to be compatible with GNU objdump
although it is currently missing some options and may have formatting
differences. Enable it by default for testing and further investigation.
It may later be changed to install as /usr/bin/objdump, it becomes a
fully viable replacement.

Reviewed by:	emaste
Differential Revision:	https://reviews.freebsd.org/D8879

MFC r312855 (by emaste):

Rename LLD_AS_LD to LLD_IS_LD, for consistency with CLANG_IS_CC

Reported by:	Dan McGregor <dan.mcgregor usask.ca>

MFC r313559 | glebius | 2017-02-10 18:34:48 +0100 (Fri, 10 Feb 2017) | 5 lines

Don't check struct rtentry on FreeBSD, it is an internal kernel structure.
On other systems it may be API structure for SIOCADDRT/SIOCDELRT.

Reviewed by:	emaste, dim

MFC r314152 (by jkim):

Remove an assembler flag, which is redundant since r309124.  The upstream
took care of it by introducing a macro NO_EXEC_STACK_DIRECTIVE.

http://llvm.org/viewvc/llvm-project?rev=273500&view=rev

Reviewed by:	dim

MFC r314564:

Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to
4.0.0 (branches/release_40 296509).  The release will follow soon.

Please note that from 3.5.0 onwards, clang, llvm and lldb require C++11
support to build; see UPDATING for more information.

Also note that as of 4.0.0, lld should be able to link the base system
on amd64 and aarch64.  See the WITH_LLD_IS_LLD setting in src.conf(5).
Though please be aware that this is work in progress.

Release notes for llvm, clang and lld will be available here:
<http://releases.llvm.org/4.0.0/docs/ReleaseNotes.html>
<http://releases.llvm.org/4.0.0/tools/clang/docs/ReleaseNotes.html>
<http://releases.llvm.org/4.0.0/tools/lld/docs/ReleaseNotes.html>

Thanks to Ed Maste, Jan Beich, Antoine Brodin and Eric Fiselier for
their help.

Relnotes:	yes
Exp-run:	antoine
PR:		215969, 216008

MFC r314708:

For now, revert r287232 from upstream llvm trunk (by Daniil Fukalov):

  [SCEV] limit recursion depth of CompareSCEVComplexity

  Summary:
  CompareSCEVComplexity goes too deep (50+ on a quite a big unrolled
  loop) and runs almost infinite time.

  Added cache of "equal" SCEV pairs to earlier cutoff of further
  estimation. Recursion depth limit was also introduced as a parameter.

  Reviewers: sanjoy

  Subscribers: mzolotukhin, tstellarAMD, llvm-commits

  Differential Revision: https://reviews.llvm.org/D26389

This commit is the cause of excessive compile times on skein_block.c
(and possibly other files) during kernel builds on amd64.

We never saw the problematic behavior described in this upstream commit,
so for now it is better to revert it.  An upstream bug has been filed
here: https://bugs.llvm.org/show_bug.cgi?id=32142

Reported by:	mjg

MFC r314795:

Reapply r287232 from upstream llvm trunk (by Daniil Fukalov):

  [SCEV] limit recursion depth of CompareSCEVComplexity

  Summary:
  CompareSCEVComplexity goes too deep (50+ on a quite a big unrolled
  loop) and runs almost infinite time.

  Added cache of "equal" SCEV pairs to earlier cutoff of further
  estimation. Recursion depth limit was also introduced as a parameter.

  Reviewers: sanjoy

  Subscribers: mzolotukhin, tstellarAMD, llvm-commits

  Differential Revision: https://reviews.llvm.org/D26389

Pull in r296992 from upstream llvm trunk (by Sanjoy Das):

  [SCEV] Decrease the recursion threshold for CompareValueComplexity

  Fixes PR32142.

  r287232 accidentally increased the recursion threshold for
  CompareValueComplexity from 2 to 32.  This change reverses that
  change by introducing a separate flag for CompareValueComplexity's
  threshold.

The latter revision fixes the excessive compile times for skein_block.c.

MFC r314907 | mmel | 2017-03-08 12:40:27 +0100 (Wed, 08 Mar 2017) | 7 lines

Unbreak ARMv6 world.

The new compiler_rt library imported with clang 4.0.0 have several fatal
issues (non-functional __udivsi3 for example) with ARM specific instrict
functions. As temporary workaround, until upstream solve these problems,
disable all thumb[1][2] related feature.

MFC r315016:

Update clang, llvm, lld, lldb, compiler-rt and libc++ to 4.0.0 release.
We were already very close to the last release candidate, so this is a
pretty minor update.

Relnotes:	yes

MFC r316005:

Revert r314907, and pull in r298713 from upstream compiler-rt trunk (by
Weiming Zhao):

  builtins: Select correct code fragments when compiling for Thumb1/Thum2/ARM ISA.

  Summary:
  Value of __ARM_ARCH_ISA_THUMB isn't based on the actual compilation
  mode (-mthumb, -marm), it reflect's capability of given CPU.

  Due to this:
   - use  __tbumb__ and __thumb2__ insteand of __ARM_ARCH_ISA_THUMB
   - use '.thumb' directive consistently  in all affected files
   - decorate all thumb functions using
     DEFINE_COMPILERRT_THUMB_FUNCTION()

  ---------
  Note: This patch doesn't fix broken Thumb1 variant of __udivsi3 !

  Reviewers: weimingz, rengolin, compnerd

  Subscribers: aemerson, dim

  Differential Revision: https://reviews.llvm.org/D30938

Discussed with:	mmel

1 files changed, 152 insertions, 103 deletions

diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ARMDefines.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ARMDefines.h
index cfb33be..84c2cf1 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ARMDefines.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ARMDefines.h
@@ -10,101 +10,150 @@
 #ifndef lldb_ARMDefines_h_
 #define lldb_ARMDefines_h_
 
+#include <cassert>
+#include <cstdint>
+
 // Common definitions for the ARM/Thumb Instruction Set Architecture.
 
 namespace lldb_private {
 
 // ARM shifter types
-typedef enum
-{
-    SRType_LSL,
-    SRType_LSR,
-    SRType_ASR,
-    SRType_ROR,
-    SRType_RRX,
-    SRType_Invalid
+typedef enum {
+  SRType_LSL,
+  SRType_LSR,
+  SRType_ASR,
+  SRType_ROR,
+  SRType_RRX,
+  SRType_Invalid
 } ARM_ShifterType;
 
-// ARM conditions          // Meaning (integer)         Meaning (floating-point)      Condition flags
-#define COND_EQ     0x0    // Equal                     Equal                         Z == 1
-#define COND_NE     0x1    // Not equal                 Not equal, or unordered       Z == 0
-#define COND_CS     0x2    // Carry set                 >, ==, or unordered           C == 1
-#define COND_HS     0x2
-#define COND_CC     0x3    // Carry clear               Less than                     C == 0
-#define COND_LO     0x3
-#define COND_MI     0x4    // Minus, negative           Less than                     N == 1
-#define COND_PL     0x5    // Plus, positive or zero    >, ==, or unordered           N == 0
-#define COND_VS     0x6    // Overflow                  Unordered                     V == 1
-#define COND_VC     0x7    // No overflow               Not unordered                 V == 0
-#define COND_HI     0x8    // Unsigned higher           Greater than, or unordered    C == 1 and Z == 0
-#define COND_LS     0x9    // Unsigned lower or same    Less than or equal            C == 0 or Z == 1
-#define COND_GE     0xA    // Greater than or equal     Greater than or equal         N == V
-#define COND_LT     0xB    // Less than                 Less than, or unordered       N != V
-#define COND_GT     0xC    // Greater than              Greater than                  Z == 0 and N == V
-#define COND_LE     0xD    // Less than or equal        <, ==, or unordered           Z == 1 or N != V
-#define COND_AL     0xE    // Always (unconditional)    Always (unconditional)        Any
+// ARM conditions          // Meaning (integer)         Meaning (floating-point)
+// Condition flags
+#define COND_EQ                                                                \
+  0x0 // Equal                     Equal                         Z == 1
+#define COND_NE                                                                \
+  0x1 // Not equal                 Not equal, or unordered       Z == 0
+#define COND_CS                                                                \
+  0x2 // Carry set                 >, ==, or unordered           C == 1
+#define COND_HS 0x2
+#define COND_CC                                                                \
+  0x3 // Carry clear               Less than                     C == 0
+#define COND_LO 0x3
+#define COND_MI                                                                \
+  0x4 // Minus, negative           Less than                     N == 1
+#define COND_PL                                                                \
+  0x5 // Plus, positive or zero    >, ==, or unordered           N == 0
+#define COND_VS                                                                \
+  0x6 // Overflow                  Unordered                     V == 1
+#define COND_VC                                                                \
+  0x7 // No overflow               Not unordered                 V == 0
+#define COND_HI                                                                \
+  0x8 // Unsigned higher           Greater than, or unordered    C == 1 and Z ==
+      // 0
+#define COND_LS                                                                \
+  0x9 // Unsigned lower or same    Less than or equal            C == 0 or Z ==
+      // 1
+#define COND_GE                                                                \
+  0xA // Greater than or equal     Greater than or equal         N == V
+#define COND_LT                                                                \
+  0xB // Less than                 Less than, or unordered       N != V
+#define COND_GT                                                                \
+  0xC // Greater than              Greater than                  Z == 0 and N ==
+      // V
+#define COND_LE                                                                \
+  0xD // Less than or equal        <, ==, or unordered           Z == 1 or N !=
+      // V
+#define COND_AL                                                                \
+  0xE // Always (unconditional)    Always (unconditional)        Any
 #define COND_UNCOND 0xF
 
-static inline const char *
-ARMCondCodeToString(uint32_t CC)
-{
-    switch (CC) {
-    default: assert(0 && "Unknown condition code");
-    case COND_EQ:  return "eq";
-    case COND_NE:  return "ne";
-    case COND_HS:  return "hs";
-    case COND_LO:  return "lo";
-    case COND_MI:  return "mi";
-    case COND_PL:  return "pl";
-    case COND_VS:  return "vs";
-    case COND_VC:  return "vc";
-    case COND_HI:  return "hi";
-    case COND_LS:  return "ls";
-    case COND_GE:  return "ge";
-    case COND_LT:  return "lt";
-    case COND_GT:  return "gt";
-    case COND_LE:  return "le";
-    case COND_AL:  return "al";
-    }
+static inline const char *ARMCondCodeToString(uint32_t CC) {
+  switch (CC) {
+  default:
+    assert(0 && "Unknown condition code");
+  case COND_EQ:
+    return "eq";
+  case COND_NE:
+    return "ne";
+  case COND_HS:
+    return "hs";
+  case COND_LO:
+    return "lo";
+  case COND_MI:
+    return "mi";
+  case COND_PL:
+    return "pl";
+  case COND_VS:
+    return "vs";
+  case COND_VC:
+    return "vc";
+  case COND_HI:
+    return "hi";
+  case COND_LS:
+    return "ls";
+  case COND_GE:
+    return "ge";
+  case COND_LT:
+    return "lt";
+  case COND_GT:
+    return "gt";
+  case COND_LE:
+    return "le";
+  case COND_AL:
+    return "al";
+  }
 }
 
-static inline bool
-ARMConditionPassed(const uint32_t condition, const uint32_t cpsr)
-{
-    const uint32_t cpsr_n = (cpsr >> 31) & 1u; // Negative condition code flag
-    const uint32_t cpsr_z = (cpsr >> 30) & 1u; // Zero condition code flag
-    const uint32_t cpsr_c = (cpsr >> 29) & 1u; // Carry condition code flag
-    const uint32_t cpsr_v = (cpsr >> 28) & 1u; // Overflow condition code flag
+static inline bool ARMConditionPassed(const uint32_t condition,
+                                      const uint32_t cpsr) {
+  const uint32_t cpsr_n = (cpsr >> 31) & 1u; // Negative condition code flag
+  const uint32_t cpsr_z = (cpsr >> 30) & 1u; // Zero condition code flag
+  const uint32_t cpsr_c = (cpsr >> 29) & 1u; // Carry condition code flag
+  const uint32_t cpsr_v = (cpsr >> 28) & 1u; // Overflow condition code flag
 
-    switch (condition) {
-        case COND_EQ: return (cpsr_z == 1);
-        case COND_NE: return (cpsr_z == 0);
-        case COND_CS: return (cpsr_c == 1);
-        case COND_CC: return (cpsr_c == 0);
-        case COND_MI: return (cpsr_n == 1);
-        case COND_PL: return (cpsr_n == 0);
-        case COND_VS: return (cpsr_v == 1);
-        case COND_VC: return (cpsr_v == 0);
-        case COND_HI: return ((cpsr_c == 1) && (cpsr_z == 0));
-        case COND_LS: return ((cpsr_c == 0) || (cpsr_z == 1));
-        case COND_GE: return (cpsr_n == cpsr_v);
-        case COND_LT: return (cpsr_n != cpsr_v);
-        case COND_GT: return ((cpsr_z == 0) && (cpsr_n == cpsr_v));
-        case COND_LE: return ((cpsr_z == 1) || (cpsr_n != cpsr_v));
-        case COND_AL:
-        case COND_UNCOND:
-        default:
-            return true;
-    }
-    return false;
+  switch (condition) {
+  case COND_EQ:
+    return (cpsr_z == 1);
+  case COND_NE:
+    return (cpsr_z == 0);
+  case COND_CS:
+    return (cpsr_c == 1);
+  case COND_CC:
+    return (cpsr_c == 0);
+  case COND_MI:
+    return (cpsr_n == 1);
+  case COND_PL:
+    return (cpsr_n == 0);
+  case COND_VS:
+    return (cpsr_v == 1);
+  case COND_VC:
+    return (cpsr_v == 0);
+  case COND_HI:
+    return ((cpsr_c == 1) && (cpsr_z == 0));
+  case COND_LS:
+    return ((cpsr_c == 0) || (cpsr_z == 1));
+  case COND_GE:
+    return (cpsr_n == cpsr_v);
+  case COND_LT:
+    return (cpsr_n != cpsr_v);
+  case COND_GT:
+    return ((cpsr_z == 0) && (cpsr_n == cpsr_v));
+  case COND_LE:
+    return ((cpsr_z == 1) || (cpsr_n != cpsr_v));
+  case COND_AL:
+  case COND_UNCOND:
+  default:
+    return true;
+  }
+  return false;
 }
 
 // Bit positions for CPSR
-#define CPSR_T_POS  5
-#define CPSR_F_POS  6
-#define CPSR_I_POS  7
-#define CPSR_A_POS  8
-#define CPSR_E_POS  9
+#define CPSR_T_POS 5
+#define CPSR_F_POS 6
+#define CPSR_I_POS 7
+#define CPSR_A_POS 8
+#define CPSR_E_POS 9
 #define CPSR_J_POS 24
 #define CPSR_Q_POS 27
 #define CPSR_V_POS 28
@@ -113,30 +162,30 @@ ARMConditionPassed(const uint32_t condition, const uint32_t cpsr)
 #define CPSR_N_POS 31
 
 // CPSR mode definitions
-#define CPSR_MODE_USR  0x10u
-#define CPSR_MODE_FIQ  0x11u
-#define CPSR_MODE_IRQ  0x12u
-#define CPSR_MODE_SVC  0x13u
-#define CPSR_MODE_ABT  0x17u
-#define CPSR_MODE_UND  0x1bu
-#define CPSR_MODE_SYS  0x1fu
-    
+#define CPSR_MODE_USR 0x10u
+#define CPSR_MODE_FIQ 0x11u
+#define CPSR_MODE_IRQ 0x12u
+#define CPSR_MODE_SVC 0x13u
+#define CPSR_MODE_ABT 0x17u
+#define CPSR_MODE_UND 0x1bu
+#define CPSR_MODE_SYS 0x1fu
+
 // Masks for CPSR
 #define MASK_CPSR_MODE_MASK (0x0000001fu)
-#define MASK_CPSR_IT_MASK   (0x0600fc00u)
-#define MASK_CPSR_T         (1u << CPSR_T_POS)
-#define MASK_CPSR_F         (1u << CPSR_F_POS)
-#define MASK_CPSR_I         (1u << CPSR_I_POS)
-#define MASK_CPSR_A         (1u << CPSR_A_POS)
-#define MASK_CPSR_E         (1u << CPSR_E_POS)
-#define MASK_CPSR_GE_MASK   (0x000f0000u)
-#define MASK_CPSR_J         (1u << CPSR_J_POS)
-#define MASK_CPSR_Q         (1u << CPSR_Q_POS)
-#define MASK_CPSR_V         (1u << CPSR_V_POS)
-#define MASK_CPSR_C         (1u << CPSR_C_POS)
-#define MASK_CPSR_Z         (1u << CPSR_Z_POS)
-#define MASK_CPSR_N         (1u << CPSR_N_POS)
+#define MASK_CPSR_IT_MASK (0x0600fc00u)
+#define MASK_CPSR_T (1u << CPSR_T_POS)
+#define MASK_CPSR_F (1u << CPSR_F_POS)
+#define MASK_CPSR_I (1u << CPSR_I_POS)
+#define MASK_CPSR_A (1u << CPSR_A_POS)
+#define MASK_CPSR_E (1u << CPSR_E_POS)
+#define MASK_CPSR_GE_MASK (0x000f0000u)
+#define MASK_CPSR_J (1u << CPSR_J_POS)
+#define MASK_CPSR_Q (1u << CPSR_Q_POS)
+#define MASK_CPSR_V (1u << CPSR_V_POS)
+#define MASK_CPSR_C (1u << CPSR_C_POS)
+#define MASK_CPSR_Z (1u << CPSR_Z_POS)
+#define MASK_CPSR_N (1u << CPSR_N_POS)
 
-}   // namespace lldb_private
+} // namespace lldb_private
 
-#endif  // lldb_ARMDefines_h_
+#endif // lldb_ARMDefines_h_