Update clang, llvm, lld, lldb, compiler-rt and libc++ to 4.0.0 release:

MFC r309142 (by emaste):

Add WITH_LLD_AS_LD build knob

If set it installs LLD as /usr/bin/ld.  LLD (as of version 3.9) is not
capable of linking the world and kernel, but can self-host and link many
substantial applications. GNU ld continues to be used for the world and
kernel build, regardless of how this knob is set.

It is on by default for arm64, and off for all other CPU architectures.

Sponsored by:	The FreeBSD Foundation

MFC r310840:

Reapply 310775, now it also builds correctly if lldb is disabled:

Move llvm-objdump from CLANG_EXTRAS to installed by default

We currently install three tools from binutils 2.17.50: as, ld, and
objdump. Work is underway to migrate to a permissively-licensed
tool-chain, with one goal being the retirement of binutils 2.17.50.

LLVM's llvm-objdump is intended to be compatible with GNU objdump
although it is currently missing some options and may have formatting
differences. Enable it by default for testing and further investigation.
It may later be changed to install as /usr/bin/objdump, it becomes a
fully viable replacement.

Reviewed by:	emaste
Differential Revision:	https://reviews.freebsd.org/D8879

MFC r312855 (by emaste):

Rename LLD_AS_LD to LLD_IS_LD, for consistency with CLANG_IS_CC

Reported by:	Dan McGregor <dan.mcgregor usask.ca>

MFC r313559 | glebius | 2017-02-10 18:34:48 +0100 (Fri, 10 Feb 2017) | 5 lines

Don't check struct rtentry on FreeBSD, it is an internal kernel structure.
On other systems it may be API structure for SIOCADDRT/SIOCDELRT.

Reviewed by:	emaste, dim

MFC r314152 (by jkim):

Remove an assembler flag, which is redundant since r309124.  The upstream
took care of it by introducing a macro NO_EXEC_STACK_DIRECTIVE.

http://llvm.org/viewvc/llvm-project?rev=273500&view=rev

Reviewed by:	dim

MFC r314564:

Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to
4.0.0 (branches/release_40 296509).  The release will follow soon.

Please note that from 3.5.0 onwards, clang, llvm and lldb require C++11
support to build; see UPDATING for more information.

Also note that as of 4.0.0, lld should be able to link the base system
on amd64 and aarch64.  See the WITH_LLD_IS_LLD setting in src.conf(5).
Though please be aware that this is work in progress.

Release notes for llvm, clang and lld will be available here:
<http://releases.llvm.org/4.0.0/docs/ReleaseNotes.html>
<http://releases.llvm.org/4.0.0/tools/clang/docs/ReleaseNotes.html>
<http://releases.llvm.org/4.0.0/tools/lld/docs/ReleaseNotes.html>

Thanks to Ed Maste, Jan Beich, Antoine Brodin and Eric Fiselier for
their help.

Relnotes:	yes
Exp-run:	antoine
PR:		215969, 216008

MFC r314708:

For now, revert r287232 from upstream llvm trunk (by Daniil Fukalov):

  [SCEV] limit recursion depth of CompareSCEVComplexity

  Summary:
  CompareSCEVComplexity goes too deep (50+ on a quite a big unrolled
  loop) and runs almost infinite time.

  Added cache of "equal" SCEV pairs to earlier cutoff of further
  estimation. Recursion depth limit was also introduced as a parameter.

  Reviewers: sanjoy

  Subscribers: mzolotukhin, tstellarAMD, llvm-commits

  Differential Revision: https://reviews.llvm.org/D26389

This commit is the cause of excessive compile times on skein_block.c
(and possibly other files) during kernel builds on amd64.

We never saw the problematic behavior described in this upstream commit,
so for now it is better to revert it.  An upstream bug has been filed
here: https://bugs.llvm.org/show_bug.cgi?id=32142

Reported by:	mjg

MFC r314795:

Reapply r287232 from upstream llvm trunk (by Daniil Fukalov):

  [SCEV] limit recursion depth of CompareSCEVComplexity

  Summary:
  CompareSCEVComplexity goes too deep (50+ on a quite a big unrolled
  loop) and runs almost infinite time.

  Added cache of "equal" SCEV pairs to earlier cutoff of further
  estimation. Recursion depth limit was also introduced as a parameter.

  Reviewers: sanjoy

  Subscribers: mzolotukhin, tstellarAMD, llvm-commits

  Differential Revision: https://reviews.llvm.org/D26389

Pull in r296992 from upstream llvm trunk (by Sanjoy Das):

  [SCEV] Decrease the recursion threshold for CompareValueComplexity

  Fixes PR32142.

  r287232 accidentally increased the recursion threshold for
  CompareValueComplexity from 2 to 32.  This change reverses that
  change by introducing a separate flag for CompareValueComplexity's
  threshold.

The latter revision fixes the excessive compile times for skein_block.c.

MFC r314907 | mmel | 2017-03-08 12:40:27 +0100 (Wed, 08 Mar 2017) | 7 lines

Unbreak ARMv6 world.

The new compiler_rt library imported with clang 4.0.0 have several fatal
issues (non-functional __udivsi3 for example) with ARM specific instrict
functions. As temporary workaround, until upstream solve these problems,
disable all thumb[1][2] related feature.

MFC r315016:

Update clang, llvm, lld, lldb, compiler-rt and libc++ to 4.0.0 release.
We were already very close to the last release candidate, so this is a
pretty minor update.

Relnotes:	yes

MFC r316005:

Revert r314907, and pull in r298713 from upstream compiler-rt trunk (by
Weiming Zhao):

  builtins: Select correct code fragments when compiling for Thumb1/Thum2/ARM ISA.

  Summary:
  Value of __ARM_ARCH_ISA_THUMB isn't based on the actual compilation
  mode (-mthumb, -marm), it reflect's capability of given CPU.

  Due to this:
   - use  __tbumb__ and __thumb2__ insteand of __ARM_ARCH_ISA_THUMB
   - use '.thumb' directive consistently  in all affected files
   - decorate all thumb functions using
     DEFINE_COMPILERRT_THUMB_FUNCTION()

  ---------
  Note: This patch doesn't fix broken Thumb1 variant of __udivsi3 !

  Reviewers: weimingz, rengolin, compnerd

  Subscribers: aemerson, dim

  Differential Revision: https://reviews.llvm.org/D30938

Discussed with:	mmel

116 files changed, 19580 insertions, 18593 deletions

diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ARMDefines.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ARMDefines.h
index cfb33be..84c2cf1 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ARMDefines.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ARMDefines.h
@@ -10,101 +10,150 @@
 #ifndef lldb_ARMDefines_h_
 #define lldb_ARMDefines_h_
 
+#include <cassert>
+#include <cstdint>
+
 // Common definitions for the ARM/Thumb Instruction Set Architecture.
 
 namespace lldb_private {
 
 // ARM shifter types
-typedef enum
-{
-    SRType_LSL,
-    SRType_LSR,
-    SRType_ASR,
-    SRType_ROR,
-    SRType_RRX,
-    SRType_Invalid
+typedef enum {
+  SRType_LSL,
+  SRType_LSR,
+  SRType_ASR,
+  SRType_ROR,
+  SRType_RRX,
+  SRType_Invalid
 } ARM_ShifterType;
 
-// ARM conditions          // Meaning (integer)         Meaning (floating-point)      Condition flags
-#define COND_EQ     0x0    // Equal                     Equal                         Z == 1
-#define COND_NE     0x1    // Not equal                 Not equal, or unordered       Z == 0
-#define COND_CS     0x2    // Carry set                 >, ==, or unordered           C == 1
-#define COND_HS     0x2
-#define COND_CC     0x3    // Carry clear               Less than                     C == 0
-#define COND_LO     0x3
-#define COND_MI     0x4    // Minus, negative           Less than                     N == 1
-#define COND_PL     0x5    // Plus, positive or zero    >, ==, or unordered           N == 0
-#define COND_VS     0x6    // Overflow                  Unordered                     V == 1
-#define COND_VC     0x7    // No overflow               Not unordered                 V == 0
-#define COND_HI     0x8    // Unsigned higher           Greater than, or unordered    C == 1 and Z == 0
-#define COND_LS     0x9    // Unsigned lower or same    Less than or equal            C == 0 or Z == 1
-#define COND_GE     0xA    // Greater than or equal     Greater than or equal         N == V
-#define COND_LT     0xB    // Less than                 Less than, or unordered       N != V
-#define COND_GT     0xC    // Greater than              Greater than                  Z == 0 and N == V
-#define COND_LE     0xD    // Less than or equal        <, ==, or unordered           Z == 1 or N != V
-#define COND_AL     0xE    // Always (unconditional)    Always (unconditional)        Any
+// ARM conditions          // Meaning (integer)         Meaning (floating-point)
+// Condition flags
+#define COND_EQ                                                                \
+  0x0 // Equal                     Equal                         Z == 1
+#define COND_NE                                                                \
+  0x1 // Not equal                 Not equal, or unordered       Z == 0
+#define COND_CS                                                                \
+  0x2 // Carry set                 >, ==, or unordered           C == 1
+#define COND_HS 0x2
+#define COND_CC                                                                \
+  0x3 // Carry clear               Less than                     C == 0
+#define COND_LO 0x3
+#define COND_MI                                                                \
+  0x4 // Minus, negative           Less than                     N == 1
+#define COND_PL                                                                \
+  0x5 // Plus, positive or zero    >, ==, or unordered           N == 0
+#define COND_VS                                                                \
+  0x6 // Overflow                  Unordered                     V == 1
+#define COND_VC                                                                \
+  0x7 // No overflow               Not unordered                 V == 0
+#define COND_HI                                                                \
+  0x8 // Unsigned higher           Greater than, or unordered    C == 1 and Z ==
+      // 0
+#define COND_LS                                                                \
+  0x9 // Unsigned lower or same    Less than or equal            C == 0 or Z ==
+      // 1
+#define COND_GE                                                                \
+  0xA // Greater than or equal     Greater than or equal         N == V
+#define COND_LT                                                                \
+  0xB // Less than                 Less than, or unordered       N != V
+#define COND_GT                                                                \
+  0xC // Greater than              Greater than                  Z == 0 and N ==
+      // V
+#define COND_LE                                                                \
+  0xD // Less than or equal        <, ==, or unordered           Z == 1 or N !=
+      // V
+#define COND_AL                                                                \
+  0xE // Always (unconditional)    Always (unconditional)        Any
 #define COND_UNCOND 0xF
 
-static inline const char *
-ARMCondCodeToString(uint32_t CC)
-{
-    switch (CC) {
-    default: assert(0 && "Unknown condition code");
-    case COND_EQ:  return "eq";
-    case COND_NE:  return "ne";
-    case COND_HS:  return "hs";
-    case COND_LO:  return "lo";
-    case COND_MI:  return "mi";
-    case COND_PL:  return "pl";
-    case COND_VS:  return "vs";
-    case COND_VC:  return "vc";
-    case COND_HI:  return "hi";
-    case COND_LS:  return "ls";
-    case COND_GE:  return "ge";
-    case COND_LT:  return "lt";
-    case COND_GT:  return "gt";
-    case COND_LE:  return "le";
-    case COND_AL:  return "al";
-    }
+static inline const char *ARMCondCodeToString(uint32_t CC) {
+  switch (CC) {
+  default:
+    assert(0 && "Unknown condition code");
+  case COND_EQ:
+    return "eq";
+  case COND_NE:
+    return "ne";
+  case COND_HS:
+    return "hs";
+  case COND_LO:
+    return "lo";
+  case COND_MI:
+    return "mi";
+  case COND_PL:
+    return "pl";
+  case COND_VS:
+    return "vs";
+  case COND_VC:
+    return "vc";
+  case COND_HI:
+    return "hi";
+  case COND_LS:
+    return "ls";
+  case COND_GE:
+    return "ge";
+  case COND_LT:
+    return "lt";
+  case COND_GT:
+    return "gt";
+  case COND_LE:
+    return "le";
+  case COND_AL:
+    return "al";
+  }
 }
 
-static inline bool
-ARMConditionPassed(const uint32_t condition, const uint32_t cpsr)
-{
-    const uint32_t cpsr_n = (cpsr >> 31) & 1u; // Negative condition code flag
-    const uint32_t cpsr_z = (cpsr >> 30) & 1u; // Zero condition code flag
-    const uint32_t cpsr_c = (cpsr >> 29) & 1u; // Carry condition code flag
-    const uint32_t cpsr_v = (cpsr >> 28) & 1u; // Overflow condition code flag
+static inline bool ARMConditionPassed(const uint32_t condition,
+                                      const uint32_t cpsr) {
+  const uint32_t cpsr_n = (cpsr >> 31) & 1u; // Negative condition code flag
+  const uint32_t cpsr_z = (cpsr >> 30) & 1u; // Zero condition code flag
+  const uint32_t cpsr_c = (cpsr >> 29) & 1u; // Carry condition code flag
+  const uint32_t cpsr_v = (cpsr >> 28) & 1u; // Overflow condition code flag
 
-    switch (condition) {
-        case COND_EQ: return (cpsr_z == 1);
-        case COND_NE: return (cpsr_z == 0);
-        case COND_CS: return (cpsr_c == 1);
-        case COND_CC: return (cpsr_c == 0);
-        case COND_MI: return (cpsr_n == 1);
-        case COND_PL: return (cpsr_n == 0);
-        case COND_VS: return (cpsr_v == 1);
-        case COND_VC: return (cpsr_v == 0);
-        case COND_HI: return ((cpsr_c == 1) && (cpsr_z == 0));
-        case COND_LS: return ((cpsr_c == 0) || (cpsr_z == 1));
-        case COND_GE: return (cpsr_n == cpsr_v);
-        case COND_LT: return (cpsr_n != cpsr_v);
-        case COND_GT: return ((cpsr_z == 0) && (cpsr_n == cpsr_v));
-        case COND_LE: return ((cpsr_z == 1) || (cpsr_n != cpsr_v));
-        case COND_AL:
-        case COND_UNCOND:
-        default:
-            return true;
-    }
-    return false;
+  switch (condition) {
+  case COND_EQ:
+    return (cpsr_z == 1);
+  case COND_NE:
+    return (cpsr_z == 0);
+  case COND_CS:
+    return (cpsr_c == 1);
+  case COND_CC:
+    return (cpsr_c == 0);
+  case COND_MI:
+    return (cpsr_n == 1);
+  case COND_PL:
+    return (cpsr_n == 0);
+  case COND_VS:
+    return (cpsr_v == 1);
+  case COND_VC:
+    return (cpsr_v == 0);
+  case COND_HI:
+    return ((cpsr_c == 1) && (cpsr_z == 0));
+  case COND_LS:
+    return ((cpsr_c == 0) || (cpsr_z == 1));
+  case COND_GE:
+    return (cpsr_n == cpsr_v);
+  case COND_LT:
+    return (cpsr_n != cpsr_v);
+  case COND_GT:
+    return ((cpsr_z == 0) && (cpsr_n == cpsr_v));
+  case COND_LE:
+    return ((cpsr_z == 1) || (cpsr_n != cpsr_v));
+  case COND_AL:
+  case COND_UNCOND:
+  default:
+    return true;
+  }
+  return false;
 }
 
 // Bit positions for CPSR
-#define CPSR_T_POS  5
-#define CPSR_F_POS  6
-#define CPSR_I_POS  7
-#define CPSR_A_POS  8
-#define CPSR_E_POS  9
+#define CPSR_T_POS 5
+#define CPSR_F_POS 6
+#define CPSR_I_POS 7
+#define CPSR_A_POS 8
+#define CPSR_E_POS 9
 #define CPSR_J_POS 24
 #define CPSR_Q_POS 27
 #define CPSR_V_POS 28
@@ -113,30 +162,30 @@ ARMConditionPassed(const uint32_t condition, const uint32_t cpsr)
 #define CPSR_N_POS 31
 
 // CPSR mode definitions
-#define CPSR_MODE_USR  0x10u
-#define CPSR_MODE_FIQ  0x11u
-#define CPSR_MODE_IRQ  0x12u
-#define CPSR_MODE_SVC  0x13u
-#define CPSR_MODE_ABT  0x17u
-#define CPSR_MODE_UND  0x1bu
-#define CPSR_MODE_SYS  0x1fu
-    
+#define CPSR_MODE_USR 0x10u
+#define CPSR_MODE_FIQ 0x11u
+#define CPSR_MODE_IRQ 0x12u
+#define CPSR_MODE_SVC 0x13u
+#define CPSR_MODE_ABT 0x17u
+#define CPSR_MODE_UND 0x1bu
+#define CPSR_MODE_SYS 0x1fu
+
 // Masks for CPSR
 #define MASK_CPSR_MODE_MASK (0x0000001fu)
-#define MASK_CPSR_IT_MASK   (0x0600fc00u)
-#define MASK_CPSR_T         (1u << CPSR_T_POS)
-#define MASK_CPSR_F         (1u << CPSR_F_POS)
-#define MASK_CPSR_I         (1u << CPSR_I_POS)
-#define MASK_CPSR_A         (1u << CPSR_A_POS)
-#define MASK_CPSR_E         (1u << CPSR_E_POS)
-#define MASK_CPSR_GE_MASK   (0x000f0000u)
-#define MASK_CPSR_J         (1u << CPSR_J_POS)
-#define MASK_CPSR_Q         (1u << CPSR_Q_POS)
-#define MASK_CPSR_V         (1u << CPSR_V_POS)
-#define MASK_CPSR_C         (1u << CPSR_C_POS)
-#define MASK_CPSR_Z         (1u << CPSR_Z_POS)
-#define MASK_CPSR_N         (1u << CPSR_N_POS)
+#define MASK_CPSR_IT_MASK (0x0600fc00u)
+#define MASK_CPSR_T (1u << CPSR_T_POS)
+#define MASK_CPSR_F (1u << CPSR_F_POS)
+#define MASK_CPSR_I (1u << CPSR_I_POS)
+#define MASK_CPSR_A (1u << CPSR_A_POS)
+#define MASK_CPSR_E (1u << CPSR_E_POS)
+#define MASK_CPSR_GE_MASK (0x000f0000u)
+#define MASK_CPSR_J (1u << CPSR_J_POS)
+#define MASK_CPSR_Q (1u << CPSR_Q_POS)
+#define MASK_CPSR_V (1u << CPSR_V_POS)
+#define MASK_CPSR_C (1u << CPSR_C_POS)
+#define MASK_CPSR_Z (1u << CPSR_Z_POS)
+#define MASK_CPSR_N (1u << CPSR_N_POS)
 
-}   // namespace lldb_private
+} // namespace lldb_private
 
-#endif  // lldb_ARMDefines_h_
+#endif // lldb_ARMDefines_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ARMUtils.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ARMUtils.h
index b6ba3fe..2bbd519 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ARMUtils.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ARMUtils.h
@@ -18,352 +18,335 @@
 
 namespace lldb_private {
 
-static inline uint32_t Align(uint32_t val, uint32_t alignment)
-{
-    return alignment * (val / alignment);
+static inline uint32_t Align(uint32_t val, uint32_t alignment) {
+  return alignment * (val / alignment);
 }
 
-static inline uint32_t DecodeImmShift(const uint32_t type, const uint32_t imm5, ARM_ShifterType &shift_t)
-{
-    switch (type)
-    {
-    default:
-        //assert(0 && "Invalid shift type");
-    case 0:
-        shift_t = SRType_LSL;
-        return imm5;
-    case 1:
-        shift_t = SRType_LSR;
-        return (imm5 == 0 ? 32 : imm5);
-    case 2:
-        shift_t = SRType_ASR;
-        return (imm5 == 0 ? 32 : imm5);
-    case 3:
-        if (imm5 == 0)
-        {
-            shift_t = SRType_RRX;
-            return 1;
-        }
-        else
-        {
-            shift_t = SRType_ROR;
-            return imm5;
-        }
+static inline uint32_t DecodeImmShift(const uint32_t type, const uint32_t imm5,
+                                      ARM_ShifterType &shift_t) {
+  switch (type) {
+  default:
+  // assert(0 && "Invalid shift type");
+  case 0:
+    shift_t = SRType_LSL;
+    return imm5;
+  case 1:
+    shift_t = SRType_LSR;
+    return (imm5 == 0 ? 32 : imm5);
+  case 2:
+    shift_t = SRType_ASR;
+    return (imm5 == 0 ? 32 : imm5);
+  case 3:
+    if (imm5 == 0) {
+      shift_t = SRType_RRX;
+      return 1;
+    } else {
+      shift_t = SRType_ROR;
+      return imm5;
     }
-    shift_t = SRType_Invalid;
-    return UINT32_MAX;
-
+  }
+  shift_t = SRType_Invalid;
+  return UINT32_MAX;
 }
 
 // A8.6.35 CMP (register) -- Encoding T3
 // Convenience function.
-static inline uint32_t DecodeImmShiftThumb(const uint32_t opcode, ARM_ShifterType &shift_t)
-{
-    return DecodeImmShift(Bits32(opcode, 5, 4), Bits32(opcode, 14, 12)<<2 | Bits32(opcode, 7, 6), shift_t);
+static inline uint32_t DecodeImmShiftThumb(const uint32_t opcode,
+                                           ARM_ShifterType &shift_t) {
+  return DecodeImmShift(Bits32(opcode, 5, 4),
+                        Bits32(opcode, 14, 12) << 2 | Bits32(opcode, 7, 6),
+                        shift_t);
 }
 
 // A8.6.35 CMP (register) -- Encoding A1
 // Convenience function.
-static inline uint32_t DecodeImmShiftARM(const uint32_t opcode, ARM_ShifterType &shift_t)
-{
-    return DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
+static inline uint32_t DecodeImmShiftARM(const uint32_t opcode,
+                                         ARM_ShifterType &shift_t) {
+  return DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
 }
 
-static inline uint32_t DecodeImmShift(const ARM_ShifterType shift_t, const uint32_t imm5)
-{
-    ARM_ShifterType dont_care;
-    return DecodeImmShift(shift_t, imm5, dont_care);
+static inline uint32_t DecodeImmShift(const ARM_ShifterType shift_t,
+                                      const uint32_t imm5) {
+  ARM_ShifterType dont_care;
+  return DecodeImmShift(shift_t, imm5, dont_care);
 }
 
-static inline ARM_ShifterType DecodeRegShift(const uint32_t type)
-{
-    switch (type) {
-    default:
-        //assert(0 && "Invalid shift type");
-        return SRType_Invalid;
-    case 0:
-        return SRType_LSL;
-    case 1:
-        return SRType_LSR;
-    case 2:
-        return SRType_ASR;
-    case 3:
-        return SRType_ROR;
-    }
+static inline ARM_ShifterType DecodeRegShift(const uint32_t type) {
+  switch (type) {
+  default:
+    // assert(0 && "Invalid shift type");
+    return SRType_Invalid;
+  case 0:
+    return SRType_LSL;
+  case 1:
+    return SRType_LSR;
+  case 2:
+    return SRType_ASR;
+  case 3:
+    return SRType_ROR;
+  }
 }
 
-static inline uint32_t LSL_C(const uint32_t value, const uint32_t amount, uint32_t &carry_out, bool *success)
-{
-    if (amount == 0) {
-        *success = false;
-        return 0;
-    }
-    *success = true;
-    carry_out = amount <= 32 ? Bit32(value, 32 - amount) : 0;
-    return value << amount;
+static inline uint32_t LSL_C(const uint32_t value, const uint32_t amount,
+                             uint32_t &carry_out, bool *success) {
+  if (amount == 0) {
+    *success = false;
+    return 0;
+  }
+  *success = true;
+  carry_out = amount <= 32 ? Bit32(value, 32 - amount) : 0;
+  return value << amount;
 }
 
-static inline uint32_t LSL(const uint32_t value, const uint32_t amount, bool *success)
-{
-    *success = true;
-    if (amount == 0)
-        return value;
-    uint32_t dont_care;
-    uint32_t result = LSL_C(value, amount, dont_care, success);
-    if (*success)
-        return result;
-    else
-        return 0;
-}
-
-static inline uint32_t LSR_C(const uint32_t value, const uint32_t amount, uint32_t &carry_out, bool *success)
-{
-    if (amount == 0) {
-        *success = false;
-        return 0;
-    }
-    *success = true;
-    carry_out = amount <= 32 ? Bit32(value, amount - 1) : 0;
-    return value >> amount;
+static inline uint32_t LSL(const uint32_t value, const uint32_t amount,
+                           bool *success) {
+  *success = true;
+  if (amount == 0)
+    return value;
+  uint32_t dont_care;
+  uint32_t result = LSL_C(value, amount, dont_care, success);
+  if (*success)
+    return result;
+  else
+    return 0;
 }
 
-static inline uint32_t LSR(const uint32_t value, const uint32_t amount, bool *success)
-{
-    *success = true;
-    if (amount == 0)
-        return value;
-    uint32_t dont_care;
-    uint32_t result = LSR_C(value, amount, dont_care, success);
-    if (*success)
-        return result;
-    else
-        return 0;
+static inline uint32_t LSR_C(const uint32_t value, const uint32_t amount,
+                             uint32_t &carry_out, bool *success) {
+  if (amount == 0) {
+    *success = false;
+    return 0;
+  }
+  *success = true;
+  carry_out = amount <= 32 ? Bit32(value, amount - 1) : 0;
+  return value >> amount;
 }
 
-static inline uint32_t ASR_C(const uint32_t value, const uint32_t amount, uint32_t &carry_out, bool *success)
-{
-    if (amount == 0 || amount > 32) {
-        *success = false;
-        return 0;
-    }
-    *success = true;
-    bool negative = BitIsSet(value, 31);
-    if (amount <= 32)
-    {
-        carry_out = Bit32(value, amount - 1);
-        int64_t extended = llvm::SignExtend64<32>(value);
-        return UnsignedBits(extended, amount + 31, amount);
-    }
-    else
-    {
-        carry_out = (negative ? 1 : 0);
-        return (negative ? 0xffffffff : 0);
-    }
+static inline uint32_t LSR(const uint32_t value, const uint32_t amount,
+                           bool *success) {
+  *success = true;
+  if (amount == 0)
+    return value;
+  uint32_t dont_care;
+  uint32_t result = LSR_C(value, amount, dont_care, success);
+  if (*success)
+    return result;
+  else
+    return 0;
 }
 
-static inline uint32_t ASR(const uint32_t value, const uint32_t amount, bool *success)
-{
-    *success = true;
-    if (amount == 0)
-        return value;
-    uint32_t dont_care;
-    uint32_t result = ASR_C(value, amount, dont_care, success);
-    if (*success)
-        return result;
-    else
-        return 0;
+static inline uint32_t ASR_C(const uint32_t value, const uint32_t amount,
+                             uint32_t &carry_out, bool *success) {
+  if (amount == 0 || amount > 32) {
+    *success = false;
+    return 0;
+  }
+  *success = true;
+  bool negative = BitIsSet(value, 31);
+  if (amount <= 32) {
+    carry_out = Bit32(value, amount - 1);
+    int64_t extended = llvm::SignExtend64<32>(value);
+    return UnsignedBits(extended, amount + 31, amount);
+  } else {
+    carry_out = (negative ? 1 : 0);
+    return (negative ? 0xffffffff : 0);
+  }
 }
 
-static inline uint32_t ROR_C(const uint32_t value, const uint32_t amount, uint32_t &carry_out, bool *success)
-{
-    if (amount == 0) {
-        *success = false;
-        return 0;
-    }
-    *success = true;
-    uint32_t amt = amount % 32;
-    uint32_t result = Rotr32(value, amt);
-    carry_out = Bit32(value, 31);
+static inline uint32_t ASR(const uint32_t value, const uint32_t amount,
+                           bool *success) {
+  *success = true;
+  if (amount == 0)
+    return value;
+  uint32_t dont_care;
+  uint32_t result = ASR_C(value, amount, dont_care, success);
+  if (*success)
     return result;
+  else
+    return 0;
 }
 
-static inline uint32_t ROR(const uint32_t value, const uint32_t amount, bool *success)
-{
-    *success = true;
-    if (amount == 0)
-        return value;
-    uint32_t dont_care;
-    uint32_t result = ROR_C(value, amount, dont_care, success);
-    if (*success)
-        return result;
-    else
-        return 0;
+static inline uint32_t ROR_C(const uint32_t value, const uint32_t amount,
+                             uint32_t &carry_out, bool *success) {
+  if (amount == 0) {
+    *success = false;
+    return 0;
+  }
+  *success = true;
+  uint32_t amt = amount % 32;
+  uint32_t result = Rotr32(value, amt);
+  carry_out = Bit32(value, 31);
+  return result;
 }
 
-static inline uint32_t RRX_C(const uint32_t value, const uint32_t carry_in, uint32_t &carry_out, bool *success)
-{
-    *success = true;
-    carry_out = Bit32(value, 0);
-    return Bit32(carry_in, 0) << 31 | Bits32(value, 31, 1);
+static inline uint32_t ROR(const uint32_t value, const uint32_t amount,
+                           bool *success) {
+  *success = true;
+  if (amount == 0)
+    return value;
+  uint32_t dont_care;
+  uint32_t result = ROR_C(value, amount, dont_care, success);
+  if (*success)
+    return result;
+  else
+    return 0;
 }
 
-static inline uint32_t RRX(const uint32_t value, const uint32_t carry_in, bool *success)
-{
-    *success = true;
-    uint32_t dont_care;
-    uint32_t result = RRX_C(value, carry_in, dont_care, success);
-    if (*success)
-        return result;
-    else
-        return 0;
+static inline uint32_t RRX_C(const uint32_t value, const uint32_t carry_in,
+                             uint32_t &carry_out, bool *success) {
+  *success = true;
+  carry_out = Bit32(value, 0);
+  return Bit32(carry_in, 0) << 31 | Bits32(value, 31, 1);
 }
 
-static inline uint32_t Shift_C(const uint32_t value, ARM_ShifterType type, const uint32_t amount,
-                               const uint32_t carry_in, uint32_t &carry_out, bool *success)
-{
-    if (type == SRType_RRX && amount != 1) {
-        *success = false;
-        return 0;
-    }
-    *success = true;
+static inline uint32_t RRX(const uint32_t value, const uint32_t carry_in,
+                           bool *success) {
+  *success = true;
+  uint32_t dont_care;
+  uint32_t result = RRX_C(value, carry_in, dont_care, success);
+  if (*success)
+    return result;
+  else
+    return 0;
+}
 
-    if (amount == 0) {
-        carry_out = carry_in;
-        return value;
-    }
-    uint32_t result;
-    switch (type) {
-    case SRType_LSL:
-        result = LSL_C(value, amount, carry_out, success);
-        break;
-    case SRType_LSR:
-        result = LSR_C(value, amount, carry_out, success);
-        break;
-    case SRType_ASR:
-        result = ASR_C(value, amount, carry_out, success);
-        break;
-    case SRType_ROR:
-        result = ROR_C(value, amount, carry_out, success);
-        break;
-    case SRType_RRX:
-        result = RRX_C(value, carry_in, carry_out, success);
-        break;
-    default:
-        *success = false;
-        break;
-    }
-    if (*success)
-        return result;
-    else
-        return 0;
+static inline uint32_t Shift_C(const uint32_t value, ARM_ShifterType type,
+                               const uint32_t amount, const uint32_t carry_in,
+                               uint32_t &carry_out, bool *success) {
+  if (type == SRType_RRX && amount != 1) {
+    *success = false;
+    return 0;
+  }
+  *success = true;
+
+  if (amount == 0) {
+    carry_out = carry_in;
+    return value;
+  }
+  uint32_t result;
+  switch (type) {
+  case SRType_LSL:
+    result = LSL_C(value, amount, carry_out, success);
+    break;
+  case SRType_LSR:
+    result = LSR_C(value, amount, carry_out, success);
+    break;
+  case SRType_ASR:
+    result = ASR_C(value, amount, carry_out, success);
+    break;
+  case SRType_ROR:
+    result = ROR_C(value, amount, carry_out, success);
+    break;
+  case SRType_RRX:
+    result = RRX_C(value, carry_in, carry_out, success);
+    break;
+  default:
+    *success = false;
+    break;
+  }
+  if (*success)
+    return result;
+  else
+    return 0;
 }
 
-static inline uint32_t Shift(const uint32_t value, ARM_ShifterType type, const uint32_t amount,
-                             const uint32_t carry_in, bool *success)
-{
-    // Don't care about carry out in this case.
-    uint32_t dont_care;
-    uint32_t result = Shift_C(value, type, amount, carry_in, dont_care, success);
-    if (*success)
-        return result;
-    else
-        return 0;
+static inline uint32_t Shift(const uint32_t value, ARM_ShifterType type,
+                             const uint32_t amount, const uint32_t carry_in,
+                             bool *success) {
+  // Don't care about carry out in this case.
+  uint32_t dont_care;
+  uint32_t result = Shift_C(value, type, amount, carry_in, dont_care, success);
+  if (*success)
+    return result;
+  else
+    return 0;
 }
 
-static inline uint32_t bits(const uint32_t val, const uint32_t msbit, const uint32_t lsbit)
-{
-    return Bits32(val, msbit, lsbit);
+static inline uint32_t bits(const uint32_t val, const uint32_t msbit,
+                            const uint32_t lsbit) {
+  return Bits32(val, msbit, lsbit);
 }
 
-static inline uint32_t bit(const uint32_t val, const uint32_t msbit)
-{
-    return bits(val, msbit, msbit);
+static inline uint32_t bit(const uint32_t val, const uint32_t msbit) {
+  return bits(val, msbit, msbit);
 }
 
-static uint32_t ror(uint32_t val, uint32_t N, uint32_t shift)
-{
-    uint32_t m = shift % N;
-    return (val >> m) | (val << (N - m));
+static uint32_t ror(uint32_t val, uint32_t N, uint32_t shift) {
+  uint32_t m = shift % N;
+  return (val >> m) | (val << (N - m));
 }
 
 // (imm32, carry_out) = ARMExpandImm_C(imm12, carry_in)
-static inline uint32_t ARMExpandImm_C(uint32_t opcode, uint32_t carry_in, uint32_t &carry_out)
-{
-    uint32_t imm32;                         // the expanded result
-    uint32_t imm = bits(opcode, 7, 0);      // immediate value
-    uint32_t amt = 2 * bits(opcode, 11, 8); // rotate amount
-    if (amt == 0)
-    {
-        imm32 = imm;
-        carry_out = carry_in;
-    }
-    else
-    {
-        imm32 = ror(imm, 32, amt);
-        carry_out = Bit32(imm32, 31);
-    }
-    return imm32;
+static inline uint32_t ARMExpandImm_C(uint32_t opcode, uint32_t carry_in,
+                                      uint32_t &carry_out) {
+  uint32_t imm32;                         // the expanded result
+  uint32_t imm = bits(opcode, 7, 0);      // immediate value
+  uint32_t amt = 2 * bits(opcode, 11, 8); // rotate amount
+  if (amt == 0) {
+    imm32 = imm;
+    carry_out = carry_in;
+  } else {
+    imm32 = ror(imm, 32, amt);
+    carry_out = Bit32(imm32, 31);
+  }
+  return imm32;
 }
 
-static inline uint32_t ARMExpandImm(uint32_t opcode)
-{
-    // 'carry_in' argument to following function call does not affect the imm32 result.
-    uint32_t carry_in = 0;
-    uint32_t carry_out;
-    return ARMExpandImm_C(opcode, carry_in, carry_out);
+static inline uint32_t ARMExpandImm(uint32_t opcode) {
+  // 'carry_in' argument to following function call does not affect the imm32
+  // result.
+  uint32_t carry_in = 0;
+  uint32_t carry_out;
+  return ARMExpandImm_C(opcode, carry_in, carry_out);
 }
 
 // (imm32, carry_out) = ThumbExpandImm_C(imm12, carry_in)
-static inline uint32_t ThumbExpandImm_C(uint32_t opcode, uint32_t carry_in, uint32_t &carry_out)
-{
-    uint32_t imm32; // the expanded result
-    const uint32_t i = bit(opcode, 26);
-    const uint32_t imm3 = bits(opcode, 14, 12);
-    const uint32_t abcdefgh = bits(opcode, 7, 0);
-    const uint32_t imm12 = i << 11 | imm3 << 8 | abcdefgh;
-
-    if (bits(imm12, 11, 10) == 0)
-    {
-        switch (bits(imm12, 9, 8)) {
-        default: // Keep static analyzer happy with a default case
-        case 0:
-            imm32 = abcdefgh;
-            break;
-
-        case 1:
-            imm32 = abcdefgh << 16 | abcdefgh;
-            break;
-
-        case 2:
-            imm32 = abcdefgh << 24 | abcdefgh << 8;
-            break;
-
-        case 3:
-            imm32 = abcdefgh  << 24 | abcdefgh << 16 | abcdefgh << 8 | abcdefgh; 
-            break;
-        }
-        carry_out = carry_in;
-    }
-    else
-    {
-        const uint32_t unrotated_value = 0x80 | bits(imm12, 6, 0);
-        imm32 = ror(unrotated_value, 32, bits(imm12, 11, 7));
-        carry_out = Bit32(imm32, 31);
+static inline uint32_t ThumbExpandImm_C(uint32_t opcode, uint32_t carry_in,
+                                        uint32_t &carry_out) {
+  uint32_t imm32; // the expanded result
+  const uint32_t i = bit(opcode, 26);
+  const uint32_t imm3 = bits(opcode, 14, 12);
+  const uint32_t abcdefgh = bits(opcode, 7, 0);
+  const uint32_t imm12 = i << 11 | imm3 << 8 | abcdefgh;
+
+  if (bits(imm12, 11, 10) == 0) {
+    switch (bits(imm12, 9, 8)) {
+    default: // Keep static analyzer happy with a default case
+    case 0:
+      imm32 = abcdefgh;
+      break;
+
+    case 1:
+      imm32 = abcdefgh << 16 | abcdefgh;
+      break;
+
+    case 2:
+      imm32 = abcdefgh << 24 | abcdefgh << 8;
+      break;
+
+    case 3:
+      imm32 = abcdefgh << 24 | abcdefgh << 16 | abcdefgh << 8 | abcdefgh;
+      break;
     }
-    return imm32;
+    carry_out = carry_in;
+  } else {
+    const uint32_t unrotated_value = 0x80 | bits(imm12, 6, 0);
+    imm32 = ror(unrotated_value, 32, bits(imm12, 11, 7));
+    carry_out = Bit32(imm32, 31);
+  }
+  return imm32;
 }
 
-static inline uint32_t ThumbExpandImm(uint32_t opcode)
-{
-    // 'carry_in' argument to following function call does not affect the imm32 result.
-    uint32_t carry_in = 0;
-    uint32_t carry_out;
-    return ThumbExpandImm_C(opcode, carry_in, carry_out);
+static inline uint32_t ThumbExpandImm(uint32_t opcode) {
+  // 'carry_in' argument to following function call does not affect the imm32
+  // result.
+  uint32_t carry_in = 0;
+  uint32_t carry_out;
+  return ThumbExpandImm_C(opcode, carry_in, carry_out);
 }
 
 // imm32 = ZeroExtend(i:imm3:imm8, 32)
-static inline uint32_t ThumbImm12(uint32_t opcode)
-{
+static inline uint32_t ThumbImm12(uint32_t opcode) {
   const uint32_t i = bit(opcode, 26);
   const uint32_t imm3 = bits(opcode, 14, 12);
   const uint32_t imm8 = bits(opcode, 7, 0);
@@ -372,15 +355,13 @@ static inline uint32_t ThumbImm12(uint32_t opcode)
 }
 
 // imm32 = ZeroExtend(imm7:'00', 32)
-static inline uint32_t ThumbImm7Scaled(uint32_t opcode)
-{
+static inline uint32_t ThumbImm7Scaled(uint32_t opcode) {
   const uint32_t imm7 = bits(opcode, 6, 0);
   return imm7 * 4;
 }
 
 // imm32 = ZeroExtend(imm8:'00', 32)
-static inline uint32_t ThumbImm8Scaled(uint32_t opcode)
-{
+static inline uint32_t ThumbImm8Scaled(uint32_t opcode) {
   const uint32_t imm8 = bits(opcode, 7, 0);
   return imm8 * 4;
 }
@@ -389,6 +370,6 @@ static inline uint32_t ThumbImm8Scaled(uint32_t opcode)
 // not permitted for many Thumb register specifiers.
 static inline bool BadReg(uint32_t n) { return n == 13 || n == 15; }
 
-}   // namespace lldb_private
+} // namespace lldb_private
 
-#endif  // lldb_ARMUtils_h_
+#endif // lldb_ARMUtils_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
index 6efdb46..75f7251 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
@@ -24,788 +24,725 @@
 using namespace lldb;
 using namespace lldb_private;
 
-DynamicRegisterInfo::DynamicRegisterInfo () :
-    m_regs (),
-    m_sets (),
-    m_set_reg_nums (),
-    m_set_names (),
-    m_value_regs_map (),
-    m_invalidate_regs_map (),
-    m_dynamic_reg_size_map (),
-    m_reg_data_byte_size (0),
-    m_finalized (false)
-{
+DynamicRegisterInfo::DynamicRegisterInfo()
+    : m_regs(), m_sets(), m_set_reg_nums(), m_set_names(), m_value_regs_map(),
+      m_invalidate_regs_map(), m_dynamic_reg_size_map(),
+      m_reg_data_byte_size(0), m_finalized(false) {}
+
+DynamicRegisterInfo::DynamicRegisterInfo(
+    const lldb_private::StructuredData::Dictionary &dict,
+    const lldb_private::ArchSpec &arch)
+    : m_regs(), m_sets(), m_set_reg_nums(), m_set_names(), m_value_regs_map(),
+      m_invalidate_regs_map(), m_dynamic_reg_size_map(),
+      m_reg_data_byte_size(0), m_finalized(false) {
+  SetRegisterInfo(dict, arch);
 }
 
-DynamicRegisterInfo::DynamicRegisterInfo(const lldb_private::StructuredData::Dictionary &dict,
-                                         const lldb_private::ArchSpec &arch) :
-    m_regs (),
-    m_sets (),
-    m_set_reg_nums (),
-    m_set_names (),
-    m_value_regs_map (),
-    m_invalidate_regs_map (),
-    m_dynamic_reg_size_map (),
-    m_reg_data_byte_size (0),
-    m_finalized (false)
-{
-    SetRegisterInfo (dict, arch);
-}
-
-DynamicRegisterInfo::~DynamicRegisterInfo ()
-{
-}
+DynamicRegisterInfo::~DynamicRegisterInfo() {}
 
 size_t
-DynamicRegisterInfo::SetRegisterInfo(const StructuredData::Dictionary &dict, const ArchSpec &arch)
-{
-    assert(!m_finalized);
-    StructuredData::Array *sets = nullptr;
-    if (dict.GetValueForKeyAsArray("sets", sets))
-    {
-        const uint32_t num_sets = sets->GetSize();
-        for (uint32_t i=0; i<num_sets; ++i)
-        {
-            std::string set_name_str;
-            ConstString set_name;
-            if (sets->GetItemAtIndexAsString(i, set_name_str))
-                set_name.SetCString(set_name_str.c_str());
-            if (set_name)
-            {
-                RegisterSet new_set = { set_name.AsCString(), NULL, 0, NULL };
-                m_sets.push_back (new_set);
-            }
-            else
-            {
-                Clear();
-                printf("error: register sets must have valid names\n");
-                return 0;
-            }
-        }
-        m_set_reg_nums.resize(m_sets.size());
-    }
-    StructuredData::Array *regs = nullptr;
-    if (!dict.GetValueForKeyAsArray("registers", regs))
+DynamicRegisterInfo::SetRegisterInfo(const StructuredData::Dictionary &dict,
+                                     const ArchSpec &arch) {
+  assert(!m_finalized);
+  StructuredData::Array *sets = nullptr;
+  if (dict.GetValueForKeyAsArray("sets", sets)) {
+    const uint32_t num_sets = sets->GetSize();
+    for (uint32_t i = 0; i < num_sets; ++i) {
+      std::string set_name_str;
+      ConstString set_name;
+      if (sets->GetItemAtIndexAsString(i, set_name_str))
+        set_name.SetCString(set_name_str.c_str());
+      if (set_name) {
+        RegisterSet new_set = {set_name.AsCString(), NULL, 0, NULL};
+        m_sets.push_back(new_set);
+      } else {
+        Clear();
+        printf("error: register sets must have valid names\n");
         return 0;
+      }
+    }
+    m_set_reg_nums.resize(m_sets.size());
+  }
+  StructuredData::Array *regs = nullptr;
+  if (!dict.GetValueForKeyAsArray("registers", regs))
+    return 0;
+
+  const uint32_t num_regs = regs->GetSize();
+  //        typedef std::map<std::string, std::vector<std::string> >
+  //        InvalidateNameMap;
+  //        InvalidateNameMap invalidate_map;
+  for (uint32_t i = 0; i < num_regs; ++i) {
+    StructuredData::Dictionary *reg_info_dict = nullptr;
+    if (!regs->GetItemAtIndexAsDictionary(i, reg_info_dict)) {
+      Clear();
+      printf("error: items in the 'registers' array must be dictionaries\n");
+      regs->DumpToStdout();
+      return 0;
+    }
 
-    const uint32_t num_regs = regs->GetSize();
-//        typedef std::map<std::string, std::vector<std::string> > InvalidateNameMap;
-//        InvalidateNameMap invalidate_map;
-    for (uint32_t i = 0; i < num_regs; ++i)
-    {
-        StructuredData::Dictionary *reg_info_dict = nullptr;
-        if (!regs->GetItemAtIndexAsDictionary(i, reg_info_dict))
-        {
-            Clear();
-            printf("error: items in the 'registers' array must be dictionaries\n");
-            regs->DumpToStdout();
-            return 0;
-        }
-
-        // { 'name':'rcx'       , 'bitsize' :  64, 'offset' :  16, 'encoding':'uint'  , 'format':'hex'         , 'set': 0, 'ehframe' : 2,
-        // 'dwarf' : 2, 'generic':'arg4', 'alt-name':'arg4', },
-        RegisterInfo reg_info;
-        std::vector<uint32_t> value_regs;
-        std::vector<uint32_t> invalidate_regs;
-        memset(&reg_info, 0, sizeof(reg_info));
-
-        ConstString name_val;
-        ConstString alt_name_val;
-        if (!reg_info_dict->GetValueForKeyAsString("name", name_val, nullptr))
-        {
-            Clear();
-            printf("error: registers must have valid names and offsets\n");
-            reg_info_dict->DumpToStdout();
-            return 0;
-        }
-        reg_info.name = name_val.GetCString();
-        reg_info_dict->GetValueForKeyAsString("alt-name", alt_name_val, nullptr);
-        reg_info.alt_name = alt_name_val.GetCString();
-
-        reg_info_dict->GetValueForKeyAsInteger("offset", reg_info.byte_offset, UINT32_MAX);
-
-        const ByteOrder byte_order = arch.GetByteOrder();
-        
-        if (reg_info.byte_offset == UINT32_MAX)
-        {
-            // No offset for this register, see if the register has a value expression
-            // which indicates this register is part of another register. Value expressions
-            // are things like "rax[31:0]" which state that the current register's value
-            // is in a concrete register "rax" in bits 31:0. If there is a value expression
-            // we can calculate the offset
-            bool success = false;
-            std::string slice_str;
-            if (reg_info_dict->GetValueForKeyAsString("slice", slice_str, nullptr))
-            {
-                // Slices use the following format:
-                //  REGNAME[MSBIT:LSBIT]
-                // REGNAME - name of the register to grab a slice of
-                // MSBIT - the most significant bit at which the current register value starts at
-                // LSBIT - the least significant bit at which the current register value ends at
-                static RegularExpression g_bitfield_regex("([A-Za-z_][A-Za-z0-9_]*)\\[([0-9]+):([0-9]+)\\]");
-                RegularExpression::Match regex_match(3);
-                if (g_bitfield_regex.Execute(slice_str.c_str(), &regex_match))
-                {
-                    llvm::StringRef reg_name_str;
-                    std::string msbit_str;
-                    std::string lsbit_str;
-                    if (regex_match.GetMatchAtIndex(slice_str.c_str(), 1, reg_name_str) &&
-                        regex_match.GetMatchAtIndex(slice_str.c_str(), 2, msbit_str) &&
-                        regex_match.GetMatchAtIndex(slice_str.c_str(), 3, lsbit_str))
-                    {
-                        const uint32_t msbit = StringConvert::ToUInt32(msbit_str.c_str(), UINT32_MAX);
-                        const uint32_t lsbit = StringConvert::ToUInt32(lsbit_str.c_str(), UINT32_MAX);
-                        if (msbit != UINT32_MAX && lsbit != UINT32_MAX)
-                        {
-                            if (msbit > lsbit)
-                            {
-                                const uint32_t msbyte = msbit / 8;
-                                const uint32_t lsbyte = lsbit / 8;
-
-                                ConstString containing_reg_name(reg_name_str);
-
-                                RegisterInfo *containing_reg_info = GetRegisterInfo(containing_reg_name);
-                                if (containing_reg_info)
-                                {
-                                    const uint32_t max_bit = containing_reg_info->byte_size * 8;
-                                    if (msbit < max_bit && lsbit < max_bit)
-                                    {
-                                        m_invalidate_regs_map[containing_reg_info->kinds[eRegisterKindLLDB]].push_back(i);
-                                        m_value_regs_map[i].push_back(containing_reg_info->kinds[eRegisterKindLLDB]);
-                                        m_invalidate_regs_map[i].push_back(containing_reg_info->kinds[eRegisterKindLLDB]);
-
-                                        if (byte_order == eByteOrderLittle)
-                                        {
-                                            success = true;
-                                            reg_info.byte_offset = containing_reg_info->byte_offset + lsbyte;
-                                        }
-                                        else if (byte_order == eByteOrderBig)
-                                        {
-                                            success = true;
-                                            reg_info.byte_offset = containing_reg_info->byte_offset + msbyte;
-                                        }
-                                        else
-                                        {
-                                            assert(!"Invalid byte order");
-                                        }
-                                    }
-                                    else
-                                    {
-                                        if (msbit > max_bit)
-                                            printf("error: msbit (%u) must be less than the bitsize of the register (%u)\n", msbit,
-                                                   max_bit);
-                                        else
-                                            printf("error: lsbit (%u) must be less than the bitsize of the register (%u)\n", lsbit,
-                                                   max_bit);
-                                    }
-                                }
-                                else
-                                {
-                                    printf("error: invalid concrete register \"%s\"\n", containing_reg_name.GetCString());
-                                }
-                            }
-                            else
-                            {
-                                printf("error: msbit (%u) must be greater than lsbit (%u)\n", msbit, lsbit);
-                            }
-                        }
-                        else
-                        {
-                            printf("error: msbit (%u) and lsbit (%u) must be valid\n", msbit, lsbit);
-                        }
+    // { 'name':'rcx'       , 'bitsize' :  64, 'offset' :  16, 'encoding':'uint'
+    // , 'format':'hex'         , 'set': 0, 'ehframe' : 2,
+    // 'dwarf' : 2, 'generic':'arg4', 'alt-name':'arg4', },
+    RegisterInfo reg_info;
+    std::vector<uint32_t> value_regs;
+    std::vector<uint32_t> invalidate_regs;
+    memset(&reg_info, 0, sizeof(reg_info));
+
+    ConstString name_val;
+    ConstString alt_name_val;
+    if (!reg_info_dict->GetValueForKeyAsString("name", name_val, nullptr)) {
+      Clear();
+      printf("error: registers must have valid names and offsets\n");
+      reg_info_dict->DumpToStdout();
+      return 0;
+    }
+    reg_info.name = name_val.GetCString();
+    reg_info_dict->GetValueForKeyAsString("alt-name", alt_name_val, nullptr);
+    reg_info.alt_name = alt_name_val.GetCString();
+
+    reg_info_dict->GetValueForKeyAsInteger("offset", reg_info.byte_offset,
+                                           UINT32_MAX);
+
+    const ByteOrder byte_order = arch.GetByteOrder();
+
+    if (reg_info.byte_offset == UINT32_MAX) {
+      // No offset for this register, see if the register has a value expression
+      // which indicates this register is part of another register. Value
+      // expressions
+      // are things like "rax[31:0]" which state that the current register's
+      // value
+      // is in a concrete register "rax" in bits 31:0. If there is a value
+      // expression
+      // we can calculate the offset
+      bool success = false;
+      std::string slice_str;
+      if (reg_info_dict->GetValueForKeyAsString("slice", slice_str, nullptr)) {
+        // Slices use the following format:
+        //  REGNAME[MSBIT:LSBIT]
+        // REGNAME - name of the register to grab a slice of
+        // MSBIT - the most significant bit at which the current register value
+        // starts at
+        // LSBIT - the least significant bit at which the current register value
+        // ends at
+        static RegularExpression g_bitfield_regex(
+            llvm::StringRef("([A-Za-z_][A-Za-z0-9_]*)\\[([0-9]+):([0-9]+)\\]"));
+        RegularExpression::Match regex_match(3);
+        if (g_bitfield_regex.Execute(slice_str, &regex_match)) {
+          llvm::StringRef reg_name_str;
+          std::string msbit_str;
+          std::string lsbit_str;
+          if (regex_match.GetMatchAtIndex(slice_str.c_str(), 1, reg_name_str) &&
+              regex_match.GetMatchAtIndex(slice_str.c_str(), 2, msbit_str) &&
+              regex_match.GetMatchAtIndex(slice_str.c_str(), 3, lsbit_str)) {
+            const uint32_t msbit =
+                StringConvert::ToUInt32(msbit_str.c_str(), UINT32_MAX);
+            const uint32_t lsbit =
+                StringConvert::ToUInt32(lsbit_str.c_str(), UINT32_MAX);
+            if (msbit != UINT32_MAX && lsbit != UINT32_MAX) {
+              if (msbit > lsbit) {
+                const uint32_t msbyte = msbit / 8;
+                const uint32_t lsbyte = lsbit / 8;
+
+                ConstString containing_reg_name(reg_name_str);
+
+                RegisterInfo *containing_reg_info =
+                    GetRegisterInfo(containing_reg_name);
+                if (containing_reg_info) {
+                  const uint32_t max_bit = containing_reg_info->byte_size * 8;
+                  if (msbit < max_bit && lsbit < max_bit) {
+                    m_invalidate_regs_map[containing_reg_info
+                                              ->kinds[eRegisterKindLLDB]]
+                        .push_back(i);
+                    m_value_regs_map[i].push_back(
+                        containing_reg_info->kinds[eRegisterKindLLDB]);
+                    m_invalidate_regs_map[i].push_back(
+                        containing_reg_info->kinds[eRegisterKindLLDB]);
+
+                    if (byte_order == eByteOrderLittle) {
+                      success = true;
+                      reg_info.byte_offset =
+                          containing_reg_info->byte_offset + lsbyte;
+                    } else if (byte_order == eByteOrderBig) {
+                      success = true;
+                      reg_info.byte_offset =
+                          containing_reg_info->byte_offset + msbyte;
+                    } else {
+                      llvm_unreachable("Invalid byte order");
                     }
+                  } else {
+                    if (msbit > max_bit)
+                      printf("error: msbit (%u) must be less than the bitsize "
+                             "of the register (%u)\n",
+                             msbit, max_bit);
                     else
-                    {
-                        // TODO: print error invalid slice string that doesn't follow the format
-                        printf("error: failed to extract regex matches for parsing the register bitfield regex\n");
-                    }
-                }
-                else
-                {
-                    // TODO: print error invalid slice string that doesn't follow the format
-                    printf("error: failed to match against register bitfield regex\n");
+                      printf("error: lsbit (%u) must be less than the bitsize "
+                             "of the register (%u)\n",
+                             lsbit, max_bit);
+                  }
+                } else {
+                  printf("error: invalid concrete register \"%s\"\n",
+                         containing_reg_name.GetCString());
                 }
+              } else {
+                printf("error: msbit (%u) must be greater than lsbit (%u)\n",
+                       msbit, lsbit);
+              }
+            } else {
+              printf("error: msbit (%u) and lsbit (%u) must be valid\n", msbit,
+                     lsbit);
             }
-            else
-            {
-                StructuredData::Array *composite_reg_list = nullptr;
-                if (reg_info_dict->GetValueForKeyAsArray("composite", composite_reg_list))
-                {
-                    const size_t num_composite_regs = composite_reg_list->GetSize();
-                    if (num_composite_regs > 0)
-                    {
-                        uint32_t composite_offset = UINT32_MAX;
-                        for (uint32_t composite_idx = 0; composite_idx < num_composite_regs; ++composite_idx)
-                        {
-                            ConstString composite_reg_name;
-                            if (composite_reg_list->GetItemAtIndexAsString(composite_idx, composite_reg_name, nullptr))
-                            {
-                                RegisterInfo *composite_reg_info = GetRegisterInfo(composite_reg_name);
-                                if (composite_reg_info)
-                                {
-                                    composite_offset = std::min(composite_offset, composite_reg_info->byte_offset);
-                                    m_value_regs_map[i].push_back(composite_reg_info->kinds[eRegisterKindLLDB]);
-                                    m_invalidate_regs_map[composite_reg_info->kinds[eRegisterKindLLDB]].push_back(i);
-                                    m_invalidate_regs_map[i].push_back(composite_reg_info->kinds[eRegisterKindLLDB]);
-                                }
-                                else
-                                {
-                                    // TODO: print error invalid slice string that doesn't follow the format
-                                    printf("error: failed to find composite register by name: \"%s\"\n", composite_reg_name.GetCString());
-                                }
-                            }
-                            else
-                            {
-                                printf("error: 'composite' list value wasn't a python string\n");
-                            }
-                        }
-                        if (composite_offset != UINT32_MAX)
-                        {
-                            reg_info.byte_offset = composite_offset;
-                            success = m_value_regs_map.find(i) != m_value_regs_map.end();
-                        }
-                        else
-                        {
-                            printf("error: 'composite' registers must specify at least one real register\n");
-                        }
-                    }
-                    else
-                    {
-                        printf("error: 'composite' list was empty\n");
-                    }
+          } else {
+            // TODO: print error invalid slice string that doesn't follow the
+            // format
+            printf("error: failed to extract regex matches for parsing the "
+                   "register bitfield regex\n");
+          }
+        } else {
+          // TODO: print error invalid slice string that doesn't follow the
+          // format
+          printf("error: failed to match against register bitfield regex\n");
+        }
+      } else {
+        StructuredData::Array *composite_reg_list = nullptr;
+        if (reg_info_dict->GetValueForKeyAsArray("composite",
+                                                 composite_reg_list)) {
+          const size_t num_composite_regs = composite_reg_list->GetSize();
+          if (num_composite_regs > 0) {
+            uint32_t composite_offset = UINT32_MAX;
+            for (uint32_t composite_idx = 0; composite_idx < num_composite_regs;
+                 ++composite_idx) {
+              ConstString composite_reg_name;
+              if (composite_reg_list->GetItemAtIndexAsString(
+                      composite_idx, composite_reg_name, nullptr)) {
+                RegisterInfo *composite_reg_info =
+                    GetRegisterInfo(composite_reg_name);
+                if (composite_reg_info) {
+                  composite_offset = std::min(composite_offset,
+                                              composite_reg_info->byte_offset);
+                  m_value_regs_map[i].push_back(
+                      composite_reg_info->kinds[eRegisterKindLLDB]);
+                  m_invalidate_regs_map[composite_reg_info
+                                            ->kinds[eRegisterKindLLDB]]
+                      .push_back(i);
+                  m_invalidate_regs_map[i].push_back(
+                      composite_reg_info->kinds[eRegisterKindLLDB]);
+                } else {
+                  // TODO: print error invalid slice string that doesn't follow
+                  // the format
+                  printf("error: failed to find composite register by name: "
+                         "\"%s\"\n",
+                         composite_reg_name.GetCString());
                 }
+              } else {
+                printf(
+                    "error: 'composite' list value wasn't a python string\n");
+              }
             }
-
-            if (!success)
-            {
-                Clear();
-                reg_info_dict->DumpToStdout();
-                return 0;
+            if (composite_offset != UINT32_MAX) {
+              reg_info.byte_offset = composite_offset;
+              success = m_value_regs_map.find(i) != m_value_regs_map.end();
+            } else {
+              printf("error: 'composite' registers must specify at least one "
+                     "real register\n");
             }
+          } else {
+            printf("error: 'composite' list was empty\n");
+          }
         }
+      }
 
-        int64_t bitsize = 0;
-        if (!reg_info_dict->GetValueForKeyAsInteger("bitsize", bitsize))
-        {
-            Clear();
-            printf("error: invalid or missing 'bitsize' key/value pair in register dictionary\n");
-            reg_info_dict->DumpToStdout();
-            return 0;
-        }
-
-        reg_info.byte_size = bitsize / 8;
-
-        std::string dwarf_opcode_string;
-        if (reg_info_dict->GetValueForKeyAsString ("dynamic_size_dwarf_expr_bytes", dwarf_opcode_string))
-        {
-            reg_info.dynamic_size_dwarf_len = dwarf_opcode_string.length () / 2;
-            assert (reg_info.dynamic_size_dwarf_len > 0);
-
-            std::vector<uint8_t> dwarf_opcode_bytes(reg_info.dynamic_size_dwarf_len);
-            uint32_t j;
-            StringExtractor opcode_extractor;
-            // Swap "dwarf_opcode_string" over into "opcode_extractor"
-            opcode_extractor.GetStringRef ().swap (dwarf_opcode_string);
-            uint32_t ret_val = opcode_extractor.GetHexBytesAvail (dwarf_opcode_bytes.data (),
-                                                                  reg_info.dynamic_size_dwarf_len);
-            assert (ret_val == reg_info.dynamic_size_dwarf_len);
-
-            for (j = 0; j < reg_info.dynamic_size_dwarf_len; ++j)
-                m_dynamic_reg_size_map[i].push_back(dwarf_opcode_bytes[j]);
+      if (!success) {
+        Clear();
+        reg_info_dict->DumpToStdout();
+        return 0;
+      }
+    }
 
-            reg_info.dynamic_size_dwarf_expr_bytes = m_dynamic_reg_size_map[i].data ();
-        }
+    int64_t bitsize = 0;
+    if (!reg_info_dict->GetValueForKeyAsInteger("bitsize", bitsize)) {
+      Clear();
+      printf("error: invalid or missing 'bitsize' key/value pair in register "
+             "dictionary\n");
+      reg_info_dict->DumpToStdout();
+      return 0;
+    }
 
-        std::string format_str;
-        if (reg_info_dict->GetValueForKeyAsString("format", format_str, nullptr))
-        {
-            if (Args::StringToFormat(format_str.c_str(), reg_info.format, NULL).Fail())
-            {
-                Clear();
-                printf("error: invalid 'format' value in register dictionary\n");
-                reg_info_dict->DumpToStdout();
-                return 0;
-            }
-        }
-        else
-        {
-            reg_info_dict->GetValueForKeyAsInteger("format", reg_info.format, eFormatHex);
-        }
+    reg_info.byte_size = bitsize / 8;
 
-        std::string encoding_str;
-        if (reg_info_dict->GetValueForKeyAsString("encoding", encoding_str))
-            reg_info.encoding = Args::StringToEncoding(encoding_str.c_str(), eEncodingUint);
-        else
-            reg_info_dict->GetValueForKeyAsInteger("encoding", reg_info.encoding, eEncodingUint);
-
-        size_t set = 0;
-        if (!reg_info_dict->GetValueForKeyAsInteger<size_t>("set", set, -1) || set >= m_sets.size())
-        {
-            Clear();
-            printf("error: invalid 'set' value in register dictionary, valid values are 0 - %i\n", (int)set);
-            reg_info_dict->DumpToStdout();
-            return 0;
-        }
+    std::string dwarf_opcode_string;
+    if (reg_info_dict->GetValueForKeyAsString("dynamic_size_dwarf_expr_bytes",
+                                              dwarf_opcode_string)) {
+      reg_info.dynamic_size_dwarf_len = dwarf_opcode_string.length() / 2;
+      assert(reg_info.dynamic_size_dwarf_len > 0);
 
-        // Fill in the register numbers
-        reg_info.kinds[lldb::eRegisterKindLLDB] = i;
-        reg_info.kinds[lldb::eRegisterKindProcessPlugin] = i;
-        uint32_t eh_frame_regno = LLDB_INVALID_REGNUM;
-        reg_info_dict->GetValueForKeyAsInteger("gcc", eh_frame_regno, LLDB_INVALID_REGNUM);
-        if (eh_frame_regno == LLDB_INVALID_REGNUM)
-            reg_info_dict->GetValueForKeyAsInteger("ehframe", eh_frame_regno, LLDB_INVALID_REGNUM);
-        reg_info.kinds[lldb::eRegisterKindEHFrame] = eh_frame_regno;
-        reg_info_dict->GetValueForKeyAsInteger("dwarf", reg_info.kinds[lldb::eRegisterKindDWARF], LLDB_INVALID_REGNUM);
-        std::string generic_str;
-        if (reg_info_dict->GetValueForKeyAsString("generic", generic_str))
-            reg_info.kinds[lldb::eRegisterKindGeneric] = Args::StringToGenericRegister(generic_str.c_str());
-        else
-            reg_info_dict->GetValueForKeyAsInteger("generic", reg_info.kinds[lldb::eRegisterKindGeneric], LLDB_INVALID_REGNUM);
-
-        // Check if this register invalidates any other register values when it is modified
-        StructuredData::Array *invalidate_reg_list = nullptr;
-        if (reg_info_dict->GetValueForKeyAsArray("invalidate-regs", invalidate_reg_list))
-        {
-            const size_t num_regs = invalidate_reg_list->GetSize();
-            if (num_regs > 0)
-            {
-                for (uint32_t idx = 0; idx < num_regs; ++idx)
-                {
-                    ConstString invalidate_reg_name;
-                    uint64_t invalidate_reg_num;
-                    if (invalidate_reg_list->GetItemAtIndexAsString(idx, invalidate_reg_name))
-                    {
-                        RegisterInfo *invalidate_reg_info = GetRegisterInfo(invalidate_reg_name);
-                        if (invalidate_reg_info)
-                        {
-                            m_invalidate_regs_map[i].push_back(invalidate_reg_info->kinds[eRegisterKindLLDB]);
-                        }
-                        else
-                        {
-                            // TODO: print error invalid slice string that doesn't follow the format
-                            printf("error: failed to find a 'invalidate-regs' register for \"%s\" while parsing register \"%s\"\n",
-                                   invalidate_reg_name.GetCString(), reg_info.name);
-                        }
-                    }
-                    else if (invalidate_reg_list->GetItemAtIndexAsInteger(idx, invalidate_reg_num))
-                    {
-                        if (invalidate_reg_num != UINT64_MAX)
-                            m_invalidate_regs_map[i].push_back(invalidate_reg_num);
-                        else
-                            printf("error: 'invalidate-regs' list value wasn't a valid integer\n");
-                    }
-                    else
-                    {
-                        printf("error: 'invalidate-regs' list value wasn't a python string or integer\n");
-                    }
-                }
-            }
-            else
-            {
-                printf("error: 'invalidate-regs' contained an empty list\n");
-            }
-        }
+      std::vector<uint8_t> dwarf_opcode_bytes(reg_info.dynamic_size_dwarf_len);
+      uint32_t j;
+      StringExtractor opcode_extractor;
+      // Swap "dwarf_opcode_string" over into "opcode_extractor"
+      opcode_extractor.GetStringRef().swap(dwarf_opcode_string);
+      uint32_t ret_val = opcode_extractor.GetHexBytesAvail(dwarf_opcode_bytes);
+      assert(ret_val == reg_info.dynamic_size_dwarf_len);
 
-        // Calculate the register offset
-        const size_t end_reg_offset = reg_info.byte_offset + reg_info.byte_size;
-        if (m_reg_data_byte_size < end_reg_offset)
-            m_reg_data_byte_size = end_reg_offset;
+      for (j = 0; j < reg_info.dynamic_size_dwarf_len; ++j)
+        m_dynamic_reg_size_map[i].push_back(dwarf_opcode_bytes[j]);
 
-        m_regs.push_back(reg_info);
-        m_set_reg_nums[set].push_back(i);
+      reg_info.dynamic_size_dwarf_expr_bytes = m_dynamic_reg_size_map[i].data();
     }
-    Finalize(arch);
-    return m_regs.size();
-}
 
-
-void
-DynamicRegisterInfo::AddRegister (RegisterInfo &reg_info,
-                                  ConstString &reg_name, 
-                                  ConstString &reg_alt_name, 
-                                  ConstString &set_name)
-{
-    assert(!m_finalized);
-    const uint32_t reg_num = m_regs.size();
-    reg_info.name = reg_name.AsCString();
-    assert (reg_info.name);
-    reg_info.alt_name = reg_alt_name.AsCString(NULL);
-    uint32_t i;
-    if (reg_info.value_regs)
-    {
-        for (i=0; reg_info.value_regs[i] != LLDB_INVALID_REGNUM; ++i)
-            m_value_regs_map[reg_num].push_back(reg_info.value_regs[i]);
+    std::string format_str;
+    if (reg_info_dict->GetValueForKeyAsString("format", format_str, nullptr)) {
+      if (Args::StringToFormat(format_str.c_str(), reg_info.format, NULL)
+              .Fail()) {
+        Clear();
+        printf("error: invalid 'format' value in register dictionary\n");
+        reg_info_dict->DumpToStdout();
+        return 0;
+      }
+    } else {
+      reg_info_dict->GetValueForKeyAsInteger("format", reg_info.format,
+                                             eFormatHex);
     }
-    if (reg_info.invalidate_regs)
-    {
-        for (i=0; reg_info.invalidate_regs[i] != LLDB_INVALID_REGNUM; ++i)
-            m_invalidate_regs_map[reg_num].push_back(reg_info.invalidate_regs[i]);
+
+    std::string encoding_str;
+    if (reg_info_dict->GetValueForKeyAsString("encoding", encoding_str))
+      reg_info.encoding = Args::StringToEncoding(encoding_str, eEncodingUint);
+    else
+      reg_info_dict->GetValueForKeyAsInteger("encoding", reg_info.encoding,
+                                             eEncodingUint);
+
+    size_t set = 0;
+    if (!reg_info_dict->GetValueForKeyAsInteger<size_t>("set", set, -1) ||
+        set >= m_sets.size()) {
+      Clear();
+      printf("error: invalid 'set' value in register dictionary, valid values "
+             "are 0 - %i\n",
+             (int)set);
+      reg_info_dict->DumpToStdout();
+      return 0;
     }
-    if (reg_info.dynamic_size_dwarf_expr_bytes)
-    {
-        for (i = 0; i < reg_info.dynamic_size_dwarf_len; ++i)
-           m_dynamic_reg_size_map[reg_num].push_back(reg_info.dynamic_size_dwarf_expr_bytes[i]);
 
-        reg_info.dynamic_size_dwarf_expr_bytes = m_dynamic_reg_size_map[reg_num].data ();
+    // Fill in the register numbers
+    reg_info.kinds[lldb::eRegisterKindLLDB] = i;
+    reg_info.kinds[lldb::eRegisterKindProcessPlugin] = i;
+    uint32_t eh_frame_regno = LLDB_INVALID_REGNUM;
+    reg_info_dict->GetValueForKeyAsInteger("gcc", eh_frame_regno,
+                                           LLDB_INVALID_REGNUM);
+    if (eh_frame_regno == LLDB_INVALID_REGNUM)
+      reg_info_dict->GetValueForKeyAsInteger("ehframe", eh_frame_regno,
+                                             LLDB_INVALID_REGNUM);
+    reg_info.kinds[lldb::eRegisterKindEHFrame] = eh_frame_regno;
+    reg_info_dict->GetValueForKeyAsInteger(
+        "dwarf", reg_info.kinds[lldb::eRegisterKindDWARF], LLDB_INVALID_REGNUM);
+    std::string generic_str;
+    if (reg_info_dict->GetValueForKeyAsString("generic", generic_str))
+      reg_info.kinds[lldb::eRegisterKindGeneric] =
+          Args::StringToGenericRegister(generic_str);
+    else
+      reg_info_dict->GetValueForKeyAsInteger(
+          "generic", reg_info.kinds[lldb::eRegisterKindGeneric],
+          LLDB_INVALID_REGNUM);
+
+    // Check if this register invalidates any other register values when it is
+    // modified
+    StructuredData::Array *invalidate_reg_list = nullptr;
+    if (reg_info_dict->GetValueForKeyAsArray("invalidate-regs",
+                                             invalidate_reg_list)) {
+      const size_t num_regs = invalidate_reg_list->GetSize();
+      if (num_regs > 0) {
+        for (uint32_t idx = 0; idx < num_regs; ++idx) {
+          ConstString invalidate_reg_name;
+          uint64_t invalidate_reg_num;
+          if (invalidate_reg_list->GetItemAtIndexAsString(
+                  idx, invalidate_reg_name)) {
+            RegisterInfo *invalidate_reg_info =
+                GetRegisterInfo(invalidate_reg_name);
+            if (invalidate_reg_info) {
+              m_invalidate_regs_map[i].push_back(
+                  invalidate_reg_info->kinds[eRegisterKindLLDB]);
+            } else {
+              // TODO: print error invalid slice string that doesn't follow the
+              // format
+              printf("error: failed to find a 'invalidate-regs' register for "
+                     "\"%s\" while parsing register \"%s\"\n",
+                     invalidate_reg_name.GetCString(), reg_info.name);
+            }
+          } else if (invalidate_reg_list->GetItemAtIndexAsInteger(
+                         idx, invalidate_reg_num)) {
+            if (invalidate_reg_num != UINT64_MAX)
+              m_invalidate_regs_map[i].push_back(invalidate_reg_num);
+            else
+              printf("error: 'invalidate-regs' list value wasn't a valid "
+                     "integer\n");
+          } else {
+            printf("error: 'invalidate-regs' list value wasn't a python string "
+                   "or integer\n");
+          }
+        }
+      } else {
+        printf("error: 'invalidate-regs' contained an empty list\n");
+      }
     }
 
-    m_regs.push_back (reg_info);
-    uint32_t set = GetRegisterSetIndexByName (set_name, true);
-    assert (set < m_sets.size());
-    assert (set < m_set_reg_nums.size());
-    assert (set < m_set_names.size());
-    m_set_reg_nums[set].push_back(reg_num);
-    size_t end_reg_offset = reg_info.byte_offset + reg_info.byte_size;
+    // Calculate the register offset
+    const size_t end_reg_offset = reg_info.byte_offset + reg_info.byte_size;
     if (m_reg_data_byte_size < end_reg_offset)
-        m_reg_data_byte_size = end_reg_offset;
+      m_reg_data_byte_size = end_reg_offset;
+
+    m_regs.push_back(reg_info);
+    m_set_reg_nums[set].push_back(i);
+  }
+  Finalize(arch);
+  return m_regs.size();
 }
 
-void
-DynamicRegisterInfo::Finalize (const ArchSpec &arch)
-{
-    if (m_finalized)
-        return;
-    
-    m_finalized = true;
-    const size_t num_sets = m_sets.size();
-    for (size_t set = 0; set < num_sets; ++set)
-    {
-        assert (m_sets.size() == m_set_reg_nums.size());
-        m_sets[set].num_registers = m_set_reg_nums[set].size();
-        m_sets[set].registers = &m_set_reg_nums[set][0];
-    }
-    
-    // sort and unique all value registers and make sure each is terminated with
-    // LLDB_INVALID_REGNUM
-    
-    for (reg_to_regs_map::iterator pos = m_value_regs_map.begin(), end = m_value_regs_map.end();
-         pos != end;
-         ++pos)
-    {
-        if (pos->second.size() > 1)
-        {
-            std::sort (pos->second.begin(), pos->second.end());
-            reg_num_collection::iterator unique_end = std::unique (pos->second.begin(), pos->second.end());
-            if (unique_end != pos->second.end())
-                pos->second.erase(unique_end, pos->second.end());
-        }
-        assert (!pos->second.empty());
-        if (pos->second.back() != LLDB_INVALID_REGNUM)
-            pos->second.push_back(LLDB_INVALID_REGNUM);
-    }
-    
-    // Now update all value_regs with each register info as needed
-    const size_t num_regs = m_regs.size();
-    for (size_t i=0; i<num_regs; ++i)
-    {
-        if (m_value_regs_map.find(i) != m_value_regs_map.end())
-            m_regs[i].value_regs = m_value_regs_map[i].data();
-        else
-            m_regs[i].value_regs = NULL;
-    }
+void DynamicRegisterInfo::AddRegister(RegisterInfo &reg_info,
+                                      ConstString &reg_name,
+                                      ConstString &reg_alt_name,
+                                      ConstString &set_name) {
+  assert(!m_finalized);
+  const uint32_t reg_num = m_regs.size();
+  reg_info.name = reg_name.AsCString();
+  assert(reg_info.name);
+  reg_info.alt_name = reg_alt_name.AsCString(NULL);
+  uint32_t i;
+  if (reg_info.value_regs) {
+    for (i = 0; reg_info.value_regs[i] != LLDB_INVALID_REGNUM; ++i)
+      m_value_regs_map[reg_num].push_back(reg_info.value_regs[i]);
+  }
+  if (reg_info.invalidate_regs) {
+    for (i = 0; reg_info.invalidate_regs[i] != LLDB_INVALID_REGNUM; ++i)
+      m_invalidate_regs_map[reg_num].push_back(reg_info.invalidate_regs[i]);
+  }
+  if (reg_info.dynamic_size_dwarf_expr_bytes) {
+    for (i = 0; i < reg_info.dynamic_size_dwarf_len; ++i)
+      m_dynamic_reg_size_map[reg_num].push_back(
+          reg_info.dynamic_size_dwarf_expr_bytes[i]);
+
+    reg_info.dynamic_size_dwarf_expr_bytes =
+        m_dynamic_reg_size_map[reg_num].data();
+  }
+
+  m_regs.push_back(reg_info);
+  uint32_t set = GetRegisterSetIndexByName(set_name, true);
+  assert(set < m_sets.size());
+  assert(set < m_set_reg_nums.size());
+  assert(set < m_set_names.size());
+  m_set_reg_nums[set].push_back(reg_num);
+  size_t end_reg_offset = reg_info.byte_offset + reg_info.byte_size;
+  if (m_reg_data_byte_size < end_reg_offset)
+    m_reg_data_byte_size = end_reg_offset;
+}
 
-    // Expand all invalidation dependencies
-    for (reg_to_regs_map::iterator pos = m_invalidate_regs_map.begin(), end = m_invalidate_regs_map.end();
-         pos != end;
-         ++pos)
-    {
-        const uint32_t reg_num = pos->first;
-        
-        if (m_regs[reg_num].value_regs)
-        {
-            reg_num_collection extra_invalid_regs;
-            for (const uint32_t invalidate_reg_num : pos->second)
-            {
-                reg_to_regs_map::iterator invalidate_pos = m_invalidate_regs_map.find(invalidate_reg_num);
-                if (invalidate_pos != m_invalidate_regs_map.end())
-                {
-                    for (const uint32_t concrete_invalidate_reg_num : invalidate_pos->second)
-                    {
-                        if (concrete_invalidate_reg_num != reg_num)
-                            extra_invalid_regs.push_back(concrete_invalidate_reg_num);
-                    }
-                }
-            }
-            pos->second.insert(pos->second.end(), extra_invalid_regs.begin(), extra_invalid_regs.end());
-        }
+void DynamicRegisterInfo::Finalize(const ArchSpec &arch) {
+  if (m_finalized)
+    return;
+
+  m_finalized = true;
+  const size_t num_sets = m_sets.size();
+  for (size_t set = 0; set < num_sets; ++set) {
+    assert(m_sets.size() == m_set_reg_nums.size());
+    m_sets[set].num_registers = m_set_reg_nums[set].size();
+    m_sets[set].registers = &m_set_reg_nums[set][0];
+  }
+
+  // sort and unique all value registers and make sure each is terminated with
+  // LLDB_INVALID_REGNUM
+
+  for (reg_to_regs_map::iterator pos = m_value_regs_map.begin(),
+                                 end = m_value_regs_map.end();
+       pos != end; ++pos) {
+    if (pos->second.size() > 1) {
+      std::sort(pos->second.begin(), pos->second.end());
+      reg_num_collection::iterator unique_end =
+          std::unique(pos->second.begin(), pos->second.end());
+      if (unique_end != pos->second.end())
+        pos->second.erase(unique_end, pos->second.end());
     }
-
-    // sort and unique all invalidate registers and make sure each is terminated with
-    // LLDB_INVALID_REGNUM
-    for (reg_to_regs_map::iterator pos = m_invalidate_regs_map.begin(), end = m_invalidate_regs_map.end();
-         pos != end;
-         ++pos)
-    {
-        if (pos->second.size() > 1)
-        {
-            std::sort (pos->second.begin(), pos->second.end());
-            reg_num_collection::iterator unique_end = std::unique (pos->second.begin(), pos->second.end());
-            if (unique_end != pos->second.end())
-                pos->second.erase(unique_end, pos->second.end());
+    assert(!pos->second.empty());
+    if (pos->second.back() != LLDB_INVALID_REGNUM)
+      pos->second.push_back(LLDB_INVALID_REGNUM);
+  }
+
+  // Now update all value_regs with each register info as needed
+  const size_t num_regs = m_regs.size();
+  for (size_t i = 0; i < num_regs; ++i) {
+    if (m_value_regs_map.find(i) != m_value_regs_map.end())
+      m_regs[i].value_regs = m_value_regs_map[i].data();
+    else
+      m_regs[i].value_regs = NULL;
+  }
+
+  // Expand all invalidation dependencies
+  for (reg_to_regs_map::iterator pos = m_invalidate_regs_map.begin(),
+                                 end = m_invalidate_regs_map.end();
+       pos != end; ++pos) {
+    const uint32_t reg_num = pos->first;
+
+    if (m_regs[reg_num].value_regs) {
+      reg_num_collection extra_invalid_regs;
+      for (const uint32_t invalidate_reg_num : pos->second) {
+        reg_to_regs_map::iterator invalidate_pos =
+            m_invalidate_regs_map.find(invalidate_reg_num);
+        if (invalidate_pos != m_invalidate_regs_map.end()) {
+          for (const uint32_t concrete_invalidate_reg_num :
+               invalidate_pos->second) {
+            if (concrete_invalidate_reg_num != reg_num)
+              extra_invalid_regs.push_back(concrete_invalidate_reg_num);
+          }
         }
-        assert (!pos->second.empty());
-        if (pos->second.back() != LLDB_INVALID_REGNUM)
-            pos->second.push_back(LLDB_INVALID_REGNUM);
+      }
+      pos->second.insert(pos->second.end(), extra_invalid_regs.begin(),
+                         extra_invalid_regs.end());
     }
-
-    // Now update all invalidate_regs with each register info as needed
-    for (size_t i=0; i<num_regs; ++i)
-    {
-        if (m_invalidate_regs_map.find(i) != m_invalidate_regs_map.end())
-            m_regs[i].invalidate_regs = m_invalidate_regs_map[i].data();
-        else
-            m_regs[i].invalidate_regs = NULL;
+  }
+
+  // sort and unique all invalidate registers and make sure each is terminated
+  // with
+  // LLDB_INVALID_REGNUM
+  for (reg_to_regs_map::iterator pos = m_invalidate_regs_map.begin(),
+                                 end = m_invalidate_regs_map.end();
+       pos != end; ++pos) {
+    if (pos->second.size() > 1) {
+      std::sort(pos->second.begin(), pos->second.end());
+      reg_num_collection::iterator unique_end =
+          std::unique(pos->second.begin(), pos->second.end());
+      if (unique_end != pos->second.end())
+        pos->second.erase(unique_end, pos->second.end());
     }
-    
-    // Check if we need to automatically set the generic registers in case
-    // they weren't set
-    bool generic_regs_specified = false;
-    for (const auto &reg: m_regs)
-    {
-        if (reg.kinds[eRegisterKindGeneric] != LLDB_INVALID_REGNUM)
-        {
-            generic_regs_specified = true;
-            break;
-        }
+    assert(!pos->second.empty());
+    if (pos->second.back() != LLDB_INVALID_REGNUM)
+      pos->second.push_back(LLDB_INVALID_REGNUM);
+  }
+
+  // Now update all invalidate_regs with each register info as needed
+  for (size_t i = 0; i < num_regs; ++i) {
+    if (m_invalidate_regs_map.find(i) != m_invalidate_regs_map.end())
+      m_regs[i].invalidate_regs = m_invalidate_regs_map[i].data();
+    else
+      m_regs[i].invalidate_regs = NULL;
+  }
+
+  // Check if we need to automatically set the generic registers in case
+  // they weren't set
+  bool generic_regs_specified = false;
+  for (const auto &reg : m_regs) {
+    if (reg.kinds[eRegisterKindGeneric] != LLDB_INVALID_REGNUM) {
+      generic_regs_specified = true;
+      break;
     }
-
-    if (!generic_regs_specified)
-    {
-        switch (arch.GetMachine())
-        {
-        case llvm::Triple::aarch64:
-        case llvm::Triple::aarch64_be:
-            for (auto &reg: m_regs)
-            {
-                if (strcmp(reg.name, "pc") == 0)
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
-                else if ((strcmp(reg.name, "fp") == 0) || (strcmp(reg.name, "x29") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
-                else if ((strcmp(reg.name, "lr") == 0) || (strcmp(reg.name, "x30") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_RA;
-                else if ((strcmp(reg.name, "sp") == 0) || (strcmp(reg.name, "x31") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
-                else if (strcmp(reg.name, "cpsr") == 0)
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
-            }
-            break;
-            
-        case llvm::Triple::arm:
-        case llvm::Triple::armeb:
-        case llvm::Triple::thumb:
-        case llvm::Triple::thumbeb:
-            for (auto &reg: m_regs)
-            {
-                if ((strcmp(reg.name, "pc") == 0) || (strcmp(reg.name, "r15") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
-                else if ((strcmp(reg.name, "sp") == 0) || (strcmp(reg.name, "r13") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
-                else if ((strcmp(reg.name, "lr") == 0) || (strcmp(reg.name, "r14") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_RA;
-                else if ((strcmp(reg.name, "r7") == 0) && arch.GetTriple().getVendor() == llvm::Triple::Apple)
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
-                else if ((strcmp(reg.name, "r11") == 0) && arch.GetTriple().getVendor() != llvm::Triple::Apple)
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
-                else if (strcmp(reg.name, "fp") == 0)
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
-                else if (strcmp(reg.name, "cpsr") == 0)
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
-            }
-            break;
-            
-        case llvm::Triple::x86:
-            for (auto &reg: m_regs)
-            {
-                if ((strcmp(reg.name, "eip") == 0) || (strcmp(reg.name, "pc") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
-                else if ((strcmp(reg.name, "esp") == 0) || (strcmp(reg.name, "sp") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
-                else if ((strcmp(reg.name, "ebp") == 0) || (strcmp(reg.name, "fp") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
-                else if ((strcmp(reg.name, "eflags") == 0) || (strcmp(reg.name, "flags") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
-            }
-            break;
-
-        case llvm::Triple::x86_64:
-            for (auto &reg: m_regs)
-            {
-                if ((strcmp(reg.name, "rip") == 0) || (strcmp(reg.name, "pc") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
-                else if ((strcmp(reg.name, "rsp") == 0) || (strcmp(reg.name, "sp") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
-                else if ((strcmp(reg.name, "rbp") == 0) || (strcmp(reg.name, "fp") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
-                else if ((strcmp(reg.name, "rflags") == 0) || (strcmp(reg.name, "flags") == 0))
-                    reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
-            }
-            break;
-
-        default:
-            break;
-        }
+  }
+
+  if (!generic_regs_specified) {
+    switch (arch.GetMachine()) {
+    case llvm::Triple::aarch64:
+    case llvm::Triple::aarch64_be:
+      for (auto &reg : m_regs) {
+        if (strcmp(reg.name, "pc") == 0)
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+        else if ((strcmp(reg.name, "fp") == 0) ||
+                 (strcmp(reg.name, "x29") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
+        else if ((strcmp(reg.name, "lr") == 0) ||
+                 (strcmp(reg.name, "x30") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_RA;
+        else if ((strcmp(reg.name, "sp") == 0) ||
+                 (strcmp(reg.name, "x31") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
+        else if (strcmp(reg.name, "cpsr") == 0)
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
+      }
+      break;
+
+    case llvm::Triple::arm:
+    case llvm::Triple::armeb:
+    case llvm::Triple::thumb:
+    case llvm::Triple::thumbeb:
+      for (auto &reg : m_regs) {
+        if ((strcmp(reg.name, "pc") == 0) || (strcmp(reg.name, "r15") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+        else if ((strcmp(reg.name, "sp") == 0) ||
+                 (strcmp(reg.name, "r13") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
+        else if ((strcmp(reg.name, "lr") == 0) ||
+                 (strcmp(reg.name, "r14") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_RA;
+        else if ((strcmp(reg.name, "r7") == 0) &&
+                 arch.GetTriple().getVendor() == llvm::Triple::Apple)
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
+        else if ((strcmp(reg.name, "r11") == 0) &&
+                 arch.GetTriple().getVendor() != llvm::Triple::Apple)
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
+        else if (strcmp(reg.name, "fp") == 0)
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
+        else if (strcmp(reg.name, "cpsr") == 0)
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
+      }
+      break;
+
+    case llvm::Triple::x86:
+      for (auto &reg : m_regs) {
+        if ((strcmp(reg.name, "eip") == 0) || (strcmp(reg.name, "pc") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+        else if ((strcmp(reg.name, "esp") == 0) ||
+                 (strcmp(reg.name, "sp") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
+        else if ((strcmp(reg.name, "ebp") == 0) ||
+                 (strcmp(reg.name, "fp") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
+        else if ((strcmp(reg.name, "eflags") == 0) ||
+                 (strcmp(reg.name, "flags") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
+      }
+      break;
+
+    case llvm::Triple::x86_64:
+      for (auto &reg : m_regs) {
+        if ((strcmp(reg.name, "rip") == 0) || (strcmp(reg.name, "pc") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+        else if ((strcmp(reg.name, "rsp") == 0) ||
+                 (strcmp(reg.name, "sp") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_SP;
+        else if ((strcmp(reg.name, "rbp") == 0) ||
+                 (strcmp(reg.name, "fp") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP;
+        else if ((strcmp(reg.name, "rflags") == 0) ||
+                 (strcmp(reg.name, "flags") == 0))
+          reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
+      }
+      break;
+
+    default:
+      break;
     }
+  }
 }
 
-size_t
-DynamicRegisterInfo::GetNumRegisters() const
-{
-    return m_regs.size();
-}
+size_t DynamicRegisterInfo::GetNumRegisters() const { return m_regs.size(); }
 
-size_t
-DynamicRegisterInfo::GetNumRegisterSets() const
-{
-    return m_sets.size();
-}
+size_t DynamicRegisterInfo::GetNumRegisterSets() const { return m_sets.size(); }
 
-size_t
-DynamicRegisterInfo::GetRegisterDataByteSize() const
-{
-    return m_reg_data_byte_size;
+size_t DynamicRegisterInfo::GetRegisterDataByteSize() const {
+  return m_reg_data_byte_size;
 }
 
 const RegisterInfo *
-DynamicRegisterInfo::GetRegisterInfoAtIndex (uint32_t i) const
-{
-    if (i < m_regs.size())
-        return &m_regs[i];
-    return NULL;
+DynamicRegisterInfo::GetRegisterInfoAtIndex(uint32_t i) const {
+  if (i < m_regs.size())
+    return &m_regs[i];
+  return NULL;
 }
 
-RegisterInfo *
-DynamicRegisterInfo::GetRegisterInfoAtIndex (uint32_t i)
-{
-    if (i < m_regs.size())
-        return &m_regs[i];
-    return NULL;
+RegisterInfo *DynamicRegisterInfo::GetRegisterInfoAtIndex(uint32_t i) {
+  if (i < m_regs.size())
+    return &m_regs[i];
+  return NULL;
 }
 
-const RegisterSet *
-DynamicRegisterInfo::GetRegisterSet (uint32_t i) const
-{
-    if (i < m_sets.size())
-        return &m_sets[i];
-    return NULL;
+const RegisterSet *DynamicRegisterInfo::GetRegisterSet(uint32_t i) const {
+  if (i < m_sets.size())
+    return &m_sets[i];
+  return NULL;
 }
 
-uint32_t
-DynamicRegisterInfo::GetRegisterSetIndexByName (ConstString &set_name, bool can_create)
-{
-    name_collection::iterator pos, end = m_set_names.end();
-    for (pos = m_set_names.begin(); pos != end; ++pos)
-    {
-        if (*pos == set_name)
-            return std::distance (m_set_names.begin(), pos);
-    }
-    
-    m_set_names.push_back(set_name);
-    m_set_reg_nums.resize(m_set_reg_nums.size()+1);
-    RegisterSet new_set = { set_name.AsCString(), NULL, 0, NULL };
-    m_sets.push_back (new_set);
-    return m_sets.size() - 1;
+uint32_t DynamicRegisterInfo::GetRegisterSetIndexByName(ConstString &set_name,
+                                                        bool can_create) {
+  name_collection::iterator pos, end = m_set_names.end();
+  for (pos = m_set_names.begin(); pos != end; ++pos) {
+    if (*pos == set_name)
+      return std::distance(m_set_names.begin(), pos);
+  }
+
+  m_set_names.push_back(set_name);
+  m_set_reg_nums.resize(m_set_reg_nums.size() + 1);
+  RegisterSet new_set = {set_name.AsCString(), NULL, 0, NULL};
+  m_sets.push_back(new_set);
+  return m_sets.size() - 1;
 }
 
 uint32_t
-DynamicRegisterInfo::ConvertRegisterKindToRegisterNumber (uint32_t kind, uint32_t num) const
-{
-    reg_collection::const_iterator pos, end = m_regs.end();
-    for (pos = m_regs.begin(); pos != end; ++pos)
-    {
-        if (pos->kinds[kind] == num)
-            return std::distance (m_regs.begin(), pos);
-    }
-    
-    return LLDB_INVALID_REGNUM;
+DynamicRegisterInfo::ConvertRegisterKindToRegisterNumber(uint32_t kind,
+                                                         uint32_t num) const {
+  reg_collection::const_iterator pos, end = m_regs.end();
+  for (pos = m_regs.begin(); pos != end; ++pos) {
+    if (pos->kinds[kind] == num)
+      return std::distance(m_regs.begin(), pos);
+  }
+
+  return LLDB_INVALID_REGNUM;
 }
 
-void
-DynamicRegisterInfo::Clear()
-{
-    m_regs.clear();
-    m_sets.clear();
-    m_set_reg_nums.clear();
-    m_set_names.clear();
-    m_value_regs_map.clear();
-    m_invalidate_regs_map.clear();
-    m_dynamic_reg_size_map.clear();
-    m_reg_data_byte_size = 0;
-    m_finalized = false;
+void DynamicRegisterInfo::Clear() {
+  m_regs.clear();
+  m_sets.clear();
+  m_set_reg_nums.clear();
+  m_set_names.clear();
+  m_value_regs_map.clear();
+  m_invalidate_regs_map.clear();
+  m_dynamic_reg_size_map.clear();
+  m_reg_data_byte_size = 0;
+  m_finalized = false;
 }
 
-void
-DynamicRegisterInfo::Dump () const
-{
-    StreamFile s(stdout, false);
-    const size_t num_regs = m_regs.size();
-    s.Printf("%p: DynamicRegisterInfo contains %" PRIu64 " registers:\n",
-             static_cast<const void*>(this), static_cast<uint64_t>(num_regs));
-    for (size_t i=0; i<num_regs; ++i)
-    {
-        s.Printf("[%3" PRIu64 "] name = %-10s", (uint64_t)i, m_regs[i].name);
-        s.Printf(", size = %2u, offset = %4u, encoding = %u, format = %-10s",
-                 m_regs[i].byte_size,
-                 m_regs[i].byte_offset,
-                 m_regs[i].encoding,
-                 FormatManager::GetFormatAsCString (m_regs[i].format));
-        if (m_regs[i].kinds[eRegisterKindProcessPlugin] != LLDB_INVALID_REGNUM)
-            s.Printf(", process plugin = %3u", m_regs[i].kinds[eRegisterKindProcessPlugin]);
-        if (m_regs[i].kinds[eRegisterKindDWARF] != LLDB_INVALID_REGNUM)
-            s.Printf(", dwarf = %3u", m_regs[i].kinds[eRegisterKindDWARF]);
-        if (m_regs[i].kinds[eRegisterKindEHFrame] != LLDB_INVALID_REGNUM)
-            s.Printf(", ehframe = %3u", m_regs[i].kinds[eRegisterKindEHFrame]);
-        if (m_regs[i].kinds[eRegisterKindGeneric] != LLDB_INVALID_REGNUM)
-            s.Printf(", generic = %3u", m_regs[i].kinds[eRegisterKindGeneric]);
-        if (m_regs[i].alt_name)
-            s.Printf(", alt-name = %s", m_regs[i].alt_name);
-        if (m_regs[i].value_regs)
-        {
-            s.Printf(", value_regs = [ ");
-            for (size_t j=0; m_regs[i].value_regs[j] != LLDB_INVALID_REGNUM; ++j)
-            {
-                s.Printf("%s ", m_regs[m_regs[i].value_regs[j]].name);
-            }
-            s.Printf("]");
-        }
-        if (m_regs[i].invalidate_regs)
-        {
-            s.Printf(", invalidate_regs = [ ");
-            for (size_t j=0; m_regs[i].invalidate_regs[j] != LLDB_INVALID_REGNUM; ++j)
-            {
-                s.Printf("%s ", m_regs[m_regs[i].invalidate_regs[j]].name);
-            }
-            s.Printf("]");
-        }
-        s.EOL();
+void DynamicRegisterInfo::Dump() const {
+  StreamFile s(stdout, false);
+  const size_t num_regs = m_regs.size();
+  s.Printf("%p: DynamicRegisterInfo contains %" PRIu64 " registers:\n",
+           static_cast<const void *>(this), static_cast<uint64_t>(num_regs));
+  for (size_t i = 0; i < num_regs; ++i) {
+    s.Printf("[%3" PRIu64 "] name = %-10s", (uint64_t)i, m_regs[i].name);
+    s.Printf(", size = %2u, offset = %4u, encoding = %u, format = %-10s",
+             m_regs[i].byte_size, m_regs[i].byte_offset, m_regs[i].encoding,
+             FormatManager::GetFormatAsCString(m_regs[i].format));
+    if (m_regs[i].kinds[eRegisterKindProcessPlugin] != LLDB_INVALID_REGNUM)
+      s.Printf(", process plugin = %3u",
+               m_regs[i].kinds[eRegisterKindProcessPlugin]);
+    if (m_regs[i].kinds[eRegisterKindDWARF] != LLDB_INVALID_REGNUM)
+      s.Printf(", dwarf = %3u", m_regs[i].kinds[eRegisterKindDWARF]);
+    if (m_regs[i].kinds[eRegisterKindEHFrame] != LLDB_INVALID_REGNUM)
+      s.Printf(", ehframe = %3u", m_regs[i].kinds[eRegisterKindEHFrame]);
+    if (m_regs[i].kinds[eRegisterKindGeneric] != LLDB_INVALID_REGNUM)
+      s.Printf(", generic = %3u", m_regs[i].kinds[eRegisterKindGeneric]);
+    if (m_regs[i].alt_name)
+      s.Printf(", alt-name = %s", m_regs[i].alt_name);
+    if (m_regs[i].value_regs) {
+      s.Printf(", value_regs = [ ");
+      for (size_t j = 0; m_regs[i].value_regs[j] != LLDB_INVALID_REGNUM; ++j) {
+        s.Printf("%s ", m_regs[m_regs[i].value_regs[j]].name);
+      }
+      s.Printf("]");
     }
-
-    const size_t num_sets = m_sets.size();
-    s.Printf("%p: DynamicRegisterInfo contains %" PRIu64 " register sets:\n",
-             static_cast<const void*>(this), static_cast<uint64_t>(num_sets));
-    for (size_t i=0; i<num_sets; ++i)
-    {
-        s.Printf("set[%" PRIu64 "] name = %s, regs = [", (uint64_t)i, m_sets[i].name);
-        for (size_t idx=0; idx<m_sets[i].num_registers; ++idx)
-        {
-            s.Printf("%s ", m_regs[m_sets[i].registers[idx]].name);
-        }
-        s.Printf("]\n");
+    if (m_regs[i].invalidate_regs) {
+      s.Printf(", invalidate_regs = [ ");
+      for (size_t j = 0; m_regs[i].invalidate_regs[j] != LLDB_INVALID_REGNUM;
+           ++j) {
+        s.Printf("%s ", m_regs[m_regs[i].invalidate_regs[j]].name);
+      }
+      s.Printf("]");
+    }
+    s.EOL();
+  }
+
+  const size_t num_sets = m_sets.size();
+  s.Printf("%p: DynamicRegisterInfo contains %" PRIu64 " register sets:\n",
+           static_cast<const void *>(this), static_cast<uint64_t>(num_sets));
+  for (size_t i = 0; i < num_sets; ++i) {
+    s.Printf("set[%" PRIu64 "] name = %s, regs = [", (uint64_t)i,
+             m_sets[i].name);
+    for (size_t idx = 0; idx < m_sets[i].num_registers; ++idx) {
+      s.Printf("%s ", m_regs[m_sets[i].registers[idx]].name);
     }
+    s.Printf("]\n");
+  }
 }
 
-
-
-lldb_private::RegisterInfo *
-DynamicRegisterInfo::GetRegisterInfo (const lldb_private::ConstString &reg_name)
-{
-    for (auto &reg_info : m_regs)
-    {
-        // We can use pointer comparison since we used a ConstString to set
-        // the "name" member in AddRegister()
-        if (reg_info.name == reg_name.GetCString())
-        {
-            return &reg_info;
-        }
+lldb_private::RegisterInfo *DynamicRegisterInfo::GetRegisterInfo(
+    const lldb_private::ConstString &reg_name) {
+  for (auto &reg_info : m_regs) {
+    // We can use pointer comparison since we used a ConstString to set
+    // the "name" member in AddRegister()
+    if (reg_info.name == reg_name.GetCString()) {
+      return &reg_info;
     }
-    return NULL;
+  }
+  return NULL;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.h
index d97dc13..e5c22fe 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.h
@@ -12,93 +12,82 @@
 
 // C Includes
 // C++ Includes
-#include <vector>
 #include <map>
+#include <vector>
 
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
 #include "lldb/Core/ConstString.h"
 #include "lldb/Core/StructuredData.h"
+#include "lldb/lldb-private.h"
 
-class DynamicRegisterInfo
-{
+class DynamicRegisterInfo {
 public:
-    DynamicRegisterInfo ();
+  DynamicRegisterInfo();
 
-    DynamicRegisterInfo(const lldb_private::StructuredData::Dictionary &dict,
-                        const lldb_private::ArchSpec &arch);
+  DynamicRegisterInfo(const lldb_private::StructuredData::Dictionary &dict,
+                      const lldb_private::ArchSpec &arch);
 
-    virtual 
-    ~DynamicRegisterInfo ();
+  virtual ~DynamicRegisterInfo();
 
-    size_t SetRegisterInfo(const lldb_private::StructuredData::Dictionary &dict,
-                           const lldb_private::ArchSpec &arch);
+  size_t SetRegisterInfo(const lldb_private::StructuredData::Dictionary &dict,
+                         const lldb_private::ArchSpec &arch);
 
-    void
-    AddRegister (lldb_private::RegisterInfo &reg_info, 
-                 lldb_private::ConstString &reg_name, 
-                 lldb_private::ConstString &reg_alt_name, 
-                 lldb_private::ConstString &set_name);
+  void AddRegister(lldb_private::RegisterInfo &reg_info,
+                   lldb_private::ConstString &reg_name,
+                   lldb_private::ConstString &reg_alt_name,
+                   lldb_private::ConstString &set_name);
 
-    void
-    Finalize (const lldb_private::ArchSpec &arch);
+  void Finalize(const lldb_private::ArchSpec &arch);
 
-    size_t
-    GetNumRegisters() const;
+  size_t GetNumRegisters() const;
 
-    size_t
-    GetNumRegisterSets() const;
+  size_t GetNumRegisterSets() const;
 
-    size_t
-    GetRegisterDataByteSize() const;
+  size_t GetRegisterDataByteSize() const;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex (uint32_t i) const;
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(uint32_t i) const;
 
-    lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex (uint32_t i);
+  lldb_private::RegisterInfo *GetRegisterInfoAtIndex(uint32_t i);
 
-    const lldb_private::RegisterSet *
-    GetRegisterSet (uint32_t i) const;
+  const lldb_private::RegisterSet *GetRegisterSet(uint32_t i) const;
 
-    uint32_t
-    GetRegisterSetIndexByName (lldb_private::ConstString &set_name, bool can_create);
+  uint32_t GetRegisterSetIndexByName(lldb_private::ConstString &set_name,
+                                     bool can_create);
 
-    uint32_t
-    ConvertRegisterKindToRegisterNumber (uint32_t kind, uint32_t num) const;
+  uint32_t ConvertRegisterKindToRegisterNumber(uint32_t kind,
+                                               uint32_t num) const;
 
-    void
-    Dump () const;
+  void Dump() const;
 
-    void
-    Clear();
+  void Clear();
 
 protected:
-    //------------------------------------------------------------------
-    // Classes that inherit from DynamicRegisterInfo can see and modify these
-    //------------------------------------------------------------------
-    typedef std::vector <lldb_private::RegisterInfo> reg_collection;
-    typedef std::vector <lldb_private::RegisterSet> set_collection;
-    typedef std::vector <uint32_t> reg_num_collection;
-    typedef std::vector <reg_num_collection> set_reg_num_collection;
-    typedef std::vector <lldb_private::ConstString> name_collection;
-    typedef std::map<uint32_t, reg_num_collection> reg_to_regs_map;
-    typedef std::vector <uint8_t> dwarf_opcode;
-    typedef std::map<uint32_t, dwarf_opcode> dynamic_reg_size_map;
-
-    lldb_private::RegisterInfo *
-    GetRegisterInfo (const lldb_private::ConstString &reg_name);
-
-    reg_collection m_regs;
-    set_collection m_sets;
-    set_reg_num_collection m_set_reg_nums;
-    name_collection m_set_names;
-    reg_to_regs_map m_value_regs_map;
-    reg_to_regs_map m_invalidate_regs_map;
-    dynamic_reg_size_map m_dynamic_reg_size_map;
-    size_t m_reg_data_byte_size;   // The number of bytes required to store all registers
-    bool m_finalized;
+  //------------------------------------------------------------------
+  // Classes that inherit from DynamicRegisterInfo can see and modify these
+  //------------------------------------------------------------------
+  typedef std::vector<lldb_private::RegisterInfo> reg_collection;
+  typedef std::vector<lldb_private::RegisterSet> set_collection;
+  typedef std::vector<uint32_t> reg_num_collection;
+  typedef std::vector<reg_num_collection> set_reg_num_collection;
+  typedef std::vector<lldb_private::ConstString> name_collection;
+  typedef std::map<uint32_t, reg_num_collection> reg_to_regs_map;
+  typedef std::vector<uint8_t> dwarf_opcode;
+  typedef std::map<uint32_t, dwarf_opcode> dynamic_reg_size_map;
+
+  lldb_private::RegisterInfo *
+  GetRegisterInfo(const lldb_private::ConstString &reg_name);
+
+  reg_collection m_regs;
+  set_collection m_sets;
+  set_reg_num_collection m_set_reg_nums;
+  name_collection m_set_names;
+  reg_to_regs_map m_value_regs_map;
+  reg_to_regs_map m_invalidate_regs_map;
+  dynamic_reg_size_map m_dynamic_reg_size_map;
+  size_t m_reg_data_byte_size; // The number of bytes required to store all
+                               // registers
+  bool m_finalized;
 };
 
-#endif  // lldb_DynamicRegisterInfo_h_
+#endif // lldb_DynamicRegisterInfo_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/FreeBSDSignals.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/FreeBSDSignals.cpp
index e575e2c..f695a11 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/FreeBSDSignals.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/FreeBSDSignals.cpp
@@ -15,81 +15,77 @@
 
 using namespace lldb_private;
 
-FreeBSDSignals::FreeBSDSignals()
-    : UnixSignals()
-{
-    Reset();
-}
+FreeBSDSignals::FreeBSDSignals() : UnixSignals() { Reset(); }
 
-void
-FreeBSDSignals::Reset()
-{
-    UnixSignals::Reset();
+void FreeBSDSignals::Reset() {
+  UnixSignals::Reset();
 
-    //        SIGNO   NAME            SUPPRESS STOP   NOTIFY DESCRIPTION 
-    //        ======  ============    ======== ====== ====== ===================================================
-    AddSignal (32,    "SIGTHR",       false,   false, false, "thread interrupt");
-    AddSignal (33,    "SIGLIBRT",     false,   false, false, "reserved by real-time library");
-    AddSignal (65,    "SIGRTMIN",     false,   false, false, "real time signal 0");
-    AddSignal (66,    "SIGRTMIN+1",   false,   false, false, "real time signal 1");
-    AddSignal (67,    "SIGRTMIN+2",   false,   false, false, "real time signal 2");
-    AddSignal (68,    "SIGRTMIN+3",   false,   false, false, "real time signal 3");
-    AddSignal (69,    "SIGRTMIN+4",   false,   false, false, "real time signal 4");
-    AddSignal (70,    "SIGRTMIN+5",   false,   false, false, "real time signal 5");
-    AddSignal (71,    "SIGRTMIN+6",   false,   false, false, "real time signal 6");
-    AddSignal (72,    "SIGRTMIN+7",   false,   false, false, "real time signal 7");
-    AddSignal (73,    "SIGRTMIN+8",   false,   false, false, "real time signal 8");
-    AddSignal (74,    "SIGRTMIN+9",   false,   false, false, "real time signal 9");
-    AddSignal (75,    "SIGRTMIN+10",  false,   false, false, "real time signal 10");
-    AddSignal (76,    "SIGRTMIN+11",  false,   false, false, "real time signal 11");
-    AddSignal (77,    "SIGRTMIN+12",  false,   false, false, "real time signal 12");
-    AddSignal (78,    "SIGRTMIN+13",  false,   false, false, "real time signal 13");
-    AddSignal (79,    "SIGRTMIN+14",  false,   false, false, "real time signal 14");
-    AddSignal (80,    "SIGRTMIN+15",  false,   false, false, "real time signal 15");
-    AddSignal (81,    "SIGRTMIN+16",  false,   false, false, "real time signal 16");
-    AddSignal (82,    "SIGRTMIN+17",  false,   false, false, "real time signal 17");
-    AddSignal (83,    "SIGRTMIN+18",  false,   false, false, "real time signal 18");
-    AddSignal (84,    "SIGRTMIN+19",  false,   false, false, "real time signal 19");
-    AddSignal (85,    "SIGRTMIN+20",  false,   false, false, "real time signal 20");
-    AddSignal (86,    "SIGRTMIN+21",  false,   false, false, "real time signal 21");
-    AddSignal (87,    "SIGRTMIN+22",  false,   false, false, "real time signal 22");
-    AddSignal (88,    "SIGRTMIN+23",  false,   false, false, "real time signal 23");
-    AddSignal (89,    "SIGRTMIN+24",  false,   false, false, "real time signal 24");
-    AddSignal (90,    "SIGRTMIN+25",  false,   false, false, "real time signal 25");
-    AddSignal (91,    "SIGRTMIN+26",  false,   false, false, "real time signal 26");
-    AddSignal (92,    "SIGRTMIN+27",  false,   false, false, "real time signal 27");
-    AddSignal (93,    "SIGRTMIN+28",  false,   false, false, "real time signal 28");
-    AddSignal (94,    "SIGRTMIN+29",  false,   false, false, "real time signal 29");
-    AddSignal (95,    "SIGRTMIN+30",  false,   false, false, "real time signal 30");
-    AddSignal (96,    "SIGRTMAX-30",  false,   false, false, "real time signal 31");
-    AddSignal (97,    "SIGRTMAX-29",  false,   false, false, "real time signal 32");
-    AddSignal (98,    "SIGRTMAX-28",  false,   false, false, "real time signal 33");
-    AddSignal (99,    "SIGRTMAX-27",  false,   false, false, "real time signal 34");
-    AddSignal (100,   "SIGRTMAX-26",  false,   false, false, "real time signal 35");
-    AddSignal (101,   "SIGRTMAX-25",  false,   false, false, "real time signal 36");
-    AddSignal (102,   "SIGRTMAX-24",  false,   false, false, "real time signal 37");
-    AddSignal (103,   "SIGRTMAX-23",  false,   false, false, "real time signal 38");
-    AddSignal (104,   "SIGRTMAX-22",  false,   false, false, "real time signal 39");
-    AddSignal (105,   "SIGRTMAX-21",  false,   false, false, "real time signal 40");
-    AddSignal (106,   "SIGRTMAX-20",  false,   false, false, "real time signal 41");
-    AddSignal (107,   "SIGRTMAX-19",  false,   false, false, "real time signal 42");
-    AddSignal (108,   "SIGRTMAX-18",  false,   false, false, "real time signal 43");
-    AddSignal (109,   "SIGRTMAX-17",  false,   false, false, "real time signal 44");
-    AddSignal (110,   "SIGRTMAX-16",  false,   false, false, "real time signal 45");
-    AddSignal (111,   "SIGRTMAX-15",  false,   false, false, "real time signal 46");
-    AddSignal (112,   "SIGRTMAX-14",  false,   false, false, "real time signal 47");
-    AddSignal (113,   "SIGRTMAX-13",  false,   false, false, "real time signal 48");
-    AddSignal (114,   "SIGRTMAX-12",  false,   false, false, "real time signal 49");
-    AddSignal (115,   "SIGRTMAX-11",  false,   false, false, "real time signal 50");
-    AddSignal (116,   "SIGRTMAX-10",  false,   false, false, "real time signal 51");
-    AddSignal (117,   "SIGRTMAX-9",   false,   false, false, "real time signal 52");
-    AddSignal (118,   "SIGRTMAX-8",   false,   false, false, "real time signal 53");
-    AddSignal (119,   "SIGRTMAX-7",   false,   false, false, "real time signal 54");
-    AddSignal (120,   "SIGRTMAX-6",   false,   false, false, "real time signal 55");
-    AddSignal (121,   "SIGRTMAX-5",   false,   false, false, "real time signal 56");
-    AddSignal (122,   "SIGRTMAX-4",   false,   false, false, "real time signal 57");
-    AddSignal (123,   "SIGRTMAX-3",   false,   false, false, "real time signal 58");
-    AddSignal (124,   "SIGRTMAX-2",   false,   false, false, "real time signal 59");
-    AddSignal (125,   "SIGRTMAX-1",   false,   false, false, "real time signal 60");
-    AddSignal (126,   "SIGRTMAX",     false,   false, false, "real time signal 61");
+  //        SIGNO   NAME            SUPPRESS STOP   NOTIFY DESCRIPTION
+  //        ======  ============    ======== ====== ======
+  //        ===================================================
+  AddSignal(32, "SIGTHR", false, false, false, "thread interrupt");
+  AddSignal(33, "SIGLIBRT", false, false, false,
+            "reserved by real-time library");
+  AddSignal(65, "SIGRTMIN", false, false, false, "real time signal 0");
+  AddSignal(66, "SIGRTMIN+1", false, false, false, "real time signal 1");
+  AddSignal(67, "SIGRTMIN+2", false, false, false, "real time signal 2");
+  AddSignal(68, "SIGRTMIN+3", false, false, false, "real time signal 3");
+  AddSignal(69, "SIGRTMIN+4", false, false, false, "real time signal 4");
+  AddSignal(70, "SIGRTMIN+5", false, false, false, "real time signal 5");
+  AddSignal(71, "SIGRTMIN+6", false, false, false, "real time signal 6");
+  AddSignal(72, "SIGRTMIN+7", false, false, false, "real time signal 7");
+  AddSignal(73, "SIGRTMIN+8", false, false, false, "real time signal 8");
+  AddSignal(74, "SIGRTMIN+9", false, false, false, "real time signal 9");
+  AddSignal(75, "SIGRTMIN+10", false, false, false, "real time signal 10");
+  AddSignal(76, "SIGRTMIN+11", false, false, false, "real time signal 11");
+  AddSignal(77, "SIGRTMIN+12", false, false, false, "real time signal 12");
+  AddSignal(78, "SIGRTMIN+13", false, false, false, "real time signal 13");
+  AddSignal(79, "SIGRTMIN+14", false, false, false, "real time signal 14");
+  AddSignal(80, "SIGRTMIN+15", false, false, false, "real time signal 15");
+  AddSignal(81, "SIGRTMIN+16", false, false, false, "real time signal 16");
+  AddSignal(82, "SIGRTMIN+17", false, false, false, "real time signal 17");
+  AddSignal(83, "SIGRTMIN+18", false, false, false, "real time signal 18");
+  AddSignal(84, "SIGRTMIN+19", false, false, false, "real time signal 19");
+  AddSignal(85, "SIGRTMIN+20", false, false, false, "real time signal 20");
+  AddSignal(86, "SIGRTMIN+21", false, false, false, "real time signal 21");
+  AddSignal(87, "SIGRTMIN+22", false, false, false, "real time signal 22");
+  AddSignal(88, "SIGRTMIN+23", false, false, false, "real time signal 23");
+  AddSignal(89, "SIGRTMIN+24", false, false, false, "real time signal 24");
+  AddSignal(90, "SIGRTMIN+25", false, false, false, "real time signal 25");
+  AddSignal(91, "SIGRTMIN+26", false, false, false, "real time signal 26");
+  AddSignal(92, "SIGRTMIN+27", false, false, false, "real time signal 27");
+  AddSignal(93, "SIGRTMIN+28", false, false, false, "real time signal 28");
+  AddSignal(94, "SIGRTMIN+29", false, false, false, "real time signal 29");
+  AddSignal(95, "SIGRTMIN+30", false, false, false, "real time signal 30");
+  AddSignal(96, "SIGRTMAX-30", false, false, false, "real time signal 31");
+  AddSignal(97, "SIGRTMAX-29", false, false, false, "real time signal 32");
+  AddSignal(98, "SIGRTMAX-28", false, false, false, "real time signal 33");
+  AddSignal(99, "SIGRTMAX-27", false, false, false, "real time signal 34");
+  AddSignal(100, "SIGRTMAX-26", false, false, false, "real time signal 35");
+  AddSignal(101, "SIGRTMAX-25", false, false, false, "real time signal 36");
+  AddSignal(102, "SIGRTMAX-24", false, false, false, "real time signal 37");
+  AddSignal(103, "SIGRTMAX-23", false, false, false, "real time signal 38");
+  AddSignal(104, "SIGRTMAX-22", false, false, false, "real time signal 39");
+  AddSignal(105, "SIGRTMAX-21", false, false, false, "real time signal 40");
+  AddSignal(106, "SIGRTMAX-20", false, false, false, "real time signal 41");
+  AddSignal(107, "SIGRTMAX-19", false, false, false, "real time signal 42");
+  AddSignal(108, "SIGRTMAX-18", false, false, false, "real time signal 43");
+  AddSignal(109, "SIGRTMAX-17", false, false, false, "real time signal 44");
+  AddSignal(110, "SIGRTMAX-16", false, false, false, "real time signal 45");
+  AddSignal(111, "SIGRTMAX-15", false, false, false, "real time signal 46");
+  AddSignal(112, "SIGRTMAX-14", false, false, false, "real time signal 47");
+  AddSignal(113, "SIGRTMAX-13", false, false, false, "real time signal 48");
+  AddSignal(114, "SIGRTMAX-12", false, false, false, "real time signal 49");
+  AddSignal(115, "SIGRTMAX-11", false, false, false, "real time signal 50");
+  AddSignal(116, "SIGRTMAX-10", false, false, false, "real time signal 51");
+  AddSignal(117, "SIGRTMAX-9", false, false, false, "real time signal 52");
+  AddSignal(118, "SIGRTMAX-8", false, false, false, "real time signal 53");
+  AddSignal(119, "SIGRTMAX-7", false, false, false, "real time signal 54");
+  AddSignal(120, "SIGRTMAX-6", false, false, false, "real time signal 55");
+  AddSignal(121, "SIGRTMAX-5", false, false, false, "real time signal 56");
+  AddSignal(122, "SIGRTMAX-4", false, false, false, "real time signal 57");
+  AddSignal(123, "SIGRTMAX-3", false, false, false, "real time signal 58");
+  AddSignal(124, "SIGRTMAX-2", false, false, false, "real time signal 59");
+  AddSignal(125, "SIGRTMAX-1", false, false, false, "real time signal 60");
+  AddSignal(126, "SIGRTMAX", false, false, false, "real time signal 61");
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/FreeBSDSignals.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/FreeBSDSignals.h
index b715c62..8ec96e8 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/FreeBSDSignals.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/FreeBSDSignals.h
@@ -16,14 +16,12 @@
 namespace lldb_private {
 
 /// FreeBSD specific set of Unix signals.
-class FreeBSDSignals : public UnixSignals
-{
+class FreeBSDSignals : public UnixSignals {
 public:
-    FreeBSDSignals();
+  FreeBSDSignals();
 
 private:
-    void
-    Reset() override;
+  void Reset() override;
 };
 
 } // namespace lldb_private
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/GDBRemoteSignals.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/GDBRemoteSignals.cpp
index 4e355c6..abcc8a3 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/GDBRemoteSignals.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/GDBRemoteSignals.cpp
@@ -14,19 +14,9 @@
 
 using namespace lldb_private;
 
-GDBRemoteSignals::GDBRemoteSignals()
-    : UnixSignals()
-{
-    Reset();
-}
+GDBRemoteSignals::GDBRemoteSignals() : UnixSignals() { Reset(); }
 
 GDBRemoteSignals::GDBRemoteSignals(const lldb::UnixSignalsSP &rhs)
-    : UnixSignals(*rhs)
-{
-}
+    : UnixSignals(*rhs) {}
 
-void
-GDBRemoteSignals::Reset()
-{
-    m_signals.clear();
-}
+void GDBRemoteSignals::Reset() { m_signals.clear(); }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/GDBRemoteSignals.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/GDBRemoteSignals.h
index bbb631a..5900fa7 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/GDBRemoteSignals.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/GDBRemoteSignals.h
@@ -19,16 +19,14 @@
 namespace lldb_private {
 
 /// Empty set of Unix signals to be filled by PlatformRemoteGDBServer
-class GDBRemoteSignals : public UnixSignals
-{
+class GDBRemoteSignals : public UnixSignals {
 public:
-    GDBRemoteSignals();
+  GDBRemoteSignals();
 
-    GDBRemoteSignals(const lldb::UnixSignalsSP &rhs);
+  GDBRemoteSignals(const lldb::UnixSignalsSP &rhs);
 
 private:
-    void
-    Reset() override;
+  void Reset() override;
 };
 
 } // namespace lldb_private
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryThread.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryThread.cpp
index 956539d..d27a7b0 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryThread.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryThread.cpp
@@ -9,91 +9,75 @@
 
 #include "lldb/lldb-private.h"
 
-#include "Plugins/Process/Utility/HistoryUnwind.h"
 #include "Plugins/Process/Utility/HistoryThread.h"
+#include "Plugins/Process/Utility/HistoryUnwind.h"
 #include "Plugins/Process/Utility/RegisterContextHistory.h"
 
 #include "lldb/Core/Log.h"
-#include "lldb/Target/StackFrameList.h"
 #include "lldb/Target/Process.h"
+#include "lldb/Target/StackFrameList.h"
 
 using namespace lldb;
 using namespace lldb_private;
 
 //  Constructor
 
-HistoryThread::HistoryThread(lldb_private::Process &process, lldb::tid_t tid, std::vector<lldb::addr_t> pcs,
-                             uint32_t stop_id, bool stop_id_is_valid)
-    : Thread(process, tid, true),
-      m_framelist_mutex(),
-      m_framelist(),
-      m_pcs(pcs),
-      m_stop_id(stop_id),
-      m_stop_id_is_valid(stop_id_is_valid),
-      m_extended_unwind_token(LLDB_INVALID_ADDRESS),
-      m_queue_name(),
-      m_thread_name(),
-      m_originating_unique_thread_id(tid),
-      m_queue_id(LLDB_INVALID_QUEUE_ID)
-{
-    m_unwinder_ap.reset(new HistoryUnwind(*this, pcs, stop_id_is_valid));
-    Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_OBJECT));
-    if (log)
-        log->Printf("%p HistoryThread::HistoryThread", static_cast<void *>(this));
+HistoryThread::HistoryThread(lldb_private::Process &process, lldb::tid_t tid,
+                             std::vector<lldb::addr_t> pcs, uint32_t stop_id,
+                             bool stop_id_is_valid)
+    : Thread(process, tid, true), m_framelist_mutex(), m_framelist(),
+      m_pcs(pcs), m_stop_id(stop_id), m_stop_id_is_valid(stop_id_is_valid),
+      m_extended_unwind_token(LLDB_INVALID_ADDRESS), m_queue_name(),
+      m_thread_name(), m_originating_unique_thread_id(tid),
+      m_queue_id(LLDB_INVALID_QUEUE_ID) {
+  m_unwinder_ap.reset(new HistoryUnwind(*this, pcs, stop_id_is_valid));
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_OBJECT));
+  if (log)
+    log->Printf("%p HistoryThread::HistoryThread", static_cast<void *>(this));
 }
 
 //  Destructor
 
-HistoryThread::~HistoryThread ()
-{
-    Log *log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_OBJECT));
-    if (log)
-        log->Printf ("%p HistoryThread::~HistoryThread (tid=0x%" PRIx64 ")",
-                     static_cast<void*>(this), GetID());
-    DestroyThread();
+HistoryThread::~HistoryThread() {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_OBJECT));
+  if (log)
+    log->Printf("%p HistoryThread::~HistoryThread (tid=0x%" PRIx64 ")",
+                static_cast<void *>(this), GetID());
+  DestroyThread();
 }
 
-lldb::RegisterContextSP
-HistoryThread::GetRegisterContext ()
-{
-    RegisterContextSP rctx ;
-    if (m_pcs.size() > 0)
-    {
-        rctx.reset (new RegisterContextHistory (*this, 0, GetProcess()->GetAddressByteSize(), m_pcs[0]));
-    }
-    return rctx;
-
+lldb::RegisterContextSP HistoryThread::GetRegisterContext() {
+  RegisterContextSP rctx;
+  if (m_pcs.size() > 0) {
+    rctx.reset(new RegisterContextHistory(
+        *this, 0, GetProcess()->GetAddressByteSize(), m_pcs[0]));
+  }
+  return rctx;
 }
 
 lldb::RegisterContextSP
-HistoryThread::CreateRegisterContextForFrame (StackFrame *frame)
-{
-    return m_unwinder_ap->CreateRegisterContextForFrame (frame);
+HistoryThread::CreateRegisterContextForFrame(StackFrame *frame) {
+  return m_unwinder_ap->CreateRegisterContextForFrame(frame);
 }
 
-lldb::StackFrameListSP
-HistoryThread::GetStackFrameList ()
-{
-    // FIXME do not throw away the lock after we acquire it..
-    std::unique_lock<std::mutex> lock(m_framelist_mutex);
-    lock.unlock();
-    if (m_framelist.get() == NULL)
-    {
-        m_framelist.reset (new StackFrameList (*this, StackFrameListSP(), true));
-    }
+lldb::StackFrameListSP HistoryThread::GetStackFrameList() {
+  // FIXME do not throw away the lock after we acquire it..
+  std::unique_lock<std::mutex> lock(m_framelist_mutex);
+  lock.unlock();
+  if (m_framelist.get() == NULL) {
+    m_framelist.reset(new StackFrameList(*this, StackFrameListSP(), true));
+  }
 
-    return m_framelist;
+  return m_framelist;
 }
 
-uint32_t
-HistoryThread::GetExtendedBacktraceOriginatingIndexID ()
-{
-    if (m_originating_unique_thread_id != LLDB_INVALID_THREAD_ID)
-    {
-        if (GetProcess()->HasAssignedIndexIDToThread (m_originating_unique_thread_id))
-        {
-            return GetProcess()->AssignIndexIDToThread (m_originating_unique_thread_id);
-        }
+uint32_t HistoryThread::GetExtendedBacktraceOriginatingIndexID() {
+  if (m_originating_unique_thread_id != LLDB_INVALID_THREAD_ID) {
+    if (GetProcess()->HasAssignedIndexIDToThread(
+            m_originating_unique_thread_id)) {
+      return GetProcess()->AssignIndexIDToThread(
+          m_originating_unique_thread_id);
     }
-    return LLDB_INVALID_THREAD_ID;
+  }
+  return LLDB_INVALID_THREAD_ID;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryThread.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryThread.h
index 43ac13c..1a4898a 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryThread.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryThread.h
@@ -16,7 +16,6 @@
 
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
 #include "lldb/Core/Broadcaster.h"
 #include "lldb/Core/Event.h"
 #include "lldb/Core/UserID.h"
@@ -24,119 +23,78 @@
 #include "lldb/Target/ExecutionContextScope.h"
 #include "lldb/Target/StackFrameList.h"
 #include "lldb/Target/Thread.h"
+#include "lldb/lldb-private.h"
 
 namespace lldb_private {
 
 //----------------------------------------------------------------------
 /// @class HistoryThread HistoryThread.h "HistoryThread.h"
-/// @brief A thread object representing a backtrace from a previous point in the process execution
+/// @brief A thread object representing a backtrace from a previous point in the
+/// process execution
 ///
 /// This subclass of Thread is used to provide a backtrace from earlier in
-/// process execution.  It is given a backtrace list of pc addresses and 
+/// process execution.  It is given a backtrace list of pc addresses and
 /// optionally a stop_id of when those pc addresses were collected, and it will
 /// create stack frames for them.
 //----------------------------------------------------------------------
 
-class HistoryThread : public lldb_private::Thread
-{
+class HistoryThread : public lldb_private::Thread {
 public:
-    HistoryThread (lldb_private::Process &process, lldb::tid_t tid, std::vector<lldb::addr_t> pcs, uint32_t stop_id, bool stop_id_is_valid);
-
-    ~HistoryThread() override;
-
-    lldb::RegisterContextSP
-    GetRegisterContext() override;
-
-    lldb::RegisterContextSP
-    CreateRegisterContextForFrame(StackFrame *frame) override;
-
-    void
-    RefreshStateAfterStop() override { }
-
-    bool
-    CalculateStopInfo() override
-    {
-        return false;
-    }
-
-    void 
-    SetExtendedBacktraceToken(uint64_t token) override
-    {
-        m_extended_unwind_token = token;
-    }
-
-    uint64_t
-    GetExtendedBacktraceToken() override
-    {
-        return m_extended_unwind_token;
-    }
-
-    const char *
-    GetQueueName() override
-    {
-        return m_queue_name.c_str();
-    }
-
-    void
-    SetQueueName(const char *name) override
-    {
-        m_queue_name = name;
-    }
-
-    lldb::queue_id_t
-    GetQueueID() override
-    {
-        return m_queue_id;
-    }
-
-    void
-    SetQueueID(lldb::queue_id_t queue) override
-    {
-        m_queue_id = queue;
-    }
-
-    const char *
-    GetThreadName ()
-    {
-        return m_thread_name.c_str();
-    }
-
-    uint32_t
-    GetExtendedBacktraceOriginatingIndexID() override;
-
-    void
-    SetThreadName (const char *name)
-    {
-        m_thread_name = name;
-    }
-    
-    const char *
-    GetName() override
-    {
-        return m_thread_name.c_str();
-    }
-    
-    void
-    SetName(const char *name) override
-    {
-        m_thread_name = name;
-    }
+  HistoryThread(lldb_private::Process &process, lldb::tid_t tid,
+                std::vector<lldb::addr_t> pcs, uint32_t stop_id,
+                bool stop_id_is_valid);
+
+  ~HistoryThread() override;
+
+  lldb::RegisterContextSP GetRegisterContext() override;
+
+  lldb::RegisterContextSP
+  CreateRegisterContextForFrame(StackFrame *frame) override;
+
+  void RefreshStateAfterStop() override {}
+
+  bool CalculateStopInfo() override { return false; }
+
+  void SetExtendedBacktraceToken(uint64_t token) override {
+    m_extended_unwind_token = token;
+  }
+
+  uint64_t GetExtendedBacktraceToken() override {
+    return m_extended_unwind_token;
+  }
+
+  const char *GetQueueName() override { return m_queue_name.c_str(); }
+
+  void SetQueueName(const char *name) override { m_queue_name = name; }
+
+  lldb::queue_id_t GetQueueID() override { return m_queue_id; }
+
+  void SetQueueID(lldb::queue_id_t queue) override { m_queue_id = queue; }
+
+  const char *GetThreadName() { return m_thread_name.c_str(); }
+
+  uint32_t GetExtendedBacktraceOriginatingIndexID() override;
+
+  void SetThreadName(const char *name) { m_thread_name = name; }
+
+  const char *GetName() override { return m_thread_name.c_str(); }
+
+  void SetName(const char *name) override { m_thread_name = name; }
 
 protected:
-    virtual lldb::StackFrameListSP
-    GetStackFrameList ();
-
-    mutable std::mutex m_framelist_mutex;
-    lldb::StackFrameListSP      m_framelist;
-    std::vector<lldb::addr_t>   m_pcs;
-    uint32_t                    m_stop_id;
-    bool                        m_stop_id_is_valid;
-
-    uint64_t                    m_extended_unwind_token;
-    std::string                 m_queue_name;
-    std::string                 m_thread_name;
-    lldb::tid_t                 m_originating_unique_thread_id;
-    lldb::queue_id_t            m_queue_id;
+  virtual lldb::StackFrameListSP GetStackFrameList();
+
+  mutable std::mutex m_framelist_mutex;
+  lldb::StackFrameListSP m_framelist;
+  std::vector<lldb::addr_t> m_pcs;
+  uint32_t m_stop_id;
+  bool m_stop_id_is_valid;
+
+  uint64_t m_extended_unwind_token;
+  std::string m_queue_name;
+  std::string m_thread_name;
+  lldb::tid_t m_originating_unique_thread_id;
+  lldb::queue_id_t m_queue_id;
 };
 
 } // namespace lldb_private
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryUnwind.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryUnwind.cpp
index 01d8c3e..4f0ecba 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryUnwind.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryUnwind.cpp
@@ -9,75 +9,59 @@
 
 #include "lldb/lldb-private.h"
 
-#include "Plugins/Process/Utility/RegisterContextHistory.h"
 #include "Plugins/Process/Utility/HistoryUnwind.h"
+#include "Plugins/Process/Utility/RegisterContextHistory.h"
 
-#include "lldb/Target/StackFrame.h"
-#include "lldb/Target/Thread.h"
 #include "lldb/Target/Process.h"
+#include "lldb/Target/StackFrame.h"
 #include "lldb/Target/Target.h"
+#include "lldb/Target/Thread.h"
 
 using namespace lldb;
 using namespace lldb_private;
 
-// Constructor 
+// Constructor
 
-HistoryUnwind::HistoryUnwind (Thread &thread,
-                              std::vector<lldb::addr_t> pcs,
-                              bool stop_id_is_valid) :
-        Unwind (thread),
-        m_pcs (pcs),
-        m_stop_id_is_valid (stop_id_is_valid)
-{
-}
+HistoryUnwind::HistoryUnwind(Thread &thread, std::vector<lldb::addr_t> pcs,
+                             bool stop_id_is_valid)
+    : Unwind(thread), m_pcs(pcs), m_stop_id_is_valid(stop_id_is_valid) {}
 
 // Destructor
 
-HistoryUnwind::~HistoryUnwind ()
-{
-}
+HistoryUnwind::~HistoryUnwind() {}
 
-void
-HistoryUnwind::DoClear ()
-{
-    std::lock_guard<std::recursive_mutex> guard(m_unwind_mutex);
-    m_pcs.clear();
-    m_stop_id_is_valid = false;
+void HistoryUnwind::DoClear() {
+  std::lock_guard<std::recursive_mutex> guard(m_unwind_mutex);
+  m_pcs.clear();
+  m_stop_id_is_valid = false;
 }
 
 lldb::RegisterContextSP
-HistoryUnwind::DoCreateRegisterContextForFrame (StackFrame *frame)
-{
-    RegisterContextSP rctx;
-    if (frame)
-    {
-        addr_t pc = frame->GetFrameCodeAddress().GetLoadAddress (&frame->GetThread()->GetProcess()->GetTarget());
-        if (pc != LLDB_INVALID_ADDRESS)
-        {
-            rctx.reset (new RegisterContextHistory (*frame->GetThread().get(), frame->GetConcreteFrameIndex(), 
-                        frame->GetThread()->GetProcess()->GetAddressByteSize(), pc));
-        }
+HistoryUnwind::DoCreateRegisterContextForFrame(StackFrame *frame) {
+  RegisterContextSP rctx;
+  if (frame) {
+    addr_t pc = frame->GetFrameCodeAddress().GetLoadAddress(
+        &frame->GetThread()->GetProcess()->GetTarget());
+    if (pc != LLDB_INVALID_ADDRESS) {
+      rctx.reset(new RegisterContextHistory(
+          *frame->GetThread().get(), frame->GetConcreteFrameIndex(),
+          frame->GetThread()->GetProcess()->GetAddressByteSize(), pc));
     }
-    return rctx;
+  }
+  return rctx;
 }
 
-bool
-HistoryUnwind::DoGetFrameInfoAtIndex (uint32_t frame_idx, lldb::addr_t& cfa, lldb::addr_t& pc)
-{
-    // FIXME do not throw away the lock after we acquire it..
-    std::unique_lock<std::recursive_mutex> guard(m_unwind_mutex);
-    guard.unlock();
-    if (frame_idx < m_pcs.size())
-    {
-        cfa = frame_idx;
-        pc = m_pcs[frame_idx];
-        return true;
-    }
-    return false;
+bool HistoryUnwind::DoGetFrameInfoAtIndex(uint32_t frame_idx, lldb::addr_t &cfa,
+                                          lldb::addr_t &pc) {
+  // FIXME do not throw away the lock after we acquire it..
+  std::unique_lock<std::recursive_mutex> guard(m_unwind_mutex);
+  guard.unlock();
+  if (frame_idx < m_pcs.size()) {
+    cfa = frame_idx;
+    pc = m_pcs[frame_idx];
+    return true;
+  }
+  return false;
 }
 
-uint32_t
-HistoryUnwind::DoGetFrameCount ()
-{
-    return m_pcs.size();
-}
+uint32_t HistoryUnwind::DoGetFrameCount() { return m_pcs.size(); }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryUnwind.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryUnwind.h
index 890604f..3b64e38 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryUnwind.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/HistoryUnwind.h
@@ -16,36 +16,31 @@
 
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
 #include "lldb/Target/Unwind.h"
+#include "lldb/lldb-private.h"
 
 namespace lldb_private {
 
-class HistoryUnwind : public lldb_private::Unwind
-{
+class HistoryUnwind : public lldb_private::Unwind {
 public:
-    HistoryUnwind (Thread &thread, std::vector<lldb::addr_t> pcs, bool stop_id_is_valid);
+  HistoryUnwind(Thread &thread, std::vector<lldb::addr_t> pcs,
+                bool stop_id_is_valid);
 
-    ~HistoryUnwind() override;
+  ~HistoryUnwind() override;
 
 protected:
-    void
-    DoClear() override;
+  void DoClear() override;
 
-    lldb::RegisterContextSP
-    DoCreateRegisterContextForFrame(StackFrame *frame) override;
+  lldb::RegisterContextSP
+  DoCreateRegisterContextForFrame(StackFrame *frame) override;
 
-    bool
-    DoGetFrameInfoAtIndex(uint32_t frame_idx,
-                          lldb::addr_t& cfa, 
-                          lldb::addr_t& pc) override;
-    uint32_t
-    DoGetFrameCount() override;
+  bool DoGetFrameInfoAtIndex(uint32_t frame_idx, lldb::addr_t &cfa,
+                             lldb::addr_t &pc) override;
+  uint32_t DoGetFrameCount() override;
 
 private:
-
-    std::vector<lldb::addr_t>   m_pcs;
-    bool                        m_stop_id_is_valid;
+  std::vector<lldb::addr_t> m_pcs;
+  bool m_stop_id_is_valid;
 };
 
 } // namespace lldb_private
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/InferiorCallPOSIX.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/InferiorCallPOSIX.cpp
index b694b83..4e1f10c 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/InferiorCallPOSIX.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/InferiorCallPOSIX.cpp
@@ -34,225 +34,207 @@
 using namespace lldb;
 using namespace lldb_private;
 
-bool
-lldb_private::InferiorCallMmap (Process *process,
-                                addr_t &allocated_addr,
-                                addr_t addr,
-                                addr_t length,
-                                unsigned prot,
-                                unsigned flags,
-                                addr_t fd,
-                                addr_t offset)
-{
-    Thread *thread = process->GetThreadList().GetExpressionExecutionThread().get();
-    if (thread == NULL)
-        return false;
-
-    const bool append = true;
-    const bool include_symbols = true;
-    const bool include_inlines = false;
-    SymbolContextList sc_list;
-    const uint32_t count
-      = process->GetTarget().GetImages().FindFunctions (ConstString ("mmap"), 
-                                                        eFunctionNameTypeFull,
-                                                        include_symbols,
-                                                        include_inlines,
-                                                        append, 
-                                                        sc_list);
-    if (count > 0)
-    {
-        SymbolContext sc;
-        if (sc_list.GetContextAtIndex(0, sc))
-        {
-            const uint32_t range_scope = eSymbolContextFunction | eSymbolContextSymbol;
-            const bool use_inline_block_range = false;
-            EvaluateExpressionOptions options;
-            options.SetStopOthers(true);
-            options.SetUnwindOnError(true);
-            options.SetIgnoreBreakpoints(true);
-            options.SetTryAllThreads(true);
-            options.SetDebug (false);
-            options.SetTimeoutUsec(500000);
-            options.SetTrapExceptions(false);
-
-            addr_t prot_arg, flags_arg = 0;
-            if (prot == eMmapProtNone)
-              prot_arg = PROT_NONE;
-            else {
-              prot_arg = 0;
-              if (prot & eMmapProtExec)
-                prot_arg |= PROT_EXEC;
-              if (prot & eMmapProtRead)
-                prot_arg |= PROT_READ;
-              if (prot & eMmapProtWrite)
-                prot_arg |= PROT_WRITE;
-            }
-
-            const ArchSpec arch =  process->GetTarget().GetArchitecture();
-            flags_arg = process->GetTarget().GetPlatform()->ConvertMmapFlagsToPlatform(arch,flags);
-
-            AddressRange mmap_range;
-            if (sc.GetAddressRange(range_scope, 0, use_inline_block_range, mmap_range))
-            {
-                ClangASTContext *clang_ast_context = process->GetTarget().GetScratchClangASTContext();
-                CompilerType clang_void_ptr_type = clang_ast_context->GetBasicType(eBasicTypeVoid).GetPointerType();
-                lldb::addr_t args[] = { addr, length, prot_arg, flags_arg, fd, offset };
-                lldb::ThreadPlanSP call_plan_sp(new ThreadPlanCallFunction(*thread, mmap_range.GetBaseAddress(),
-                                                                           clang_void_ptr_type, args, options));
-                if (call_plan_sp)
-                {
-                    DiagnosticManager diagnostics;
-
-                    StackFrame *frame = thread->GetStackFrameAtIndex(0).get();
-                    if (frame)
-                    {
-                        ExecutionContext exe_ctx;
-                        frame->CalculateExecutionContext (exe_ctx);
-                        ExpressionResults result = process->RunThreadPlan(exe_ctx, call_plan_sp, options, diagnostics);
-                        if (result == eExpressionCompleted)
-                        {
+bool lldb_private::InferiorCallMmap(Process *process, addr_t &allocated_addr,
+                                    addr_t addr, addr_t length, unsigned prot,
+                                    unsigned flags, addr_t fd, addr_t offset) {
+  Thread *thread =
+      process->GetThreadList().GetExpressionExecutionThread().get();
+  if (thread == NULL)
+    return false;
 
-                            allocated_addr = call_plan_sp->GetReturnValueObject()->GetValueAsUnsigned(LLDB_INVALID_ADDRESS);
-                            if (process->GetAddressByteSize() == 4)
-                            {
-                                if (allocated_addr == UINT32_MAX)
-                                    return false;
-                            }
-                            else if (process->GetAddressByteSize() == 8)
-                            {
-                                if (allocated_addr == UINT64_MAX)
-                                    return false;
-                            }
-                            return true;
-                        }
-                    }
-                }
+  const bool append = true;
+  const bool include_symbols = true;
+  const bool include_inlines = false;
+  SymbolContextList sc_list;
+  const uint32_t count = process->GetTarget().GetImages().FindFunctions(
+      ConstString("mmap"), eFunctionNameTypeFull, include_symbols,
+      include_inlines, append, sc_list);
+  if (count > 0) {
+    SymbolContext sc;
+    if (sc_list.GetContextAtIndex(0, sc)) {
+      const uint32_t range_scope =
+          eSymbolContextFunction | eSymbolContextSymbol;
+      const bool use_inline_block_range = false;
+      EvaluateExpressionOptions options;
+      options.SetStopOthers(true);
+      options.SetUnwindOnError(true);
+      options.SetIgnoreBreakpoints(true);
+      options.SetTryAllThreads(true);
+      options.SetDebug(false);
+      options.SetTimeout(std::chrono::milliseconds(500));
+      options.SetTrapExceptions(false);
+
+      addr_t prot_arg, flags_arg = 0;
+      if (prot == eMmapProtNone)
+        prot_arg = PROT_NONE;
+      else {
+        prot_arg = 0;
+        if (prot & eMmapProtExec)
+          prot_arg |= PROT_EXEC;
+        if (prot & eMmapProtRead)
+          prot_arg |= PROT_READ;
+        if (prot & eMmapProtWrite)
+          prot_arg |= PROT_WRITE;
+      }
+
+      const ArchSpec arch = process->GetTarget().GetArchitecture();
+      flags_arg =
+          process->GetTarget().GetPlatform()->ConvertMmapFlagsToPlatform(arch,
+                                                                         flags);
+
+      AddressRange mmap_range;
+      if (sc.GetAddressRange(range_scope, 0, use_inline_block_range,
+                             mmap_range)) {
+        ClangASTContext *clang_ast_context =
+            process->GetTarget().GetScratchClangASTContext();
+        CompilerType clang_void_ptr_type =
+            clang_ast_context->GetBasicType(eBasicTypeVoid).GetPointerType();
+        lldb::addr_t args[] = {addr, length, prot_arg, flags_arg, fd, offset};
+        lldb::ThreadPlanSP call_plan_sp(
+            new ThreadPlanCallFunction(*thread, mmap_range.GetBaseAddress(),
+                                       clang_void_ptr_type, args, options));
+        if (call_plan_sp) {
+          DiagnosticManager diagnostics;
+
+          StackFrame *frame = thread->GetStackFrameAtIndex(0).get();
+          if (frame) {
+            ExecutionContext exe_ctx;
+            frame->CalculateExecutionContext(exe_ctx);
+            ExpressionResults result = process->RunThreadPlan(
+                exe_ctx, call_plan_sp, options, diagnostics);
+            if (result == eExpressionCompleted) {
+
+              allocated_addr =
+                  call_plan_sp->GetReturnValueObject()->GetValueAsUnsigned(
+                      LLDB_INVALID_ADDRESS);
+              if (process->GetAddressByteSize() == 4) {
+                if (allocated_addr == UINT32_MAX)
+                  return false;
+              } else if (process->GetAddressByteSize() == 8) {
+                if (allocated_addr == UINT64_MAX)
+                  return false;
+              }
+              return true;
             }
+          }
         }
+      }
     }
+  }
 
-    return false;
+  return false;
 }
 
-bool
-lldb_private::InferiorCallMunmap (Process *process,
-                                  addr_t addr,
-                                  addr_t length)
-{
-   Thread *thread = process->GetThreadList().GetExpressionExecutionThread().get();
-   if (thread == NULL)
-       return false;
-   
-   const bool append = true;
-   const bool include_symbols = true;
-   const bool include_inlines = false;
-   SymbolContextList sc_list;
-   const uint32_t count
-     = process->GetTarget().GetImages().FindFunctions (ConstString ("munmap"), 
-                                                       eFunctionNameTypeFull,
-                                                       include_symbols, 
-                                                       include_inlines,
-                                                       append, 
-                                                       sc_list);
-   if (count > 0)
-   {
-       SymbolContext sc;
-       if (sc_list.GetContextAtIndex(0, sc))
-       {
-            const uint32_t range_scope = eSymbolContextFunction | eSymbolContextSymbol;
-            const bool use_inline_block_range = false;
-            EvaluateExpressionOptions options;
-            options.SetStopOthers(true);
-            options.SetUnwindOnError(true);
-            options.SetIgnoreBreakpoints(true);
-            options.SetTryAllThreads(true);
-            options.SetDebug (false);
-            options.SetTimeoutUsec(500000);
-            options.SetTrapExceptions(false);
-           
-            AddressRange munmap_range;
-            if (sc.GetAddressRange(range_scope, 0, use_inline_block_range, munmap_range))
-            {
-                lldb::addr_t args[] = { addr, length };
-                lldb::ThreadPlanSP call_plan_sp(
-                    new ThreadPlanCallFunction(*thread, munmap_range.GetBaseAddress(), CompilerType(), args, options));
-                if (call_plan_sp)
-                {
-                    DiagnosticManager diagnostics;
+bool lldb_private::InferiorCallMunmap(Process *process, addr_t addr,
+                                      addr_t length) {
+  Thread *thread =
+      process->GetThreadList().GetExpressionExecutionThread().get();
+  if (thread == NULL)
+    return false;
 
-                    StackFrame *frame = thread->GetStackFrameAtIndex(0).get();
-                    if (frame)
-                    {
-                        ExecutionContext exe_ctx;
-                        frame->CalculateExecutionContext (exe_ctx);
-                        ExpressionResults result = process->RunThreadPlan(exe_ctx, call_plan_sp, options, diagnostics);
-                        if (result == eExpressionCompleted)
-                        {
-                            return true;
-                        }
-                    }
-                }
+  const bool append = true;
+  const bool include_symbols = true;
+  const bool include_inlines = false;
+  SymbolContextList sc_list;
+  const uint32_t count = process->GetTarget().GetImages().FindFunctions(
+      ConstString("munmap"), eFunctionNameTypeFull, include_symbols,
+      include_inlines, append, sc_list);
+  if (count > 0) {
+    SymbolContext sc;
+    if (sc_list.GetContextAtIndex(0, sc)) {
+      const uint32_t range_scope =
+          eSymbolContextFunction | eSymbolContextSymbol;
+      const bool use_inline_block_range = false;
+      EvaluateExpressionOptions options;
+      options.SetStopOthers(true);
+      options.SetUnwindOnError(true);
+      options.SetIgnoreBreakpoints(true);
+      options.SetTryAllThreads(true);
+      options.SetDebug(false);
+      options.SetTimeout(std::chrono::milliseconds(500));
+      options.SetTrapExceptions(false);
+
+      AddressRange munmap_range;
+      if (sc.GetAddressRange(range_scope, 0, use_inline_block_range,
+                             munmap_range)) {
+        lldb::addr_t args[] = {addr, length};
+        lldb::ThreadPlanSP call_plan_sp(
+            new ThreadPlanCallFunction(*thread, munmap_range.GetBaseAddress(),
+                                       CompilerType(), args, options));
+        if (call_plan_sp) {
+          DiagnosticManager diagnostics;
+
+          StackFrame *frame = thread->GetStackFrameAtIndex(0).get();
+          if (frame) {
+            ExecutionContext exe_ctx;
+            frame->CalculateExecutionContext(exe_ctx);
+            ExpressionResults result = process->RunThreadPlan(
+                exe_ctx, call_plan_sp, options, diagnostics);
+            if (result == eExpressionCompleted) {
+              return true;
             }
+          }
         }
+      }
     }
+  }
 
-    return false;
+  return false;
 }
 
-// FIXME: This has nothing to do with Posix, it is just a convenience function that calls a
-// function of the form "void * (*)(void)".  We should find a better place to put this.
-
-bool
-lldb_private::InferiorCall (Process *process,
-                            const Address *address,
-                            addr_t &returned_func,
-                            bool trap_exceptions)
-{
-    Thread *thread = process->GetThreadList().GetExpressionExecutionThread().get();
-    if (thread == NULL || address == NULL)
-        return false;
-
-    EvaluateExpressionOptions options;
-    options.SetStopOthers(true);
-    options.SetUnwindOnError(true);
-    options.SetIgnoreBreakpoints(true);
-    options.SetTryAllThreads(true);
-    options.SetDebug (false);
-    options.SetTimeoutUsec(500000);
-    options.SetTrapExceptions(trap_exceptions);
-
-    ClangASTContext *clang_ast_context = process->GetTarget().GetScratchClangASTContext();
-    CompilerType clang_void_ptr_type = clang_ast_context->GetBasicType(eBasicTypeVoid).GetPointerType();
-    lldb::ThreadPlanSP call_plan_sp(
-        new ThreadPlanCallFunction(*thread, *address, clang_void_ptr_type, llvm::ArrayRef<addr_t>(), options));
-    if (call_plan_sp)
-    {
-        DiagnosticManager diagnostics;
+// FIXME: This has nothing to do with Posix, it is just a convenience function
+// that calls a
+// function of the form "void * (*)(void)".  We should find a better place to
+// put this.
 
-        StackFrame *frame = thread->GetStackFrameAtIndex(0).get();
-        if (frame)
-        {
-            ExecutionContext exe_ctx;
-            frame->CalculateExecutionContext (exe_ctx);
-            ExpressionResults result = process->RunThreadPlan(exe_ctx, call_plan_sp, options, diagnostics);
-            if (result == eExpressionCompleted)
-            {
-                returned_func = call_plan_sp->GetReturnValueObject()->GetValueAsUnsigned(LLDB_INVALID_ADDRESS);
+bool lldb_private::InferiorCall(Process *process, const Address *address,
+                                addr_t &returned_func, bool trap_exceptions) {
+  Thread *thread =
+      process->GetThreadList().GetExpressionExecutionThread().get();
+  if (thread == NULL || address == NULL)
+    return false;
 
-                if (process->GetAddressByteSize() == 4)
-                {
-                    if (returned_func == UINT32_MAX)
-                        return false;
-                }
-                else if (process->GetAddressByteSize() == 8)
-                {
-                    if (returned_func == UINT64_MAX)
-                        return false;
-                }
-                return true;
-            }
+  EvaluateExpressionOptions options;
+  options.SetStopOthers(true);
+  options.SetUnwindOnError(true);
+  options.SetIgnoreBreakpoints(true);
+  options.SetTryAllThreads(true);
+  options.SetDebug(false);
+  options.SetTimeout(std::chrono::milliseconds(500));
+  options.SetTrapExceptions(trap_exceptions);
+
+  ClangASTContext *clang_ast_context =
+      process->GetTarget().GetScratchClangASTContext();
+  CompilerType clang_void_ptr_type =
+      clang_ast_context->GetBasicType(eBasicTypeVoid).GetPointerType();
+  lldb::ThreadPlanSP call_plan_sp(
+      new ThreadPlanCallFunction(*thread, *address, clang_void_ptr_type,
+                                 llvm::ArrayRef<addr_t>(), options));
+  if (call_plan_sp) {
+    DiagnosticManager diagnostics;
+
+    StackFrame *frame = thread->GetStackFrameAtIndex(0).get();
+    if (frame) {
+      ExecutionContext exe_ctx;
+      frame->CalculateExecutionContext(exe_ctx);
+      ExpressionResults result =
+          process->RunThreadPlan(exe_ctx, call_plan_sp, options, diagnostics);
+      if (result == eExpressionCompleted) {
+        returned_func =
+            call_plan_sp->GetReturnValueObject()->GetValueAsUnsigned(
+                LLDB_INVALID_ADDRESS);
+
+        if (process->GetAddressByteSize() == 4) {
+          if (returned_func == UINT32_MAX)
+            return false;
+        } else if (process->GetAddressByteSize() == 8) {
+          if (returned_func == UINT64_MAX)
+            return false;
         }
+        return true;
+      }
     }
+  }
 
-    return false;
+  return false;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/InferiorCallPOSIX.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/InferiorCallPOSIX.h
index d10e849..07bde5b 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/InferiorCallPOSIX.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/InferiorCallPOSIX.h
@@ -31,9 +31,9 @@ bool InferiorCallMmap(Process *proc, lldb::addr_t &allocated_addr,
 
 bool InferiorCallMunmap(Process *proc, lldb::addr_t addr, lldb::addr_t length);
 
-bool InferiorCall(Process *proc, const Address *address, lldb::addr_t &returned_func,
-                  bool trap_exceptions = false);
+bool InferiorCall(Process *proc, const Address *address,
+                  lldb::addr_t &returned_func, bool trap_exceptions = false);
 
-}   // namespace lldb_private
+} // namespace lldb_private
 
-#endif  // lldb_InferiorCallPOSIX_h_
+#endif // lldb_InferiorCallPOSIX_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/InstructionUtils.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/InstructionUtils.h
index 6226fbc..e422a96 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/InstructionUtils.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/InstructionUtils.h
@@ -16,123 +16,99 @@ namespace lldb_private {
 
 // Return the bit field(s) from the most significant bit (msbit) to the
 // least significant bit (lsbit) of a 64-bit unsigned value.
-static inline uint64_t
-Bits64 (const uint64_t bits, const uint32_t msbit, const uint32_t lsbit)
-{
-    assert(msbit < 64 && lsbit <= msbit);
-    return (bits >> lsbit) & ((1ull << (msbit - lsbit + 1)) - 1);
+static inline uint64_t Bits64(const uint64_t bits, const uint32_t msbit,
+                              const uint32_t lsbit) {
+  assert(msbit < 64 && lsbit <= msbit);
+  return (bits >> lsbit) & ((1ull << (msbit - lsbit + 1)) - 1);
 }
 
 // Return the bit field(s) from the most significant bit (msbit) to the
 // least significant bit (lsbit) of a 32-bit unsigned value.
-static inline uint32_t
-Bits32 (const uint32_t bits, const uint32_t msbit, const uint32_t lsbit)
-{
-    assert(msbit < 32 && lsbit <= msbit);
-    return (bits >> lsbit) & ((1u << (msbit - lsbit + 1)) - 1);
+static inline uint32_t Bits32(const uint32_t bits, const uint32_t msbit,
+                              const uint32_t lsbit) {
+  assert(msbit < 32 && lsbit <= msbit);
+  return (bits >> lsbit) & ((1u << (msbit - lsbit + 1)) - 1);
 }
 
 // Return the bit value from the 'bit' position of a 32-bit unsigned value.
-static inline uint32_t
-Bit32 (const uint32_t bits, const uint32_t bit)
-{
-    return (bits >> bit) & 1u;
+static inline uint32_t Bit32(const uint32_t bits, const uint32_t bit) {
+  return (bits >> bit) & 1u;
 }
 
-static inline uint64_t
-Bit64 (const uint64_t bits, const uint32_t bit)
-{
-    return (bits >> bit) & 1ull;
+static inline uint64_t Bit64(const uint64_t bits, const uint32_t bit) {
+  return (bits >> bit) & 1ull;
 }
 
 // Set the bit field(s) from the most significant bit (msbit) to the
 // least significant bit (lsbit) of a 32-bit unsigned value to 'val'.
-static inline void
-SetBits32(uint32_t &bits, const uint32_t msbit, const uint32_t lsbit, const uint32_t val)
-{
-    assert(msbit < 32 && lsbit < 32 && msbit >= lsbit);
-    uint32_t mask = ((1u << (msbit - lsbit + 1)) - 1);
-    bits &= ~(mask << lsbit);
-    bits |= (val & mask) << lsbit;
+static inline void SetBits32(uint32_t &bits, const uint32_t msbit,
+                             const uint32_t lsbit, const uint32_t val) {
+  assert(msbit < 32 && lsbit < 32 && msbit >= lsbit);
+  uint32_t mask = ((1u << (msbit - lsbit + 1)) - 1);
+  bits &= ~(mask << lsbit);
+  bits |= (val & mask) << lsbit;
 }
 
 // Set the 'bit' position of a 32-bit unsigned value to 'val'.
-static inline void
-SetBit32(uint32_t &bits, const uint32_t bit, const uint32_t val)
-{
-    SetBits32(bits, bit, bit, val);
+static inline void SetBit32(uint32_t &bits, const uint32_t bit,
+                            const uint32_t val) {
+  SetBits32(bits, bit, bit, val);
 }
 
 // Rotate a 32-bit unsigned value right by the specified amount.
-static inline uint32_t
-Rotr32 (uint32_t bits, uint32_t amt)
-{
-    assert(amt < 32 && "Invalid rotate amount");
-    return (bits >> amt) | (bits << ((32-amt)&31));
+static inline uint32_t Rotr32(uint32_t bits, uint32_t amt) {
+  assert(amt < 32 && "Invalid rotate amount");
+  return (bits >> amt) | (bits << ((32 - amt) & 31));
 }
 
 // Rotate a 32-bit unsigned value left by the specified amount.
-static inline uint32_t
-Rotl32 (uint32_t bits, uint32_t amt)
-{
-    assert(amt < 32 && "Invalid rotate amount");
-    return (bits << amt) | (bits >> ((32-amt)&31));
+static inline uint32_t Rotl32(uint32_t bits, uint32_t amt) {
+  assert(amt < 32 && "Invalid rotate amount");
+  return (bits << amt) | (bits >> ((32 - amt) & 31));
 }
 
 // Create a mask that starts at bit zero and includes "bit"
-static inline uint64_t
-MaskUpToBit (const uint64_t bit)
-{
-    if (bit >= 63)
-        return -1ll;
-    return (1ull << (bit + 1ull)) - 1ull;
+static inline uint64_t MaskUpToBit(const uint64_t bit) {
+  if (bit >= 63)
+    return -1ll;
+  return (1ull << (bit + 1ull)) - 1ull;
 }
 
 // Return an integer result equal to the number of bits of x that are ones.
-static inline uint32_t
-BitCount (uint64_t x)
-{
-    // c accumulates the total bits set in x
-    uint32_t c;
-    for (c = 0; x; ++c)
-    {
-        x &= x - 1; // clear the least significant bit set
-    }
-    return c;
+static inline uint32_t BitCount(uint64_t x) {
+  // c accumulates the total bits set in x
+  uint32_t c;
+  for (c = 0; x; ++c) {
+    x &= x - 1; // clear the least significant bit set
+  }
+  return c;
 }
 
-static inline bool
-BitIsSet (const uint64_t value, const uint64_t bit)
-{
-    return (value & (1ull << bit)) != 0;
+static inline bool BitIsSet(const uint64_t value, const uint64_t bit) {
+  return (value & (1ull << bit)) != 0;
 }
 
-static inline bool
-BitIsClear (const uint64_t value, const uint64_t bit)
-{
-    return (value & (1ull << bit)) == 0;
+static inline bool BitIsClear(const uint64_t value, const uint64_t bit) {
+  return (value & (1ull << bit)) == 0;
 }
 
-static inline uint64_t
-UnsignedBits (const uint64_t value, const uint64_t msbit, const uint64_t lsbit)
-{
-    uint64_t result = value >> lsbit;
-    result &= MaskUpToBit (msbit - lsbit);
-    return result;
+static inline uint64_t UnsignedBits(const uint64_t value, const uint64_t msbit,
+                                    const uint64_t lsbit) {
+  uint64_t result = value >> lsbit;
+  result &= MaskUpToBit(msbit - lsbit);
+  return result;
 }
 
-static inline int64_t
-SignedBits (const uint64_t value, const uint64_t msbit, const uint64_t lsbit)
-{
-    uint64_t result = UnsignedBits (value, msbit, lsbit);
-    if (BitIsSet(value, msbit))
-    {
-        // Sign extend
-        result |= ~MaskUpToBit (msbit - lsbit);
-    }
-    return result;
+static inline int64_t SignedBits(const uint64_t value, const uint64_t msbit,
+                                 const uint64_t lsbit) {
+  uint64_t result = UnsignedBits(value, msbit, lsbit);
+  if (BitIsSet(value, msbit)) {
+    // Sign extend
+    result |= ~MaskUpToBit(msbit - lsbit);
+  }
+  return result;
 }
 
-}   // namespace lldb_private
+} // namespace lldb_private
 
-#endif  // lldb_InstructionUtils_h_
+#endif // lldb_InstructionUtils_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/LinuxSignals.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/LinuxSignals.cpp
index 5687577..eb01075 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/LinuxSignals.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/LinuxSignals.cpp
@@ -14,80 +14,83 @@
 
 using namespace lldb_private;
 
-LinuxSignals::LinuxSignals()
-    : UnixSignals()
-{
-    Reset();
-}
+LinuxSignals::LinuxSignals() : UnixSignals() { Reset(); }
 
-void
-LinuxSignals::Reset()
-{
-    m_signals.clear();
-    //        SIGNO  NAME             SUPPRESS STOP   NOTIFY DESCRIPTION                              ALIAS
-    //        =====  ===========      ======== =====  ====== ======================================   ======
-    AddSignal (1,    "SIGHUP",        false,   true , true , "hangup"                                        );
-    AddSignal (2,    "SIGINT",        true ,   true , true , "interrupt"                                     );
-    AddSignal (3,    "SIGQUIT",       false,   true , true , "quit"                                          );
-    AddSignal (4,    "SIGILL",        false,   true , true , "illegal instruction"                           );
-    AddSignal (5,    "SIGTRAP",       true ,   true , true , "trace trap (not reset when caught)"            );
-    AddSignal (6,    "SIGABRT",       false,   true , true , "abort()/IOT trap",                     "SIGIOT");
-    AddSignal (7,    "SIGBUS",        false,   true , true , "bus error"                                     );
-    AddSignal (8,    "SIGFPE",        false,   true , true , "floating point exception"                      );
-    AddSignal (9,    "SIGKILL",       false,   true , true , "kill"                                          );
-    AddSignal (10,   "SIGUSR1",       false,   true , true , "user defined signal 1"                         );
-    AddSignal (11,   "SIGSEGV",       false,   true , true , "segmentation violation"                        );
-    AddSignal (12,   "SIGUSR2",       false,   true , true , "user defined signal 2"                         );
-    AddSignal (13,   "SIGPIPE",       false,   true , true , "write to pipe with reading end closed"         );
-    AddSignal (14,   "SIGALRM",       false,   false, false, "alarm"                                         );
-    AddSignal (15,   "SIGTERM",       false,   true , true , "termination requested"                         );
-    AddSignal (16,   "SIGSTKFLT",     false,   true , true , "stack fault"                                   );
-    AddSignal (17,   "SIGCHLD",       false,   false, true , "child status has changed",             "SIGCLD");
-    AddSignal (18,   "SIGCONT",       false,   true , true , "process continue"                              );
-    AddSignal (19,   "SIGSTOP",       true ,   true , true , "process stop"                                  );
-    AddSignal (20,   "SIGTSTP",       false,   true , true , "tty stop"                                      );
-    AddSignal (21,   "SIGTTIN",       false,   true , true , "background tty read"                           );
-    AddSignal (22,   "SIGTTOU",       false,   true , true , "background tty write"                          );
-    AddSignal (23,   "SIGURG",        false,   true , true , "urgent data on socket"                         );
-    AddSignal (24,   "SIGXCPU",       false,   true , true , "CPU resource exceeded"                         );
-    AddSignal (25,   "SIGXFSZ",       false,   true , true , "file size limit exceeded"                      );
-    AddSignal (26,   "SIGVTALRM",     false,   true , true , "virtual time alarm"                            );
-    AddSignal (27,   "SIGPROF",       false,   false, false, "profiling time alarm"                          );
-    AddSignal (28,   "SIGWINCH",      false,   true , true , "window size changes"                           );
-    AddSignal (29,   "SIGIO",         false,   true , true , "input/output ready/Pollable event",   "SIGPOLL");
-    AddSignal (30,   "SIGPWR",        false,   true , true , "power failure"                                 );
-    AddSignal (31,   "SIGSYS",        false,   true , true , "invalid system call"                           );
-    AddSignal (32,   "SIG32",         false,   false, false, "threading library internal signal 1"           );
-    AddSignal (33,   "SIG33",         false,   false, false, "threading library internal signal 2"           );
-    AddSignal (34,   "SIGRTMIN",      false,   false, false, "real time signal 0"                            );
-    AddSignal (35,   "SIGRTMIN+1",    false,   false, false, "real time signal 1"                            );
-    AddSignal (36,   "SIGRTMIN+2",    false,   false, false, "real time signal 2"                            );
-    AddSignal (37,   "SIGRTMIN+3",    false,   false, false, "real time signal 3"                            );
-    AddSignal (38,   "SIGRTMIN+4",    false,   false, false, "real time signal 4"                            );
-    AddSignal (39,   "SIGRTMIN+5",    false,   false, false, "real time signal 5"                            );
-    AddSignal (40,   "SIGRTMIN+6",    false,   false, false, "real time signal 6"                            );
-    AddSignal (41,   "SIGRTMIN+7",    false,   false, false, "real time signal 7"                            );
-    AddSignal (42,   "SIGRTMIN+8",    false,   false, false, "real time signal 8"                            );
-    AddSignal (43,   "SIGRTMIN+9",    false,   false, false, "real time signal 9"                            );
-    AddSignal (44,   "SIGRTMIN+10",   false,   false, false, "real time signal 10"                           );
-    AddSignal (45,   "SIGRTMIN+11",   false,   false, false, "real time signal 11"                           );
-    AddSignal (46,   "SIGRTMIN+12",   false,   false, false, "real time signal 12"                           );
-    AddSignal (47,   "SIGRTMIN+13",   false,   false, false, "real time signal 13"                           );
-    AddSignal (48,   "SIGRTMIN+14",   false,   false, false, "real time signal 14"                           );
-    AddSignal (49,   "SIGRTMIN+15",   false,   false, false, "real time signal 15"                           );
-    AddSignal (50,   "SIGRTMAX-14",   false,   false, false, "real time signal 16"                           ); // switching to SIGRTMAX-xxx to match "kill -l" output
-    AddSignal (51,   "SIGRTMAX-13",   false,   false, false, "real time signal 17"                           );
-    AddSignal (52,   "SIGRTMAX-12",   false,   false, false, "real time signal 18"                           );
-    AddSignal (53,   "SIGRTMAX-11",   false,   false, false, "real time signal 19"                           );
-    AddSignal (54,   "SIGRTMAX-10",   false,   false, false, "real time signal 20"                           );
-    AddSignal (55,   "SIGRTMAX-9",    false,   false, false, "real time signal 21"                           );
-    AddSignal (56,   "SIGRTMAX-8",    false,   false, false, "real time signal 22"                           );
-    AddSignal (57,   "SIGRTMAX-7",    false,   false, false, "real time signal 23"                           );
-    AddSignal (58,   "SIGRTMAX-6",    false,   false, false, "real time signal 24"                           );
-    AddSignal (59,   "SIGRTMAX-5",    false,   false, false, "real time signal 25"                           );
-    AddSignal (60,   "SIGRTMAX-4",    false,   false, false, "real time signal 26"                           );
-    AddSignal (61,   "SIGRTMAX-3",    false,   false, false, "real time signal 27"                           );
-    AddSignal (62,   "SIGRTMAX-2",    false,   false, false, "real time signal 28"                           );
-    AddSignal (63,   "SIGRTMAX-1",    false,   false, false, "real time signal 29"                           );
-    AddSignal (64,   "SIGRTMAX",      false,   false, false, "real time signal 30"                           );
+void LinuxSignals::Reset() {
+  m_signals.clear();
+  //        SIGNO  NAME             SUPPRESS STOP   NOTIFY DESCRIPTION ALIAS
+  //        =====  ===========      ======== =====  ======
+  //        ======================================   ======
+  AddSignal(1, "SIGHUP", false, true, true, "hangup");
+  AddSignal(2, "SIGINT", true, true, true, "interrupt");
+  AddSignal(3, "SIGQUIT", false, true, true, "quit");
+  AddSignal(4, "SIGILL", false, true, true, "illegal instruction");
+  AddSignal(5, "SIGTRAP", true, true, true,
+            "trace trap (not reset when caught)");
+  AddSignal(6, "SIGABRT", false, true, true, "abort()/IOT trap", "SIGIOT");
+  AddSignal(7, "SIGBUS", false, true, true, "bus error");
+  AddSignal(8, "SIGFPE", false, true, true, "floating point exception");
+  AddSignal(9, "SIGKILL", false, true, true, "kill");
+  AddSignal(10, "SIGUSR1", false, true, true, "user defined signal 1");
+  AddSignal(11, "SIGSEGV", false, true, true, "segmentation violation");
+  AddSignal(12, "SIGUSR2", false, true, true, "user defined signal 2");
+  AddSignal(13, "SIGPIPE", false, true, true,
+            "write to pipe with reading end closed");
+  AddSignal(14, "SIGALRM", false, false, false, "alarm");
+  AddSignal(15, "SIGTERM", false, true, true, "termination requested");
+  AddSignal(16, "SIGSTKFLT", false, true, true, "stack fault");
+  AddSignal(17, "SIGCHLD", false, false, true, "child status has changed",
+            "SIGCLD");
+  AddSignal(18, "SIGCONT", false, true, true, "process continue");
+  AddSignal(19, "SIGSTOP", true, true, true, "process stop");
+  AddSignal(20, "SIGTSTP", false, true, true, "tty stop");
+  AddSignal(21, "SIGTTIN", false, true, true, "background tty read");
+  AddSignal(22, "SIGTTOU", false, true, true, "background tty write");
+  AddSignal(23, "SIGURG", false, true, true, "urgent data on socket");
+  AddSignal(24, "SIGXCPU", false, true, true, "CPU resource exceeded");
+  AddSignal(25, "SIGXFSZ", false, true, true, "file size limit exceeded");
+  AddSignal(26, "SIGVTALRM", false, true, true, "virtual time alarm");
+  AddSignal(27, "SIGPROF", false, false, false, "profiling time alarm");
+  AddSignal(28, "SIGWINCH", false, true, true, "window size changes");
+  AddSignal(29, "SIGIO", false, true, true, "input/output ready/Pollable event",
+            "SIGPOLL");
+  AddSignal(30, "SIGPWR", false, true, true, "power failure");
+  AddSignal(31, "SIGSYS", false, true, true, "invalid system call");
+  AddSignal(32, "SIG32", false, false, false,
+            "threading library internal signal 1");
+  AddSignal(33, "SIG33", false, false, false,
+            "threading library internal signal 2");
+  AddSignal(34, "SIGRTMIN", false, false, false, "real time signal 0");
+  AddSignal(35, "SIGRTMIN+1", false, false, false, "real time signal 1");
+  AddSignal(36, "SIGRTMIN+2", false, false, false, "real time signal 2");
+  AddSignal(37, "SIGRTMIN+3", false, false, false, "real time signal 3");
+  AddSignal(38, "SIGRTMIN+4", false, false, false, "real time signal 4");
+  AddSignal(39, "SIGRTMIN+5", false, false, false, "real time signal 5");
+  AddSignal(40, "SIGRTMIN+6", false, false, false, "real time signal 6");
+  AddSignal(41, "SIGRTMIN+7", false, false, false, "real time signal 7");
+  AddSignal(42, "SIGRTMIN+8", false, false, false, "real time signal 8");
+  AddSignal(43, "SIGRTMIN+9", false, false, false, "real time signal 9");
+  AddSignal(44, "SIGRTMIN+10", false, false, false, "real time signal 10");
+  AddSignal(45, "SIGRTMIN+11", false, false, false, "real time signal 11");
+  AddSignal(46, "SIGRTMIN+12", false, false, false, "real time signal 12");
+  AddSignal(47, "SIGRTMIN+13", false, false, false, "real time signal 13");
+  AddSignal(48, "SIGRTMIN+14", false, false, false, "real time signal 14");
+  AddSignal(49, "SIGRTMIN+15", false, false, false, "real time signal 15");
+  AddSignal(50, "SIGRTMAX-14", false, false, false,
+            "real time signal 16"); // switching to SIGRTMAX-xxx to match "kill
+                                    // -l" output
+  AddSignal(51, "SIGRTMAX-13", false, false, false, "real time signal 17");
+  AddSignal(52, "SIGRTMAX-12", false, false, false, "real time signal 18");
+  AddSignal(53, "SIGRTMAX-11", false, false, false, "real time signal 19");
+  AddSignal(54, "SIGRTMAX-10", false, false, false, "real time signal 20");
+  AddSignal(55, "SIGRTMAX-9", false, false, false, "real time signal 21");
+  AddSignal(56, "SIGRTMAX-8", false, false, false, "real time signal 22");
+  AddSignal(57, "SIGRTMAX-7", false, false, false, "real time signal 23");
+  AddSignal(58, "SIGRTMAX-6", false, false, false, "real time signal 24");
+  AddSignal(59, "SIGRTMAX-5", false, false, false, "real time signal 25");
+  AddSignal(60, "SIGRTMAX-4", false, false, false, "real time signal 26");
+  AddSignal(61, "SIGRTMAX-3", false, false, false, "real time signal 27");
+  AddSignal(62, "SIGRTMAX-2", false, false, false, "real time signal 28");
+  AddSignal(63, "SIGRTMAX-1", false, false, false, "real time signal 29");
+  AddSignal(64, "SIGRTMAX", false, false, false, "real time signal 30");
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/LinuxSignals.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/LinuxSignals.h
index dd9062f..e411262 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/LinuxSignals.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/LinuxSignals.h
@@ -19,14 +19,12 @@
 namespace lldb_private {
 
 /// Linux specific set of Unix signals.
-class LinuxSignals : public UnixSignals
-{
+class LinuxSignals : public UnixSignals {
 public:
-    LinuxSignals();
+  LinuxSignals();
 
 private:
-    void
-    Reset() override;
+  void Reset() override;
 };
 
 } // namespace lldb_private
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/MipsLinuxSignals.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/MipsLinuxSignals.cpp
index 422fc9b..3623102 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/MipsLinuxSignals.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/MipsLinuxSignals.cpp
@@ -1,4 +1,5 @@
-//===-- MipsLinuxSignals.cpp ----------------------------------------*- C++ -*-===//
+//===-- MipsLinuxSignals.cpp ----------------------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -14,80 +15,83 @@
 
 using namespace lldb_private;
 
-MipsLinuxSignals::MipsLinuxSignals()
-    : UnixSignals()
-{
-    Reset();
-}
+MipsLinuxSignals::MipsLinuxSignals() : UnixSignals() { Reset(); }
 
-void
-MipsLinuxSignals::Reset()
-{
-    m_signals.clear();
-    //        SIGNO  NAME            SUPPRESS STOP   NOTIFY DESCRIPTION                              ALIAS
-    //        =====  ===========     ======== =====  ====== ======================================   ========
-    AddSignal (1,    "SIGHUP",       false,   true , true , "hangup"                                         );
-    AddSignal (2,    "SIGINT",       true ,   true , true , "interrupt"                                      );
-    AddSignal (3,    "SIGQUIT",      false,   true , true , "quit"                                           );
-    AddSignal (4,    "SIGILL",       false,   true , true , "illegal instruction"                            );
-    AddSignal (5,    "SIGTRAP",      true ,   true , true , "trace trap (not reset when caught)"             );
-    AddSignal (6,    "SIGABRT",      false,   true , true , "abort()/IOT trap",                      "SIGIOT");
-    AddSignal (7,    "SIGEMT",       false,   true , true , "terminate process with core dump"               );
-    AddSignal (8,    "SIGFPE",       false,   true , true , "floating point exception"                       );
-    AddSignal (9,    "SIGKILL",      false,   true , true , "kill"                                           );
-    AddSignal (10,   "SIGBUS",       false,   true , true , "bus error"                                      );
-    AddSignal (11,   "SIGSEGV",      false,   true , true , "segmentation violation"                         );
-    AddSignal (12,   "SIGSYS",       false,   true , true , "invalid system call"                            );
-    AddSignal (13,   "SIGPIPE",      false,   true , true , "write to pipe with reading end closed"          );
-    AddSignal (14,   "SIGALRM",      false,   false, false, "alarm"                                          );
-    AddSignal (15,   "SIGTERM",      false,   true , true , "termination requested"                          );
-    AddSignal (16,   "SIGUSR1",      false,   true , true , "user defined signal 1"                          );
-    AddSignal (17,   "SIGUSR2",      false,   true , true , "user defined signal 2"                          );
-    AddSignal (18,   "SIGCHLD",      false,   false, true , "child status has changed",              "SIGCLD");
-    AddSignal (19,   "SIGPWR",       false,   true , true , "power failure"                                  );
-    AddSignal (20,   "SIGWINCH",     false,   true , true , "window size changes"                            );
-    AddSignal (21,   "SIGURG",       false,   true , true , "urgent data on socket"                          );
-    AddSignal (22,   "SIGIO",        false,   true , true , "input/output ready/Pollable event",    "SIGPOLL");
-    AddSignal (23,   "SIGSTOP",      true ,   true , true , "process stop"                                   );
-    AddSignal (24,   "SIGTSTP",      false,   true , true , "tty stop"                                       );
-    AddSignal (25,   "SIGCONT",      false,   true , true , "process continue"                               );
-    AddSignal (26,   "SIGTTIN",      false,   true , true , "background tty read"                            );
-    AddSignal (27,   "SIGTTOU",      false,   true , true , "background tty write"                           );
-    AddSignal (28,   "SIGVTALRM",    false,   true , true , "virtual time alarm"                             );
-    AddSignal (29,   "SIGPROF",      false,   false, false, "profiling time alarm"                           );
-    AddSignal (30,   "SIGXCPU",      false,   true , true , "CPU resource exceeded"                          );
-    AddSignal (31,   "SIGXFSZ",      false,   true , true , "file size limit exceeded"                       );
-    AddSignal (32,   "SIG32",        false,   false, false, "threading library internal signal 1"            );
-    AddSignal (33,   "SIG33",        false,   false, false, "threading library internal signal 2"            );
-    AddSignal (34,   "SIGRTMIN",     false,   false, false, "real time signal 0"                             );
-    AddSignal (35,   "SIGRTMIN+1",   false,   false, false, "real time signal 1"                             );
-    AddSignal (36,   "SIGRTMIN+2",   false,   false, false, "real time signal 2"                             );
-    AddSignal (37,   "SIGRTMIN+3",   false,   false, false, "real time signal 3"                             );
-    AddSignal (38,   "SIGRTMIN+4",   false,   false, false, "real time signal 4"                             );
-    AddSignal (39,   "SIGRTMIN+5",   false,   false, false, "real time signal 5"                             );
-    AddSignal (40,   "SIGRTMIN+6",   false,   false, false, "real time signal 6"                             );
-    AddSignal (41,   "SIGRTMIN+7",   false,   false, false, "real time signal 7"                             );
-    AddSignal (42,   "SIGRTMIN+8",   false,   false, false, "real time signal 8"                             );
-    AddSignal (43,   "SIGRTMIN+9",   false,   false, false, "real time signal 9"                             );
-    AddSignal (44,   "SIGRTMIN+10",  false,   false, false, "real time signal 10"                            );
-    AddSignal (45,   "SIGRTMIN+11",  false,   false, false, "real time signal 11"                            );
-    AddSignal (46,   "SIGRTMIN+12",  false,   false, false, "real time signal 12"                            );
-    AddSignal (47,   "SIGRTMIN+13",  false,   false, false, "real time signal 13"                            );
-    AddSignal (48,   "SIGRTMIN+14",  false,   false, false, "real time signal 14"                            );
-    AddSignal (49,   "SIGRTMIN+15",  false,   false, false, "real time signal 15"                            );
-    AddSignal (50,   "SIGRTMAX-14",  false,   false, false, "real time signal 16"                            ); // switching to SIGRTMAX-xxx to match "kill -l" output
-    AddSignal (51,   "SIGRTMAX-13",  false,   false, false, "real time signal 17"                            );
-    AddSignal (52,   "SIGRTMAX-12",  false,   false, false, "real time signal 18"                            );
-    AddSignal (53,   "SIGRTMAX-11",  false,   false, false, "real time signal 19"                            );
-    AddSignal (54,   "SIGRTMAX-10",  false,   false, false, "real time signal 20"                            );
-    AddSignal (55,   "SIGRTMAX-9",   false,   false, false, "real time signal 21"                            );
-    AddSignal (56,   "SIGRTMAX-8",   false,   false, false, "real time signal 22"                            );
-    AddSignal (57,   "SIGRTMAX-7",   false,   false, false, "real time signal 23"                            );
-    AddSignal (58,   "SIGRTMAX-6",   false,   false, false, "real time signal 24"                            );
-    AddSignal (59,   "SIGRTMAX-5",   false,   false, false, "real time signal 25"                            );
-    AddSignal (60,   "SIGRTMAX-4",   false,   false, false, "real time signal 26"                            );
-    AddSignal (61,   "SIGRTMAX-3",   false,   false, false, "real time signal 27"                            );
-    AddSignal (62,   "SIGRTMAX-2",   false,   false, false, "real time signal 28"                            );
-    AddSignal (63,   "SIGRTMAX-1",   false,   false, false, "real time signal 29"                            );
-    AddSignal (64,   "SIGRTMAX",     false,   false, false, "real time signal 30"                            );
+void MipsLinuxSignals::Reset() {
+  m_signals.clear();
+  //        SIGNO  NAME            SUPPRESS STOP   NOTIFY DESCRIPTION ALIAS
+  //        =====  ===========     ======== =====  ======
+  //        ======================================   ========
+  AddSignal(1, "SIGHUP", false, true, true, "hangup");
+  AddSignal(2, "SIGINT", true, true, true, "interrupt");
+  AddSignal(3, "SIGQUIT", false, true, true, "quit");
+  AddSignal(4, "SIGILL", false, true, true, "illegal instruction");
+  AddSignal(5, "SIGTRAP", true, true, true,
+            "trace trap (not reset when caught)");
+  AddSignal(6, "SIGABRT", false, true, true, "abort()/IOT trap", "SIGIOT");
+  AddSignal(7, "SIGEMT", false, true, true, "terminate process with core dump");
+  AddSignal(8, "SIGFPE", false, true, true, "floating point exception");
+  AddSignal(9, "SIGKILL", false, true, true, "kill");
+  AddSignal(10, "SIGBUS", false, true, true, "bus error");
+  AddSignal(11, "SIGSEGV", false, true, true, "segmentation violation");
+  AddSignal(12, "SIGSYS", false, true, true, "invalid system call");
+  AddSignal(13, "SIGPIPE", false, true, true,
+            "write to pipe with reading end closed");
+  AddSignal(14, "SIGALRM", false, false, false, "alarm");
+  AddSignal(15, "SIGTERM", false, true, true, "termination requested");
+  AddSignal(16, "SIGUSR1", false, true, true, "user defined signal 1");
+  AddSignal(17, "SIGUSR2", false, true, true, "user defined signal 2");
+  AddSignal(18, "SIGCHLD", false, false, true, "child status has changed",
+            "SIGCLD");
+  AddSignal(19, "SIGPWR", false, true, true, "power failure");
+  AddSignal(20, "SIGWINCH", false, true, true, "window size changes");
+  AddSignal(21, "SIGURG", false, true, true, "urgent data on socket");
+  AddSignal(22, "SIGIO", false, true, true, "input/output ready/Pollable event",
+            "SIGPOLL");
+  AddSignal(23, "SIGSTOP", true, true, true, "process stop");
+  AddSignal(24, "SIGTSTP", false, true, true, "tty stop");
+  AddSignal(25, "SIGCONT", false, true, true, "process continue");
+  AddSignal(26, "SIGTTIN", false, true, true, "background tty read");
+  AddSignal(27, "SIGTTOU", false, true, true, "background tty write");
+  AddSignal(28, "SIGVTALRM", false, true, true, "virtual time alarm");
+  AddSignal(29, "SIGPROF", false, false, false, "profiling time alarm");
+  AddSignal(30, "SIGXCPU", false, true, true, "CPU resource exceeded");
+  AddSignal(31, "SIGXFSZ", false, true, true, "file size limit exceeded");
+  AddSignal(32, "SIG32", false, false, false,
+            "threading library internal signal 1");
+  AddSignal(33, "SIG33", false, false, false,
+            "threading library internal signal 2");
+  AddSignal(34, "SIGRTMIN", false, false, false, "real time signal 0");
+  AddSignal(35, "SIGRTMIN+1", false, false, false, "real time signal 1");
+  AddSignal(36, "SIGRTMIN+2", false, false, false, "real time signal 2");
+  AddSignal(37, "SIGRTMIN+3", false, false, false, "real time signal 3");
+  AddSignal(38, "SIGRTMIN+4", false, false, false, "real time signal 4");
+  AddSignal(39, "SIGRTMIN+5", false, false, false, "real time signal 5");
+  AddSignal(40, "SIGRTMIN+6", false, false, false, "real time signal 6");
+  AddSignal(41, "SIGRTMIN+7", false, false, false, "real time signal 7");
+  AddSignal(42, "SIGRTMIN+8", false, false, false, "real time signal 8");
+  AddSignal(43, "SIGRTMIN+9", false, false, false, "real time signal 9");
+  AddSignal(44, "SIGRTMIN+10", false, false, false, "real time signal 10");
+  AddSignal(45, "SIGRTMIN+11", false, false, false, "real time signal 11");
+  AddSignal(46, "SIGRTMIN+12", false, false, false, "real time signal 12");
+  AddSignal(47, "SIGRTMIN+13", false, false, false, "real time signal 13");
+  AddSignal(48, "SIGRTMIN+14", false, false, false, "real time signal 14");
+  AddSignal(49, "SIGRTMIN+15", false, false, false, "real time signal 15");
+  AddSignal(50, "SIGRTMAX-14", false, false, false,
+            "real time signal 16"); // switching to SIGRTMAX-xxx to match "kill
+                                    // -l" output
+  AddSignal(51, "SIGRTMAX-13", false, false, false, "real time signal 17");
+  AddSignal(52, "SIGRTMAX-12", false, false, false, "real time signal 18");
+  AddSignal(53, "SIGRTMAX-11", false, false, false, "real time signal 19");
+  AddSignal(54, "SIGRTMAX-10", false, false, false, "real time signal 20");
+  AddSignal(55, "SIGRTMAX-9", false, false, false, "real time signal 21");
+  AddSignal(56, "SIGRTMAX-8", false, false, false, "real time signal 22");
+  AddSignal(57, "SIGRTMAX-7", false, false, false, "real time signal 23");
+  AddSignal(58, "SIGRTMAX-6", false, false, false, "real time signal 24");
+  AddSignal(59, "SIGRTMAX-5", false, false, false, "real time signal 25");
+  AddSignal(60, "SIGRTMAX-4", false, false, false, "real time signal 26");
+  AddSignal(61, "SIGRTMAX-3", false, false, false, "real time signal 27");
+  AddSignal(62, "SIGRTMAX-2", false, false, false, "real time signal 28");
+  AddSignal(63, "SIGRTMAX-1", false, false, false, "real time signal 29");
+  AddSignal(64, "SIGRTMAX", false, false, false, "real time signal 30");
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/MipsLinuxSignals.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/MipsLinuxSignals.h
index a5041b5..e48ea59 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/MipsLinuxSignals.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/MipsLinuxSignals.h
@@ -1,4 +1,5 @@
-//===-- MipsLinuxSignals.h ------------------------------------------*- C++ -*-===//
+//===-- MipsLinuxSignals.h ------------------------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -19,14 +20,12 @@
 namespace lldb_private {
 
 /// Linux specific set of Unix signals.
-class MipsLinuxSignals : public UnixSignals
-{
+class MipsLinuxSignals : public UnixSignals {
 public:
-    MipsLinuxSignals();
+  MipsLinuxSignals();
 
 private:
-    void
-    Reset() override;
+  void Reset() override;
 };
 
 } // namespace lldb_private
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/NetBSDSignals.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/NetBSDSignals.cpp
index 5dce516..9b9db51 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/NetBSDSignals.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/NetBSDSignals.cpp
@@ -15,20 +15,16 @@
 
 using namespace lldb_private;
 
-NetBSDSignals::NetBSDSignals()
-    : UnixSignals()
-{
-    Reset();
-}
+NetBSDSignals::NetBSDSignals() : UnixSignals() { Reset(); }
 
-void
-NetBSDSignals::Reset()
-{
-    UnixSignals::Reset();
-    //        SIGNO  NAME          SUPPRESS STOP   NOTIFY DESCRIPTION
-    //        ====== ============  ======== ====== ====== ===================================================
-    AddSignal (32,   "SIGPWR",     false,   true , true , "power fail/restart (not reset when caught)");
+void NetBSDSignals::Reset() {
+  UnixSignals::Reset();
+  //        SIGNO  NAME          SUPPRESS STOP   NOTIFY DESCRIPTION
+  //        ====== ============  ======== ====== ======
+  //        ===================================================
+  AddSignal(32, "SIGPWR", false, true, true,
+            "power fail/restart (not reset when caught)");
 #ifdef SIGRTMIN /* SIGRTMAX */
-    /* Kernel only; not exposed to userland yet */
+                /* Kernel only; not exposed to userland yet */
 #endif
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/NetBSDSignals.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/NetBSDSignals.h
index 441402b..4338f88 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/NetBSDSignals.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/NetBSDSignals.h
@@ -16,14 +16,12 @@
 namespace lldb_private {
 
 /// NetBSD specific set of Unix signals.
-class NetBSDSignals : public UnixSignals
-{
+class NetBSDSignals : public UnixSignals {
 public:
-    NetBSDSignals();
+  NetBSDSignals();
 
 private:
-    void
-    Reset() override;
+  void Reset() override;
 };
 
 } // namespace lldb_private
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
index 1d0fc4f..52ace56 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
@@ -42,403 +42,926 @@
 using namespace lldb;
 using namespace lldb_private;
 
-enum
-{
-    gpr_r0 = 0,
-    gpr_r1,
-    gpr_r2,
-    gpr_r3,
-    gpr_r4,
-    gpr_r5,
-    gpr_r6,
-    gpr_r7,
-    gpr_r8,
-    gpr_r9,
-    gpr_r10,
-    gpr_r11,
-    gpr_r12,
-    gpr_r13, gpr_sp = gpr_r13,
-    gpr_r14, gpr_lr = gpr_r14,
-    gpr_r15, gpr_pc = gpr_r15,
-    gpr_cpsr,
-
-    fpu_s0,
-    fpu_s1,
-    fpu_s2,
-    fpu_s3,
-    fpu_s4,
-    fpu_s5,
-    fpu_s6,
-    fpu_s7,
-    fpu_s8,
-    fpu_s9,
-    fpu_s10,
-    fpu_s11,
-    fpu_s12,
-    fpu_s13,
-    fpu_s14,
-    fpu_s15,
-    fpu_s16,
-    fpu_s17,
-    fpu_s18,
-    fpu_s19,
-    fpu_s20,
-    fpu_s21,
-    fpu_s22,
-    fpu_s23,
-    fpu_s24,
-    fpu_s25,
-    fpu_s26,
-    fpu_s27,
-    fpu_s28,
-    fpu_s29,
-    fpu_s30,
-    fpu_s31,
-    fpu_fpscr,
-
-    exc_exception,
-    exc_fsr,
-    exc_far,
-
-    dbg_bvr0,
-    dbg_bvr1,
-    dbg_bvr2,
-    dbg_bvr3,
-    dbg_bvr4,
-    dbg_bvr5,
-    dbg_bvr6,
-    dbg_bvr7,
-    dbg_bvr8,
-    dbg_bvr9,
-    dbg_bvr10,
-    dbg_bvr11,
-    dbg_bvr12,
-    dbg_bvr13,
-    dbg_bvr14,
-    dbg_bvr15,
-
-    dbg_bcr0,
-    dbg_bcr1,
-    dbg_bcr2,
-    dbg_bcr3,
-    dbg_bcr4,
-    dbg_bcr5,
-    dbg_bcr6,
-    dbg_bcr7,
-    dbg_bcr8,
-    dbg_bcr9,
-    dbg_bcr10,
-    dbg_bcr11,
-    dbg_bcr12,
-    dbg_bcr13,
-    dbg_bcr14,
-    dbg_bcr15,
-
-    dbg_wvr0,
-    dbg_wvr1,
-    dbg_wvr2,
-    dbg_wvr3,
-    dbg_wvr4,
-    dbg_wvr5,
-    dbg_wvr6,
-    dbg_wvr7,
-    dbg_wvr8,
-    dbg_wvr9,
-    dbg_wvr10,
-    dbg_wvr11,
-    dbg_wvr12,
-    dbg_wvr13,
-    dbg_wvr14,
-    dbg_wvr15,
-
-    dbg_wcr0,
-    dbg_wcr1,
-    dbg_wcr2,
-    dbg_wcr3,
-    dbg_wcr4,
-    dbg_wcr5,
-    dbg_wcr6,
-    dbg_wcr7,
-    dbg_wcr8,
-    dbg_wcr9,
-    dbg_wcr10,
-    dbg_wcr11,
-    dbg_wcr12,
-    dbg_wcr13,
-    dbg_wcr14,
-    dbg_wcr15,
-
-    k_num_registers
+enum {
+  gpr_r0 = 0,
+  gpr_r1,
+  gpr_r2,
+  gpr_r3,
+  gpr_r4,
+  gpr_r5,
+  gpr_r6,
+  gpr_r7,
+  gpr_r8,
+  gpr_r9,
+  gpr_r10,
+  gpr_r11,
+  gpr_r12,
+  gpr_r13,
+  gpr_sp = gpr_r13,
+  gpr_r14,
+  gpr_lr = gpr_r14,
+  gpr_r15,
+  gpr_pc = gpr_r15,
+  gpr_cpsr,
+
+  fpu_s0,
+  fpu_s1,
+  fpu_s2,
+  fpu_s3,
+  fpu_s4,
+  fpu_s5,
+  fpu_s6,
+  fpu_s7,
+  fpu_s8,
+  fpu_s9,
+  fpu_s10,
+  fpu_s11,
+  fpu_s12,
+  fpu_s13,
+  fpu_s14,
+  fpu_s15,
+  fpu_s16,
+  fpu_s17,
+  fpu_s18,
+  fpu_s19,
+  fpu_s20,
+  fpu_s21,
+  fpu_s22,
+  fpu_s23,
+  fpu_s24,
+  fpu_s25,
+  fpu_s26,
+  fpu_s27,
+  fpu_s28,
+  fpu_s29,
+  fpu_s30,
+  fpu_s31,
+  fpu_fpscr,
+
+  exc_exception,
+  exc_fsr,
+  exc_far,
+
+  dbg_bvr0,
+  dbg_bvr1,
+  dbg_bvr2,
+  dbg_bvr3,
+  dbg_bvr4,
+  dbg_bvr5,
+  dbg_bvr6,
+  dbg_bvr7,
+  dbg_bvr8,
+  dbg_bvr9,
+  dbg_bvr10,
+  dbg_bvr11,
+  dbg_bvr12,
+  dbg_bvr13,
+  dbg_bvr14,
+  dbg_bvr15,
+
+  dbg_bcr0,
+  dbg_bcr1,
+  dbg_bcr2,
+  dbg_bcr3,
+  dbg_bcr4,
+  dbg_bcr5,
+  dbg_bcr6,
+  dbg_bcr7,
+  dbg_bcr8,
+  dbg_bcr9,
+  dbg_bcr10,
+  dbg_bcr11,
+  dbg_bcr12,
+  dbg_bcr13,
+  dbg_bcr14,
+  dbg_bcr15,
+
+  dbg_wvr0,
+  dbg_wvr1,
+  dbg_wvr2,
+  dbg_wvr3,
+  dbg_wvr4,
+  dbg_wvr5,
+  dbg_wvr6,
+  dbg_wvr7,
+  dbg_wvr8,
+  dbg_wvr9,
+  dbg_wvr10,
+  dbg_wvr11,
+  dbg_wvr12,
+  dbg_wvr13,
+  dbg_wvr14,
+  dbg_wvr15,
+
+  dbg_wcr0,
+  dbg_wcr1,
+  dbg_wcr2,
+  dbg_wcr3,
+  dbg_wcr4,
+  dbg_wcr5,
+  dbg_wcr6,
+  dbg_wcr7,
+  dbg_wcr8,
+  dbg_wcr9,
+  dbg_wcr10,
+  dbg_wcr11,
+  dbg_wcr12,
+  dbg_wcr13,
+  dbg_wcr14,
+  dbg_wcr15,
+
+  k_num_registers
 };
 
-
-#define GPR_OFFSET(idx) ((idx) * 4)
-#define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextDarwin_arm::GPR))
-#define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU))
-#define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextDarwin_arm::DBG, reg) + sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU) + sizeof (RegisterContextDarwin_arm::EXC)))
-
-#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextDarwin_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU) + sizeof (RegisterContextDarwin_arm::EXC))
+#define GPR_OFFSET(idx) ((idx)*4)
+#define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterContextDarwin_arm::GPR))
+#define EXC_OFFSET(idx)                                                        \
+  ((idx)*4 + sizeof(RegisterContextDarwin_arm::GPR) +                          \
+   sizeof(RegisterContextDarwin_arm::FPU))
+#define DBG_OFFSET(reg)                                                        \
+  ((LLVM_EXTENSION offsetof(RegisterContextDarwin_arm::DBG, reg) +             \
+    sizeof(RegisterContextDarwin_arm::GPR) +                                   \
+    sizeof(RegisterContextDarwin_arm::FPU) +                                   \
+    sizeof(RegisterContextDarwin_arm::EXC)))
+
+#define DEFINE_DBG(reg, i)                                                     \
+  #reg, NULL, sizeof(((RegisterContextDarwin_arm::DBG *) NULL)->reg[i]),       \
+                      DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex,           \
+                                 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,    \
+                                  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,    \
+                                  LLDB_INVALID_REGNUM },                       \
+                                  nullptr, nullptr, nullptr, 0
+#define REG_CONTEXT_SIZE                                                       \
+  (sizeof(RegisterContextDarwin_arm::GPR) +                                    \
+   sizeof(RegisterContextDarwin_arm::FPU) +                                    \
+   sizeof(RegisterContextDarwin_arm::EXC))
 
 static RegisterInfo g_register_infos[] = {
-// General purpose registers
-//  NAME        ALT     SZ  OFFSET              ENCODING        FORMAT          EH_FRAME                DWARF               GENERIC                     PROCESS PLUGIN          LLDB NATIVE   VALUE REGS    INVALIDATE REGS
-//  ======      ======= ==  =============       =============   ============    ===============         ===============     =========================   =====================   ============= ==========    ===============
-{   "r0",       NULL,   4,  GPR_OFFSET(0),      eEncodingUint,  eFormatHex,     { ehframe_r0,               dwarf_r0,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    gpr_r0      },      NULL,              NULL},
-{   "r1",       NULL,   4,  GPR_OFFSET(1),      eEncodingUint,  eFormatHex,     { ehframe_r1,               dwarf_r1,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    gpr_r1      },      NULL,              NULL},
-{   "r2",       NULL,   4,  GPR_OFFSET(2),      eEncodingUint,  eFormatHex,     { ehframe_r2,               dwarf_r2,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    gpr_r2      },      NULL,              NULL},
-{   "r3",       NULL,   4,  GPR_OFFSET(3),      eEncodingUint,  eFormatHex,     { ehframe_r3,               dwarf_r3,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    gpr_r3      },      NULL,              NULL},
-{   "r4",       NULL,   4,  GPR_OFFSET(4),      eEncodingUint,  eFormatHex,     { ehframe_r4,               dwarf_r4,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    gpr_r4      },      NULL,              NULL},
-{   "r5",       NULL,   4,  GPR_OFFSET(5),      eEncodingUint,  eFormatHex,     { ehframe_r5,               dwarf_r5,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    gpr_r5      },      NULL,              NULL},
-{   "r6",       NULL,   4,  GPR_OFFSET(6),      eEncodingUint,  eFormatHex,     { ehframe_r6,               dwarf_r6,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    gpr_r6      },      NULL,              NULL},
-{   "r7",       NULL,   4,  GPR_OFFSET(7),      eEncodingUint,  eFormatHex,     { ehframe_r7,               dwarf_r7,           LLDB_REGNUM_GENERIC_FP,     LLDB_INVALID_REGNUM,    gpr_r7      },      NULL,              NULL},
-{   "r8",       NULL,   4,  GPR_OFFSET(8),      eEncodingUint,  eFormatHex,     { ehframe_r8,               dwarf_r8,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    gpr_r8      },      NULL,              NULL},
-{   "r9",       NULL,   4,  GPR_OFFSET(9),      eEncodingUint,  eFormatHex,     { ehframe_r9,               dwarf_r9,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    gpr_r9      },      NULL,              NULL},
-{   "r10",      NULL,   4,  GPR_OFFSET(10),     eEncodingUint,  eFormatHex,     { ehframe_r10,              dwarf_r10,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    gpr_r10     },      NULL,              NULL},
-{   "r11",      NULL,   4,  GPR_OFFSET(11),     eEncodingUint,  eFormatHex,     { ehframe_r11,              dwarf_r11,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    gpr_r11     },      NULL,              NULL},
-{   "r12",      NULL,   4,  GPR_OFFSET(12),     eEncodingUint,  eFormatHex,     { ehframe_r12,              dwarf_r12,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    gpr_r12     },      NULL,              NULL},
-{   "sp",       "r13",  4,  GPR_OFFSET(13),     eEncodingUint,  eFormatHex,     { ehframe_sp,               dwarf_sp,           LLDB_REGNUM_GENERIC_SP,     LLDB_INVALID_REGNUM,    gpr_sp      },      NULL,              NULL},
-{   "lr",       "r14",  4,  GPR_OFFSET(14),     eEncodingUint,  eFormatHex,     { ehframe_lr,               dwarf_lr,           LLDB_REGNUM_GENERIC_RA,     LLDB_INVALID_REGNUM,    gpr_lr      },      NULL,              NULL},
-{   "pc",       "r15",  4,  GPR_OFFSET(15),     eEncodingUint,  eFormatHex,     { ehframe_pc,               dwarf_pc,           LLDB_REGNUM_GENERIC_PC,     LLDB_INVALID_REGNUM,    gpr_pc      },      NULL,              NULL},
-{   "cpsr",     "psr",  4,  GPR_OFFSET(16),     eEncodingUint,  eFormatHex,     { ehframe_cpsr,             dwarf_cpsr,         LLDB_REGNUM_GENERIC_FLAGS,  LLDB_INVALID_REGNUM,    gpr_cpsr    },      NULL,              NULL},
-
-{   "s0",       NULL,   4,  FPU_OFFSET(0),      eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s0,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s0      },      NULL,              NULL},
-{   "s1",       NULL,   4,  FPU_OFFSET(1),      eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s1,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s1      },      NULL,              NULL},
-{   "s2",       NULL,   4,  FPU_OFFSET(2),      eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s2,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s2      },      NULL,              NULL},
-{   "s3",       NULL,   4,  FPU_OFFSET(3),      eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s3,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s3      },      NULL,              NULL},
-{   "s4",       NULL,   4,  FPU_OFFSET(4),      eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s4,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s4      },      NULL,              NULL},
-{   "s5",       NULL,   4,  FPU_OFFSET(5),      eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s5,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s5      },      NULL,              NULL},
-{   "s6",       NULL,   4,  FPU_OFFSET(6),      eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s6,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s6      },      NULL,              NULL},
-{   "s7",       NULL,   4,  FPU_OFFSET(7),      eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s7,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s7      },      NULL,              NULL},
-{   "s8",       NULL,   4,  FPU_OFFSET(8),      eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s8,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s8      },      NULL,              NULL},
-{   "s9",       NULL,   4,  FPU_OFFSET(9),      eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s9,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s9      },      NULL,              NULL},
-{   "s10",      NULL,   4,  FPU_OFFSET(10),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s10,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s10     },      NULL,              NULL},
-{   "s11",      NULL,   4,  FPU_OFFSET(11),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s11,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s11     },      NULL,              NULL},
-{   "s12",      NULL,   4,  FPU_OFFSET(12),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s12,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s12     },      NULL,              NULL},
-{   "s13",      NULL,   4,  FPU_OFFSET(13),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s13,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s13     },      NULL,              NULL},
-{   "s14",      NULL,   4,  FPU_OFFSET(14),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s14,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s14     },      NULL,              NULL},
-{   "s15",      NULL,   4,  FPU_OFFSET(15),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s15,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s15     },      NULL,              NULL},
-{   "s16",      NULL,   4,  FPU_OFFSET(16),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s16,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s16     },      NULL,              NULL},
-{   "s17",      NULL,   4,  FPU_OFFSET(17),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s17,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s17     },      NULL,              NULL},
-{   "s18",      NULL,   4,  FPU_OFFSET(18),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s18,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s18     },      NULL,              NULL},
-{   "s19",      NULL,   4,  FPU_OFFSET(19),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s19,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s19     },      NULL,              NULL},
-{   "s20",      NULL,   4,  FPU_OFFSET(20),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s20,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s20     },      NULL,              NULL},
-{   "s21",      NULL,   4,  FPU_OFFSET(21),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s21,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s21     },      NULL,              NULL},
-{   "s22",      NULL,   4,  FPU_OFFSET(22),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s22,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s22     },      NULL,              NULL},
-{   "s23",      NULL,   4,  FPU_OFFSET(23),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s23,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s23     },      NULL,              NULL},
-{   "s24",      NULL,   4,  FPU_OFFSET(24),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s24,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s24     },      NULL,              NULL},
-{   "s25",      NULL,   4,  FPU_OFFSET(25),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s25,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s25     },      NULL,              NULL},
-{   "s26",      NULL,   4,  FPU_OFFSET(26),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s26,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s26     },      NULL,              NULL},
-{   "s27",      NULL,   4,  FPU_OFFSET(27),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s27,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s27     },      NULL,              NULL},
-{   "s28",      NULL,   4,  FPU_OFFSET(28),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s28,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s28     },      NULL,              NULL},
-{   "s29",      NULL,   4,  FPU_OFFSET(29),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s29,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s29     },      NULL,              NULL},
-{   "s30",      NULL,   4,  FPU_OFFSET(30),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s30,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s30     },      NULL,              NULL},
-{   "s31",      NULL,   4,  FPU_OFFSET(31),     eEncodingIEEE754,eFormatFloat,  { LLDB_INVALID_REGNUM,  dwarf_s31,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_s31     },      NULL,              NULL},
-{   "fpscr",    NULL,   4,  FPU_OFFSET(32),     eEncodingUint,  eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    fpu_fpscr   },      NULL,              NULL},
-
-{   "exception",NULL,   4,  EXC_OFFSET(0),      eEncodingUint,  eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    exc_exception },    NULL,              NULL},
-{   "fsr",      NULL,   4,  EXC_OFFSET(1),      eEncodingUint,  eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    exc_fsr       },    NULL,              NULL},
-{   "far",      NULL,   4,  EXC_OFFSET(2),      eEncodingUint,  eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    exc_far       },    NULL,              NULL},
-
-{   DEFINE_DBG (bvr, 0) },
-{   DEFINE_DBG (bvr, 1) },
-{   DEFINE_DBG (bvr, 2) },
-{   DEFINE_DBG (bvr, 3) },
-{   DEFINE_DBG (bvr, 4) },
-{   DEFINE_DBG (bvr, 5) },
-{   DEFINE_DBG (bvr, 6) },
-{   DEFINE_DBG (bvr, 7) },
-{   DEFINE_DBG (bvr, 8) },
-{   DEFINE_DBG (bvr, 9) },
-{   DEFINE_DBG (bvr, 10) },
-{   DEFINE_DBG (bvr, 11) },
-{   DEFINE_DBG (bvr, 12) },
-{   DEFINE_DBG (bvr, 13) },
-{   DEFINE_DBG (bvr, 14) },
-{   DEFINE_DBG (bvr, 15) },
-
-{   DEFINE_DBG (bcr, 0) },
-{   DEFINE_DBG (bcr, 1) },
-{   DEFINE_DBG (bcr, 2) },
-{   DEFINE_DBG (bcr, 3) },
-{   DEFINE_DBG (bcr, 4) },
-{   DEFINE_DBG (bcr, 5) },
-{   DEFINE_DBG (bcr, 6) },
-{   DEFINE_DBG (bcr, 7) },
-{   DEFINE_DBG (bcr, 8) },
-{   DEFINE_DBG (bcr, 9) },
-{   DEFINE_DBG (bcr, 10) },
-{   DEFINE_DBG (bcr, 11) },
-{   DEFINE_DBG (bcr, 12) },
-{   DEFINE_DBG (bcr, 13) },
-{   DEFINE_DBG (bcr, 14) },
-{   DEFINE_DBG (bcr, 15) },
-
-{   DEFINE_DBG (wvr, 0) },
-{   DEFINE_DBG (wvr, 1) },
-{   DEFINE_DBG (wvr, 2) },
-{   DEFINE_DBG (wvr, 3) },
-{   DEFINE_DBG (wvr, 4) },
-{   DEFINE_DBG (wvr, 5) },
-{   DEFINE_DBG (wvr, 6) },
-{   DEFINE_DBG (wvr, 7) },
-{   DEFINE_DBG (wvr, 8) },
-{   DEFINE_DBG (wvr, 9) },
-{   DEFINE_DBG (wvr, 10) },
-{   DEFINE_DBG (wvr, 11) },
-{   DEFINE_DBG (wvr, 12) },
-{   DEFINE_DBG (wvr, 13) },
-{   DEFINE_DBG (wvr, 14) },
-{   DEFINE_DBG (wvr, 15) },
-
-{   DEFINE_DBG (wcr, 0) },
-{   DEFINE_DBG (wcr, 1) },
-{   DEFINE_DBG (wcr, 2) },
-{   DEFINE_DBG (wcr, 3) },
-{   DEFINE_DBG (wcr, 4) },
-{   DEFINE_DBG (wcr, 5) },
-{   DEFINE_DBG (wcr, 6) },
-{   DEFINE_DBG (wcr, 7) },
-{   DEFINE_DBG (wcr, 8) },
-{   DEFINE_DBG (wcr, 9) },
-{   DEFINE_DBG (wcr, 10) },
-{   DEFINE_DBG (wcr, 11) },
-{   DEFINE_DBG (wcr, 12) },
-{   DEFINE_DBG (wcr, 13) },
-{   DEFINE_DBG (wcr, 14) },
-{   DEFINE_DBG (wcr, 15) }
-};
+    // General purpose registers
+    //  NAME        ALT     SZ  OFFSET              ENCODING        FORMAT
+    //  EH_FRAME                DWARF               GENERIC
+    //  PROCESS PLUGIN          LLDB NATIVE
+    //  ======      ======= ==  =============       =============   ============
+    //  ===============         ===============     =========================
+    //  =====================   =============
+    {"r0",
+     NULL,
+     4,
+     GPR_OFFSET(0),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r0, dwarf_r0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r0},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r1",
+     NULL,
+     4,
+     GPR_OFFSET(1),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r1, dwarf_r1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r1},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r2",
+     NULL,
+     4,
+     GPR_OFFSET(2),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r2, dwarf_r2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r2},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r3",
+     NULL,
+     4,
+     GPR_OFFSET(3),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r3, dwarf_r3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r3},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r4",
+     NULL,
+     4,
+     GPR_OFFSET(4),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r4},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r5",
+     NULL,
+     4,
+     GPR_OFFSET(5),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r5},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r6",
+     NULL,
+     4,
+     GPR_OFFSET(6),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r6},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r7",
+     NULL,
+     4,
+     GPR_OFFSET(7),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM,
+      gpr_r7},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r8",
+     NULL,
+     4,
+     GPR_OFFSET(8),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r8},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r9",
+     NULL,
+     4,
+     GPR_OFFSET(9),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r9},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r10",
+     NULL,
+     4,
+     GPR_OFFSET(10),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      gpr_r10},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r11",
+     NULL,
+     4,
+     GPR_OFFSET(11),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r11, dwarf_r11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      gpr_r11},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r12",
+     NULL,
+     4,
+     GPR_OFFSET(12),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      gpr_r12},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"sp",
+     "r13",
+     4,
+     GPR_OFFSET(13),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM,
+      gpr_sp},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"lr",
+     "r14",
+     4,
+     GPR_OFFSET(14),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM,
+      gpr_lr},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"pc",
+     "r15",
+     4,
+     GPR_OFFSET(15),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM,
+      gpr_pc},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"cpsr",
+     "psr",
+     4,
+     GPR_OFFSET(16),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM,
+      gpr_cpsr},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+
+    {"s0",
+     NULL,
+     4,
+     FPU_OFFSET(0),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s0},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s1",
+     NULL,
+     4,
+     FPU_OFFSET(1),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s1},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s2",
+     NULL,
+     4,
+     FPU_OFFSET(2),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s2},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s3",
+     NULL,
+     4,
+     FPU_OFFSET(3),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s3},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s4",
+     NULL,
+     4,
+     FPU_OFFSET(4),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s4},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s5",
+     NULL,
+     4,
+     FPU_OFFSET(5),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s5},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s6",
+     NULL,
+     4,
+     FPU_OFFSET(6),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s6},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s7",
+     NULL,
+     4,
+     FPU_OFFSET(7),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s7},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s8",
+     NULL,
+     4,
+     FPU_OFFSET(8),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s8},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s9",
+     NULL,
+     4,
+     FPU_OFFSET(9),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s9},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s10",
+     NULL,
+     4,
+     FPU_OFFSET(10),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s10},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s11",
+     NULL,
+     4,
+     FPU_OFFSET(11),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s11},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s12",
+     NULL,
+     4,
+     FPU_OFFSET(12),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s12},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s13",
+     NULL,
+     4,
+     FPU_OFFSET(13),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s13},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s14",
+     NULL,
+     4,
+     FPU_OFFSET(14),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s14},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s15",
+     NULL,
+     4,
+     FPU_OFFSET(15),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s15},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s16",
+     NULL,
+     4,
+     FPU_OFFSET(16),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s16},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s17",
+     NULL,
+     4,
+     FPU_OFFSET(17),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s17},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s18",
+     NULL,
+     4,
+     FPU_OFFSET(18),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s18},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s19",
+     NULL,
+     4,
+     FPU_OFFSET(19),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s19},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s20",
+     NULL,
+     4,
+     FPU_OFFSET(20),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s20},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s21",
+     NULL,
+     4,
+     FPU_OFFSET(21),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s21},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s22",
+     NULL,
+     4,
+     FPU_OFFSET(22),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s22},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s23",
+     NULL,
+     4,
+     FPU_OFFSET(23),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s23},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s24",
+     NULL,
+     4,
+     FPU_OFFSET(24),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s24},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s25",
+     NULL,
+     4,
+     FPU_OFFSET(25),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s25},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s26",
+     NULL,
+     4,
+     FPU_OFFSET(26),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s26},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s27",
+     NULL,
+     4,
+     FPU_OFFSET(27),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s27},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s28",
+     NULL,
+     4,
+     FPU_OFFSET(28),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s28},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s29",
+     NULL,
+     4,
+     FPU_OFFSET(29),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s29},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s30",
+     NULL,
+     4,
+     FPU_OFFSET(30),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s30},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"s31",
+     NULL,
+     4,
+     FPU_OFFSET(31),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s31},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"fpscr",
+     NULL,
+     4,
+     FPU_OFFSET(32),
+     eEncodingUint,
+     eFormatHex,
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_fpscr},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+
+    {"exception",
+     NULL,
+     4,
+     EXC_OFFSET(0),
+     eEncodingUint,
+     eFormatHex,
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, exc_exception},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"fsr",
+     NULL,
+     4,
+     EXC_OFFSET(1),
+     eEncodingUint,
+     eFormatHex,
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, exc_fsr},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"far",
+     NULL,
+     4,
+     EXC_OFFSET(2),
+     eEncodingUint,
+     eFormatHex,
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, exc_far},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+
+    {DEFINE_DBG(bvr, 0)},
+    {DEFINE_DBG(bvr, 1)},
+    {DEFINE_DBG(bvr, 2)},
+    {DEFINE_DBG(bvr, 3)},
+    {DEFINE_DBG(bvr, 4)},
+    {DEFINE_DBG(bvr, 5)},
+    {DEFINE_DBG(bvr, 6)},
+    {DEFINE_DBG(bvr, 7)},
+    {DEFINE_DBG(bvr, 8)},
+    {DEFINE_DBG(bvr, 9)},
+    {DEFINE_DBG(bvr, 10)},
+    {DEFINE_DBG(bvr, 11)},
+    {DEFINE_DBG(bvr, 12)},
+    {DEFINE_DBG(bvr, 13)},
+    {DEFINE_DBG(bvr, 14)},
+    {DEFINE_DBG(bvr, 15)},
+
+    {DEFINE_DBG(bcr, 0)},
+    {DEFINE_DBG(bcr, 1)},
+    {DEFINE_DBG(bcr, 2)},
+    {DEFINE_DBG(bcr, 3)},
+    {DEFINE_DBG(bcr, 4)},
+    {DEFINE_DBG(bcr, 5)},
+    {DEFINE_DBG(bcr, 6)},
+    {DEFINE_DBG(bcr, 7)},
+    {DEFINE_DBG(bcr, 8)},
+    {DEFINE_DBG(bcr, 9)},
+    {DEFINE_DBG(bcr, 10)},
+    {DEFINE_DBG(bcr, 11)},
+    {DEFINE_DBG(bcr, 12)},
+    {DEFINE_DBG(bcr, 13)},
+    {DEFINE_DBG(bcr, 14)},
+    {DEFINE_DBG(bcr, 15)},
+
+    {DEFINE_DBG(wvr, 0)},
+    {DEFINE_DBG(wvr, 1)},
+    {DEFINE_DBG(wvr, 2)},
+    {DEFINE_DBG(wvr, 3)},
+    {DEFINE_DBG(wvr, 4)},
+    {DEFINE_DBG(wvr, 5)},
+    {DEFINE_DBG(wvr, 6)},
+    {DEFINE_DBG(wvr, 7)},
+    {DEFINE_DBG(wvr, 8)},
+    {DEFINE_DBG(wvr, 9)},
+    {DEFINE_DBG(wvr, 10)},
+    {DEFINE_DBG(wvr, 11)},
+    {DEFINE_DBG(wvr, 12)},
+    {DEFINE_DBG(wvr, 13)},
+    {DEFINE_DBG(wvr, 14)},
+    {DEFINE_DBG(wvr, 15)},
+
+    {DEFINE_DBG(wcr, 0)},
+    {DEFINE_DBG(wcr, 1)},
+    {DEFINE_DBG(wcr, 2)},
+    {DEFINE_DBG(wcr, 3)},
+    {DEFINE_DBG(wcr, 4)},
+    {DEFINE_DBG(wcr, 5)},
+    {DEFINE_DBG(wcr, 6)},
+    {DEFINE_DBG(wcr, 7)},
+    {DEFINE_DBG(wcr, 8)},
+    {DEFINE_DBG(wcr, 9)},
+    {DEFINE_DBG(wcr, 10)},
+    {DEFINE_DBG(wcr, 11)},
+    {DEFINE_DBG(wcr, 12)},
+    {DEFINE_DBG(wcr, 13)},
+    {DEFINE_DBG(wcr, 14)},
+    {DEFINE_DBG(wcr, 15)}};
 
 // General purpose registers
-static uint32_t
-g_gpr_regnums[] =
-{
-    gpr_r0,
-    gpr_r1,
-    gpr_r2,
-    gpr_r3,
-    gpr_r4,
-    gpr_r5,
-    gpr_r6,
-    gpr_r7,
-    gpr_r8,
-    gpr_r9,
-    gpr_r10,
-    gpr_r11,
-    gpr_r12,
-    gpr_sp,
-    gpr_lr,
-    gpr_pc,
-    gpr_cpsr
-};
+static uint32_t g_gpr_regnums[] = {
+    gpr_r0, gpr_r1,  gpr_r2,  gpr_r3,  gpr_r4, gpr_r5, gpr_r6, gpr_r7,  gpr_r8,
+    gpr_r9, gpr_r10, gpr_r11, gpr_r12, gpr_sp, gpr_lr, gpr_pc, gpr_cpsr};
 
 // Floating point registers
-static uint32_t
-g_fpu_regnums[] =
-{
-    fpu_s0,
-    fpu_s1,
-    fpu_s2,
-    fpu_s3,
-    fpu_s4,
-    fpu_s5,
-    fpu_s6,
-    fpu_s7,
-    fpu_s8,
-    fpu_s9,
-    fpu_s10,
-    fpu_s11,
-    fpu_s12,
-    fpu_s13,
-    fpu_s14,
-    fpu_s15,
-    fpu_s16,
-    fpu_s17,
-    fpu_s18,
-    fpu_s19,
-    fpu_s20,
-    fpu_s21,
-    fpu_s22,
-    fpu_s23,
-    fpu_s24,
-    fpu_s25,
-    fpu_s26,
-    fpu_s27,
-    fpu_s28,
-    fpu_s29,
-    fpu_s30,
-    fpu_s31,
-    fpu_fpscr,
+static uint32_t g_fpu_regnums[] = {
+    fpu_s0,  fpu_s1,  fpu_s2,  fpu_s3,  fpu_s4,    fpu_s5,  fpu_s6,
+    fpu_s7,  fpu_s8,  fpu_s9,  fpu_s10, fpu_s11,   fpu_s12, fpu_s13,
+    fpu_s14, fpu_s15, fpu_s16, fpu_s17, fpu_s18,   fpu_s19, fpu_s20,
+    fpu_s21, fpu_s22, fpu_s23, fpu_s24, fpu_s25,   fpu_s26, fpu_s27,
+    fpu_s28, fpu_s29, fpu_s30, fpu_s31, fpu_fpscr,
 };
 
 // Exception registers
 
-static uint32_t
-g_exc_regnums[] =
-{
-    exc_exception,
-    exc_fsr,
-    exc_far,
+static uint32_t g_exc_regnums[] = {
+    exc_exception, exc_fsr, exc_far,
 };
 
 static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
 
-RegisterContextDarwin_arm::RegisterContextDarwin_arm(Thread &thread, uint32_t concrete_frame_idx) :
-    RegisterContext(thread, concrete_frame_idx),
-    gpr(),
-    fpu(),
-    exc()
-{
-    uint32_t i;
-    for (i=0; i<kNumErrors; i++)
-    {
-        gpr_errs[i] = -1;
-        fpu_errs[i] = -1;
-        exc_errs[i] = -1;
-    }
-}
-
-RegisterContextDarwin_arm::~RegisterContextDarwin_arm()
-{
+RegisterContextDarwin_arm::RegisterContextDarwin_arm(
+    Thread &thread, uint32_t concrete_frame_idx)
+    : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() {
+  uint32_t i;
+  for (i = 0; i < kNumErrors; i++) {
+    gpr_errs[i] = -1;
+    fpu_errs[i] = -1;
+    exc_errs[i] = -1;
+  }
 }
 
+RegisterContextDarwin_arm::~RegisterContextDarwin_arm() {}
 
-void
-RegisterContextDarwin_arm::InvalidateAllRegisters ()
-{
-    InvalidateAllRegisterStates();
+void RegisterContextDarwin_arm::InvalidateAllRegisters() {
+  InvalidateAllRegisterStates();
 }
 
-
-size_t
-RegisterContextDarwin_arm::GetRegisterCount ()
-{
-    assert(k_num_register_infos == k_num_registers);
-    return k_num_registers;
+size_t RegisterContextDarwin_arm::GetRegisterCount() {
+  assert(k_num_register_infos == k_num_registers);
+  return k_num_registers;
 }
 
 const RegisterInfo *
-RegisterContextDarwin_arm::GetRegisterInfoAtIndex (size_t reg)
-{
-    assert(k_num_register_infos == k_num_registers);
-    if (reg < k_num_registers)
-        return &g_register_infos[reg];
-    return NULL;
+RegisterContextDarwin_arm::GetRegisterInfoAtIndex(size_t reg) {
+  assert(k_num_register_infos == k_num_registers);
+  if (reg < k_num_registers)
+    return &g_register_infos[reg];
+  return NULL;
 }
 
-size_t
-RegisterContextDarwin_arm::GetRegisterInfosCount ()
-{
-    return k_num_register_infos;
+size_t RegisterContextDarwin_arm::GetRegisterInfosCount() {
+  return k_num_register_infos;
 }
 
-const RegisterInfo *
-RegisterContextDarwin_arm::GetRegisterInfos ()
-{
-    return g_register_infos;
+const RegisterInfo *RegisterContextDarwin_arm::GetRegisterInfos() {
+  return g_register_infos;
 }
 
-
 // Number of registers in each register set
 const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
 const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
@@ -449,782 +972,799 @@ const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
 // of zero is for all registers, followed by other registers sets. The
 // register information for the all register set need not be filled in.
 //----------------------------------------------------------------------
-static const RegisterSet g_reg_sets[] =
-{
-    { "General Purpose Registers",  "gpr",  k_num_gpr_registers,    g_gpr_regnums,      },
-    { "Floating Point Registers",   "fpu",  k_num_fpu_registers,    g_fpu_regnums       },
-    { "Exception State Registers",  "exc",  k_num_exc_registers,    g_exc_regnums       }
-};
+static const RegisterSet g_reg_sets[] = {
+    {
+        "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums,
+    },
+    {"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
+    {"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
 
 const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
 
-
-size_t
-RegisterContextDarwin_arm::GetRegisterSetCount ()
-{
-    return k_num_regsets;
+size_t RegisterContextDarwin_arm::GetRegisterSetCount() {
+  return k_num_regsets;
 }
 
-const RegisterSet *
-RegisterContextDarwin_arm::GetRegisterSet (size_t reg_set)
-{
-    if (reg_set < k_num_regsets)
-        return &g_reg_sets[reg_set];
-    return NULL;
+const RegisterSet *RegisterContextDarwin_arm::GetRegisterSet(size_t reg_set) {
+  if (reg_set < k_num_regsets)
+    return &g_reg_sets[reg_set];
+  return NULL;
 }
 
-
 //----------------------------------------------------------------------
 // Register information definitions for 32 bit i386.
 //----------------------------------------------------------------------
-int
-RegisterContextDarwin_arm::GetSetForNativeRegNum (int reg)
-{
-    if (reg < fpu_s0)
-        return GPRRegSet;
-    else if (reg < exc_exception)
-        return FPURegSet;
-    else if (reg < k_num_registers)
-        return EXCRegSet;
-    return -1;
+int RegisterContextDarwin_arm::GetSetForNativeRegNum(int reg) {
+  if (reg < fpu_s0)
+    return GPRRegSet;
+  else if (reg < exc_exception)
+    return FPURegSet;
+  else if (reg < k_num_registers)
+    return EXCRegSet;
+  return -1;
 }
 
-int
-RegisterContextDarwin_arm::ReadGPR (bool force)
-{
-    int set = GPRRegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
-    }
-    return GetError(GPRRegSet, Read);
+int RegisterContextDarwin_arm::ReadGPR(bool force) {
+  int set = GPRRegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+  }
+  return GetError(GPRRegSet, Read);
 }
 
-int
-RegisterContextDarwin_arm::ReadFPU (bool force)
-{
-    int set = FPURegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
-    }
-    return GetError(FPURegSet, Read);
+int RegisterContextDarwin_arm::ReadFPU(bool force) {
+  int set = FPURegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+  }
+  return GetError(FPURegSet, Read);
 }
 
-int
-RegisterContextDarwin_arm::ReadEXC (bool force)
-{
-    int set = EXCRegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
-    }
-    return GetError(EXCRegSet, Read);
+int RegisterContextDarwin_arm::ReadEXC(bool force) {
+  int set = EXCRegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
+  }
+  return GetError(EXCRegSet, Read);
 }
 
-int
-RegisterContextDarwin_arm::ReadDBG (bool force)
-{
-    int set = DBGRegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadDBG(GetThreadID(), set, dbg));
-    }
-    return GetError(DBGRegSet, Read);
+int RegisterContextDarwin_arm::ReadDBG(bool force) {
+  int set = DBGRegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadDBG(GetThreadID(), set, dbg));
+  }
+  return GetError(DBGRegSet, Read);
 }
 
-int
-RegisterContextDarwin_arm::WriteGPR ()
-{
-    int set = GPRRegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return KERN_INVALID_ARGUMENT;
-    }
-    SetError (set, Write, DoWriteGPR(GetThreadID(), set, gpr));
-    SetError (set, Read, -1);
-    return GetError(GPRRegSet, Write);
-}
-
-int
-RegisterContextDarwin_arm::WriteFPU ()
-{
-    int set = FPURegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return KERN_INVALID_ARGUMENT;
-    }
-    SetError (set, Write, DoWriteFPU(GetThreadID(), set, fpu));
-    SetError (set, Read, -1);
-    return GetError(FPURegSet, Write);
+int RegisterContextDarwin_arm::WriteGPR() {
+  int set = GPRRegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
+    return KERN_INVALID_ARGUMENT;
+  }
+  SetError(set, Write, DoWriteGPR(GetThreadID(), set, gpr));
+  SetError(set, Read, -1);
+  return GetError(GPRRegSet, Write);
 }
 
-int
-RegisterContextDarwin_arm::WriteEXC ()
-{
-    int set = EXCRegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return KERN_INVALID_ARGUMENT;
-    }
-    SetError (set, Write, DoWriteEXC(GetThreadID(), set, exc));
-    SetError (set, Read, -1);
-    return GetError(EXCRegSet, Write);
+int RegisterContextDarwin_arm::WriteFPU() {
+  int set = FPURegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
+    return KERN_INVALID_ARGUMENT;
+  }
+  SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu));
+  SetError(set, Read, -1);
+  return GetError(FPURegSet, Write);
 }
 
-int
-RegisterContextDarwin_arm::WriteDBG ()
-{
-    int set = DBGRegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return KERN_INVALID_ARGUMENT;
-    }
-    SetError (set, Write, DoWriteDBG(GetThreadID(), set, dbg));
-    SetError (set, Read, -1);
-    return GetError(DBGRegSet, Write);
+int RegisterContextDarwin_arm::WriteEXC() {
+  int set = EXCRegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
+    return KERN_INVALID_ARGUMENT;
+  }
+  SetError(set, Write, DoWriteEXC(GetThreadID(), set, exc));
+  SetError(set, Read, -1);
+  return GetError(EXCRegSet, Write);
 }
 
-
-int
-RegisterContextDarwin_arm::ReadRegisterSet (uint32_t set, bool force)
-{
-    switch (set)
-    {
-    case GPRRegSet:    return ReadGPR(force);
-    case GPRAltRegSet: return ReadGPR(force);
-    case FPURegSet:    return ReadFPU(force);
-    case EXCRegSet:    return ReadEXC(force);
-    case DBGRegSet:    return ReadDBG(force);
-    default: break;
-    }
+int RegisterContextDarwin_arm::WriteDBG() {
+  int set = DBGRegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
     return KERN_INVALID_ARGUMENT;
+  }
+  SetError(set, Write, DoWriteDBG(GetThreadID(), set, dbg));
+  SetError(set, Read, -1);
+  return GetError(DBGRegSet, Write);
 }
 
-int
-RegisterContextDarwin_arm::WriteRegisterSet (uint32_t set)
-{
-    // Make sure we have a valid context to set.
-    if (RegisterSetIsCached(set))
-    {
-        switch (set)
-        {
-        case GPRRegSet:    return WriteGPR();
-        case GPRAltRegSet: return WriteGPR();
-        case FPURegSet:    return WriteFPU();
-        case EXCRegSet:    return WriteEXC();
-        case DBGRegSet:    return WriteDBG();
-        default: break;
-        }
-    }
-    return KERN_INVALID_ARGUMENT;
+int RegisterContextDarwin_arm::ReadRegisterSet(uint32_t set, bool force) {
+  switch (set) {
+  case GPRRegSet:
+    return ReadGPR(force);
+  case GPRAltRegSet:
+    return ReadGPR(force);
+  case FPURegSet:
+    return ReadFPU(force);
+  case EXCRegSet:
+    return ReadEXC(force);
+  case DBGRegSet:
+    return ReadDBG(force);
+  default:
+    break;
+  }
+  return KERN_INVALID_ARGUMENT;
 }
 
-void
-RegisterContextDarwin_arm::LogDBGRegisters (Log *log, const DBG& dbg)
-{
-    if (log)
-    {
-        for (uint32_t i=0; i<16; i++)
-            log->Printf("BVR%-2u/BCR%-2u = { 0x%8.8x, 0x%8.8x } WVR%-2u/WCR%-2u = { 0x%8.8x, 0x%8.8x }",
-                i, i, dbg.bvr[i], dbg.bcr[i],
-                i, i, dbg.wvr[i], dbg.wcr[i]);
+int RegisterContextDarwin_arm::WriteRegisterSet(uint32_t set) {
+  // Make sure we have a valid context to set.
+  if (RegisterSetIsCached(set)) {
+    switch (set) {
+    case GPRRegSet:
+      return WriteGPR();
+    case GPRAltRegSet:
+      return WriteGPR();
+    case FPURegSet:
+      return WriteFPU();
+    case EXCRegSet:
+      return WriteEXC();
+    case DBGRegSet:
+      return WriteDBG();
+    default:
+      break;
     }
+  }
+  return KERN_INVALID_ARGUMENT;
 }
 
+void RegisterContextDarwin_arm::LogDBGRegisters(Log *log, const DBG &dbg) {
+  if (log) {
+    for (uint32_t i = 0; i < 16; i++)
+      log->Printf("BVR%-2u/BCR%-2u = { 0x%8.8x, 0x%8.8x } WVR%-2u/WCR%-2u = { "
+                  "0x%8.8x, 0x%8.8x }",
+                  i, i, dbg.bvr[i], dbg.bcr[i], i, i, dbg.wvr[i], dbg.wcr[i]);
+  }
+}
 
-bool
-RegisterContextDarwin_arm::ReadRegister (const RegisterInfo *reg_info, RegisterValue &value)
-{
-    const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
-    int set = RegisterContextDarwin_arm::GetSetForNativeRegNum (reg);
-
-    if (set == -1)
-        return false;
-
-    if (ReadRegisterSet(set, false) != KERN_SUCCESS)
-        return false;
+bool RegisterContextDarwin_arm::ReadRegister(const RegisterInfo *reg_info,
+                                             RegisterValue &value) {
+  const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+  int set = RegisterContextDarwin_arm::GetSetForNativeRegNum(reg);
 
-    switch (reg)
-    {
-    case gpr_r0:
-    case gpr_r1:
-    case gpr_r2:
-    case gpr_r3:
-    case gpr_r4:
-    case gpr_r5:
-    case gpr_r6:
-    case gpr_r7:
-    case gpr_r8:
-    case gpr_r9:
-    case gpr_r10:
-    case gpr_r11:
-    case gpr_r12:
-    case gpr_sp:
-    case gpr_lr:
-    case gpr_pc:
-    case gpr_cpsr:
-        value.SetUInt32 (gpr.r[reg - gpr_r0]);
-        break;
-
-    case fpu_s0:
-    case fpu_s1:
-    case fpu_s2:
-    case fpu_s3:
-    case fpu_s4:
-    case fpu_s5:
-    case fpu_s6:
-    case fpu_s7:
-    case fpu_s8:
-    case fpu_s9:
-    case fpu_s10:
-    case fpu_s11:
-    case fpu_s12:
-    case fpu_s13:
-    case fpu_s14:
-    case fpu_s15:
-    case fpu_s16:
-    case fpu_s17:
-    case fpu_s18:
-    case fpu_s19:
-    case fpu_s20:
-    case fpu_s21:
-    case fpu_s22:
-    case fpu_s23:
-    case fpu_s24:
-    case fpu_s25:
-    case fpu_s26:
-    case fpu_s27:
-    case fpu_s28:
-    case fpu_s29:
-    case fpu_s30:
-    case fpu_s31:
-        value.SetUInt32 (fpu.floats.s[reg], RegisterValue::eTypeFloat);
-        break;
-
-    case fpu_fpscr:
-        value.SetUInt32 (fpu.fpscr);
-        break;
-
-    case exc_exception:
-        value.SetUInt32 (exc.exception);
-        break;
-    case exc_fsr:
-        value.SetUInt32 (exc.fsr);
-        break;
-    case exc_far:
-        value.SetUInt32 (exc.far);
-        break;
+  if (set == -1)
+    return false;
 
-    default:
-        value.SetValueToInvalid();
-        return false;
+  if (ReadRegisterSet(set, false) != KERN_SUCCESS)
+    return false;
 
-    }
-    return true;
+  switch (reg) {
+  case gpr_r0:
+  case gpr_r1:
+  case gpr_r2:
+  case gpr_r3:
+  case gpr_r4:
+  case gpr_r5:
+  case gpr_r6:
+  case gpr_r7:
+  case gpr_r8:
+  case gpr_r9:
+  case gpr_r10:
+  case gpr_r11:
+  case gpr_r12:
+  case gpr_sp:
+  case gpr_lr:
+  case gpr_pc:
+  case gpr_cpsr:
+    value.SetUInt32(gpr.r[reg - gpr_r0]);
+    break;
+
+  case fpu_s0:
+  case fpu_s1:
+  case fpu_s2:
+  case fpu_s3:
+  case fpu_s4:
+  case fpu_s5:
+  case fpu_s6:
+  case fpu_s7:
+  case fpu_s8:
+  case fpu_s9:
+  case fpu_s10:
+  case fpu_s11:
+  case fpu_s12:
+  case fpu_s13:
+  case fpu_s14:
+  case fpu_s15:
+  case fpu_s16:
+  case fpu_s17:
+  case fpu_s18:
+  case fpu_s19:
+  case fpu_s20:
+  case fpu_s21:
+  case fpu_s22:
+  case fpu_s23:
+  case fpu_s24:
+  case fpu_s25:
+  case fpu_s26:
+  case fpu_s27:
+  case fpu_s28:
+  case fpu_s29:
+  case fpu_s30:
+  case fpu_s31:
+    value.SetUInt32(fpu.floats.s[reg], RegisterValue::eTypeFloat);
+    break;
+
+  case fpu_fpscr:
+    value.SetUInt32(fpu.fpscr);
+    break;
+
+  case exc_exception:
+    value.SetUInt32(exc.exception);
+    break;
+  case exc_fsr:
+    value.SetUInt32(exc.fsr);
+    break;
+  case exc_far:
+    value.SetUInt32(exc.far);
+    break;
+
+  default:
+    value.SetValueToInvalid();
+    return false;
+  }
+  return true;
 }
 
+bool RegisterContextDarwin_arm::WriteRegister(const RegisterInfo *reg_info,
+                                              const RegisterValue &value) {
+  const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+  int set = GetSetForNativeRegNum(reg);
 
-bool
-RegisterContextDarwin_arm::WriteRegister (const RegisterInfo *reg_info,
-                                        const RegisterValue &value)
-{
-    const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
-    int set = GetSetForNativeRegNum (reg);
-
-    if (set == -1)
-        return false;
-
-    if (ReadRegisterSet(set, false) != KERN_SUCCESS)
-        return false;
-
-    switch (reg)
-    {
-    case gpr_r0:
-    case gpr_r1:
-    case gpr_r2:
-    case gpr_r3:
-    case gpr_r4:
-    case gpr_r5:
-    case gpr_r6:
-    case gpr_r7:
-    case gpr_r8:
-    case gpr_r9:
-    case gpr_r10:
-    case gpr_r11:
-    case gpr_r12:
-    case gpr_sp:
-    case gpr_lr:
-    case gpr_pc:
-    case gpr_cpsr:
-            gpr.r[reg - gpr_r0] = value.GetAsUInt32();
-        break;
-
-    case fpu_s0:
-    case fpu_s1:
-    case fpu_s2:
-    case fpu_s3:
-    case fpu_s4:
-    case fpu_s5:
-    case fpu_s6:
-    case fpu_s7:
-    case fpu_s8:
-    case fpu_s9:
-    case fpu_s10:
-    case fpu_s11:
-    case fpu_s12:
-    case fpu_s13:
-    case fpu_s14:
-    case fpu_s15:
-    case fpu_s16:
-    case fpu_s17:
-    case fpu_s18:
-    case fpu_s19:
-    case fpu_s20:
-    case fpu_s21:
-    case fpu_s22:
-    case fpu_s23:
-    case fpu_s24:
-    case fpu_s25:
-    case fpu_s26:
-    case fpu_s27:
-    case fpu_s28:
-    case fpu_s29:
-    case fpu_s30:
-    case fpu_s31:
-        fpu.floats.s[reg] = value.GetAsUInt32();
-        break;
-
-    case fpu_fpscr:
-        fpu.fpscr = value.GetAsUInt32();
-        break;
-
-    case exc_exception:
-        exc.exception = value.GetAsUInt32();
-        break;
-    case exc_fsr:
-        exc.fsr = value.GetAsUInt32();
-        break;
-    case exc_far:
-        exc.far = value.GetAsUInt32();
-        break;
+  if (set == -1)
+    return false;
 
-    default:
-        return false;
+  if (ReadRegisterSet(set, false) != KERN_SUCCESS)
+    return false;
 
-    }
-    return WriteRegisterSet(set) == KERN_SUCCESS;
+  switch (reg) {
+  case gpr_r0:
+  case gpr_r1:
+  case gpr_r2:
+  case gpr_r3:
+  case gpr_r4:
+  case gpr_r5:
+  case gpr_r6:
+  case gpr_r7:
+  case gpr_r8:
+  case gpr_r9:
+  case gpr_r10:
+  case gpr_r11:
+  case gpr_r12:
+  case gpr_sp:
+  case gpr_lr:
+  case gpr_pc:
+  case gpr_cpsr:
+    gpr.r[reg - gpr_r0] = value.GetAsUInt32();
+    break;
+
+  case fpu_s0:
+  case fpu_s1:
+  case fpu_s2:
+  case fpu_s3:
+  case fpu_s4:
+  case fpu_s5:
+  case fpu_s6:
+  case fpu_s7:
+  case fpu_s8:
+  case fpu_s9:
+  case fpu_s10:
+  case fpu_s11:
+  case fpu_s12:
+  case fpu_s13:
+  case fpu_s14:
+  case fpu_s15:
+  case fpu_s16:
+  case fpu_s17:
+  case fpu_s18:
+  case fpu_s19:
+  case fpu_s20:
+  case fpu_s21:
+  case fpu_s22:
+  case fpu_s23:
+  case fpu_s24:
+  case fpu_s25:
+  case fpu_s26:
+  case fpu_s27:
+  case fpu_s28:
+  case fpu_s29:
+  case fpu_s30:
+  case fpu_s31:
+    fpu.floats.s[reg] = value.GetAsUInt32();
+    break;
+
+  case fpu_fpscr:
+    fpu.fpscr = value.GetAsUInt32();
+    break;
+
+  case exc_exception:
+    exc.exception = value.GetAsUInt32();
+    break;
+  case exc_fsr:
+    exc.fsr = value.GetAsUInt32();
+    break;
+  case exc_far:
+    exc.far = value.GetAsUInt32();
+    break;
+
+  default:
+    return false;
+  }
+  return WriteRegisterSet(set) == KERN_SUCCESS;
 }
 
-bool
-RegisterContextDarwin_arm::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
-    data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0));
-    if (data_sp &&
-        ReadGPR (false) == KERN_SUCCESS &&
-        ReadFPU (false) == KERN_SUCCESS &&
-        ReadEXC (false) == KERN_SUCCESS)
-    {
-        uint8_t *dst = data_sp->GetBytes();
-        ::memcpy (dst, &gpr, sizeof(gpr));
-        dst += sizeof(gpr);
+bool RegisterContextDarwin_arm::ReadAllRegisterValues(
+    lldb::DataBufferSP &data_sp) {
+  data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
+  if (data_sp && ReadGPR(false) == KERN_SUCCESS &&
+      ReadFPU(false) == KERN_SUCCESS && ReadEXC(false) == KERN_SUCCESS) {
+    uint8_t *dst = data_sp->GetBytes();
+    ::memcpy(dst, &gpr, sizeof(gpr));
+    dst += sizeof(gpr);
 
-        ::memcpy (dst, &fpu, sizeof(fpu));
-        dst += sizeof(gpr);
+    ::memcpy(dst, &fpu, sizeof(fpu));
+    dst += sizeof(gpr);
 
-        ::memcpy (dst, &exc, sizeof(exc));
-        return true;
-    }
-    return false;
+    ::memcpy(dst, &exc, sizeof(exc));
+    return true;
+  }
+  return false;
 }
 
-bool
-RegisterContextDarwin_arm::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
-    if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE)
-    {
-        const uint8_t *src = data_sp->GetBytes();
-        ::memcpy (&gpr, src, sizeof(gpr));
-        src += sizeof(gpr);
-
-        ::memcpy (&fpu, src, sizeof(fpu));
-        src += sizeof(gpr);
-
-        ::memcpy (&exc, src, sizeof(exc));
-        uint32_t success_count = 0;
-        if (WriteGPR() == KERN_SUCCESS)
-            ++success_count;
-        if (WriteFPU() == KERN_SUCCESS)
-            ++success_count;
-        if (WriteEXC() == KERN_SUCCESS)
-            ++success_count;
-        return success_count == 3;
-    }
-    return false;
+bool RegisterContextDarwin_arm::WriteAllRegisterValues(
+    const lldb::DataBufferSP &data_sp) {
+  if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE) {
+    const uint8_t *src = data_sp->GetBytes();
+    ::memcpy(&gpr, src, sizeof(gpr));
+    src += sizeof(gpr);
+
+    ::memcpy(&fpu, src, sizeof(fpu));
+    src += sizeof(gpr);
+
+    ::memcpy(&exc, src, sizeof(exc));
+    uint32_t success_count = 0;
+    if (WriteGPR() == KERN_SUCCESS)
+      ++success_count;
+    if (WriteFPU() == KERN_SUCCESS)
+      ++success_count;
+    if (WriteEXC() == KERN_SUCCESS)
+      ++success_count;
+    return success_count == 3;
+  }
+  return false;
 }
 
-uint32_t
-RegisterContextDarwin_arm::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t reg)
-{
-    if (kind == eRegisterKindGeneric)
-    {
-        switch (reg)
-        {
-        case LLDB_REGNUM_GENERIC_PC: return gpr_pc;
-        case LLDB_REGNUM_GENERIC_SP: return gpr_sp;
-        case LLDB_REGNUM_GENERIC_FP: return gpr_r7;
-        case LLDB_REGNUM_GENERIC_RA: return gpr_lr;
-        case LLDB_REGNUM_GENERIC_FLAGS: return gpr_cpsr;
-        default:
-            break;
-        }
-    }
-    else if (kind == eRegisterKindDWARF)
-    {
-        switch (reg)
-        {
-        case dwarf_r0:  return gpr_r0;
-        case dwarf_r1:  return gpr_r1;
-        case dwarf_r2:  return gpr_r2;
-        case dwarf_r3:  return gpr_r3;
-        case dwarf_r4:  return gpr_r4;
-        case dwarf_r5:  return gpr_r5;
-        case dwarf_r6:  return gpr_r6;
-        case dwarf_r7:  return gpr_r7;
-        case dwarf_r8:  return gpr_r8;
-        case dwarf_r9:  return gpr_r9;
-        case dwarf_r10: return gpr_r10;
-        case dwarf_r11: return gpr_r11;
-        case dwarf_r12: return gpr_r12;
-        case dwarf_sp:  return gpr_sp;
-        case dwarf_lr:  return gpr_lr;
-        case dwarf_pc:  return gpr_pc;
-        case dwarf_spsr: return gpr_cpsr;
-
-        case dwarf_s0:  return fpu_s0;
-        case dwarf_s1:  return fpu_s1;
-        case dwarf_s2:  return fpu_s2;
-        case dwarf_s3:  return fpu_s3;
-        case dwarf_s4:  return fpu_s4;
-        case dwarf_s5:  return fpu_s5;
-        case dwarf_s6:  return fpu_s6;
-        case dwarf_s7:  return fpu_s7;
-        case dwarf_s8:  return fpu_s8;
-        case dwarf_s9:  return fpu_s9;
-        case dwarf_s10: return fpu_s10;
-        case dwarf_s11: return fpu_s11;
-        case dwarf_s12: return fpu_s12;
-        case dwarf_s13: return fpu_s13;
-        case dwarf_s14: return fpu_s14;
-        case dwarf_s15: return fpu_s15;
-        case dwarf_s16: return fpu_s16;
-        case dwarf_s17: return fpu_s17;
-        case dwarf_s18: return fpu_s18;
-        case dwarf_s19: return fpu_s19;
-        case dwarf_s20: return fpu_s20;
-        case dwarf_s21: return fpu_s21;
-        case dwarf_s22: return fpu_s22;
-        case dwarf_s23: return fpu_s23;
-        case dwarf_s24: return fpu_s24;
-        case dwarf_s25: return fpu_s25;
-        case dwarf_s26: return fpu_s26;
-        case dwarf_s27: return fpu_s27;
-        case dwarf_s28: return fpu_s28;
-        case dwarf_s29: return fpu_s29;
-        case dwarf_s30: return fpu_s30;
-        case dwarf_s31: return fpu_s31;
-
-        default:
-            break;
-        }
+uint32_t RegisterContextDarwin_arm::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t reg) {
+  if (kind == eRegisterKindGeneric) {
+    switch (reg) {
+    case LLDB_REGNUM_GENERIC_PC:
+      return gpr_pc;
+    case LLDB_REGNUM_GENERIC_SP:
+      return gpr_sp;
+    case LLDB_REGNUM_GENERIC_FP:
+      return gpr_r7;
+    case LLDB_REGNUM_GENERIC_RA:
+      return gpr_lr;
+    case LLDB_REGNUM_GENERIC_FLAGS:
+      return gpr_cpsr;
+    default:
+      break;
     }
-    else if (kind == eRegisterKindEHFrame)
-    {
-        switch (reg)
-        {
-        case ehframe_r0:    return gpr_r0;
-        case ehframe_r1:    return gpr_r1;
-        case ehframe_r2:    return gpr_r2;
-        case ehframe_r3:    return gpr_r3;
-        case ehframe_r4:    return gpr_r4;
-        case ehframe_r5:    return gpr_r5;
-        case ehframe_r6:    return gpr_r6;
-        case ehframe_r7:    return gpr_r7;
-        case ehframe_r8:    return gpr_r8;
-        case ehframe_r9:    return gpr_r9;
-        case ehframe_r10:   return gpr_r10;
-        case ehframe_r11:   return gpr_r11;
-        case ehframe_r12:   return gpr_r12;
-        case ehframe_sp:    return gpr_sp;
-        case ehframe_lr:    return gpr_lr;
-        case ehframe_pc:    return gpr_pc;
-        case ehframe_cpsr:  return gpr_cpsr;
-        }
+  } else if (kind == eRegisterKindDWARF) {
+    switch (reg) {
+    case dwarf_r0:
+      return gpr_r0;
+    case dwarf_r1:
+      return gpr_r1;
+    case dwarf_r2:
+      return gpr_r2;
+    case dwarf_r3:
+      return gpr_r3;
+    case dwarf_r4:
+      return gpr_r4;
+    case dwarf_r5:
+      return gpr_r5;
+    case dwarf_r6:
+      return gpr_r6;
+    case dwarf_r7:
+      return gpr_r7;
+    case dwarf_r8:
+      return gpr_r8;
+    case dwarf_r9:
+      return gpr_r9;
+    case dwarf_r10:
+      return gpr_r10;
+    case dwarf_r11:
+      return gpr_r11;
+    case dwarf_r12:
+      return gpr_r12;
+    case dwarf_sp:
+      return gpr_sp;
+    case dwarf_lr:
+      return gpr_lr;
+    case dwarf_pc:
+      return gpr_pc;
+    case dwarf_spsr:
+      return gpr_cpsr;
+
+    case dwarf_s0:
+      return fpu_s0;
+    case dwarf_s1:
+      return fpu_s1;
+    case dwarf_s2:
+      return fpu_s2;
+    case dwarf_s3:
+      return fpu_s3;
+    case dwarf_s4:
+      return fpu_s4;
+    case dwarf_s5:
+      return fpu_s5;
+    case dwarf_s6:
+      return fpu_s6;
+    case dwarf_s7:
+      return fpu_s7;
+    case dwarf_s8:
+      return fpu_s8;
+    case dwarf_s9:
+      return fpu_s9;
+    case dwarf_s10:
+      return fpu_s10;
+    case dwarf_s11:
+      return fpu_s11;
+    case dwarf_s12:
+      return fpu_s12;
+    case dwarf_s13:
+      return fpu_s13;
+    case dwarf_s14:
+      return fpu_s14;
+    case dwarf_s15:
+      return fpu_s15;
+    case dwarf_s16:
+      return fpu_s16;
+    case dwarf_s17:
+      return fpu_s17;
+    case dwarf_s18:
+      return fpu_s18;
+    case dwarf_s19:
+      return fpu_s19;
+    case dwarf_s20:
+      return fpu_s20;
+    case dwarf_s21:
+      return fpu_s21;
+    case dwarf_s22:
+      return fpu_s22;
+    case dwarf_s23:
+      return fpu_s23;
+    case dwarf_s24:
+      return fpu_s24;
+    case dwarf_s25:
+      return fpu_s25;
+    case dwarf_s26:
+      return fpu_s26;
+    case dwarf_s27:
+      return fpu_s27;
+    case dwarf_s28:
+      return fpu_s28;
+    case dwarf_s29:
+      return fpu_s29;
+    case dwarf_s30:
+      return fpu_s30;
+    case dwarf_s31:
+      return fpu_s31;
+
+    default:
+      break;
     }
-    else if (kind == eRegisterKindLLDB)
-    {
-        return reg;
+  } else if (kind == eRegisterKindEHFrame) {
+    switch (reg) {
+    case ehframe_r0:
+      return gpr_r0;
+    case ehframe_r1:
+      return gpr_r1;
+    case ehframe_r2:
+      return gpr_r2;
+    case ehframe_r3:
+      return gpr_r3;
+    case ehframe_r4:
+      return gpr_r4;
+    case ehframe_r5:
+      return gpr_r5;
+    case ehframe_r6:
+      return gpr_r6;
+    case ehframe_r7:
+      return gpr_r7;
+    case ehframe_r8:
+      return gpr_r8;
+    case ehframe_r9:
+      return gpr_r9;
+    case ehframe_r10:
+      return gpr_r10;
+    case ehframe_r11:
+      return gpr_r11;
+    case ehframe_r12:
+      return gpr_r12;
+    case ehframe_sp:
+      return gpr_sp;
+    case ehframe_lr:
+      return gpr_lr;
+    case ehframe_pc:
+      return gpr_pc;
+    case ehframe_cpsr:
+      return gpr_cpsr;
     }
-    return LLDB_INVALID_REGNUM;
+  } else if (kind == eRegisterKindLLDB) {
+    return reg;
+  }
+  return LLDB_INVALID_REGNUM;
 }
 
-
-uint32_t
-RegisterContextDarwin_arm::NumSupportedHardwareBreakpoints ()
-{
-#if defined (__arm__)
-    // Set the init value to something that will let us know that we need to
-    // autodetect how many breakpoints are supported dynamically...
-    static uint32_t g_num_supported_hw_breakpoints = UINT32_MAX;
-    if (g_num_supported_hw_breakpoints == UINT32_MAX)
-    {
-        // Set this to zero in case we can't tell if there are any HW breakpoints
-        g_num_supported_hw_breakpoints = 0;
-
-        uint32_t register_DBGDIDR;
-
-        asm("mrc p14, 0, %0, c0, c0, 0" : "=r" (register_DBGDIDR));
-        g_num_supported_hw_breakpoints = Bits32 (register_DBGDIDR, 27, 24);
-        // Zero is reserved for the BRP count, so don't increment it if it is zero
-        if (g_num_supported_hw_breakpoints > 0)
-            g_num_supported_hw_breakpoints++;
-//        if (log) log->Printf ("DBGDIDR=0x%8.8x (number BRP pairs = %u)", register_DBGDIDR, g_num_supported_hw_breakpoints);
-
-    }
-    return g_num_supported_hw_breakpoints;
+uint32_t RegisterContextDarwin_arm::NumSupportedHardwareBreakpoints() {
+#if defined(__arm__)
+  // Set the init value to something that will let us know that we need to
+  // autodetect how many breakpoints are supported dynamically...
+  static uint32_t g_num_supported_hw_breakpoints = UINT32_MAX;
+  if (g_num_supported_hw_breakpoints == UINT32_MAX) {
+    // Set this to zero in case we can't tell if there are any HW breakpoints
+    g_num_supported_hw_breakpoints = 0;
+
+    uint32_t register_DBGDIDR;
+
+    asm("mrc p14, 0, %0, c0, c0, 0" : "=r"(register_DBGDIDR));
+    g_num_supported_hw_breakpoints = Bits32(register_DBGDIDR, 27, 24);
+    // Zero is reserved for the BRP count, so don't increment it if it is zero
+    if (g_num_supported_hw_breakpoints > 0)
+      g_num_supported_hw_breakpoints++;
+    //        if (log) log->Printf ("DBGDIDR=0x%8.8x (number BRP pairs = %u)",
+    //        register_DBGDIDR, g_num_supported_hw_breakpoints);
+  }
+  return g_num_supported_hw_breakpoints;
 #else
-    // TODO: figure out remote case here!
-    return 6;
+  // TODO: figure out remote case here!
+  return 6;
 #endif
 }
 
-uint32_t
-RegisterContextDarwin_arm::SetHardwareBreakpoint (lldb::addr_t addr, size_t size)
-{
-    // Make sure our address isn't bogus
-    if (addr & 1)
-        return LLDB_INVALID_INDEX32;
+uint32_t RegisterContextDarwin_arm::SetHardwareBreakpoint(lldb::addr_t addr,
+                                                          size_t size) {
+  // Make sure our address isn't bogus
+  if (addr & 1)
+    return LLDB_INVALID_INDEX32;
 
-    int kret = ReadDBG (false);
+  int kret = ReadDBG(false);
 
-    if (kret == KERN_SUCCESS)
-    {
-        const uint32_t num_hw_breakpoints = NumSupportedHardwareBreakpoints();
-        uint32_t i;
-        for (i=0; i<num_hw_breakpoints; ++i)
-        {
-            if ((dbg.bcr[i] & BCR_ENABLE) == 0)
-                break; // We found an available hw breakpoint slot (in i)
-        }
-
-        // See if we found an available hw breakpoint slot above
-        if (i < num_hw_breakpoints)
-        {
-            // Make sure bits 1:0 are clear in our address
-            dbg.bvr[i] = addr & ~((lldb::addr_t)3);
-
-            if (size == 2 || addr & 2)
-            {
-                uint32_t byte_addr_select = (addr & 2) ? BAS_IMVA_2_3 : BAS_IMVA_0_1;
-
-                // We have a thumb breakpoint
-                // We have an ARM breakpoint
-                dbg.bcr[i] =  BCR_M_IMVA_MATCH |    // Stop on address mismatch
-                                        byte_addr_select |  // Set the correct byte address select so we only trigger on the correct opcode
-                                        S_USER |            // Which modes should this breakpoint stop in?
-                                        BCR_ENABLE;         // Enable this hardware breakpoint
-//                if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareBreakpoint( addr = %8.8p, size = %u ) - BVR%u/BCR%u = 0x%8.8x / 0x%8.8x (Thumb)",
-//                        addr,
-//                        size,
-//                        i,
-//                        i,
-//                        dbg.bvr[i],
-//                        dbg.bcr[i]);
-            }
-            else if (size == 4)
-            {
-                // We have an ARM breakpoint
-                dbg.bcr[i] =  BCR_M_IMVA_MATCH |    // Stop on address mismatch
-                                        BAS_IMVA_ALL |      // Stop on any of the four bytes following the IMVA
-                                        S_USER |            // Which modes should this breakpoint stop in?
-                                        BCR_ENABLE;         // Enable this hardware breakpoint
-//                if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareBreakpoint( addr = %8.8p, size = %u ) - BVR%u/BCR%u = 0x%8.8x / 0x%8.8x (ARM)",
-//                        addr,
-//                        size,
-//                        i,
-//                        i,
-//                        dbg.bvr[i],
-//                        dbg.bcr[i]);
-            }
-
-            kret = WriteDBG();
-//            if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareBreakpoint() WriteDBG() => 0x%8.8x.", kret);
-
-            if (kret == KERN_SUCCESS)
-                return i;
-        }
-//        else
-//        {
-//            if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareBreakpoint(addr = %8.8p, size = %u) => all hardware breakpoint resources are being used.", addr, size);
-//        }
+  if (kret == KERN_SUCCESS) {
+    const uint32_t num_hw_breakpoints = NumSupportedHardwareBreakpoints();
+    uint32_t i;
+    for (i = 0; i < num_hw_breakpoints; ++i) {
+      if ((dbg.bcr[i] & BCR_ENABLE) == 0)
+        break; // We found an available hw breakpoint slot (in i)
     }
 
-    return LLDB_INVALID_INDEX32;
+    // See if we found an available hw breakpoint slot above
+    if (i < num_hw_breakpoints) {
+      // Make sure bits 1:0 are clear in our address
+      dbg.bvr[i] = addr & ~((lldb::addr_t)3);
+
+      if (size == 2 || addr & 2) {
+        uint32_t byte_addr_select = (addr & 2) ? BAS_IMVA_2_3 : BAS_IMVA_0_1;
+
+        // We have a thumb breakpoint
+        // We have an ARM breakpoint
+        dbg.bcr[i] = BCR_M_IMVA_MATCH | // Stop on address mismatch
+                     byte_addr_select | // Set the correct byte address select
+                                        // so we only trigger on the correct
+                                        // opcode
+                     S_USER |    // Which modes should this breakpoint stop in?
+                     BCR_ENABLE; // Enable this hardware breakpoint
+                                 //                if (log) log->Printf
+        //                ("RegisterContextDarwin_arm::EnableHardwareBreakpoint(
+        //                addr = %8.8p, size = %u ) - BVR%u/BCR%u = 0x%8.8x /
+        //                0x%8.8x (Thumb)",
+        //                        addr,
+        //                        size,
+        //                        i,
+        //                        i,
+        //                        dbg.bvr[i],
+        //                        dbg.bcr[i]);
+      } else if (size == 4) {
+        // We have an ARM breakpoint
+        dbg.bcr[i] =
+            BCR_M_IMVA_MATCH | // Stop on address mismatch
+            BAS_IMVA_ALL | // Stop on any of the four bytes following the IMVA
+            S_USER |       // Which modes should this breakpoint stop in?
+            BCR_ENABLE;    // Enable this hardware breakpoint
+                           //                if (log) log->Printf
+        //                ("RegisterContextDarwin_arm::EnableHardwareBreakpoint(
+        //                addr = %8.8p, size = %u ) - BVR%u/BCR%u = 0x%8.8x /
+        //                0x%8.8x (ARM)",
+        //                        addr,
+        //                        size,
+        //                        i,
+        //                        i,
+        //                        dbg.bvr[i],
+        //                        dbg.bcr[i]);
+      }
+
+      kret = WriteDBG();
+      //            if (log) log->Printf
+      //            ("RegisterContextDarwin_arm::EnableHardwareBreakpoint()
+      //            WriteDBG() => 0x%8.8x.", kret);
+
+      if (kret == KERN_SUCCESS)
+        return i;
+    }
+    //        else
+    //        {
+    //            if (log) log->Printf
+    //            ("RegisterContextDarwin_arm::EnableHardwareBreakpoint(addr =
+    //            %8.8p, size = %u) => all hardware breakpoint resources are
+    //            being used.", addr, size);
+    //        }
+  }
+
+  return LLDB_INVALID_INDEX32;
 }
 
-bool
-RegisterContextDarwin_arm::ClearHardwareBreakpoint (uint32_t hw_index)
-{
-    int kret = ReadDBG (false);
-
-    const uint32_t num_hw_points = NumSupportedHardwareBreakpoints();
-    if (kret == KERN_SUCCESS)
-    {
-        if (hw_index < num_hw_points)
-        {
-            dbg.bcr[hw_index] = 0;
-//            if (log) log->Printf ("RegisterContextDarwin_arm::SetHardwareBreakpoint( %u ) - BVR%u = 0x%8.8x  BCR%u = 0x%8.8x",
-//                    hw_index,
-//                    hw_index,
-//                    dbg.bvr[hw_index],
-//                    hw_index,
-//                    dbg.bcr[hw_index]);
-
-            kret = WriteDBG();
-
-            if (kret == KERN_SUCCESS)
-                return true;
-        }
+bool RegisterContextDarwin_arm::ClearHardwareBreakpoint(uint32_t hw_index) {
+  int kret = ReadDBG(false);
+
+  const uint32_t num_hw_points = NumSupportedHardwareBreakpoints();
+  if (kret == KERN_SUCCESS) {
+    if (hw_index < num_hw_points) {
+      dbg.bcr[hw_index] = 0;
+      //            if (log) log->Printf
+      //            ("RegisterContextDarwin_arm::SetHardwareBreakpoint( %u ) -
+      //            BVR%u = 0x%8.8x  BCR%u = 0x%8.8x",
+      //                    hw_index,
+      //                    hw_index,
+      //                    dbg.bvr[hw_index],
+      //                    hw_index,
+      //                    dbg.bcr[hw_index]);
+
+      kret = WriteDBG();
+
+      if (kret == KERN_SUCCESS)
+        return true;
     }
-    return false;
+  }
+  return false;
 }
 
-uint32_t
-RegisterContextDarwin_arm::NumSupportedHardwareWatchpoints ()
-{
-#if defined (__arm__)
-    // Set the init value to something that will let us know that we need to
-    // autodetect how many watchpoints are supported dynamically...
-    static uint32_t g_num_supported_hw_watchpoints = UINT32_MAX;
-    if (g_num_supported_hw_watchpoints == UINT32_MAX)
-    {
-        // Set this to zero in case we can't tell if there are any HW breakpoints
-        g_num_supported_hw_watchpoints = 0;
-
-        uint32_t register_DBGDIDR;
-        asm("mrc p14, 0, %0, c0, c0, 0" : "=r" (register_DBGDIDR));
-        g_num_supported_hw_watchpoints = Bits32 (register_DBGDIDR, 31, 28) + 1;
-//        if (log) log->Printf ("DBGDIDR=0x%8.8x (number WRP pairs = %u)", register_DBGDIDR, g_num_supported_hw_watchpoints);
-    }
-    return g_num_supported_hw_watchpoints;
+uint32_t RegisterContextDarwin_arm::NumSupportedHardwareWatchpoints() {
+#if defined(__arm__)
+  // Set the init value to something that will let us know that we need to
+  // autodetect how many watchpoints are supported dynamically...
+  static uint32_t g_num_supported_hw_watchpoints = UINT32_MAX;
+  if (g_num_supported_hw_watchpoints == UINT32_MAX) {
+    // Set this to zero in case we can't tell if there are any HW breakpoints
+    g_num_supported_hw_watchpoints = 0;
+
+    uint32_t register_DBGDIDR;
+    asm("mrc p14, 0, %0, c0, c0, 0" : "=r"(register_DBGDIDR));
+    g_num_supported_hw_watchpoints = Bits32(register_DBGDIDR, 31, 28) + 1;
+    //        if (log) log->Printf ("DBGDIDR=0x%8.8x (number WRP pairs = %u)",
+    //        register_DBGDIDR, g_num_supported_hw_watchpoints);
+  }
+  return g_num_supported_hw_watchpoints;
 #else
-    // TODO: figure out remote case here!
-    return 2;
+  // TODO: figure out remote case here!
+  return 2;
 #endif
 }
 
+uint32_t RegisterContextDarwin_arm::SetHardwareWatchpoint(lldb::addr_t addr,
+                                                          size_t size,
+                                                          bool read,
+                                                          bool write) {
+  //    if (log) log->Printf
+  //    ("RegisterContextDarwin_arm::EnableHardwareWatchpoint(addr = %8.8p, size
+  //    = %u, read = %u, write = %u)", addr, size, read, write);
 
-uint32_t
-RegisterContextDarwin_arm::SetHardwareWatchpoint (lldb::addr_t addr, size_t size, bool read, bool write)
-{
-//    if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareWatchpoint(addr = %8.8p, size = %u, read = %u, write = %u)", addr, size, read, write);
+  const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
 
-    const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
+  // Can't watch zero bytes
+  if (size == 0)
+    return LLDB_INVALID_INDEX32;
 
-    // Can't watch zero bytes
-    if (size == 0)
-        return LLDB_INVALID_INDEX32;
+  // We must watch for either read or write
+  if (read == false && write == false)
+    return LLDB_INVALID_INDEX32;
 
-    // We must watch for either read or write
-    if (read == false && write == false)
-        return LLDB_INVALID_INDEX32;
+  // Can't watch more than 4 bytes per WVR/WCR pair
+  if (size > 4)
+    return LLDB_INVALID_INDEX32;
 
-    // Can't watch more than 4 bytes per WVR/WCR pair
-    if (size > 4)
-        return LLDB_INVALID_INDEX32;
+  // We can only watch up to four bytes that follow a 4 byte aligned address
+  // per watchpoint register pair. Since we have at most so we can only watch
+  // until the next 4 byte boundary and we need to make sure we can properly
+  // encode this.
+  uint32_t addr_word_offset = addr % 4;
+  //    if (log) log->Printf
+  //    ("RegisterContextDarwin_arm::EnableHardwareWatchpoint() -
+  //    addr_word_offset = 0x%8.8x", addr_word_offset);
+
+  uint32_t byte_mask = ((1u << size) - 1u) << addr_word_offset;
+  //    if (log) log->Printf
+  //    ("RegisterContextDarwin_arm::EnableHardwareWatchpoint() - byte_mask =
+  //    0x%8.8x", byte_mask);
+  if (byte_mask > 0xfu)
+    return LLDB_INVALID_INDEX32;
 
-    // We can only watch up to four bytes that follow a 4 byte aligned address
-    // per watchpoint register pair. Since we have at most so we can only watch
-    // until the next 4 byte boundary and we need to make sure we can properly
-    // encode this.
-    uint32_t addr_word_offset = addr % 4;
-//    if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareWatchpoint() - addr_word_offset = 0x%8.8x", addr_word_offset);
+  // Read the debug state
+  int kret = ReadDBG(false);
 
-    uint32_t byte_mask = ((1u << size) - 1u) << addr_word_offset;
-//    if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareWatchpoint() - byte_mask = 0x%8.8x", byte_mask);
-    if (byte_mask > 0xfu)
-        return LLDB_INVALID_INDEX32;
+  if (kret == KERN_SUCCESS) {
+    // Check to make sure we have the needed hardware support
+    uint32_t i = 0;
 
-    // Read the debug state
-    int kret = ReadDBG (false);
+    for (i = 0; i < num_hw_watchpoints; ++i) {
+      if ((dbg.wcr[i] & WCR_ENABLE) == 0)
+        break; // We found an available hw breakpoint slot (in i)
+    }
 
-    if (kret == KERN_SUCCESS)
-    {
-        // Check to make sure we have the needed hardware support
-        uint32_t i = 0;
-
-        for (i=0; i<num_hw_watchpoints; ++i)
-        {
-            if ((dbg.wcr[i] & WCR_ENABLE) == 0)
-                break; // We found an available hw breakpoint slot (in i)
-        }
-
-        // See if we found an available hw breakpoint slot above
-        if (i < num_hw_watchpoints)
-        {
-            // Make the byte_mask into a valid Byte Address Select mask
-            uint32_t byte_address_select = byte_mask << 5;
-            // Make sure bits 1:0 are clear in our address
-            dbg.wvr[i] = addr & ~((lldb::addr_t)3);
-            dbg.wcr[i] =  byte_address_select |       // Which bytes that follow the IMVA that we will watch
-                                    S_USER |                    // Stop only in user mode
-                                    (read ? WCR_LOAD : 0) |     // Stop on read access?
-                                    (write ? WCR_STORE : 0) |   // Stop on write access?
-                                    WCR_ENABLE;                 // Enable this watchpoint;
-
-            kret = WriteDBG();
-//            if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareWatchpoint() WriteDBG() => 0x%8.8x.", kret);
-
-            if (kret == KERN_SUCCESS)
-                return i;
-        }
-        else
-        {
-//            if (log) log->Printf ("RegisterContextDarwin_arm::EnableHardwareWatchpoint(): All hardware resources (%u) are in use.", num_hw_watchpoints);
-        }
+    // See if we found an available hw breakpoint slot above
+    if (i < num_hw_watchpoints) {
+      // Make the byte_mask into a valid Byte Address Select mask
+      uint32_t byte_address_select = byte_mask << 5;
+      // Make sure bits 1:0 are clear in our address
+      dbg.wvr[i] = addr & ~((lldb::addr_t)3);
+      dbg.wcr[i] = byte_address_select |     // Which bytes that follow the IMVA
+                                             // that we will watch
+                   S_USER |                  // Stop only in user mode
+                   (read ? WCR_LOAD : 0) |   // Stop on read access?
+                   (write ? WCR_STORE : 0) | // Stop on write access?
+                   WCR_ENABLE;               // Enable this watchpoint;
+
+      kret = WriteDBG();
+      //            if (log) log->Printf
+      //            ("RegisterContextDarwin_arm::EnableHardwareWatchpoint()
+      //            WriteDBG() => 0x%8.8x.", kret);
+
+      if (kret == KERN_SUCCESS)
+        return i;
+    } else {
+      //            if (log) log->Printf
+      //            ("RegisterContextDarwin_arm::EnableHardwareWatchpoint(): All
+      //            hardware resources (%u) are in use.", num_hw_watchpoints);
     }
-    return LLDB_INVALID_INDEX32;
+  }
+  return LLDB_INVALID_INDEX32;
 }
 
-bool
-RegisterContextDarwin_arm::ClearHardwareWatchpoint (uint32_t hw_index)
-{
-    int kret = ReadDBG (false);
-
-    const uint32_t num_hw_points = NumSupportedHardwareWatchpoints();
-    if (kret == KERN_SUCCESS)
-    {
-        if (hw_index < num_hw_points)
-        {
-            dbg.wcr[hw_index] = 0;
-//            if (log) log->Printf ("RegisterContextDarwin_arm::ClearHardwareWatchpoint( %u ) - WVR%u = 0x%8.8x  WCR%u = 0x%8.8x",
-//                    hw_index,
-//                    hw_index,
-//                    dbg.wvr[hw_index],
-//                    hw_index,
-//                    dbg.wcr[hw_index]);
-
-            kret = WriteDBG();
-
-            if (kret == KERN_SUCCESS)
-                return true;
-        }
+bool RegisterContextDarwin_arm::ClearHardwareWatchpoint(uint32_t hw_index) {
+  int kret = ReadDBG(false);
+
+  const uint32_t num_hw_points = NumSupportedHardwareWatchpoints();
+  if (kret == KERN_SUCCESS) {
+    if (hw_index < num_hw_points) {
+      dbg.wcr[hw_index] = 0;
+      //            if (log) log->Printf
+      //            ("RegisterContextDarwin_arm::ClearHardwareWatchpoint( %u ) -
+      //            WVR%u = 0x%8.8x  WCR%u = 0x%8.8x",
+      //                    hw_index,
+      //                    hw_index,
+      //                    dbg.wvr[hw_index],
+      //                    hw_index,
+      //                    dbg.wcr[hw_index]);
+
+      kret = WriteDBG();
+
+      if (kret == KERN_SUCCESS)
+        return true;
     }
-    return false;
+  }
+  return false;
 }
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.h
index 4e831b5..cdf3479 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.h
@@ -14,317 +14,256 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
 #include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
 
 // BCR address match type
-#define BCR_M_IMVA_MATCH        ((uint32_t)(0u << 21))
-#define BCR_M_CONTEXT_ID_MATCH  ((uint32_t)(1u << 21))
-#define BCR_M_IMVA_MISMATCH     ((uint32_t)(2u << 21))
-#define BCR_M_RESERVED          ((uint32_t)(3u << 21))
+#define BCR_M_IMVA_MATCH ((uint32_t)(0u << 21))
+#define BCR_M_CONTEXT_ID_MATCH ((uint32_t)(1u << 21))
+#define BCR_M_IMVA_MISMATCH ((uint32_t)(2u << 21))
+#define BCR_M_RESERVED ((uint32_t)(3u << 21))
 
 // Link a BVR/BCR or WVR/WCR pair to another
-#define E_ENABLE_LINKING        ((uint32_t)(1u << 20))
+#define E_ENABLE_LINKING ((uint32_t)(1u << 20))
 
 // Byte Address Select
-#define BAS_IMVA_PLUS_0         ((uint32_t)(1u << 5))
-#define BAS_IMVA_PLUS_1         ((uint32_t)(1u << 6))
-#define BAS_IMVA_PLUS_2         ((uint32_t)(1u << 7))
-#define BAS_IMVA_PLUS_3         ((uint32_t)(1u << 8))
-#define BAS_IMVA_0_1            ((uint32_t)(3u << 5))
-#define BAS_IMVA_2_3            ((uint32_t)(3u << 7))
-#define BAS_IMVA_ALL            ((uint32_t)(0xfu << 5))
+#define BAS_IMVA_PLUS_0 ((uint32_t)(1u << 5))
+#define BAS_IMVA_PLUS_1 ((uint32_t)(1u << 6))
+#define BAS_IMVA_PLUS_2 ((uint32_t)(1u << 7))
+#define BAS_IMVA_PLUS_3 ((uint32_t)(1u << 8))
+#define BAS_IMVA_0_1 ((uint32_t)(3u << 5))
+#define BAS_IMVA_2_3 ((uint32_t)(3u << 7))
+#define BAS_IMVA_ALL ((uint32_t)(0xfu << 5))
 
 // Break only in privileged or user mode
-#define S_RSVD                  ((uint32_t)(0u << 1))
-#define S_PRIV                  ((uint32_t)(1u << 1))
-#define S_USER                  ((uint32_t)(2u << 1))
-#define S_PRIV_USER             ((S_PRIV) | (S_USER))
+#define S_RSVD ((uint32_t)(0u << 1))
+#define S_PRIV ((uint32_t)(1u << 1))
+#define S_USER ((uint32_t)(2u << 1))
+#define S_PRIV_USER ((S_PRIV) | (S_USER))
 
-#define BCR_ENABLE              ((uint32_t)(1u))
-#define WCR_ENABLE              ((uint32_t)(1u))
+#define BCR_ENABLE ((uint32_t)(1u))
+#define WCR_ENABLE ((uint32_t)(1u))
 
 // Watchpoint load/store
-#define WCR_LOAD                ((uint32_t)(1u << 3))
-#define WCR_STORE               ((uint32_t)(1u << 4))
+#define WCR_LOAD ((uint32_t)(1u << 3))
+#define WCR_STORE ((uint32_t)(1u << 4))
 
-class RegisterContextDarwin_arm : public lldb_private::RegisterContext
-{
+class RegisterContextDarwin_arm : public lldb_private::RegisterContext {
 public:
-    RegisterContextDarwin_arm(lldb_private::Thread &thread, uint32_t concrete_frame_idx);
+  RegisterContextDarwin_arm(lldb_private::Thread &thread,
+                            uint32_t concrete_frame_idx);
 
-    ~RegisterContextDarwin_arm() override;
+  ~RegisterContextDarwin_arm() override;
 
-    void
-    InvalidateAllRegisters() override;
+  void InvalidateAllRegisters() override;
 
-    size_t
-    GetRegisterCount() override;
+  size_t GetRegisterCount() override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
 
-    size_t
-    GetRegisterSetCount() override;
+  size_t GetRegisterSetCount() override;
 
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t set) override;
+  const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
 
-    bool
-    ReadRegister(const lldb_private::RegisterInfo *reg_info,
-                 lldb_private::RegisterValue &reg_value) override;
-    
-    bool
-    WriteRegister(const lldb_private::RegisterInfo *reg_info,
-                  const lldb_private::RegisterValue &reg_value) override;
-    
-    bool
-    ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+  bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+                    lldb_private::RegisterValue &reg_value) override;
 
-    bool
-    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+  bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+                     const lldb_private::RegisterValue &reg_value) override;
 
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+  bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
 
-    uint32_t
-    NumSupportedHardwareBreakpoints() override;
+  bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
 
-    uint32_t
-    SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
 
-    bool
-    ClearHardwareBreakpoint(uint32_t hw_idx) override;
+  uint32_t NumSupportedHardwareBreakpoints() override;
 
-    uint32_t
-    NumSupportedHardwareWatchpoints() override;
+  uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
 
-    uint32_t
-    SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read, bool write) override;
+  bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
 
-    bool
-    ClearHardwareWatchpoint(uint32_t hw_index) override;
+  uint32_t NumSupportedHardwareWatchpoints() override;
 
-    struct GPR
-    {
-        uint32_t    r[16];  // R0-R15
-        uint32_t    cpsr;   // CPSR
-    };
+  uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read,
+                                 bool write) override;
 
-    struct QReg
-    {
-        uint8_t bytes[16];
-    };
+  bool ClearHardwareWatchpoint(uint32_t hw_index) override;
 
-    struct FPU
-    {
-        union {
-            uint32_t s[32];
-            uint64_t d[32];
-            QReg     q[16];  // the 128-bit NEON registers
-        } floats;
-        uint32_t fpscr;
-    };
+  struct GPR {
+    uint32_t r[16]; // R0-R15
+    uint32_t cpsr;  // CPSR
+  };
 
-//  struct NeonReg
-//  {
-//      uint8_t bytes[16];
-//  };
-//
-//  struct VFPv3
-//  {
-//      union {
-//          uint32_t s[32];
-//          uint64_t d[32];
-//          NeonReg  q[16];
-//      } v3;
-//      uint32_t fpscr;
-//  };
-
-    struct EXC
-    {
-        uint32_t    exception;
-        uint32_t    fsr; /* Fault status */
-        uint32_t    far; /* Virtual Fault Address */
-    };
-
-    struct DBG
-    {
-        uint32_t bvr[16];
-        uint32_t bcr[16];
-        uint32_t wvr[16];
-        uint32_t wcr[16];
-    };
-
-    static void
-    LogDBGRegisters (lldb_private::Log *log, const DBG& dbg);
+  struct QReg {
+    uint8_t bytes[16];
+  };
+
+  struct FPU {
+    union {
+      uint32_t s[32];
+      uint64_t d[32];
+      QReg q[16]; // the 128-bit NEON registers
+    } floats;
+    uint32_t fpscr;
+  };
+
+  //  struct NeonReg
+  //  {
+  //      uint8_t bytes[16];
+  //  };
+  //
+  //  struct VFPv3
+  //  {
+  //      union {
+  //          uint32_t s[32];
+  //          uint64_t d[32];
+  //          NeonReg  q[16];
+  //      } v3;
+  //      uint32_t fpscr;
+  //  };
+
+  struct EXC {
+    uint32_t exception;
+    uint32_t fsr; /* Fault status */
+    uint32_t far; /* Virtual Fault Address */
+  };
+
+  struct DBG {
+    uint32_t bvr[16];
+    uint32_t bcr[16];
+    uint32_t wvr[16];
+    uint32_t wcr[16];
+  };
+
+  static void LogDBGRegisters(lldb_private::Log *log, const DBG &dbg);
 
 protected:
-    enum
-    {
-        GPRRegSet = 1,    // ARM_THREAD_STATE
-        GPRAltRegSet = 9, // ARM_THREAD_STATE32
-        FPURegSet = 2,    // ARM_VFP_STATE
-        EXCRegSet = 3,    // ARM_EXCEPTION_STATE
-        DBGRegSet = 4     // ARM_DEBUG_STATE
-    };
-
-    enum
-    {
-        GPRWordCount = sizeof(GPR)/sizeof(uint32_t),
-        FPUWordCount = sizeof(FPU)/sizeof(uint32_t),
-        EXCWordCount = sizeof(EXC)/sizeof(uint32_t),
-        DBGWordCount = sizeof(DBG)/sizeof(uint32_t)
-    };
-
-    enum
-    {
-        Read = 0,
-        Write = 1,
-        kNumErrors = 2
-    };
-
-    GPR gpr;
-    FPU fpu;
-    EXC exc;
-    DBG dbg;
-    int gpr_errs[2]; // Read/Write errors
-    int fpu_errs[2]; // Read/Write errors
-    int exc_errs[2]; // Read/Write errors
-    int dbg_errs[2]; // Read/Write errors
-
-    void
-    InvalidateAllRegisterStates()
-    {
-        SetError (GPRRegSet, Read, -1);
-        SetError (FPURegSet, Read, -1);
-        SetError (EXCRegSet, Read, -1);
+  enum {
+    GPRRegSet = 1,    // ARM_THREAD_STATE
+    GPRAltRegSet = 9, // ARM_THREAD_STATE32
+    FPURegSet = 2,    // ARM_VFP_STATE
+    EXCRegSet = 3,    // ARM_EXCEPTION_STATE
+    DBGRegSet = 4     // ARM_DEBUG_STATE
+  };
+
+  enum {
+    GPRWordCount = sizeof(GPR) / sizeof(uint32_t),
+    FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
+    EXCWordCount = sizeof(EXC) / sizeof(uint32_t),
+    DBGWordCount = sizeof(DBG) / sizeof(uint32_t)
+  };
+
+  enum { Read = 0, Write = 1, kNumErrors = 2 };
+
+  GPR gpr;
+  FPU fpu;
+  EXC exc;
+  DBG dbg;
+  int gpr_errs[2]; // Read/Write errors
+  int fpu_errs[2]; // Read/Write errors
+  int exc_errs[2]; // Read/Write errors
+  int dbg_errs[2]; // Read/Write errors
+
+  void InvalidateAllRegisterStates() {
+    SetError(GPRRegSet, Read, -1);
+    SetError(FPURegSet, Read, -1);
+    SetError(EXCRegSet, Read, -1);
+  }
+
+  int GetError(int flavor, uint32_t err_idx) const {
+    if (err_idx < kNumErrors) {
+      switch (flavor) {
+      // When getting all errors, just OR all values together to see if
+      // we got any kind of error.
+      case GPRRegSet:
+        return gpr_errs[err_idx];
+      case FPURegSet:
+        return fpu_errs[err_idx];
+      case EXCRegSet:
+        return exc_errs[err_idx];
+      case DBGRegSet:
+        return dbg_errs[err_idx];
+      default:
+        break;
+      }
     }
-
-    int
-    GetError (int flavor, uint32_t err_idx) const
-    {
-        if (err_idx < kNumErrors)
-        {
-            switch (flavor)
-            {
-            // When getting all errors, just OR all values together to see if
-            // we got any kind of error.
-            case GPRRegSet:    return gpr_errs[err_idx];
-            case FPURegSet:    return fpu_errs[err_idx];
-            case EXCRegSet:    return exc_errs[err_idx];
-            case DBGRegSet:    return dbg_errs[err_idx];
-            default: break;
-            }
-        }
-        return -1;
+    return -1;
+  }
+
+  bool SetError(int flavor, uint32_t err_idx, int err) {
+    if (err_idx < kNumErrors) {
+      switch (flavor) {
+      case GPRRegSet:
+        gpr_errs[err_idx] = err;
+        return true;
+
+      case FPURegSet:
+        fpu_errs[err_idx] = err;
+        return true;
+
+      case EXCRegSet:
+        exc_errs[err_idx] = err;
+        return true;
+
+      case DBGRegSet:
+        exc_errs[err_idx] = err;
+        return true;
+
+      default:
+        break;
+      }
     }
+    return false;
+  }
 
-    bool
-    SetError (int flavor, uint32_t err_idx, int err)
-    {
-        if (err_idx < kNumErrors)
-        {
-            switch (flavor)
-            {
-            case GPRRegSet:
-                gpr_errs[err_idx] = err;
-                return true;
-
-            case FPURegSet:
-                fpu_errs[err_idx] = err;
-                return true;
-
-            case EXCRegSet:
-                exc_errs[err_idx] = err;
-                return true;
-
-            case DBGRegSet:
-                exc_errs[err_idx] = err;
-                return true;
-
-            default: break;
-            }
-        }
-        return false;
-    }
+  bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }
 
-    bool
-    RegisterSetIsCached (int set) const
-    {
-        return GetError(set, Read) == 0;
-    }
+  int ReadGPR(bool force);
 
-    int
-    ReadGPR (bool force);
+  int ReadFPU(bool force);
 
-    int
-    ReadFPU (bool force);
+  int ReadEXC(bool force);
 
-    int
-    ReadEXC (bool force);
+  int ReadDBG(bool force);
 
-    int
-    ReadDBG (bool force);
+  int WriteGPR();
 
-    int
-    WriteGPR ();
+  int WriteFPU();
 
-    int
-    WriteFPU ();
+  int WriteEXC();
 
-    int
-    WriteEXC ();
+  int WriteDBG();
 
-    int
-    WriteDBG ();
+  // Subclasses override these to do the actual reading.
+  virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) { return -1; }
 
-    
-    // Subclasses override these to do the actual reading.
-    virtual int
-    DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr)
-    {
-        return -1;
-    }
-    
-    virtual int
-    DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
-    
-    virtual int
-    DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc) = 0;
+  virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
+
+  virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;
+
+  virtual int DoReadDBG(lldb::tid_t tid, int flavor, DBG &dbg) = 0;
+
+  virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
 
-    virtual int
-    DoReadDBG (lldb::tid_t tid, int flavor, DBG &dbg) = 0;
+  virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
 
-    virtual int
-    DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
-    
-    virtual int
-    DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
-    
-    virtual int
-    DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc) = 0;
+  virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;
 
-    virtual int
-    DoWriteDBG (lldb::tid_t tid, int flavor, const DBG &dbg) = 0;
+  virtual int DoWriteDBG(lldb::tid_t tid, int flavor, const DBG &dbg) = 0;
 
-    int
-    ReadRegisterSet (uint32_t set, bool force);
+  int ReadRegisterSet(uint32_t set, bool force);
 
-    int
-    WriteRegisterSet (uint32_t set);
+  int WriteRegisterSet(uint32_t set);
 
-    static uint32_t
-    GetRegisterNumber (uint32_t reg_kind, uint32_t reg_num);
+  static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);
 
-    static int
-    GetSetForNativeRegNum (int reg_num);
+  static int GetSetForNativeRegNum(int reg_num);
 
-    static size_t
-    GetRegisterInfosCount ();
+  static size_t GetRegisterInfosCount();
 
-    static const lldb_private::RegisterInfo *
-    GetRegisterInfos ();
+  static const lldb_private::RegisterInfo *GetRegisterInfos();
 };
 
 #endif // liblldb_RegisterContextDarwin_arm_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp
index 53cb9de..64983a2 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp
@@ -1,4 +1,5 @@
-//===-- RegisterContextDarwin_arm64.cpp ---------------------------*- C++ -*-===//
+//===-- RegisterContextDarwin_arm64.cpp ---------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -24,6 +25,8 @@
 #include "lldb/Core/RegisterValue.h"
 #include "lldb/Core/Scalar.h"
 #include "lldb/Host/Endian.h"
+#include "lldb/Target/Process.h"
+#include "lldb/Target/Thread.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/Compiler.h"
 
@@ -41,18 +44,36 @@
 using namespace lldb;
 using namespace lldb_private;
 
-
-#define GPR_OFFSET(idx) ((idx) * 8)
-#define GPR_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::GPR, reg))
-
-#define FPU_OFFSET(idx) ((idx) * 16 + sizeof (RegisterContextDarwin_arm64::GPR))
-#define FPU_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::FPU, reg))
-
-#define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::EXC, reg) + sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU))
-#define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::DBG, reg) + sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU) + sizeof (RegisterContextDarwin_arm64::EXC))
-
-#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextDarwin_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU) + sizeof (RegisterContextDarwin_arm64::EXC))
+#define GPR_OFFSET(idx) ((idx)*8)
+#define GPR_OFFSET_NAME(reg)                                                   \
+  (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::GPR, reg))
+
+#define FPU_OFFSET(idx) ((idx)*16 + sizeof(RegisterContextDarwin_arm64::GPR))
+#define FPU_OFFSET_NAME(reg)                                                   \
+  (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::FPU, reg))
+
+#define EXC_OFFSET_NAME(reg)                                                   \
+  (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::EXC, reg) +            \
+   sizeof(RegisterContextDarwin_arm64::GPR) +                                  \
+   sizeof(RegisterContextDarwin_arm64::FPU))
+#define DBG_OFFSET_NAME(reg)                                                   \
+  (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::DBG, reg) +            \
+   sizeof(RegisterContextDarwin_arm64::GPR) +                                  \
+   sizeof(RegisterContextDarwin_arm64::FPU) +                                  \
+   sizeof(RegisterContextDarwin_arm64::EXC))
+
+#define DEFINE_DBG(reg, i)                                                     \
+  #reg, NULL,                                                                  \
+      sizeof(((RegisterContextDarwin_arm64::DBG *) NULL)->reg[i]),             \
+              DBG_OFFSET_NAME(reg[i]), eEncodingUint, eFormatHex,              \
+                              {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,       \
+                               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,       \
+                               LLDB_INVALID_REGNUM },                          \
+                               NULL, NULL, NULL, 0
+#define REG_CONTEXT_SIZE                                                       \
+  (sizeof(RegisterContextDarwin_arm64::GPR) +                                  \
+   sizeof(RegisterContextDarwin_arm64::FPU) +                                  \
+   sizeof(RegisterContextDarwin_arm64::EXC))
 
 //-----------------------------------------------------------------------------
 // Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
@@ -62,153 +83,66 @@ using namespace lldb_private;
 #undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
 
 // General purpose registers
-static uint32_t
-g_gpr_regnums[] =
-{
-    gpr_x0,
-    gpr_x1,
-    gpr_x2,
-    gpr_x3,
-    gpr_x4,
-    gpr_x5,
-    gpr_x6,
-    gpr_x7,
-    gpr_x8,
-    gpr_x9,
-    gpr_x10,
-    gpr_x11,
-    gpr_x12,
-    gpr_x13,
-    gpr_x14,
-    gpr_x15,
-    gpr_x16,
-    gpr_x17,
-    gpr_x18,
-    gpr_x19,
-    gpr_x20,
-    gpr_x21,
-    gpr_x22,
-    gpr_x23,
-    gpr_x24,
-    gpr_x25,
-    gpr_x26,
-    gpr_x27,
-    gpr_x28,
-    gpr_fp,
-    gpr_lr,
-    gpr_sp,
-    gpr_pc,
-    gpr_cpsr
-};
+static uint32_t g_gpr_regnums[] = {
+    gpr_x0,  gpr_x1,  gpr_x2,  gpr_x3,  gpr_x4,  gpr_x5,  gpr_x6,
+    gpr_x7,  gpr_x8,  gpr_x9,  gpr_x10, gpr_x11, gpr_x12, gpr_x13,
+    gpr_x14, gpr_x15, gpr_x16, gpr_x17, gpr_x18, gpr_x19, gpr_x20,
+    gpr_x21, gpr_x22, gpr_x23, gpr_x24, gpr_x25, gpr_x26, gpr_x27,
+    gpr_x28, gpr_fp,  gpr_lr,  gpr_sp,  gpr_pc,  gpr_cpsr};
 
 // Floating point registers
-static uint32_t
-g_fpu_regnums[] =
-{
-    fpu_v0,
-    fpu_v1,
-    fpu_v2,
-    fpu_v3,
-    fpu_v4,
-    fpu_v5,
-    fpu_v6,
-    fpu_v7,
-    fpu_v8,
-    fpu_v9,
-    fpu_v10,
-    fpu_v11,
-    fpu_v12,
-    fpu_v13,
-    fpu_v14,
-    fpu_v15,
-    fpu_v16,
-    fpu_v17,
-    fpu_v18,
-    fpu_v19,
-    fpu_v20,
-    fpu_v21,
-    fpu_v22,
-    fpu_v23,
-    fpu_v24,
-    fpu_v25,
-    fpu_v26,
-    fpu_v27,
-    fpu_v28,
-    fpu_v29,
-    fpu_v30,
-    fpu_v31,
-    fpu_fpsr,
-    fpu_fpcr
-};
+static uint32_t g_fpu_regnums[] = {
+    fpu_v0,  fpu_v1,  fpu_v2,  fpu_v3,  fpu_v4,   fpu_v5,  fpu_v6,
+    fpu_v7,  fpu_v8,  fpu_v9,  fpu_v10, fpu_v11,  fpu_v12, fpu_v13,
+    fpu_v14, fpu_v15, fpu_v16, fpu_v17, fpu_v18,  fpu_v19, fpu_v20,
+    fpu_v21, fpu_v22, fpu_v23, fpu_v24, fpu_v25,  fpu_v26, fpu_v27,
+    fpu_v28, fpu_v29, fpu_v30, fpu_v31, fpu_fpsr, fpu_fpcr};
 
 // Exception registers
 
-static uint32_t
-g_exc_regnums[] =
-{
-    exc_far,
-    exc_esr,
-    exc_exception
-};
-
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos_arm64);
-
-RegisterContextDarwin_arm64::RegisterContextDarwin_arm64(Thread &thread, uint32_t concrete_frame_idx) :
-    RegisterContext(thread, concrete_frame_idx),
-    gpr(),
-    fpu(),
-    exc()
-{
-    uint32_t i;
-    for (i=0; i<kNumErrors; i++)
-    {
-        gpr_errs[i] = -1;
-        fpu_errs[i] = -1;
-        exc_errs[i] = -1;
-    }
-}
+static uint32_t g_exc_regnums[] = {exc_far, exc_esr, exc_exception};
+
+static size_t k_num_register_infos =
+    llvm::array_lengthof(g_register_infos_arm64_le);
 
-RegisterContextDarwin_arm64::~RegisterContextDarwin_arm64()
-{
+RegisterContextDarwin_arm64::RegisterContextDarwin_arm64(
+    Thread &thread, uint32_t concrete_frame_idx)
+    : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() {
+  uint32_t i;
+  for (i = 0; i < kNumErrors; i++) {
+    gpr_errs[i] = -1;
+    fpu_errs[i] = -1;
+    exc_errs[i] = -1;
+  }
 }
 
+RegisterContextDarwin_arm64::~RegisterContextDarwin_arm64() {}
 
-void
-RegisterContextDarwin_arm64::InvalidateAllRegisters ()
-{
-    InvalidateAllRegisterStates();
+void RegisterContextDarwin_arm64::InvalidateAllRegisters() {
+  InvalidateAllRegisterStates();
 }
 
-
-size_t
-RegisterContextDarwin_arm64::GetRegisterCount ()
-{
-    assert(k_num_register_infos == k_num_registers);
-    return k_num_registers;
+size_t RegisterContextDarwin_arm64::GetRegisterCount() {
+  assert(k_num_register_infos == k_num_registers);
+  return k_num_registers;
 }
 
 const RegisterInfo *
-RegisterContextDarwin_arm64::GetRegisterInfoAtIndex (size_t reg)
-{
-    assert(k_num_register_infos == k_num_registers);
-    if (reg < k_num_registers)
-        return &g_register_infos_arm64[reg];
-    return NULL;
+RegisterContextDarwin_arm64::GetRegisterInfoAtIndex(size_t reg) {
+  assert(k_num_register_infos == k_num_registers);
+  if (reg < k_num_registers)
+    return &g_register_infos_arm64_le[reg];
+  return NULL;
 }
 
-size_t
-RegisterContextDarwin_arm64::GetRegisterInfosCount ()
-{
-    return k_num_register_infos;
+size_t RegisterContextDarwin_arm64::GetRegisterInfosCount() {
+  return k_num_register_infos;
 }
 
-const RegisterInfo *
-RegisterContextDarwin_arm64::GetRegisterInfos ()
-{
-    return g_register_infos_arm64;
+const RegisterInfo *RegisterContextDarwin_arm64::GetRegisterInfos() {
+  return g_register_infos_arm64_le;
 }
 
-
 // Number of registers in each register set
 const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
 const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
@@ -219,726 +153,895 @@ const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
 // of zero is for all registers, followed by other registers sets. The
 // register information for the all register set need not be filled in.
 //----------------------------------------------------------------------
-static const RegisterSet g_reg_sets[] =
-{
-    { "General Purpose Registers",  "gpr",  k_num_gpr_registers,    g_gpr_regnums,      },
-    { "Floating Point Registers",   "fpu",  k_num_fpu_registers,    g_fpu_regnums       },
-    { "Exception State Registers",  "exc",  k_num_exc_registers,    g_exc_regnums       }
-};
+static const RegisterSet g_reg_sets[] = {
+    {
+        "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums,
+    },
+    {"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
+    {"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
 
 const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
 
-
-size_t
-RegisterContextDarwin_arm64::GetRegisterSetCount ()
-{
-    return k_num_regsets;
+size_t RegisterContextDarwin_arm64::GetRegisterSetCount() {
+  return k_num_regsets;
 }
 
-const RegisterSet *
-RegisterContextDarwin_arm64::GetRegisterSet (size_t reg_set)
-{
-    if (reg_set < k_num_regsets)
-        return &g_reg_sets[reg_set];
-    return NULL;
+const RegisterSet *RegisterContextDarwin_arm64::GetRegisterSet(size_t reg_set) {
+  if (reg_set < k_num_regsets)
+    return &g_reg_sets[reg_set];
+  return NULL;
 }
 
-
 //----------------------------------------------------------------------
 // Register information definitions for arm64
 //----------------------------------------------------------------------
-int
-RegisterContextDarwin_arm64::GetSetForNativeRegNum (int reg)
-{
-    if (reg < fpu_v0)
-        return GPRRegSet;
-    else if (reg < exc_far)
-        return FPURegSet;
-    else if (reg < k_num_registers)
-        return EXCRegSet;
-    return -1;
+int RegisterContextDarwin_arm64::GetSetForNativeRegNum(int reg) {
+  if (reg < fpu_v0)
+    return GPRRegSet;
+  else if (reg < exc_far)
+    return FPURegSet;
+  else if (reg < k_num_registers)
+    return EXCRegSet;
+  return -1;
 }
 
-int
-RegisterContextDarwin_arm64::ReadGPR (bool force)
-{
-    int set = GPRRegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
-    }
-    return GetError(GPRRegSet, Read);
+int RegisterContextDarwin_arm64::ReadGPR(bool force) {
+  int set = GPRRegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+  }
+  return GetError(GPRRegSet, Read);
 }
 
-int
-RegisterContextDarwin_arm64::ReadFPU (bool force)
-{
-    int set = FPURegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
-    }
-    return GetError(FPURegSet, Read);
+int RegisterContextDarwin_arm64::ReadFPU(bool force) {
+  int set = FPURegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+  }
+  return GetError(FPURegSet, Read);
 }
 
-int
-RegisterContextDarwin_arm64::ReadEXC (bool force)
-{
-    int set = EXCRegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
-    }
-    return GetError(EXCRegSet, Read);
-}
-
-int
-RegisterContextDarwin_arm64::ReadDBG (bool force)
-{
-    int set = DBGRegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadDBG(GetThreadID(), set, dbg));
-    }
-    return GetError(DBGRegSet, Read);
+int RegisterContextDarwin_arm64::ReadEXC(bool force) {
+  int set = EXCRegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
+  }
+  return GetError(EXCRegSet, Read);
 }
 
-int
-RegisterContextDarwin_arm64::WriteGPR ()
-{
-    int set = GPRRegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return KERN_INVALID_ARGUMENT;
-    }
-    SetError (set, Write, DoWriteGPR(GetThreadID(), set, gpr));
-    SetError (set, Read, -1);
-    return GetError(GPRRegSet, Write);
+int RegisterContextDarwin_arm64::ReadDBG(bool force) {
+  int set = DBGRegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadDBG(GetThreadID(), set, dbg));
+  }
+  return GetError(DBGRegSet, Read);
 }
 
-int
-RegisterContextDarwin_arm64::WriteFPU ()
-{
-    int set = FPURegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return KERN_INVALID_ARGUMENT;
-    }
-    SetError (set, Write, DoWriteFPU(GetThreadID(), set, fpu));
-    SetError (set, Read, -1);
-    return GetError(FPURegSet, Write);
+int RegisterContextDarwin_arm64::WriteGPR() {
+  int set = GPRRegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
+    return KERN_INVALID_ARGUMENT;
+  }
+  SetError(set, Write, DoWriteGPR(GetThreadID(), set, gpr));
+  SetError(set, Read, -1);
+  return GetError(GPRRegSet, Write);
 }
 
-int
-RegisterContextDarwin_arm64::WriteEXC ()
-{
-    int set = EXCRegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return KERN_INVALID_ARGUMENT;
-    }
-    SetError (set, Write, DoWriteEXC(GetThreadID(), set, exc));
-    SetError (set, Read, -1);
-    return GetError(EXCRegSet, Write);
+int RegisterContextDarwin_arm64::WriteFPU() {
+  int set = FPURegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
+    return KERN_INVALID_ARGUMENT;
+  }
+  SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu));
+  SetError(set, Read, -1);
+  return GetError(FPURegSet, Write);
 }
 
-int
-RegisterContextDarwin_arm64::WriteDBG ()
-{
-    int set = DBGRegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return KERN_INVALID_ARGUMENT;
-    }
-    SetError (set, Write, DoWriteDBG(GetThreadID(), set, dbg));
-    SetError (set, Read, -1);
-    return GetError(DBGRegSet, Write);
+int RegisterContextDarwin_arm64::WriteEXC() {
+  int set = EXCRegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
+    return KERN_INVALID_ARGUMENT;
+  }
+  SetError(set, Write, DoWriteEXC(GetThreadID(), set, exc));
+  SetError(set, Read, -1);
+  return GetError(EXCRegSet, Write);
 }
 
-
-int
-RegisterContextDarwin_arm64::ReadRegisterSet (uint32_t set, bool force)
-{
-    switch (set)
-    {
-    case GPRRegSet:    return ReadGPR(force);
-    case FPURegSet:    return ReadFPU(force);
-    case EXCRegSet:    return ReadEXC(force);
-    case DBGRegSet:    return ReadDBG(force);
-    default: break;
-    }
+int RegisterContextDarwin_arm64::WriteDBG() {
+  int set = DBGRegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
     return KERN_INVALID_ARGUMENT;
+  }
+  SetError(set, Write, DoWriteDBG(GetThreadID(), set, dbg));
+  SetError(set, Read, -1);
+  return GetError(DBGRegSet, Write);
 }
 
-int
-RegisterContextDarwin_arm64::WriteRegisterSet (uint32_t set)
-{
-    // Make sure we have a valid context to set.
-    if (RegisterSetIsCached(set))
-    {
-        switch (set)
-        {
-        case GPRRegSet:    return WriteGPR();
-        case FPURegSet:    return WriteFPU();
-        case EXCRegSet:    return WriteEXC();
-        case DBGRegSet:    return WriteDBG();
-        default: break;
-        }
-    }
-    return KERN_INVALID_ARGUMENT;
+int RegisterContextDarwin_arm64::ReadRegisterSet(uint32_t set, bool force) {
+  switch (set) {
+  case GPRRegSet:
+    return ReadGPR(force);
+  case FPURegSet:
+    return ReadFPU(force);
+  case EXCRegSet:
+    return ReadEXC(force);
+  case DBGRegSet:
+    return ReadDBG(force);
+  default:
+    break;
+  }
+  return KERN_INVALID_ARGUMENT;
 }
 
-void
-RegisterContextDarwin_arm64::LogDBGRegisters (Log *log, const DBG& dbg)
-{
-    if (log)
-    {
-        for (uint32_t i=0; i<16; i++)
-            log->Printf("BVR%-2u/BCR%-2u = { 0x%8.8llx, 0x%8.8llx } WVR%-2u/WCR%-2u = { 0x%8.8llx, 0x%8.8llx }",
-                i, i, dbg.bvr[i], dbg.bcr[i],
-                i, i, dbg.wvr[i], dbg.wcr[i]);
+int RegisterContextDarwin_arm64::WriteRegisterSet(uint32_t set) {
+  // Make sure we have a valid context to set.
+  if (RegisterSetIsCached(set)) {
+    switch (set) {
+    case GPRRegSet:
+      return WriteGPR();
+    case FPURegSet:
+      return WriteFPU();
+    case EXCRegSet:
+      return WriteEXC();
+    case DBGRegSet:
+      return WriteDBG();
+    default:
+      break;
     }
+  }
+  return KERN_INVALID_ARGUMENT;
 }
 
+void RegisterContextDarwin_arm64::LogDBGRegisters(Log *log, const DBG &dbg) {
+  if (log) {
+    for (uint32_t i = 0; i < 16; i++)
+      log->Printf("BVR%-2u/BCR%-2u = { 0x%8.8llx, 0x%8.8llx } WVR%-2u/WCR%-2u "
+                  "= { 0x%8.8llx, 0x%8.8llx }",
+                  i, i, dbg.bvr[i], dbg.bcr[i], i, i, dbg.wvr[i], dbg.wcr[i]);
+  }
+}
 
-bool
-RegisterContextDarwin_arm64::ReadRegister (const RegisterInfo *reg_info, RegisterValue &value)
-{
-    const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
-    int set = RegisterContextDarwin_arm64::GetSetForNativeRegNum (reg);
-
-    if (set == -1)
-        return false;
-
-    if (ReadRegisterSet(set, false) != KERN_SUCCESS)
-        return false;
+bool RegisterContextDarwin_arm64::ReadRegister(const RegisterInfo *reg_info,
+                                               RegisterValue &value) {
+  const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+  int set = RegisterContextDarwin_arm64::GetSetForNativeRegNum(reg);
 
-    switch (reg)
-    {
-    case gpr_x0:
-    case gpr_x1:
-    case gpr_x2:
-    case gpr_x3:
-    case gpr_x4:
-    case gpr_x5:
-    case gpr_x6:
-    case gpr_x7:
-    case gpr_x8:
-    case gpr_x9:
-    case gpr_x10:
-    case gpr_x11:
-    case gpr_x12:
-    case gpr_x13:
-    case gpr_x14:
-    case gpr_x15:
-    case gpr_x16:
-    case gpr_x17:
-    case gpr_x18:
-    case gpr_x19:
-    case gpr_x20:
-    case gpr_x21:
-    case gpr_x22:
-    case gpr_x23:
-    case gpr_x24:
-    case gpr_x25:
-    case gpr_x26:
-    case gpr_x27:
-    case gpr_x28:
-    case gpr_fp:
-    case gpr_sp:
-    case gpr_lr:
-    case gpr_pc:
-    case gpr_cpsr:
-        value.SetUInt64 (gpr.x[reg - gpr_x0]);
-        break;
-
-    case fpu_v0:
-    case fpu_v1:
-    case fpu_v2:
-    case fpu_v3:
-    case fpu_v4:
-    case fpu_v5:
-    case fpu_v6:
-    case fpu_v7:
-    case fpu_v8:
-    case fpu_v9:
-    case fpu_v10:
-    case fpu_v11:
-    case fpu_v12:
-    case fpu_v13:
-    case fpu_v14:
-    case fpu_v15:
-    case fpu_v16:
-    case fpu_v17:
-    case fpu_v18:
-    case fpu_v19:
-    case fpu_v20:
-    case fpu_v21:
-    case fpu_v22:
-    case fpu_v23:
-    case fpu_v24:
-    case fpu_v25:
-    case fpu_v26:
-    case fpu_v27:
-    case fpu_v28:
-    case fpu_v29:
-    case fpu_v30:
-    case fpu_v31:
-        value.SetBytes(fpu.v[reg].bytes, reg_info->byte_size, endian::InlHostByteOrder());
-        break;
-
-    case fpu_fpsr:
-        value.SetUInt32 (fpu.fpsr);
-        break;
-
-    case fpu_fpcr:
-        value.SetUInt32 (fpu.fpcr);
-        break;
-
-    case exc_exception:
-        value.SetUInt32 (exc.exception);
-        break;
-    case exc_esr:
-        value.SetUInt32 (exc.esr);
-        break;
-    case exc_far:
-        value.SetUInt64 (exc.far);
-        break;
+  if (set == -1)
+    return false;
 
-    default:
-        value.SetValueToInvalid();
-        return false;
+  if (ReadRegisterSet(set, false) != KERN_SUCCESS)
+    return false;
 
+  switch (reg) {
+  case gpr_x0:
+  case gpr_x1:
+  case gpr_x2:
+  case gpr_x3:
+  case gpr_x4:
+  case gpr_x5:
+  case gpr_x6:
+  case gpr_x7:
+  case gpr_x8:
+  case gpr_x9:
+  case gpr_x10:
+  case gpr_x11:
+  case gpr_x12:
+  case gpr_x13:
+  case gpr_x14:
+  case gpr_x15:
+  case gpr_x16:
+  case gpr_x17:
+  case gpr_x18:
+  case gpr_x19:
+  case gpr_x20:
+  case gpr_x21:
+  case gpr_x22:
+  case gpr_x23:
+  case gpr_x24:
+  case gpr_x25:
+  case gpr_x26:
+  case gpr_x27:
+  case gpr_x28:
+  case gpr_fp:
+  case gpr_sp:
+  case gpr_lr:
+  case gpr_pc:
+  case gpr_cpsr:
+    value.SetUInt64(gpr.x[reg - gpr_x0]);
+    break;
+
+  case gpr_w0:
+  case gpr_w1:
+  case gpr_w2:
+  case gpr_w3:
+  case gpr_w4:
+  case gpr_w5:
+  case gpr_w6:
+  case gpr_w7:
+  case gpr_w8:
+  case gpr_w9:
+  case gpr_w10:
+  case gpr_w11:
+  case gpr_w12:
+  case gpr_w13:
+  case gpr_w14:
+  case gpr_w15:
+  case gpr_w16:
+  case gpr_w17:
+  case gpr_w18:
+  case gpr_w19:
+  case gpr_w20:
+  case gpr_w21:
+  case gpr_w22:
+  case gpr_w23:
+  case gpr_w24:
+  case gpr_w25:
+  case gpr_w26:
+  case gpr_w27:
+  case gpr_w28: {
+    ProcessSP process_sp(m_thread.GetProcess());
+    if (process_sp.get()) {
+      DataExtractor regdata(&gpr.x[reg - gpr_w0], 8, process_sp->GetByteOrder(),
+                            process_sp->GetAddressByteSize());
+      offset_t offset = 0;
+      uint64_t retval = regdata.GetMaxU64(&offset, 8);
+      uint32_t retval_lower32 = static_cast<uint32_t>(retval & 0xffffffff);
+      value.SetUInt32(retval_lower32);
     }
-    return true;
+  } break;
+
+  case fpu_v0:
+  case fpu_v1:
+  case fpu_v2:
+  case fpu_v3:
+  case fpu_v4:
+  case fpu_v5:
+  case fpu_v6:
+  case fpu_v7:
+  case fpu_v8:
+  case fpu_v9:
+  case fpu_v10:
+  case fpu_v11:
+  case fpu_v12:
+  case fpu_v13:
+  case fpu_v14:
+  case fpu_v15:
+  case fpu_v16:
+  case fpu_v17:
+  case fpu_v18:
+  case fpu_v19:
+  case fpu_v20:
+  case fpu_v21:
+  case fpu_v22:
+  case fpu_v23:
+  case fpu_v24:
+  case fpu_v25:
+  case fpu_v26:
+  case fpu_v27:
+  case fpu_v28:
+  case fpu_v29:
+  case fpu_v30:
+  case fpu_v31:
+    value.SetBytes(fpu.v[reg].bytes, reg_info->byte_size,
+                   endian::InlHostByteOrder());
+    break;
+
+  case fpu_s0:
+  case fpu_s1:
+  case fpu_s2:
+  case fpu_s3:
+  case fpu_s4:
+  case fpu_s5:
+  case fpu_s6:
+  case fpu_s7:
+  case fpu_s8:
+  case fpu_s9:
+  case fpu_s10:
+  case fpu_s11:
+  case fpu_s12:
+  case fpu_s13:
+  case fpu_s14:
+  case fpu_s15:
+  case fpu_s16:
+  case fpu_s17:
+  case fpu_s18:
+  case fpu_s19:
+  case fpu_s20:
+  case fpu_s21:
+  case fpu_s22:
+  case fpu_s23:
+  case fpu_s24:
+  case fpu_s25:
+  case fpu_s26:
+  case fpu_s27:
+  case fpu_s28:
+  case fpu_s29:
+  case fpu_s30:
+  case fpu_s31: {
+    ProcessSP process_sp(m_thread.GetProcess());
+    if (process_sp.get()) {
+      DataExtractor regdata(&fpu.v[reg - fpu_s0], 4, process_sp->GetByteOrder(),
+                            process_sp->GetAddressByteSize());
+      offset_t offset = 0;
+      value.SetFloat(regdata.GetFloat(&offset));
+    }
+  } break;
+
+  case fpu_d0:
+  case fpu_d1:
+  case fpu_d2:
+  case fpu_d3:
+  case fpu_d4:
+  case fpu_d5:
+  case fpu_d6:
+  case fpu_d7:
+  case fpu_d8:
+  case fpu_d9:
+  case fpu_d10:
+  case fpu_d11:
+  case fpu_d12:
+  case fpu_d13:
+  case fpu_d14:
+  case fpu_d15:
+  case fpu_d16:
+  case fpu_d17:
+  case fpu_d18:
+  case fpu_d19:
+  case fpu_d20:
+  case fpu_d21:
+  case fpu_d22:
+  case fpu_d23:
+  case fpu_d24:
+  case fpu_d25:
+  case fpu_d26:
+  case fpu_d27:
+  case fpu_d28:
+  case fpu_d29:
+  case fpu_d30:
+  case fpu_d31: {
+    ProcessSP process_sp(m_thread.GetProcess());
+    if (process_sp.get()) {
+      DataExtractor regdata(&fpu.v[reg - fpu_s0], 8, process_sp->GetByteOrder(),
+                            process_sp->GetAddressByteSize());
+      offset_t offset = 0;
+      value.SetDouble(regdata.GetDouble(&offset));
+    }
+  } break;
+
+  case fpu_fpsr:
+    value.SetUInt32(fpu.fpsr);
+    break;
+
+  case fpu_fpcr:
+    value.SetUInt32(fpu.fpcr);
+    break;
+
+  case exc_exception:
+    value.SetUInt32(exc.exception);
+    break;
+  case exc_esr:
+    value.SetUInt32(exc.esr);
+    break;
+  case exc_far:
+    value.SetUInt64(exc.far);
+    break;
+
+  default:
+    value.SetValueToInvalid();
+    return false;
+  }
+  return true;
 }
 
+bool RegisterContextDarwin_arm64::WriteRegister(const RegisterInfo *reg_info,
+                                                const RegisterValue &value) {
+  const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+  int set = GetSetForNativeRegNum(reg);
 
-bool
-RegisterContextDarwin_arm64::WriteRegister (const RegisterInfo *reg_info,
-                                        const RegisterValue &value)
-{
-    const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
-    int set = GetSetForNativeRegNum (reg);
-
-    if (set == -1)
-        return false;
-
-    if (ReadRegisterSet(set, false) != KERN_SUCCESS)
-        return false;
-
-    switch (reg)
-    {
-    case gpr_x0:
-    case gpr_x1:
-    case gpr_x2:
-    case gpr_x3:
-    case gpr_x4:
-    case gpr_x5:
-    case gpr_x6:
-    case gpr_x7:
-    case gpr_x8:
-    case gpr_x9:
-    case gpr_x10:
-    case gpr_x11:
-    case gpr_x12:
-    case gpr_x13:
-    case gpr_x14:
-    case gpr_x15:
-    case gpr_x16:
-    case gpr_x17:
-    case gpr_x18:
-    case gpr_x19:
-    case gpr_x20:
-    case gpr_x21:
-    case gpr_x22:
-    case gpr_x23:
-    case gpr_x24:
-    case gpr_x25:
-    case gpr_x26:
-    case gpr_x27:
-    case gpr_x28:
-    case gpr_fp:
-    case gpr_sp:
-    case gpr_lr:
-    case gpr_pc:
-    case gpr_cpsr:
-            gpr.x[reg - gpr_x0] = value.GetAsUInt64();
-        break;
-
-    case fpu_v0:
-    case fpu_v1:
-    case fpu_v2:
-    case fpu_v3:
-    case fpu_v4:
-    case fpu_v5:
-    case fpu_v6:
-    case fpu_v7:
-    case fpu_v8:
-    case fpu_v9:
-    case fpu_v10:
-    case fpu_v11:
-    case fpu_v12:
-    case fpu_v13:
-    case fpu_v14:
-    case fpu_v15:
-    case fpu_v16:
-    case fpu_v17:
-    case fpu_v18:
-    case fpu_v19:
-    case fpu_v20:
-    case fpu_v21:
-    case fpu_v22:
-    case fpu_v23:
-    case fpu_v24:
-    case fpu_v25:
-    case fpu_v26:
-    case fpu_v27:
-    case fpu_v28:
-    case fpu_v29:
-    case fpu_v30:
-    case fpu_v31:
-        ::memcpy (fpu.v[reg].bytes, value.GetBytes(), value.GetByteSize());
-        break;
-
-    case fpu_fpsr:
-        fpu.fpsr = value.GetAsUInt32();
-        break;
-
-    case fpu_fpcr:
-        fpu.fpcr = value.GetAsUInt32();
-        break;
-
-    case exc_exception:
-        exc.exception = value.GetAsUInt32();
-        break;
-    case exc_esr:
-        exc.esr = value.GetAsUInt32();
-        break;
-    case exc_far:
-        exc.far = value.GetAsUInt64();
-        break;
+  if (set == -1)
+    return false;
 
-    default:
-        return false;
+  if (ReadRegisterSet(set, false) != KERN_SUCCESS)
+    return false;
 
-    }
-    return WriteRegisterSet(set) == KERN_SUCCESS;
+  switch (reg) {
+  case gpr_x0:
+  case gpr_x1:
+  case gpr_x2:
+  case gpr_x3:
+  case gpr_x4:
+  case gpr_x5:
+  case gpr_x6:
+  case gpr_x7:
+  case gpr_x8:
+  case gpr_x9:
+  case gpr_x10:
+  case gpr_x11:
+  case gpr_x12:
+  case gpr_x13:
+  case gpr_x14:
+  case gpr_x15:
+  case gpr_x16:
+  case gpr_x17:
+  case gpr_x18:
+  case gpr_x19:
+  case gpr_x20:
+  case gpr_x21:
+  case gpr_x22:
+  case gpr_x23:
+  case gpr_x24:
+  case gpr_x25:
+  case gpr_x26:
+  case gpr_x27:
+  case gpr_x28:
+  case gpr_fp:
+  case gpr_sp:
+  case gpr_lr:
+  case gpr_pc:
+  case gpr_cpsr:
+    gpr.x[reg - gpr_x0] = value.GetAsUInt64();
+    break;
+
+  case fpu_v0:
+  case fpu_v1:
+  case fpu_v2:
+  case fpu_v3:
+  case fpu_v4:
+  case fpu_v5:
+  case fpu_v6:
+  case fpu_v7:
+  case fpu_v8:
+  case fpu_v9:
+  case fpu_v10:
+  case fpu_v11:
+  case fpu_v12:
+  case fpu_v13:
+  case fpu_v14:
+  case fpu_v15:
+  case fpu_v16:
+  case fpu_v17:
+  case fpu_v18:
+  case fpu_v19:
+  case fpu_v20:
+  case fpu_v21:
+  case fpu_v22:
+  case fpu_v23:
+  case fpu_v24:
+  case fpu_v25:
+  case fpu_v26:
+  case fpu_v27:
+  case fpu_v28:
+  case fpu_v29:
+  case fpu_v30:
+  case fpu_v31:
+    ::memcpy(fpu.v[reg].bytes, value.GetBytes(), value.GetByteSize());
+    break;
+
+  case fpu_fpsr:
+    fpu.fpsr = value.GetAsUInt32();
+    break;
+
+  case fpu_fpcr:
+    fpu.fpcr = value.GetAsUInt32();
+    break;
+
+  case exc_exception:
+    exc.exception = value.GetAsUInt32();
+    break;
+  case exc_esr:
+    exc.esr = value.GetAsUInt32();
+    break;
+  case exc_far:
+    exc.far = value.GetAsUInt64();
+    break;
+
+  default:
+    return false;
+  }
+  return WriteRegisterSet(set) == KERN_SUCCESS;
 }
 
-bool
-RegisterContextDarwin_arm64::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
-    data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0));
-    if (data_sp &&
-        ReadGPR (false) == KERN_SUCCESS &&
-        ReadFPU (false) == KERN_SUCCESS &&
-        ReadEXC (false) == KERN_SUCCESS)
-    {
-        uint8_t *dst = data_sp->GetBytes();
-        ::memcpy (dst, &gpr, sizeof(gpr));
-        dst += sizeof(gpr);
+bool RegisterContextDarwin_arm64::ReadAllRegisterValues(
+    lldb::DataBufferSP &data_sp) {
+  data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
+  if (data_sp && ReadGPR(false) == KERN_SUCCESS &&
+      ReadFPU(false) == KERN_SUCCESS && ReadEXC(false) == KERN_SUCCESS) {
+    uint8_t *dst = data_sp->GetBytes();
+    ::memcpy(dst, &gpr, sizeof(gpr));
+    dst += sizeof(gpr);
 
-        ::memcpy (dst, &fpu, sizeof(fpu));
-        dst += sizeof(gpr);
+    ::memcpy(dst, &fpu, sizeof(fpu));
+    dst += sizeof(gpr);
 
-        ::memcpy (dst, &exc, sizeof(exc));
-        return true;
-    }
-    return false;
+    ::memcpy(dst, &exc, sizeof(exc));
+    return true;
+  }
+  return false;
 }
 
-bool
-RegisterContextDarwin_arm64::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
-    if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE)
-    {
-        const uint8_t *src = data_sp->GetBytes();
-        ::memcpy (&gpr, src, sizeof(gpr));
-        src += sizeof(gpr);
-
-        ::memcpy (&fpu, src, sizeof(fpu));
-        src += sizeof(gpr);
-
-        ::memcpy (&exc, src, sizeof(exc));
-        uint32_t success_count = 0;
-        if (WriteGPR() == KERN_SUCCESS)
-            ++success_count;
-        if (WriteFPU() == KERN_SUCCESS)
-            ++success_count;
-        if (WriteEXC() == KERN_SUCCESS)
-            ++success_count;
-        return success_count == 3;
-    }
-    return false;
+bool RegisterContextDarwin_arm64::WriteAllRegisterValues(
+    const lldb::DataBufferSP &data_sp) {
+  if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE) {
+    const uint8_t *src = data_sp->GetBytes();
+    ::memcpy(&gpr, src, sizeof(gpr));
+    src += sizeof(gpr);
+
+    ::memcpy(&fpu, src, sizeof(fpu));
+    src += sizeof(gpr);
+
+    ::memcpy(&exc, src, sizeof(exc));
+    uint32_t success_count = 0;
+    if (WriteGPR() == KERN_SUCCESS)
+      ++success_count;
+    if (WriteFPU() == KERN_SUCCESS)
+      ++success_count;
+    if (WriteEXC() == KERN_SUCCESS)
+      ++success_count;
+    return success_count == 3;
+  }
+  return false;
 }
 
-uint32_t
-RegisterContextDarwin_arm64::ConvertRegisterKindToRegisterNumber (RegisterKind kind, uint32_t reg)
-{
-    if (kind == eRegisterKindGeneric)
-    {
-        switch (reg)
-        {
-        case LLDB_REGNUM_GENERIC_PC: return gpr_pc;
-        case LLDB_REGNUM_GENERIC_SP: return gpr_sp;
-        case LLDB_REGNUM_GENERIC_FP: return gpr_fp;
-        case LLDB_REGNUM_GENERIC_RA: return gpr_lr;
-        case LLDB_REGNUM_GENERIC_FLAGS: return gpr_cpsr;
-        default:
-            break;
-        }
-    }
-    else if (kind == eRegisterKindDWARF)
-    {
-        switch (reg)
-        {
-        case arm64_dwarf::x0:  return gpr_x0;
-        case arm64_dwarf::x1:  return gpr_x1;
-        case arm64_dwarf::x2:  return gpr_x2;
-        case arm64_dwarf::x3:  return gpr_x3;
-        case arm64_dwarf::x4:  return gpr_x4;
-        case arm64_dwarf::x5:  return gpr_x5;
-        case arm64_dwarf::x6:  return gpr_x6;
-        case arm64_dwarf::x7:  return gpr_x7;
-        case arm64_dwarf::x8:  return gpr_x8;
-        case arm64_dwarf::x9:  return gpr_x9;
-        case arm64_dwarf::x10: return gpr_x10;
-        case arm64_dwarf::x11: return gpr_x11;
-        case arm64_dwarf::x12: return gpr_x12;
-        case arm64_dwarf::x13: return gpr_x13;
-        case arm64_dwarf::x14: return gpr_x14;
-        case arm64_dwarf::x15: return gpr_x15;
-        case arm64_dwarf::x16: return gpr_x16;
-        case arm64_dwarf::x17: return gpr_x17;
-        case arm64_dwarf::x18: return gpr_x18;
-        case arm64_dwarf::x19: return gpr_x19;
-        case arm64_dwarf::x20: return gpr_x20;
-        case arm64_dwarf::x21: return gpr_x21;
-        case arm64_dwarf::x22: return gpr_x22;
-        case arm64_dwarf::x23: return gpr_x23;
-        case arm64_dwarf::x24: return gpr_x24;
-        case arm64_dwarf::x25: return gpr_x25;
-        case arm64_dwarf::x26: return gpr_x26;
-        case arm64_dwarf::x27: return gpr_x27;
-        case arm64_dwarf::x28: return gpr_x28;
-
-        case arm64_dwarf::fp:  return gpr_fp;
-        case arm64_dwarf::sp:  return gpr_sp;
-        case arm64_dwarf::lr:  return gpr_lr;
-        case arm64_dwarf::pc:  return gpr_pc;
-        case arm64_dwarf::cpsr: return gpr_cpsr;
-
-        case arm64_dwarf::v0:  return fpu_v0;
-        case arm64_dwarf::v1:  return fpu_v1;
-        case arm64_dwarf::v2:  return fpu_v2;
-        case arm64_dwarf::v3:  return fpu_v3;
-        case arm64_dwarf::v4:  return fpu_v4;
-        case arm64_dwarf::v5:  return fpu_v5;
-        case arm64_dwarf::v6:  return fpu_v6;
-        case arm64_dwarf::v7:  return fpu_v7;
-        case arm64_dwarf::v8:  return fpu_v8;
-        case arm64_dwarf::v9:  return fpu_v9;
-        case arm64_dwarf::v10: return fpu_v10;
-        case arm64_dwarf::v11: return fpu_v11;
-        case arm64_dwarf::v12: return fpu_v12;
-        case arm64_dwarf::v13: return fpu_v13;
-        case arm64_dwarf::v14: return fpu_v14;
-        case arm64_dwarf::v15: return fpu_v15;
-        case arm64_dwarf::v16: return fpu_v16;
-        case arm64_dwarf::v17: return fpu_v17;
-        case arm64_dwarf::v18: return fpu_v18;
-        case arm64_dwarf::v19: return fpu_v19;
-        case arm64_dwarf::v20: return fpu_v20;
-        case arm64_dwarf::v21: return fpu_v21;
-        case arm64_dwarf::v22: return fpu_v22;
-        case arm64_dwarf::v23: return fpu_v23;
-        case arm64_dwarf::v24: return fpu_v24;
-        case arm64_dwarf::v25: return fpu_v25;
-        case arm64_dwarf::v26: return fpu_v26;
-        case arm64_dwarf::v27: return fpu_v27;
-        case arm64_dwarf::v28: return fpu_v28;
-        case arm64_dwarf::v29: return fpu_v29;
-        case arm64_dwarf::v30: return fpu_v30;
-        case arm64_dwarf::v31: return fpu_v31;
-
-        default:
-            break;
-        }
+uint32_t RegisterContextDarwin_arm64::ConvertRegisterKindToRegisterNumber(
+    RegisterKind kind, uint32_t reg) {
+  if (kind == eRegisterKindGeneric) {
+    switch (reg) {
+    case LLDB_REGNUM_GENERIC_PC:
+      return gpr_pc;
+    case LLDB_REGNUM_GENERIC_SP:
+      return gpr_sp;
+    case LLDB_REGNUM_GENERIC_FP:
+      return gpr_fp;
+    case LLDB_REGNUM_GENERIC_RA:
+      return gpr_lr;
+    case LLDB_REGNUM_GENERIC_FLAGS:
+      return gpr_cpsr;
+    default:
+      break;
     }
-    else if (kind == eRegisterKindEHFrame)
-    {
-        switch (reg)
-        {
-        case arm64_ehframe::x0:  return gpr_x0;
-        case arm64_ehframe::x1:  return gpr_x1;
-        case arm64_ehframe::x2:  return gpr_x2;
-        case arm64_ehframe::x3:  return gpr_x3;
-        case arm64_ehframe::x4:  return gpr_x4;
-        case arm64_ehframe::x5:  return gpr_x5;
-        case arm64_ehframe::x6:  return gpr_x6;
-        case arm64_ehframe::x7:  return gpr_x7;
-        case arm64_ehframe::x8:  return gpr_x8;
-        case arm64_ehframe::x9:  return gpr_x9;
-        case arm64_ehframe::x10: return gpr_x10;
-        case arm64_ehframe::x11: return gpr_x11;
-        case arm64_ehframe::x12: return gpr_x12;
-        case arm64_ehframe::x13: return gpr_x13;
-        case arm64_ehframe::x14: return gpr_x14;
-        case arm64_ehframe::x15: return gpr_x15;
-        case arm64_ehframe::x16: return gpr_x16;
-        case arm64_ehframe::x17: return gpr_x17;
-        case arm64_ehframe::x18: return gpr_x18;
-        case arm64_ehframe::x19: return gpr_x19;
-        case arm64_ehframe::x20: return gpr_x20;
-        case arm64_ehframe::x21: return gpr_x21;
-        case arm64_ehframe::x22: return gpr_x22;
-        case arm64_ehframe::x23: return gpr_x23;
-        case arm64_ehframe::x24: return gpr_x24;
-        case arm64_ehframe::x25: return gpr_x25;
-        case arm64_ehframe::x26: return gpr_x26;
-        case arm64_ehframe::x27: return gpr_x27;
-        case arm64_ehframe::x28: return gpr_x28;
-        case arm64_ehframe::fp:   return gpr_fp;
-        case arm64_ehframe::sp:   return gpr_sp;
-        case arm64_ehframe::lr:   return gpr_lr;
-        case arm64_ehframe::pc:   return gpr_pc;
-        case arm64_ehframe::cpsr: return gpr_cpsr;
-        }
+  } else if (kind == eRegisterKindDWARF) {
+    switch (reg) {
+    case arm64_dwarf::x0:
+      return gpr_x0;
+    case arm64_dwarf::x1:
+      return gpr_x1;
+    case arm64_dwarf::x2:
+      return gpr_x2;
+    case arm64_dwarf::x3:
+      return gpr_x3;
+    case arm64_dwarf::x4:
+      return gpr_x4;
+    case arm64_dwarf::x5:
+      return gpr_x5;
+    case arm64_dwarf::x6:
+      return gpr_x6;
+    case arm64_dwarf::x7:
+      return gpr_x7;
+    case arm64_dwarf::x8:
+      return gpr_x8;
+    case arm64_dwarf::x9:
+      return gpr_x9;
+    case arm64_dwarf::x10:
+      return gpr_x10;
+    case arm64_dwarf::x11:
+      return gpr_x11;
+    case arm64_dwarf::x12:
+      return gpr_x12;
+    case arm64_dwarf::x13:
+      return gpr_x13;
+    case arm64_dwarf::x14:
+      return gpr_x14;
+    case arm64_dwarf::x15:
+      return gpr_x15;
+    case arm64_dwarf::x16:
+      return gpr_x16;
+    case arm64_dwarf::x17:
+      return gpr_x17;
+    case arm64_dwarf::x18:
+      return gpr_x18;
+    case arm64_dwarf::x19:
+      return gpr_x19;
+    case arm64_dwarf::x20:
+      return gpr_x20;
+    case arm64_dwarf::x21:
+      return gpr_x21;
+    case arm64_dwarf::x22:
+      return gpr_x22;
+    case arm64_dwarf::x23:
+      return gpr_x23;
+    case arm64_dwarf::x24:
+      return gpr_x24;
+    case arm64_dwarf::x25:
+      return gpr_x25;
+    case arm64_dwarf::x26:
+      return gpr_x26;
+    case arm64_dwarf::x27:
+      return gpr_x27;
+    case arm64_dwarf::x28:
+      return gpr_x28;
+
+    case arm64_dwarf::fp:
+      return gpr_fp;
+    case arm64_dwarf::sp:
+      return gpr_sp;
+    case arm64_dwarf::lr:
+      return gpr_lr;
+    case arm64_dwarf::pc:
+      return gpr_pc;
+    case arm64_dwarf::cpsr:
+      return gpr_cpsr;
+
+    case arm64_dwarf::v0:
+      return fpu_v0;
+    case arm64_dwarf::v1:
+      return fpu_v1;
+    case arm64_dwarf::v2:
+      return fpu_v2;
+    case arm64_dwarf::v3:
+      return fpu_v3;
+    case arm64_dwarf::v4:
+      return fpu_v4;
+    case arm64_dwarf::v5:
+      return fpu_v5;
+    case arm64_dwarf::v6:
+      return fpu_v6;
+    case arm64_dwarf::v7:
+      return fpu_v7;
+    case arm64_dwarf::v8:
+      return fpu_v8;
+    case arm64_dwarf::v9:
+      return fpu_v9;
+    case arm64_dwarf::v10:
+      return fpu_v10;
+    case arm64_dwarf::v11:
+      return fpu_v11;
+    case arm64_dwarf::v12:
+      return fpu_v12;
+    case arm64_dwarf::v13:
+      return fpu_v13;
+    case arm64_dwarf::v14:
+      return fpu_v14;
+    case arm64_dwarf::v15:
+      return fpu_v15;
+    case arm64_dwarf::v16:
+      return fpu_v16;
+    case arm64_dwarf::v17:
+      return fpu_v17;
+    case arm64_dwarf::v18:
+      return fpu_v18;
+    case arm64_dwarf::v19:
+      return fpu_v19;
+    case arm64_dwarf::v20:
+      return fpu_v20;
+    case arm64_dwarf::v21:
+      return fpu_v21;
+    case arm64_dwarf::v22:
+      return fpu_v22;
+    case arm64_dwarf::v23:
+      return fpu_v23;
+    case arm64_dwarf::v24:
+      return fpu_v24;
+    case arm64_dwarf::v25:
+      return fpu_v25;
+    case arm64_dwarf::v26:
+      return fpu_v26;
+    case arm64_dwarf::v27:
+      return fpu_v27;
+    case arm64_dwarf::v28:
+      return fpu_v28;
+    case arm64_dwarf::v29:
+      return fpu_v29;
+    case arm64_dwarf::v30:
+      return fpu_v30;
+    case arm64_dwarf::v31:
+      return fpu_v31;
+
+    default:
+      break;
     }
-    else if (kind == eRegisterKindLLDB)
-    {
-        return reg;
+  } else if (kind == eRegisterKindEHFrame) {
+    switch (reg) {
+    case arm64_ehframe::x0:
+      return gpr_x0;
+    case arm64_ehframe::x1:
+      return gpr_x1;
+    case arm64_ehframe::x2:
+      return gpr_x2;
+    case arm64_ehframe::x3:
+      return gpr_x3;
+    case arm64_ehframe::x4:
+      return gpr_x4;
+    case arm64_ehframe::x5:
+      return gpr_x5;
+    case arm64_ehframe::x6:
+      return gpr_x6;
+    case arm64_ehframe::x7:
+      return gpr_x7;
+    case arm64_ehframe::x8:
+      return gpr_x8;
+    case arm64_ehframe::x9:
+      return gpr_x9;
+    case arm64_ehframe::x10:
+      return gpr_x10;
+    case arm64_ehframe::x11:
+      return gpr_x11;
+    case arm64_ehframe::x12:
+      return gpr_x12;
+    case arm64_ehframe::x13:
+      return gpr_x13;
+    case arm64_ehframe::x14:
+      return gpr_x14;
+    case arm64_ehframe::x15:
+      return gpr_x15;
+    case arm64_ehframe::x16:
+      return gpr_x16;
+    case arm64_ehframe::x17:
+      return gpr_x17;
+    case arm64_ehframe::x18:
+      return gpr_x18;
+    case arm64_ehframe::x19:
+      return gpr_x19;
+    case arm64_ehframe::x20:
+      return gpr_x20;
+    case arm64_ehframe::x21:
+      return gpr_x21;
+    case arm64_ehframe::x22:
+      return gpr_x22;
+    case arm64_ehframe::x23:
+      return gpr_x23;
+    case arm64_ehframe::x24:
+      return gpr_x24;
+    case arm64_ehframe::x25:
+      return gpr_x25;
+    case arm64_ehframe::x26:
+      return gpr_x26;
+    case arm64_ehframe::x27:
+      return gpr_x27;
+    case arm64_ehframe::x28:
+      return gpr_x28;
+    case arm64_ehframe::fp:
+      return gpr_fp;
+    case arm64_ehframe::sp:
+      return gpr_sp;
+    case arm64_ehframe::lr:
+      return gpr_lr;
+    case arm64_ehframe::pc:
+      return gpr_pc;
+    case arm64_ehframe::cpsr:
+      return gpr_cpsr;
     }
-    return LLDB_INVALID_REGNUM;
+  } else if (kind == eRegisterKindLLDB) {
+    return reg;
+  }
+  return LLDB_INVALID_REGNUM;
 }
 
-
-uint32_t
-RegisterContextDarwin_arm64::NumSupportedHardwareWatchpoints ()
-{
-#if defined (__arm64__) || defined (__aarch64__)
-    // autodetect how many watchpoints are supported dynamically...
-    static uint32_t g_num_supported_hw_watchpoints = UINT32_MAX;
-    if (g_num_supported_hw_watchpoints == UINT32_MAX)
-    {
-        size_t len;
-        uint32_t n = 0;
-        len = sizeof (n);
-        if (::sysctlbyname("hw.optional.watchpoint", &n, &len, NULL, 0) == 0)
-        {
-            g_num_supported_hw_watchpoints = n;
-        }
+uint32_t RegisterContextDarwin_arm64::NumSupportedHardwareWatchpoints() {
+#if defined(__arm64__) || defined(__aarch64__)
+  // autodetect how many watchpoints are supported dynamically...
+  static uint32_t g_num_supported_hw_watchpoints = UINT32_MAX;
+  if (g_num_supported_hw_watchpoints == UINT32_MAX) {
+    size_t len;
+    uint32_t n = 0;
+    len = sizeof(n);
+    if (::sysctlbyname("hw.optional.watchpoint", &n, &len, NULL, 0) == 0) {
+      g_num_supported_hw_watchpoints = n;
     }
-    return g_num_supported_hw_watchpoints;
+  }
+  return g_num_supported_hw_watchpoints;
 #else
-    // TODO: figure out remote case here!
-    return 2;
+  // TODO: figure out remote case here!
+  return 2;
 #endif
 }
 
+uint32_t RegisterContextDarwin_arm64::SetHardwareWatchpoint(lldb::addr_t addr,
+                                                            size_t size,
+                                                            bool read,
+                                                            bool write) {
+  //    if (log) log->Printf
+  //    ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint(addr = %8.8p,
+  //    size = %u, read = %u, write = %u)", addr, size, read, write);
 
-uint32_t
-RegisterContextDarwin_arm64::SetHardwareWatchpoint (lldb::addr_t addr, size_t size, bool read, bool write)
-{
-//    if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint(addr = %8.8p, size = %u, read = %u, write = %u)", addr, size, read, write);
+  const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
 
-    const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
+  // Can't watch zero bytes
+  if (size == 0)
+    return LLDB_INVALID_INDEX32;
 
-    // Can't watch zero bytes
-    if (size == 0)
-        return LLDB_INVALID_INDEX32;
+  // We must watch for either read or write
+  if (read == false && write == false)
+    return LLDB_INVALID_INDEX32;
 
-    // We must watch for either read or write
-    if (read == false && write == false)
-        return LLDB_INVALID_INDEX32;
+  // Can't watch more than 4 bytes per WVR/WCR pair
+  if (size > 4)
+    return LLDB_INVALID_INDEX32;
 
-    // Can't watch more than 4 bytes per WVR/WCR pair
-    if (size > 4)
-        return LLDB_INVALID_INDEX32;
+  // We can only watch up to four bytes that follow a 4 byte aligned address
+  // per watchpoint register pair. Since we have at most so we can only watch
+  // until the next 4 byte boundary and we need to make sure we can properly
+  // encode this.
+  uint32_t addr_word_offset = addr % 4;
+  //    if (log) log->Printf
+  //    ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() -
+  //    addr_word_offset = 0x%8.8x", addr_word_offset);
+
+  uint32_t byte_mask = ((1u << size) - 1u) << addr_word_offset;
+  //    if (log) log->Printf
+  //    ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() - byte_mask =
+  //    0x%8.8x", byte_mask);
+  if (byte_mask > 0xfu)
+    return LLDB_INVALID_INDEX32;
 
-    // We can only watch up to four bytes that follow a 4 byte aligned address
-    // per watchpoint register pair. Since we have at most so we can only watch
-    // until the next 4 byte boundary and we need to make sure we can properly
-    // encode this.
-    uint32_t addr_word_offset = addr % 4;
-//    if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() - addr_word_offset = 0x%8.8x", addr_word_offset);
+  // Read the debug state
+  int kret = ReadDBG(false);
 
-    uint32_t byte_mask = ((1u << size) - 1u) << addr_word_offset;
-//    if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() - byte_mask = 0x%8.8x", byte_mask);
-    if (byte_mask > 0xfu)
-        return LLDB_INVALID_INDEX32;
+  if (kret == KERN_SUCCESS) {
+    // Check to make sure we have the needed hardware support
+    uint32_t i = 0;
 
-    // Read the debug state
-    int kret = ReadDBG (false);
+    for (i = 0; i < num_hw_watchpoints; ++i) {
+      if ((dbg.wcr[i] & WCR_ENABLE) == 0)
+        break; // We found an available hw breakpoint slot (in i)
+    }
 
-    if (kret == KERN_SUCCESS)
-    {
-        // Check to make sure we have the needed hardware support
-        uint32_t i = 0;
-
-        for (i=0; i<num_hw_watchpoints; ++i)
-        {
-            if ((dbg.wcr[i] & WCR_ENABLE) == 0)
-                break; // We found an available hw breakpoint slot (in i)
-        }
-
-        // See if we found an available hw breakpoint slot above
-        if (i < num_hw_watchpoints)
-        {
-            // Make the byte_mask into a valid Byte Address Select mask
-            uint32_t byte_address_select = byte_mask << 5;
-            // Make sure bits 1:0 are clear in our address
-            dbg.wvr[i] = addr & ~((lldb::addr_t)3);
-            dbg.wcr[i] =  byte_address_select |       // Which bytes that follow the IMVA that we will watch
-                                    S_USER |                    // Stop only in user mode
-                                    (read ? WCR_LOAD : 0) |     // Stop on read access?
-                                    (write ? WCR_STORE : 0) |   // Stop on write access?
-                                    WCR_ENABLE;                 // Enable this watchpoint;
-
-            kret = WriteDBG();
-//            if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() WriteDBG() => 0x%8.8x.", kret);
-
-            if (kret == KERN_SUCCESS)
-                return i;
-        }
-        else
-        {
-//            if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint(): All hardware resources (%u) are in use.", num_hw_watchpoints);
-        }
+    // See if we found an available hw breakpoint slot above
+    if (i < num_hw_watchpoints) {
+      // Make the byte_mask into a valid Byte Address Select mask
+      uint32_t byte_address_select = byte_mask << 5;
+      // Make sure bits 1:0 are clear in our address
+      dbg.wvr[i] = addr & ~((lldb::addr_t)3);
+      dbg.wcr[i] = byte_address_select |     // Which bytes that follow the IMVA
+                                             // that we will watch
+                   S_USER |                  // Stop only in user mode
+                   (read ? WCR_LOAD : 0) |   // Stop on read access?
+                   (write ? WCR_STORE : 0) | // Stop on write access?
+                   WCR_ENABLE;               // Enable this watchpoint;
+
+      kret = WriteDBG();
+      //            if (log) log->Printf
+      //            ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint()
+      //            WriteDBG() => 0x%8.8x.", kret);
+
+      if (kret == KERN_SUCCESS)
+        return i;
+    } else {
+      //            if (log) log->Printf
+      //            ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint():
+      //            All hardware resources (%u) are in use.",
+      //            num_hw_watchpoints);
     }
-    return LLDB_INVALID_INDEX32;
+  }
+  return LLDB_INVALID_INDEX32;
 }
 
-bool
-RegisterContextDarwin_arm64::ClearHardwareWatchpoint (uint32_t hw_index)
-{
-    int kret = ReadDBG (false);
-
-    const uint32_t num_hw_points = NumSupportedHardwareWatchpoints();
-    if (kret == KERN_SUCCESS)
-    {
-        if (hw_index < num_hw_points)
-        {
-            dbg.wcr[hw_index] = 0;
-//            if (log) log->Printf ("RegisterContextDarwin_arm64::ClearHardwareWatchpoint( %u ) - WVR%u = 0x%8.8x  WCR%u = 0x%8.8x",
-//                    hw_index,
-//                    hw_index,
-//                    dbg.wvr[hw_index],
-//                    hw_index,
-//                    dbg.wcr[hw_index]);
-
-            kret = WriteDBG();
-
-            if (kret == KERN_SUCCESS)
-                return true;
-        }
+bool RegisterContextDarwin_arm64::ClearHardwareWatchpoint(uint32_t hw_index) {
+  int kret = ReadDBG(false);
+
+  const uint32_t num_hw_points = NumSupportedHardwareWatchpoints();
+  if (kret == KERN_SUCCESS) {
+    if (hw_index < num_hw_points) {
+      dbg.wcr[hw_index] = 0;
+      //            if (log) log->Printf
+      //            ("RegisterContextDarwin_arm64::ClearHardwareWatchpoint( %u )
+      //            - WVR%u = 0x%8.8x  WCR%u = 0x%8.8x",
+      //                    hw_index,
+      //                    hw_index,
+      //                    dbg.wvr[hw_index],
+      //                    hw_index,
+      //                    dbg.wcr[hw_index]);
+
+      kret = WriteDBG();
+
+      if (kret == KERN_SUCCESS)
+        return true;
     }
-    return false;
+  }
+  return false;
 }
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h
index b228c42..2d1fe05 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h
@@ -1,4 +1,5 @@
-//===-- RegisterContextDarwin_arm64.h -----------------------------*- C++ -*-===//
+//===-- RegisterContextDarwin_arm64.h -----------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -14,279 +15,222 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
 #include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
 
 // Break only in privileged or user mode
-#define S_RSVD                  ((uint32_t)(0u << 1))
-#define S_PRIV                  ((uint32_t)(1u << 1))
-#define S_USER                  ((uint32_t)(2u << 1))
-#define S_PRIV_USER             ((S_PRIV) | (S_USER))
+#define S_RSVD ((uint32_t)(0u << 1))
+#define S_PRIV ((uint32_t)(1u << 1))
+#define S_USER ((uint32_t)(2u << 1))
+#define S_PRIV_USER ((S_PRIV) | (S_USER))
 
-#define WCR_ENABLE              ((uint32_t)(1u))
+#define WCR_ENABLE ((uint32_t)(1u))
 
 // Watchpoint load/store
-#define WCR_LOAD                ((uint32_t)(1u << 3))
-#define WCR_STORE               ((uint32_t)(1u << 4))
+#define WCR_LOAD ((uint32_t)(1u << 3))
+#define WCR_STORE ((uint32_t)(1u << 4))
 
-class RegisterContextDarwin_arm64 : public lldb_private::RegisterContext
-{
+class RegisterContextDarwin_arm64 : public lldb_private::RegisterContext {
 public:
-    RegisterContextDarwin_arm64(lldb_private::Thread &thread, uint32_t concrete_frame_idx);
-
-    ~RegisterContextDarwin_arm64() override;
-
-    void
-    InvalidateAllRegisters() override;
-
-    size_t
-    GetRegisterCount() override;
-
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
-
-    size_t
-    GetRegisterSetCount() override;
-
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t set) override;
-
-    bool
-    ReadRegister(const lldb_private::RegisterInfo *reg_info,
-                 lldb_private::RegisterValue &reg_value) override;
-    
-    bool
-    WriteRegister(const lldb_private::RegisterInfo *reg_info,
-                  const lldb_private::RegisterValue &reg_value) override;
-    
-    bool
-    ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-
-    bool
-    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
-
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
-    uint32_t
-    NumSupportedHardwareWatchpoints() override;
-
-    uint32_t
-    SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read, bool write) override;
-
-    bool
-    ClearHardwareWatchpoint(uint32_t hw_index) override;
-
-    // mirrors <mach/arm/thread_status.h> arm_thread_state64_t
-    struct GPR
-    {
-        uint64_t    x[29];  // x0-x28
-        uint64_t    fp;     // x29
-        uint64_t    lr;     // x30
-        uint64_t    sp;     // x31
-        uint64_t    pc;     // pc
-        uint32_t    cpsr;   // cpsr
-    };
-
-    struct VReg
-    {
-        uint8_t bytes[16];
-    };
-
-    // mirrors <mach/arm/thread_status.h> arm_neon_state64_t
-    struct FPU
-    {
-        VReg        v[32];
-        uint32_t    fpsr;
-        uint32_t    fpcr;
-    };
-
-    // mirrors <mach/arm/thread_status.h> arm_exception_state64_t
-    struct EXC
-    {
-        uint64_t    far;       // Virtual Fault Address
-        uint32_t    esr;       // Exception syndrome
-        uint32_t    exception; // number of arm exception token
-    };
-
-    // mirrors <mach/arm/thread_status.h> arm_debug_state64_t
-    struct DBG
-    {
-        uint64_t bvr[16];
-        uint64_t bcr[16];
-        uint64_t wvr[16];
-        uint64_t wcr[16];
-        uint64_t mdscr_el1;
-    };
-
-    static void
-    LogDBGRegisters (lldb_private::Log *log, const DBG& dbg);
+  RegisterContextDarwin_arm64(lldb_private::Thread &thread,
+                              uint32_t concrete_frame_idx);
+
+  ~RegisterContextDarwin_arm64() override;
+
+  void InvalidateAllRegisters() override;
+
+  size_t GetRegisterCount() override;
+
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+  size_t GetRegisterSetCount() override;
+
+  const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+  bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+                    lldb_private::RegisterValue &reg_value) override;
+
+  bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+                     const lldb_private::RegisterValue &reg_value) override;
+
+  bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+  bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
+
+  uint32_t NumSupportedHardwareWatchpoints() override;
+
+  uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read,
+                                 bool write) override;
+
+  bool ClearHardwareWatchpoint(uint32_t hw_index) override;
+
+  // mirrors <mach/arm/thread_status.h> arm_thread_state64_t
+  struct GPR {
+    uint64_t x[29]; // x0-x28
+    uint64_t fp;    // x29
+    uint64_t lr;    // x30
+    uint64_t sp;    // x31
+    uint64_t pc;    // pc
+    uint32_t cpsr;  // cpsr
+  };
+
+  struct VReg {
+    uint8_t bytes[16];
+  };
+
+  // mirrors <mach/arm/thread_status.h> arm_neon_state64_t
+  struct FPU {
+    VReg v[32];
+    uint32_t fpsr;
+    uint32_t fpcr;
+  };
+
+  // mirrors <mach/arm/thread_status.h> arm_exception_state64_t
+  struct EXC {
+    uint64_t far;       // Virtual Fault Address
+    uint32_t esr;       // Exception syndrome
+    uint32_t exception; // number of arm exception token
+  };
+
+  // mirrors <mach/arm/thread_status.h> arm_debug_state64_t
+  struct DBG {
+    uint64_t bvr[16];
+    uint64_t bcr[16];
+    uint64_t wvr[16];
+    uint64_t wcr[16];
+    uint64_t mdscr_el1;
+  };
+
+  static void LogDBGRegisters(lldb_private::Log *log, const DBG &dbg);
 
 protected:
-    enum
-    {
-        GPRRegSet = 6,  // ARM_THREAD_STATE64
-        FPURegSet = 17, // ARM_NEON_STATE64
-        EXCRegSet = 7,  // ARM_EXCEPTION_STATE64
-        DBGRegSet = 15  // ARM_DEBUG_STATE64
-    };
-
-    enum
-    {
-        GPRWordCount = sizeof(GPR)/sizeof(uint32_t),  // ARM_THREAD_STATE64_COUNT
-        FPUWordCount = sizeof(FPU)/sizeof(uint32_t),  // ARM_NEON_STATE64_COUNT
-        EXCWordCount = sizeof(EXC)/sizeof(uint32_t),  // ARM_EXCEPTION_STATE64_COUNT
-        DBGWordCount = sizeof(DBG)/sizeof(uint32_t)   // ARM_DEBUG_STATE64_COUNT
-    };
-
-    enum
-    {
-        Read = 0,
-        Write = 1,
-        kNumErrors = 2
-    };
-
-    GPR gpr;
-    FPU fpu;
-    EXC exc;
-    DBG dbg;
-    int gpr_errs[2]; // Read/Write errors
-    int fpu_errs[2]; // Read/Write errors
-    int exc_errs[2]; // Read/Write errors
-    int dbg_errs[2]; // Read/Write errors
-
-    void
-    InvalidateAllRegisterStates()
-    {
-        SetError (GPRRegSet, Read, -1);
-        SetError (FPURegSet, Read, -1);
-        SetError (EXCRegSet, Read, -1);
+  enum {
+    GPRRegSet = 6,  // ARM_THREAD_STATE64
+    FPURegSet = 17, // ARM_NEON_STATE64
+    EXCRegSet = 7,  // ARM_EXCEPTION_STATE64
+    DBGRegSet = 15  // ARM_DEBUG_STATE64
+  };
+
+  enum {
+    GPRWordCount = sizeof(GPR) / sizeof(uint32_t), // ARM_THREAD_STATE64_COUNT
+    FPUWordCount = sizeof(FPU) / sizeof(uint32_t), // ARM_NEON_STATE64_COUNT
+    EXCWordCount =
+        sizeof(EXC) / sizeof(uint32_t),           // ARM_EXCEPTION_STATE64_COUNT
+    DBGWordCount = sizeof(DBG) / sizeof(uint32_t) // ARM_DEBUG_STATE64_COUNT
+  };
+
+  enum { Read = 0, Write = 1, kNumErrors = 2 };
+
+  GPR gpr;
+  FPU fpu;
+  EXC exc;
+  DBG dbg;
+  int gpr_errs[2]; // Read/Write errors
+  int fpu_errs[2]; // Read/Write errors
+  int exc_errs[2]; // Read/Write errors
+  int dbg_errs[2]; // Read/Write errors
+
+  void InvalidateAllRegisterStates() {
+    SetError(GPRRegSet, Read, -1);
+    SetError(FPURegSet, Read, -1);
+    SetError(EXCRegSet, Read, -1);
+  }
+
+  int GetError(int flavor, uint32_t err_idx) const {
+    if (err_idx < kNumErrors) {
+      switch (flavor) {
+      // When getting all errors, just OR all values together to see if
+      // we got any kind of error.
+      case GPRRegSet:
+        return gpr_errs[err_idx];
+      case FPURegSet:
+        return fpu_errs[err_idx];
+      case EXCRegSet:
+        return exc_errs[err_idx];
+      case DBGRegSet:
+        return dbg_errs[err_idx];
+      default:
+        break;
+      }
     }
-
-    int
-    GetError (int flavor, uint32_t err_idx) const
-    {
-        if (err_idx < kNumErrors)
-        {
-            switch (flavor)
-            {
-            // When getting all errors, just OR all values together to see if
-            // we got any kind of error.
-            case GPRRegSet:    return gpr_errs[err_idx];
-            case FPURegSet:    return fpu_errs[err_idx];
-            case EXCRegSet:    return exc_errs[err_idx];
-            case DBGRegSet:    return dbg_errs[err_idx];
-            default: break;
-            }
-        }
-        return -1;
+    return -1;
+  }
+
+  bool SetError(int flavor, uint32_t err_idx, int err) {
+    if (err_idx < kNumErrors) {
+      switch (flavor) {
+      case GPRRegSet:
+        gpr_errs[err_idx] = err;
+        return true;
+
+      case FPURegSet:
+        fpu_errs[err_idx] = err;
+        return true;
+
+      case EXCRegSet:
+        exc_errs[err_idx] = err;
+        return true;
+
+      case DBGRegSet:
+        exc_errs[err_idx] = err;
+        return true;
+
+      default:
+        break;
+      }
     }
+    return false;
+  }
 
-    bool
-    SetError (int flavor, uint32_t err_idx, int err)
-    {
-        if (err_idx < kNumErrors)
-        {
-            switch (flavor)
-            {
-            case GPRRegSet:
-                gpr_errs[err_idx] = err;
-                return true;
-
-            case FPURegSet:
-                fpu_errs[err_idx] = err;
-                return true;
-
-            case EXCRegSet:
-                exc_errs[err_idx] = err;
-                return true;
-
-            case DBGRegSet:
-                exc_errs[err_idx] = err;
-                return true;
-
-            default: break;
-            }
-        }
-        return false;
-    }
+  bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }
 
-    bool
-    RegisterSetIsCached (int set) const
-    {
-        return GetError(set, Read) == 0;
-    }
+  int ReadGPR(bool force);
 
-    int
-    ReadGPR (bool force);
+  int ReadFPU(bool force);
 
-    int
-    ReadFPU (bool force);
+  int ReadEXC(bool force);
 
-    int
-    ReadEXC (bool force);
+  int ReadDBG(bool force);
 
-    int
-    ReadDBG (bool force);
+  int WriteGPR();
 
-    int
-    WriteGPR ();
+  int WriteFPU();
 
-    int
-    WriteFPU ();
+  int WriteEXC();
 
-    int
-    WriteEXC ();
+  int WriteDBG();
 
-    int
-    WriteDBG ();
+  // Subclasses override these to do the actual reading.
+  virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) { return -1; }
 
-    
-    // Subclasses override these to do the actual reading.
-    virtual int
-    DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr)
-    {
-        return -1;
-    }
-    
-    virtual int
-    DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
-    
-    virtual int
-    DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc) = 0;
+  virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
+
+  virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;
+
+  virtual int DoReadDBG(lldb::tid_t tid, int flavor, DBG &dbg) = 0;
+
+  virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
 
-    virtual int
-    DoReadDBG (lldb::tid_t tid, int flavor, DBG &dbg) = 0;
+  virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
 
-    virtual int
-    DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
-    
-    virtual int
-    DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
-    
-    virtual int
-    DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc) = 0;
+  virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;
 
-    virtual int
-    DoWriteDBG (lldb::tid_t tid, int flavor, const DBG &dbg) = 0;
+  virtual int DoWriteDBG(lldb::tid_t tid, int flavor, const DBG &dbg) = 0;
 
-    int
-    ReadRegisterSet (uint32_t set, bool force);
+  int ReadRegisterSet(uint32_t set, bool force);
 
-    int
-    WriteRegisterSet (uint32_t set);
+  int WriteRegisterSet(uint32_t set);
 
-    static uint32_t
-    GetRegisterNumber (uint32_t reg_kind, uint32_t reg_num);
+  static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);
 
-    static int
-    GetSetForNativeRegNum (int reg_num);
+  static int GetSetForNativeRegNum(int reg_num);
 
-    static size_t
-    GetRegisterInfosCount ();
+  static size_t GetRegisterInfosCount();
 
-    static const lldb_private::RegisterInfo *
-    GetRegisterInfos ();
+  static const lldb_private::RegisterInfo *GetRegisterInfos();
 };
 
 #endif // liblldb_RegisterContextDarwin_arm64_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
index 1b01c28..f42fb00 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
@@ -7,9 +7,8 @@
 //
 //===----------------------------------------------------------------------===//
 
-
 // C Includes
-#include <stddef.h>  // offsetof
+#include <stddef.h> // offsetof
 
 // C++ Includes
 // Other libraries and framework includes
@@ -34,302 +33,430 @@
 using namespace lldb;
 using namespace lldb_private;
 
-enum
-{
-    gpr_eax = 0,
-    gpr_ebx,
-    gpr_ecx,
-    gpr_edx,
-    gpr_edi,
-    gpr_esi,
-    gpr_ebp,
-    gpr_esp,
-    gpr_ss,
-    gpr_eflags,
-    gpr_eip,
-    gpr_cs,
-    gpr_ds,
-    gpr_es,
-    gpr_fs,
-    gpr_gs,
-
-    fpu_fcw,
-    fpu_fsw,
-    fpu_ftw,
-    fpu_fop,
-    fpu_ip,
-    fpu_cs,
-    fpu_dp,
-    fpu_ds,
-    fpu_mxcsr,
-    fpu_mxcsrmask,
-    fpu_stmm0,
-    fpu_stmm1,
-    fpu_stmm2,
-    fpu_stmm3,
-    fpu_stmm4,
-    fpu_stmm5,
-    fpu_stmm6,
-    fpu_stmm7,
-    fpu_xmm0,
-    fpu_xmm1,
-    fpu_xmm2,
-    fpu_xmm3,
-    fpu_xmm4,
-    fpu_xmm5,
-    fpu_xmm6,
-    fpu_xmm7,
-
-    exc_trapno,
-    exc_err,
-    exc_faultvaddr,
-
-    k_num_registers,
-
-    // Aliases
-    fpu_fctrl = fpu_fcw,
-    fpu_fstat = fpu_fsw,
-    fpu_ftag  = fpu_ftw,
-    fpu_fiseg = fpu_cs,
-    fpu_fioff = fpu_ip,
-    fpu_foseg = fpu_ds,
-    fpu_fooff = fpu_dp
+enum {
+  gpr_eax = 0,
+  gpr_ebx,
+  gpr_ecx,
+  gpr_edx,
+  gpr_edi,
+  gpr_esi,
+  gpr_ebp,
+  gpr_esp,
+  gpr_ss,
+  gpr_eflags,
+  gpr_eip,
+  gpr_cs,
+  gpr_ds,
+  gpr_es,
+  gpr_fs,
+  gpr_gs,
+
+  fpu_fcw,
+  fpu_fsw,
+  fpu_ftw,
+  fpu_fop,
+  fpu_ip,
+  fpu_cs,
+  fpu_dp,
+  fpu_ds,
+  fpu_mxcsr,
+  fpu_mxcsrmask,
+  fpu_stmm0,
+  fpu_stmm1,
+  fpu_stmm2,
+  fpu_stmm3,
+  fpu_stmm4,
+  fpu_stmm5,
+  fpu_stmm6,
+  fpu_stmm7,
+  fpu_xmm0,
+  fpu_xmm1,
+  fpu_xmm2,
+  fpu_xmm3,
+  fpu_xmm4,
+  fpu_xmm5,
+  fpu_xmm6,
+  fpu_xmm7,
+
+  exc_trapno,
+  exc_err,
+  exc_faultvaddr,
+
+  k_num_registers,
+
+  // Aliases
+  fpu_fctrl = fpu_fcw,
+  fpu_fstat = fpu_fsw,
+  fpu_ftag = fpu_ftw,
+  fpu_fiseg = fpu_cs,
+  fpu_fioff = fpu_ip,
+  fpu_foseg = fpu_ds,
+  fpu_fooff = fpu_dp
 };
 
-enum
-{
-    ehframe_eax = 0,
-    ehframe_ecx,
-    ehframe_edx,
-    ehframe_ebx,
-    ehframe_ebp,
-    ehframe_esp,
-    ehframe_esi,
-    ehframe_edi,
-    ehframe_eip,
-    ehframe_eflags
+enum {
+  ehframe_eax = 0,
+  ehframe_ecx,
+  ehframe_edx,
+  ehframe_ebx,
+  ehframe_ebp,
+  ehframe_esp,
+  ehframe_esi,
+  ehframe_edi,
+  ehframe_eip,
+  ehframe_eflags
 };
 
-enum
-{
-    dwarf_eax = 0,
-    dwarf_ecx,
-    dwarf_edx,
-    dwarf_ebx,
-    dwarf_esp,
-    dwarf_ebp,
-    dwarf_esi,
-    dwarf_edi,
-    dwarf_eip,
-    dwarf_eflags,
-    dwarf_stmm0 = 11,
-    dwarf_stmm1,
-    dwarf_stmm2,
-    dwarf_stmm3,
-    dwarf_stmm4,
-    dwarf_stmm5,
-    dwarf_stmm6,
-    dwarf_stmm7,
-    dwarf_xmm0 = 21,
-    dwarf_xmm1,
-    dwarf_xmm2,
-    dwarf_xmm3,
-    dwarf_xmm4,
-    dwarf_xmm5,
-    dwarf_xmm6,
-    dwarf_xmm7
+enum {
+  dwarf_eax = 0,
+  dwarf_ecx,
+  dwarf_edx,
+  dwarf_ebx,
+  dwarf_esp,
+  dwarf_ebp,
+  dwarf_esi,
+  dwarf_edi,
+  dwarf_eip,
+  dwarf_eflags,
+  dwarf_stmm0 = 11,
+  dwarf_stmm1,
+  dwarf_stmm2,
+  dwarf_stmm3,
+  dwarf_stmm4,
+  dwarf_stmm5,
+  dwarf_stmm6,
+  dwarf_stmm7,
+  dwarf_xmm0 = 21,
+  dwarf_xmm1,
+  dwarf_xmm2,
+  dwarf_xmm3,
+  dwarf_xmm4,
+  dwarf_xmm5,
+  dwarf_xmm6,
+  dwarf_xmm7
 };
 
-
-#define GPR_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::GPR, reg))
-#define FPU_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::FPU, reg) + sizeof (RegisterContextDarwin_i386::GPR))
-#define EXC_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::EXC, reg) + sizeof (RegisterContextDarwin_i386::GPR) + sizeof (RegisterContextDarwin_i386::FPU))
+#define GPR_OFFSET(reg)                                                        \
+  (LLVM_EXTENSION offsetof(RegisterContextDarwin_i386::GPR, reg))
+#define FPU_OFFSET(reg)                                                        \
+  (LLVM_EXTENSION offsetof(RegisterContextDarwin_i386::FPU, reg) +             \
+   sizeof(RegisterContextDarwin_i386::GPR))
+#define EXC_OFFSET(reg)                                                        \
+  (LLVM_EXTENSION offsetof(RegisterContextDarwin_i386::EXC, reg) +             \
+   sizeof(RegisterContextDarwin_i386::GPR) +                                   \
+   sizeof(RegisterContextDarwin_i386::FPU))
 
 // These macros will auto define the register name, alt name, register size,
 // register offset, encoding, format and native register. This ensures that
 // the register state structures are defined correctly and have the correct
 // sizes and offsets.
-#define DEFINE_GPR(reg, alt)    #reg, alt, sizeof(((RegisterContextDarwin_i386::GPR *)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, eFormatHex
-#define DEFINE_FPU_UINT(reg)    #reg, NULL, sizeof(((RegisterContextDarwin_i386::FPU *)NULL)->reg), FPU_OFFSET(reg), eEncodingUint, eFormatHex
-#define DEFINE_FPU_VECT(reg, i) #reg#i, NULL, sizeof(((RegisterContextDarwin_i386::FPU *)NULL)->reg[i].bytes), FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_##reg##i, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_##reg##i }, NULL, NULL
-
-#define DEFINE_EXC(reg)         #reg, NULL, sizeof(((RegisterContextDarwin_i386::EXC *)NULL)->reg), EXC_OFFSET(reg), eEncodingUint, eFormatHex
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_i386::GPR) + sizeof (RegisterContextDarwin_i386::FPU) + sizeof (RegisterContextDarwin_i386::EXC))
-
-static RegisterInfo g_register_infos[] =
-{
-//  Macro auto defines most stuff   eh_frame                DWARF                 GENERIC                    PROCESS PLUGIN       LLDB              VALUE REGS    INVALIDATE REGS
-//  =============================== ======================= ===================   =========================  ==================   ================= ==========    ===============
-    { DEFINE_GPR(eax    , NULL)     , { ehframe_eax        , dwarf_eax          , LLDB_INVALID_REGNUM       , LLDB_INVALID_REGNUM, gpr_eax      },      NULL,              NULL},
-    { DEFINE_GPR(ebx    , NULL)     , { ehframe_ebx        , dwarf_ebx          , LLDB_INVALID_REGNUM       , LLDB_INVALID_REGNUM, gpr_ebx      },      NULL,              NULL},
-    { DEFINE_GPR(ecx    , NULL)     , { ehframe_ecx        , dwarf_ecx          , LLDB_INVALID_REGNUM       , LLDB_INVALID_REGNUM, gpr_ecx      },      NULL,              NULL},
-    { DEFINE_GPR(edx    , NULL)     , { ehframe_edx        , dwarf_edx          , LLDB_INVALID_REGNUM       , LLDB_INVALID_REGNUM, gpr_edx      },      NULL,              NULL},
-    { DEFINE_GPR(edi    , NULL)     , { ehframe_edi        , dwarf_edi          , LLDB_INVALID_REGNUM       , LLDB_INVALID_REGNUM, gpr_edi      },      NULL,              NULL},
-    { DEFINE_GPR(esi    , NULL)     , { ehframe_esi        , dwarf_esi          , LLDB_INVALID_REGNUM       , LLDB_INVALID_REGNUM, gpr_esi      },      NULL,              NULL},
-    { DEFINE_GPR(ebp    , "fp")     , { ehframe_ebp        , dwarf_ebp          , LLDB_REGNUM_GENERIC_FP    , LLDB_INVALID_REGNUM, gpr_ebp      },      NULL,              NULL},
-    { DEFINE_GPR(esp    , "sp")     , { ehframe_esp        , dwarf_esp          , LLDB_REGNUM_GENERIC_SP    , LLDB_INVALID_REGNUM, gpr_esp      },      NULL,              NULL},
-    { DEFINE_GPR(ss     , NULL)     , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_ss       },      NULL,              NULL},
-    { DEFINE_GPR(eflags , "flags")  , { ehframe_eflags     , dwarf_eflags       , LLDB_REGNUM_GENERIC_FLAGS , LLDB_INVALID_REGNUM, gpr_eflags   },      NULL,              NULL},
-    { DEFINE_GPR(eip    , "pc")     , { ehframe_eip        , dwarf_eip          , LLDB_REGNUM_GENERIC_PC    , LLDB_INVALID_REGNUM, gpr_eip      },      NULL,              NULL},
-    { DEFINE_GPR(cs     , NULL)     , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_cs       },      NULL,              NULL},
-    { DEFINE_GPR(ds     , NULL)     , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_ds       },      NULL,              NULL},
-    { DEFINE_GPR(es     , NULL)     , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_es       },      NULL,              NULL},
-    { DEFINE_GPR(fs     , NULL)     , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_fs       },      NULL,              NULL},
-    { DEFINE_GPR(gs     , NULL)     , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_gs       },      NULL,              NULL},
-
-    { DEFINE_FPU_UINT(fcw)          , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_fcw      },      NULL,              NULL},
-    { DEFINE_FPU_UINT(fsw)          , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_fsw      },      NULL,              NULL},
-    { DEFINE_FPU_UINT(ftw)          , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_ftw      },      NULL,              NULL},
-    { DEFINE_FPU_UINT(fop)          , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_fop      },      NULL,              NULL},
-    { DEFINE_FPU_UINT(ip)           , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_ip       },      NULL,              NULL},
-    { DEFINE_FPU_UINT(cs)           , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_cs       },      NULL,              NULL},
-    { DEFINE_FPU_UINT(dp)           , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_dp       },      NULL,              NULL},
-    { DEFINE_FPU_UINT(ds)           , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_ds       },      NULL,              NULL},
-    { DEFINE_FPU_UINT(mxcsr)        , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_mxcsr    },      NULL,              NULL},
-    { DEFINE_FPU_UINT(mxcsrmask)    , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_mxcsrmask},      NULL,              NULL},
-    { DEFINE_FPU_VECT(stmm,0)   },
-    { DEFINE_FPU_VECT(stmm,1)   },
-    { DEFINE_FPU_VECT(stmm,2)   },
-    { DEFINE_FPU_VECT(stmm,3)   },
-    { DEFINE_FPU_VECT(stmm,4)   },
-    { DEFINE_FPU_VECT(stmm,5)   },
-    { DEFINE_FPU_VECT(stmm,6)   },
-    { DEFINE_FPU_VECT(stmm,7)   },
-    { DEFINE_FPU_VECT(xmm,0)    },
-    { DEFINE_FPU_VECT(xmm,1)    },
-    { DEFINE_FPU_VECT(xmm,2)    },
-    { DEFINE_FPU_VECT(xmm,3)    },
-    { DEFINE_FPU_VECT(xmm,4)    },
-    { DEFINE_FPU_VECT(xmm,5)    },
-    { DEFINE_FPU_VECT(xmm,6)    },
-    { DEFINE_FPU_VECT(xmm,7)    },
-
-    { DEFINE_EXC(trapno)            , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM   , LLDB_INVALID_REGNUM   , LLDB_INVALID_REGNUM, exc_trapno },       NULL,              NULL},
-    { DEFINE_EXC(err)               , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM   , LLDB_INVALID_REGNUM   , LLDB_INVALID_REGNUM, exc_err },          NULL,              NULL},
-    { DEFINE_EXC(faultvaddr)        , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM   , LLDB_INVALID_REGNUM   , LLDB_INVALID_REGNUM, exc_faultvaddr },   NULL,              NULL}
-};
+#define DEFINE_GPR(reg, alt)                                                   \
+  #reg, alt, sizeof(((RegisterContextDarwin_i386::GPR *) NULL)->reg),          \
+                    GPR_OFFSET(reg), eEncodingUint, eFormatHex
+#define DEFINE_FPU_UINT(reg)                                                   \
+  #reg, NULL, sizeof(((RegisterContextDarwin_i386::FPU *) NULL)->reg),         \
+                     FPU_OFFSET(reg), eEncodingUint, eFormatHex
+#define DEFINE_FPU_VECT(reg, i)                                                \
+  #reg #i, NULL,                                                               \
+      sizeof(((RegisterContextDarwin_i386::FPU *) NULL)->reg[i].bytes),        \
+              FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8,       \
+                         {LLDB_INVALID_REGNUM, dwarf_##reg##i,                 \
+                          LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,            \
+                          fpu_##reg##i },                                      \
+                          nullptr, nullptr, nullptr, 0
+
+#define DEFINE_EXC(reg)                                                        \
+  #reg, NULL, sizeof(((RegisterContextDarwin_i386::EXC *) NULL)->reg),         \
+                     EXC_OFFSET(reg), eEncodingUint, eFormatHex
+#define REG_CONTEXT_SIZE                                                       \
+  (sizeof(RegisterContextDarwin_i386::GPR) +                                   \
+   sizeof(RegisterContextDarwin_i386::FPU) +                                   \
+   sizeof(RegisterContextDarwin_i386::EXC))
+
+static RegisterInfo g_register_infos[] = {
+    //  Macro auto defines most stuff   eh_frame                DWARF
+    //  GENERIC                    PROCESS PLUGIN       LLDB
+    //  =============================== =======================
+    //  ===================   =========================  ==================
+    //  =================
+    {DEFINE_GPR(eax, NULL),
+     {ehframe_eax, dwarf_eax, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      gpr_eax},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(ebx, NULL),
+     {ehframe_ebx, dwarf_ebx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      gpr_ebx},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(ecx, NULL),
+     {ehframe_ecx, dwarf_ecx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      gpr_ecx},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(edx, NULL),
+     {ehframe_edx, dwarf_edx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      gpr_edx},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(edi, NULL),
+     {ehframe_edi, dwarf_edi, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      gpr_edi},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(esi, NULL),
+     {ehframe_esi, dwarf_esi, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      gpr_esi},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(ebp, "fp"),
+     {ehframe_ebp, dwarf_ebp, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM,
+      gpr_ebp},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(esp, "sp"),
+     {ehframe_esp, dwarf_esp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM,
+      gpr_esp},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(ss, NULL),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_ss},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(eflags, "flags"),
+     {ehframe_eflags, dwarf_eflags, LLDB_REGNUM_GENERIC_FLAGS,
+      LLDB_INVALID_REGNUM, gpr_eflags},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(eip, "pc"),
+     {ehframe_eip, dwarf_eip, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM,
+      gpr_eip},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(cs, NULL),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_cs},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(ds, NULL),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_ds},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(es, NULL),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_es},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(fs, NULL),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_fs},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(gs, NULL),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_gs},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+
+    {DEFINE_FPU_UINT(fcw),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_fcw},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(fsw),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_fsw},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(ftw),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_ftw},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(fop),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_fop},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(ip),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_ip},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(cs),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_cs},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(dp),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_dp},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(ds),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_ds},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(mxcsr),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_mxcsr},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(mxcsrmask),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_mxcsrmask},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_VECT(stmm, 0)},
+    {DEFINE_FPU_VECT(stmm, 1)},
+    {DEFINE_FPU_VECT(stmm, 2)},
+    {DEFINE_FPU_VECT(stmm, 3)},
+    {DEFINE_FPU_VECT(stmm, 4)},
+    {DEFINE_FPU_VECT(stmm, 5)},
+    {DEFINE_FPU_VECT(stmm, 6)},
+    {DEFINE_FPU_VECT(stmm, 7)},
+    {DEFINE_FPU_VECT(xmm, 0)},
+    {DEFINE_FPU_VECT(xmm, 1)},
+    {DEFINE_FPU_VECT(xmm, 2)},
+    {DEFINE_FPU_VECT(xmm, 3)},
+    {DEFINE_FPU_VECT(xmm, 4)},
+    {DEFINE_FPU_VECT(xmm, 5)},
+    {DEFINE_FPU_VECT(xmm, 6)},
+    {DEFINE_FPU_VECT(xmm, 7)},
+
+    {DEFINE_EXC(trapno),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, exc_trapno},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_EXC(err),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, exc_err},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_EXC(faultvaddr),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, exc_faultvaddr},
+     nullptr,
+     nullptr,
+     nullptr,
+     0}};
 
 static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
 
-RegisterContextDarwin_i386::RegisterContextDarwin_i386 (Thread &thread, uint32_t concrete_frame_idx) :
-    RegisterContext(thread, concrete_frame_idx),
-    gpr(),
-    fpu(),
-    exc()
-{
-    uint32_t i;
-    for (i=0; i<kNumErrors; i++)
-    {
-        gpr_errs[i] = -1;
-        fpu_errs[i] = -1;
-        exc_errs[i] = -1;
-    }
-}
-
-RegisterContextDarwin_i386::~RegisterContextDarwin_i386()
-{
+RegisterContextDarwin_i386::RegisterContextDarwin_i386(
+    Thread &thread, uint32_t concrete_frame_idx)
+    : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() {
+  uint32_t i;
+  for (i = 0; i < kNumErrors; i++) {
+    gpr_errs[i] = -1;
+    fpu_errs[i] = -1;
+    exc_errs[i] = -1;
+  }
 }
 
+RegisterContextDarwin_i386::~RegisterContextDarwin_i386() {}
 
-void
-RegisterContextDarwin_i386::InvalidateAllRegisters ()
-{
-    InvalidateAllRegisterStates();
+void RegisterContextDarwin_i386::InvalidateAllRegisters() {
+  InvalidateAllRegisterStates();
 }
 
-
-size_t
-RegisterContextDarwin_i386::GetRegisterCount ()
-{
-    assert(k_num_register_infos == k_num_registers);
-    return k_num_registers;
+size_t RegisterContextDarwin_i386::GetRegisterCount() {
+  assert(k_num_register_infos == k_num_registers);
+  return k_num_registers;
 }
 
 const RegisterInfo *
-RegisterContextDarwin_i386::GetRegisterInfoAtIndex (size_t reg)
-{
-    assert(k_num_register_infos == k_num_registers);
-    if (reg < k_num_registers)
-        return &g_register_infos[reg];
-    return NULL;
+RegisterContextDarwin_i386::GetRegisterInfoAtIndex(size_t reg) {
+  assert(k_num_register_infos == k_num_registers);
+  if (reg < k_num_registers)
+    return &g_register_infos[reg];
+  return NULL;
 }
 
-size_t
-RegisterContextDarwin_i386::GetRegisterInfosCount ()
-{
-    return k_num_register_infos;
+size_t RegisterContextDarwin_i386::GetRegisterInfosCount() {
+  return k_num_register_infos;
 }
 
-const RegisterInfo *
-RegisterContextDarwin_i386::GetRegisterInfos ()
-{
-    return g_register_infos;
+const RegisterInfo *RegisterContextDarwin_i386::GetRegisterInfos() {
+  return g_register_infos;
 }
 
-
 // General purpose registers
-static uint32_t
-g_gpr_regnums[] =
-{
-    gpr_eax,
-    gpr_ebx,
-    gpr_ecx,
-    gpr_edx,
-    gpr_edi,
-    gpr_esi,
-    gpr_ebp,
-    gpr_esp,
-    gpr_ss,
-    gpr_eflags,
-    gpr_eip,
-    gpr_cs,
-    gpr_ds,
-    gpr_es,
-    gpr_fs,
-    gpr_gs
-};
+static uint32_t g_gpr_regnums[] = {
+    gpr_eax, gpr_ebx,    gpr_ecx, gpr_edx, gpr_edi, gpr_esi, gpr_ebp, gpr_esp,
+    gpr_ss,  gpr_eflags, gpr_eip, gpr_cs,  gpr_ds,  gpr_es,  gpr_fs,  gpr_gs};
 
 // Floating point registers
-static uint32_t
-g_fpu_regnums[] =
-{
-    fpu_fcw,
-    fpu_fsw,
-    fpu_ftw,
-    fpu_fop,
-    fpu_ip,
-    fpu_cs,
-    fpu_dp,
-    fpu_ds,
-    fpu_mxcsr,
-    fpu_mxcsrmask,
-    fpu_stmm0,
-    fpu_stmm1,
-    fpu_stmm2,
-    fpu_stmm3,
-    fpu_stmm4,
-    fpu_stmm5,
-    fpu_stmm6,
-    fpu_stmm7,
-    fpu_xmm0,
-    fpu_xmm1,
-    fpu_xmm2,
-    fpu_xmm3,
-    fpu_xmm4,
-    fpu_xmm5,
-    fpu_xmm6,
-    fpu_xmm7
-};
+static uint32_t g_fpu_regnums[] = {
+    fpu_fcw,   fpu_fsw,   fpu_ftw,   fpu_fop,       fpu_ip,    fpu_cs,
+    fpu_dp,    fpu_ds,    fpu_mxcsr, fpu_mxcsrmask, fpu_stmm0, fpu_stmm1,
+    fpu_stmm2, fpu_stmm3, fpu_stmm4, fpu_stmm5,     fpu_stmm6, fpu_stmm7,
+    fpu_xmm0,  fpu_xmm1,  fpu_xmm2,  fpu_xmm3,      fpu_xmm4,  fpu_xmm5,
+    fpu_xmm6,  fpu_xmm7};
 
 // Exception registers
 
-static uint32_t
-g_exc_regnums[] =
-{
-    exc_trapno,
-    exc_err,
-    exc_faultvaddr
-};
+static uint32_t g_exc_regnums[] = {exc_trapno, exc_err, exc_faultvaddr};
 
 // Number of registers in each register set
 const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
@@ -341,539 +468,514 @@ const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
 // of zero is for all registers, followed by other registers sets. The
 // register information for the all register set need not be filled in.
 //----------------------------------------------------------------------
-static const RegisterSet g_reg_sets[] =
-{
-    { "General Purpose Registers",  "gpr",  k_num_gpr_registers,    g_gpr_regnums,      },
-    { "Floating Point Registers",   "fpu",  k_num_fpu_registers,    g_fpu_regnums       },
-    { "Exception State Registers",  "exc",  k_num_exc_registers,    g_exc_regnums       }
-};
+static const RegisterSet g_reg_sets[] = {
+    {
+        "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums,
+    },
+    {"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
+    {"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
 
 const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
 
-
-size_t
-RegisterContextDarwin_i386::GetRegisterSetCount ()
-{
-    return k_num_regsets;
+size_t RegisterContextDarwin_i386::GetRegisterSetCount() {
+  return k_num_regsets;
 }
 
-const RegisterSet *
-RegisterContextDarwin_i386::GetRegisterSet (size_t reg_set)
-{
-    if (reg_set < k_num_regsets)
-        return &g_reg_sets[reg_set];
-    return NULL;
+const RegisterSet *RegisterContextDarwin_i386::GetRegisterSet(size_t reg_set) {
+  if (reg_set < k_num_regsets)
+    return &g_reg_sets[reg_set];
+  return NULL;
 }
 
-
 //----------------------------------------------------------------------
 // Register information definitions for 32 bit i386.
 //----------------------------------------------------------------------
-int
-RegisterContextDarwin_i386::GetSetForNativeRegNum (int reg_num)
-{
-    if (reg_num < fpu_fcw)
-        return GPRRegSet;
-    else if (reg_num < exc_trapno)
-        return FPURegSet;
-    else if (reg_num < k_num_registers)
-        return EXCRegSet;
-    return -1;
+int RegisterContextDarwin_i386::GetSetForNativeRegNum(int reg_num) {
+  if (reg_num < fpu_fcw)
+    return GPRRegSet;
+  else if (reg_num < exc_trapno)
+    return FPURegSet;
+  else if (reg_num < k_num_registers)
+    return EXCRegSet;
+  return -1;
 }
 
-
-void
-RegisterContextDarwin_i386::LogGPR(Log *log, const char *title)
-{
-    if (log)
-    {
-        if (title)
-            log->Printf ("%s", title);
-        for (uint32_t i=0; i<k_num_gpr_registers; i++)
-        {
-            uint32_t reg = gpr_eax + i;
-            log->Printf("%12s = 0x%8.8x", g_register_infos[reg].name, (&gpr.eax)[reg]);
-        }
+void RegisterContextDarwin_i386::LogGPR(Log *log, const char *title) {
+  if (log) {
+    if (title)
+      log->Printf("%s", title);
+    for (uint32_t i = 0; i < k_num_gpr_registers; i++) {
+      uint32_t reg = gpr_eax + i;
+      log->Printf("%12s = 0x%8.8x", g_register_infos[reg].name,
+                  (&gpr.eax)[reg]);
     }
+  }
 }
 
-
-
-int
-RegisterContextDarwin_i386::ReadGPR (bool force)
-{
-    int set = GPRRegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
-    }
-    return GetError(set, Read);
+int RegisterContextDarwin_i386::ReadGPR(bool force) {
+  int set = GPRRegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+  }
+  return GetError(set, Read);
 }
 
-int
-RegisterContextDarwin_i386::ReadFPU (bool force)
-{
-    int set = FPURegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
-    }
-    return GetError(set, Read);
+int RegisterContextDarwin_i386::ReadFPU(bool force) {
+  int set = FPURegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+  }
+  return GetError(set, Read);
 }
 
-int
-RegisterContextDarwin_i386::ReadEXC (bool force)
-{
-    int set = EXCRegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
-    }
-    return GetError(set, Read);
+int RegisterContextDarwin_i386::ReadEXC(bool force) {
+  int set = EXCRegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
+  }
+  return GetError(set, Read);
 }
 
-int
-RegisterContextDarwin_i386::WriteGPR ()
-{
-    int set = GPRRegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return -1;
-    }
-    SetError (set, Write, DoWriteGPR(GetThreadID(), set, gpr));
-    SetError (set, Read, -1);
-    return GetError(set, Write);
+int RegisterContextDarwin_i386::WriteGPR() {
+  int set = GPRRegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
+    return -1;
+  }
+  SetError(set, Write, DoWriteGPR(GetThreadID(), set, gpr));
+  SetError(set, Read, -1);
+  return GetError(set, Write);
 }
 
-int
-RegisterContextDarwin_i386::WriteFPU ()
-{
-    int set = FPURegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return -1;
-    }
-    SetError (set, Write, DoWriteFPU(GetThreadID(), set, fpu));
-    SetError (set, Read, -1);
-    return GetError(set, Write);
+int RegisterContextDarwin_i386::WriteFPU() {
+  int set = FPURegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
+    return -1;
+  }
+  SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu));
+  SetError(set, Read, -1);
+  return GetError(set, Write);
 }
 
-int
-RegisterContextDarwin_i386::WriteEXC ()
-{
-    int set = EXCRegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return -1;
-    }
-    SetError (set, Write, DoWriteEXC(GetThreadID(), set, exc));
-    SetError (set, Read, -1);
-    return GetError(set, Write);
+int RegisterContextDarwin_i386::WriteEXC() {
+  int set = EXCRegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
+    return -1;
+  }
+  SetError(set, Write, DoWriteEXC(GetThreadID(), set, exc));
+  SetError(set, Read, -1);
+  return GetError(set, Write);
 }
 
-int
-RegisterContextDarwin_i386::ReadRegisterSet (uint32_t set, bool force)
-{
-    switch (set)
-    {
-    case GPRRegSet:    return ReadGPR(force);
-    case FPURegSet:    return ReadFPU(force);
-    case EXCRegSet:    return ReadEXC(force);
-    default: break;
-    }
-    return -1;
+int RegisterContextDarwin_i386::ReadRegisterSet(uint32_t set, bool force) {
+  switch (set) {
+  case GPRRegSet:
+    return ReadGPR(force);
+  case FPURegSet:
+    return ReadFPU(force);
+  case EXCRegSet:
+    return ReadEXC(force);
+  default:
+    break;
+  }
+  return -1;
 }
 
-int
-RegisterContextDarwin_i386::WriteRegisterSet (uint32_t set)
-{
-    // Make sure we have a valid context to set.
-    if (RegisterSetIsCached(set))
-    {
-        switch (set)
-        {
-        case GPRRegSet:    return WriteGPR();
-        case FPURegSet:    return WriteFPU();
-        case EXCRegSet:    return WriteEXC();
-        default: break;
-        }
+int RegisterContextDarwin_i386::WriteRegisterSet(uint32_t set) {
+  // Make sure we have a valid context to set.
+  if (RegisterSetIsCached(set)) {
+    switch (set) {
+    case GPRRegSet:
+      return WriteGPR();
+    case FPURegSet:
+      return WriteFPU();
+    case EXCRegSet:
+      return WriteEXC();
+    default:
+      break;
     }
-    return -1;
+  }
+  return -1;
 }
 
-bool
-RegisterContextDarwin_i386::ReadRegister (const RegisterInfo *reg_info,
-                                        RegisterValue &value)
-{
-    const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
-    int set = RegisterContextDarwin_i386::GetSetForNativeRegNum (reg);
+bool RegisterContextDarwin_i386::ReadRegister(const RegisterInfo *reg_info,
+                                              RegisterValue &value) {
+  const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+  int set = RegisterContextDarwin_i386::GetSetForNativeRegNum(reg);
 
-    if (set == -1)
-        return false;
+  if (set == -1)
+    return false;
 
-    if (ReadRegisterSet(set, false) != 0)
-        return false;
+  if (ReadRegisterSet(set, false) != 0)
+    return false;
 
-    switch (reg)
-    {
-    case gpr_eax:
-    case gpr_ebx:
-    case gpr_ecx:
-    case gpr_edx:
-    case gpr_edi:
-    case gpr_esi:
-    case gpr_ebp:
-    case gpr_esp:
-    case gpr_ss:
-    case gpr_eflags:
-    case gpr_eip:
-    case gpr_cs:
-    case gpr_ds:
-    case gpr_es:
-    case gpr_fs:
-    case gpr_gs:
-        value = (&gpr.eax)[reg - gpr_eax];
-        break;
-
-    case fpu_fcw:
-        value = fpu.fcw;
-        break;
-
-    case fpu_fsw:
-        value = fpu.fsw;
-        break;
-
-    case fpu_ftw:
-        value  = fpu.ftw;
-        break;
-
-    case fpu_fop:
-        value = fpu.fop;
-        break;
-
-    case fpu_ip:
-        value = fpu.ip;
-        break;
-
-    case fpu_cs:
-        value = fpu.cs;
-        break;
-
-    case fpu_dp:
-        value = fpu.dp;
-        break;
-
-    case fpu_ds:
-        value = fpu.ds;
-        break;
-
-    case fpu_mxcsr:
-        value = fpu.mxcsr;
-        break;
-
-    case fpu_mxcsrmask:
-        value = fpu.mxcsrmask;
-        break;
-
-    case fpu_stmm0:
-    case fpu_stmm1:
-    case fpu_stmm2:
-    case fpu_stmm3:
-    case fpu_stmm4:
-    case fpu_stmm5:
-    case fpu_stmm6:
-    case fpu_stmm7:
-        // These values don't fit into scalar types,
-        // RegisterContext::ReadRegisterBytes() must be used for these
-        // registers
-        //::memcpy (reg_value.value.vector.uint8, fpu.stmm[reg - fpu_stmm0].bytes, 10);
-        return false;
-
-    case fpu_xmm0:
-    case fpu_xmm1:
-    case fpu_xmm2:
-    case fpu_xmm3:
-    case fpu_xmm4:
-    case fpu_xmm5:
-    case fpu_xmm6:
-    case fpu_xmm7:
-        // These values don't fit into scalar types, RegisterContext::ReadRegisterBytes()
-        // must be used for these registers
-        //::memcpy (reg_value.value.vector.uint8, fpu.xmm[reg - fpu_xmm0].bytes, 16);
-        return false;
-
-    case exc_trapno:
-        value = exc.trapno;
-        break;
-
-    case exc_err:
-        value = exc.err;
-        break;
-
-    case exc_faultvaddr:
-        value = exc.faultvaddr;
-        break;
+  switch (reg) {
+  case gpr_eax:
+  case gpr_ebx:
+  case gpr_ecx:
+  case gpr_edx:
+  case gpr_edi:
+  case gpr_esi:
+  case gpr_ebp:
+  case gpr_esp:
+  case gpr_ss:
+  case gpr_eflags:
+  case gpr_eip:
+  case gpr_cs:
+  case gpr_ds:
+  case gpr_es:
+  case gpr_fs:
+  case gpr_gs:
+    value = (&gpr.eax)[reg - gpr_eax];
+    break;
+
+  case fpu_fcw:
+    value = fpu.fcw;
+    break;
+
+  case fpu_fsw:
+    value = fpu.fsw;
+    break;
+
+  case fpu_ftw:
+    value = fpu.ftw;
+    break;
+
+  case fpu_fop:
+    value = fpu.fop;
+    break;
+
+  case fpu_ip:
+    value = fpu.ip;
+    break;
+
+  case fpu_cs:
+    value = fpu.cs;
+    break;
+
+  case fpu_dp:
+    value = fpu.dp;
+    break;
+
+  case fpu_ds:
+    value = fpu.ds;
+    break;
+
+  case fpu_mxcsr:
+    value = fpu.mxcsr;
+    break;
+
+  case fpu_mxcsrmask:
+    value = fpu.mxcsrmask;
+    break;
+
+  case fpu_stmm0:
+  case fpu_stmm1:
+  case fpu_stmm2:
+  case fpu_stmm3:
+  case fpu_stmm4:
+  case fpu_stmm5:
+  case fpu_stmm6:
+  case fpu_stmm7:
+    // These values don't fit into scalar types,
+    // RegisterContext::ReadRegisterBytes() must be used for these
+    // registers
+    //::memcpy (reg_value.value.vector.uint8, fpu.stmm[reg - fpu_stmm0].bytes,
+    //10);
+    return false;
 
-    default:
-        return false;
-    }
-    return true;
-}
+  case fpu_xmm0:
+  case fpu_xmm1:
+  case fpu_xmm2:
+  case fpu_xmm3:
+  case fpu_xmm4:
+  case fpu_xmm5:
+  case fpu_xmm6:
+  case fpu_xmm7:
+    // These values don't fit into scalar types,
+    // RegisterContext::ReadRegisterBytes()
+    // must be used for these registers
+    //::memcpy (reg_value.value.vector.uint8, fpu.xmm[reg - fpu_xmm0].bytes,
+    //16);
+    return false;
 
+  case exc_trapno:
+    value = exc.trapno;
+    break;
 
-bool
-RegisterContextDarwin_i386::WriteRegister (const RegisterInfo *reg_info,
-                                         const RegisterValue &value)
-{
-    const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
-    int set = GetSetForNativeRegNum (reg);
+  case exc_err:
+    value = exc.err;
+    break;
 
-    if (set == -1)
-        return false;
+  case exc_faultvaddr:
+    value = exc.faultvaddr;
+    break;
 
-    if (ReadRegisterSet(set, false) != 0)
-        return false;
+  default:
+    return false;
+  }
+  return true;
+}
 
-    switch (reg)
-    {
-    case gpr_eax:
-    case gpr_ebx:
-    case gpr_ecx:
-    case gpr_edx:
-    case gpr_edi:
-    case gpr_esi:
-    case gpr_ebp:
-    case gpr_esp:
-    case gpr_ss:
-    case gpr_eflags:
-    case gpr_eip:
-    case gpr_cs:
-    case gpr_ds:
-    case gpr_es:
-    case gpr_fs:
-    case gpr_gs:
-        (&gpr.eax)[reg - gpr_eax] = value.GetAsUInt32();
-        break;
-
-    case fpu_fcw:
-        fpu.fcw = value.GetAsUInt16();
-        break;
-
-    case fpu_fsw:
-        fpu.fsw = value.GetAsUInt16();
-        break;
-
-    case fpu_ftw:
-        fpu.ftw = value.GetAsUInt8();
-        break;
-
-    case fpu_fop:
-        fpu.fop = value.GetAsUInt16();
-        break;
-
-    case fpu_ip:
-        fpu.ip = value.GetAsUInt32();
-        break;
-
-    case fpu_cs:
-        fpu.cs = value.GetAsUInt16();
-        break;
-
-    case fpu_dp:
-        fpu.dp = value.GetAsUInt32();
-        break;
-
-    case fpu_ds:
-        fpu.ds = value.GetAsUInt16();
-        break;
-
-    case fpu_mxcsr:
-        fpu.mxcsr = value.GetAsUInt32();
-        break;
-
-    case fpu_mxcsrmask:
-        fpu.mxcsrmask = value.GetAsUInt32();
-        break;
-
-    case fpu_stmm0:
-    case fpu_stmm1:
-    case fpu_stmm2:
-    case fpu_stmm3:
-    case fpu_stmm4:
-    case fpu_stmm5:
-    case fpu_stmm6:
-    case fpu_stmm7:
-        // These values don't fit into scalar types, RegisterContext::ReadRegisterBytes()
-        // must be used for these registers
-        ::memcpy (fpu.stmm[reg - fpu_stmm0].bytes, value.GetBytes(), value.GetByteSize());
-        return false;
-
-    case fpu_xmm0:
-    case fpu_xmm1:
-    case fpu_xmm2:
-    case fpu_xmm3:
-    case fpu_xmm4:
-    case fpu_xmm5:
-    case fpu_xmm6:
-    case fpu_xmm7:
-        // These values don't fit into scalar types, RegisterContext::ReadRegisterBytes()
-        // must be used for these registers
-        ::memcpy (fpu.xmm[reg - fpu_xmm0].bytes, value.GetBytes(), value.GetByteSize());
-        return false;
-
-    case exc_trapno:
-        exc.trapno = value.GetAsUInt32();
-        break;
-
-    case exc_err:
-        exc.err = value.GetAsUInt32();
-        break;
-
-    case exc_faultvaddr:
-        exc.faultvaddr = value.GetAsUInt32();
-        break;
+bool RegisterContextDarwin_i386::WriteRegister(const RegisterInfo *reg_info,
+                                               const RegisterValue &value) {
+  const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+  int set = GetSetForNativeRegNum(reg);
 
-    default:
-        return false;
-    }
-    return WriteRegisterSet(set) == 0;
-}
+  if (set == -1)
+    return false;
 
-bool
-RegisterContextDarwin_i386::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
-    data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0));
-    if (data_sp &&
-        ReadGPR (false) == 0 &&
-        ReadFPU (false) == 0 &&
-        ReadEXC (false) == 0)
-    {
-        uint8_t *dst = data_sp->GetBytes();
-        ::memcpy (dst, &gpr, sizeof(gpr));
-        dst += sizeof(gpr);
+  if (ReadRegisterSet(set, false) != 0)
+    return false;
 
-        ::memcpy (dst, &fpu, sizeof(fpu));
-        dst += sizeof(gpr);
+  switch (reg) {
+  case gpr_eax:
+  case gpr_ebx:
+  case gpr_ecx:
+  case gpr_edx:
+  case gpr_edi:
+  case gpr_esi:
+  case gpr_ebp:
+  case gpr_esp:
+  case gpr_ss:
+  case gpr_eflags:
+  case gpr_eip:
+  case gpr_cs:
+  case gpr_ds:
+  case gpr_es:
+  case gpr_fs:
+  case gpr_gs:
+    (&gpr.eax)[reg - gpr_eax] = value.GetAsUInt32();
+    break;
+
+  case fpu_fcw:
+    fpu.fcw = value.GetAsUInt16();
+    break;
+
+  case fpu_fsw:
+    fpu.fsw = value.GetAsUInt16();
+    break;
+
+  case fpu_ftw:
+    fpu.ftw = value.GetAsUInt8();
+    break;
+
+  case fpu_fop:
+    fpu.fop = value.GetAsUInt16();
+    break;
+
+  case fpu_ip:
+    fpu.ip = value.GetAsUInt32();
+    break;
+
+  case fpu_cs:
+    fpu.cs = value.GetAsUInt16();
+    break;
+
+  case fpu_dp:
+    fpu.dp = value.GetAsUInt32();
+    break;
+
+  case fpu_ds:
+    fpu.ds = value.GetAsUInt16();
+    break;
+
+  case fpu_mxcsr:
+    fpu.mxcsr = value.GetAsUInt32();
+    break;
+
+  case fpu_mxcsrmask:
+    fpu.mxcsrmask = value.GetAsUInt32();
+    break;
+
+  case fpu_stmm0:
+  case fpu_stmm1:
+  case fpu_stmm2:
+  case fpu_stmm3:
+  case fpu_stmm4:
+  case fpu_stmm5:
+  case fpu_stmm6:
+  case fpu_stmm7:
+    // These values don't fit into scalar types,
+    // RegisterContext::ReadRegisterBytes()
+    // must be used for these registers
+    ::memcpy(fpu.stmm[reg - fpu_stmm0].bytes, value.GetBytes(),
+             value.GetByteSize());
+    return false;
 
-        ::memcpy (dst, &exc, sizeof(exc));
-        return true;
-    }
+  case fpu_xmm0:
+  case fpu_xmm1:
+  case fpu_xmm2:
+  case fpu_xmm3:
+  case fpu_xmm4:
+  case fpu_xmm5:
+  case fpu_xmm6:
+  case fpu_xmm7:
+    // These values don't fit into scalar types,
+    // RegisterContext::ReadRegisterBytes()
+    // must be used for these registers
+    ::memcpy(fpu.xmm[reg - fpu_xmm0].bytes, value.GetBytes(),
+             value.GetByteSize());
     return false;
-}
 
-bool
-RegisterContextDarwin_i386::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
-    if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE)
-    {
-        const uint8_t *src = data_sp->GetBytes();
-        ::memcpy (&gpr, src, sizeof(gpr));
-        src += sizeof(gpr);
-
-        ::memcpy (&fpu, src, sizeof(fpu));
-        src += sizeof(gpr);
-
-        ::memcpy (&exc, src, sizeof(exc));
-        uint32_t success_count = 0;
-        if (WriteGPR() == 0)
-            ++success_count;
-        if (WriteFPU() == 0)
-            ++success_count;
-        if (WriteEXC() == 0)
-            ++success_count;
-        return success_count == 3;
-    }
+  case exc_trapno:
+    exc.trapno = value.GetAsUInt32();
+    break;
+
+  case exc_err:
+    exc.err = value.GetAsUInt32();
+    break;
+
+  case exc_faultvaddr:
+    exc.faultvaddr = value.GetAsUInt32();
+    break;
+
+  default:
     return false;
+  }
+  return WriteRegisterSet(set) == 0;
 }
 
+bool RegisterContextDarwin_i386::ReadAllRegisterValues(
+    lldb::DataBufferSP &data_sp) {
+  data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
+  if (data_sp && ReadGPR(false) == 0 && ReadFPU(false) == 0 &&
+      ReadEXC(false) == 0) {
+    uint8_t *dst = data_sp->GetBytes();
+    ::memcpy(dst, &gpr, sizeof(gpr));
+    dst += sizeof(gpr);
 
-uint32_t
-RegisterContextDarwin_i386::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t reg)
-{
-    if (kind == eRegisterKindGeneric)
-    {
-        switch (reg)
-        {
-        case LLDB_REGNUM_GENERIC_PC:        return gpr_eip;
-        case LLDB_REGNUM_GENERIC_SP:        return gpr_esp;
-        case LLDB_REGNUM_GENERIC_FP:        return gpr_ebp;
-        case LLDB_REGNUM_GENERIC_FLAGS:     return gpr_eflags;
-        case LLDB_REGNUM_GENERIC_RA:
-        default:
-            break;
-        }
-    }
-    else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF)
-    {
-        switch (reg)
-        {
-        case dwarf_eax:     return gpr_eax;
-        case dwarf_ecx:     return gpr_ecx;
-        case dwarf_edx:     return gpr_edx;
-        case dwarf_ebx:     return gpr_ebx;
-        case dwarf_esp:     return gpr_esp;
-        case dwarf_ebp:     return gpr_ebp;
-        case dwarf_esi:     return gpr_esi;
-        case dwarf_edi:     return gpr_edi;
-        case dwarf_eip:     return gpr_eip;
-        case dwarf_eflags:  return gpr_eflags;
-        case dwarf_stmm0:   return fpu_stmm0;
-        case dwarf_stmm1:   return fpu_stmm1;
-        case dwarf_stmm2:   return fpu_stmm2;
-        case dwarf_stmm3:   return fpu_stmm3;
-        case dwarf_stmm4:   return fpu_stmm4;
-        case dwarf_stmm5:   return fpu_stmm5;
-        case dwarf_stmm6:   return fpu_stmm6;
-        case dwarf_stmm7:   return fpu_stmm7;
-        case dwarf_xmm0:    return fpu_xmm0;
-        case dwarf_xmm1:    return fpu_xmm1;
-        case dwarf_xmm2:    return fpu_xmm2;
-        case dwarf_xmm3:    return fpu_xmm3;
-        case dwarf_xmm4:    return fpu_xmm4;
-        case dwarf_xmm5:    return fpu_xmm5;
-        case dwarf_xmm6:    return fpu_xmm6;
-        case dwarf_xmm7:    return fpu_xmm7;
-        default:
-            break;
-        }
-    }
-    else if (kind == eRegisterKindLLDB)
-    {
-        return reg;
-    }
-    return LLDB_INVALID_REGNUM;
-}
+    ::memcpy(dst, &fpu, sizeof(fpu));
+    dst += sizeof(gpr);
 
+    ::memcpy(dst, &exc, sizeof(exc));
+    return true;
+  }
+  return false;
+}
 
-bool
-RegisterContextDarwin_i386::HardwareSingleStep (bool enable)
-{
-    if (ReadGPR(false) != 0)
-        return false;
+bool RegisterContextDarwin_i386::WriteAllRegisterValues(
+    const lldb::DataBufferSP &data_sp) {
+  if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE) {
+    const uint8_t *src = data_sp->GetBytes();
+    ::memcpy(&gpr, src, sizeof(gpr));
+    src += sizeof(gpr);
+
+    ::memcpy(&fpu, src, sizeof(fpu));
+    src += sizeof(gpr);
+
+    ::memcpy(&exc, src, sizeof(exc));
+    uint32_t success_count = 0;
+    if (WriteGPR() == 0)
+      ++success_count;
+    if (WriteFPU() == 0)
+      ++success_count;
+    if (WriteEXC() == 0)
+      ++success_count;
+    return success_count == 3;
+  }
+  return false;
+}
 
-    const uint32_t trace_bit = 0x100u;
-    if (enable)
-    {
-        // If the trace bit is already set, there is nothing to do
-        if (gpr.eflags & trace_bit)
-            return true;
-        else
-            gpr.eflags |= trace_bit;
+uint32_t RegisterContextDarwin_i386::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t reg) {
+  if (kind == eRegisterKindGeneric) {
+    switch (reg) {
+    case LLDB_REGNUM_GENERIC_PC:
+      return gpr_eip;
+    case LLDB_REGNUM_GENERIC_SP:
+      return gpr_esp;
+    case LLDB_REGNUM_GENERIC_FP:
+      return gpr_ebp;
+    case LLDB_REGNUM_GENERIC_FLAGS:
+      return gpr_eflags;
+    case LLDB_REGNUM_GENERIC_RA:
+    default:
+      break;
     }
-    else
-    {
-        // If the trace bit is already cleared, there is nothing to do
-        if (gpr.eflags & trace_bit)
-            gpr.eflags &= ~trace_bit;
-        else
-            return true;
+  } else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF) {
+    switch (reg) {
+    case dwarf_eax:
+      return gpr_eax;
+    case dwarf_ecx:
+      return gpr_ecx;
+    case dwarf_edx:
+      return gpr_edx;
+    case dwarf_ebx:
+      return gpr_ebx;
+    case dwarf_esp:
+      return gpr_esp;
+    case dwarf_ebp:
+      return gpr_ebp;
+    case dwarf_esi:
+      return gpr_esi;
+    case dwarf_edi:
+      return gpr_edi;
+    case dwarf_eip:
+      return gpr_eip;
+    case dwarf_eflags:
+      return gpr_eflags;
+    case dwarf_stmm0:
+      return fpu_stmm0;
+    case dwarf_stmm1:
+      return fpu_stmm1;
+    case dwarf_stmm2:
+      return fpu_stmm2;
+    case dwarf_stmm3:
+      return fpu_stmm3;
+    case dwarf_stmm4:
+      return fpu_stmm4;
+    case dwarf_stmm5:
+      return fpu_stmm5;
+    case dwarf_stmm6:
+      return fpu_stmm6;
+    case dwarf_stmm7:
+      return fpu_stmm7;
+    case dwarf_xmm0:
+      return fpu_xmm0;
+    case dwarf_xmm1:
+      return fpu_xmm1;
+    case dwarf_xmm2:
+      return fpu_xmm2;
+    case dwarf_xmm3:
+      return fpu_xmm3;
+    case dwarf_xmm4:
+      return fpu_xmm4;
+    case dwarf_xmm5:
+      return fpu_xmm5;
+    case dwarf_xmm6:
+      return fpu_xmm6;
+    case dwarf_xmm7:
+      return fpu_xmm7;
+    default:
+      break;
     }
-
-    return WriteGPR() == 0;
+  } else if (kind == eRegisterKindLLDB) {
+    return reg;
+  }
+  return LLDB_INVALID_REGNUM;
 }
 
+bool RegisterContextDarwin_i386::HardwareSingleStep(bool enable) {
+  if (ReadGPR(false) != 0)
+    return false;
 
+  const uint32_t trace_bit = 0x100u;
+  if (enable) {
+    // If the trace bit is already set, there is nothing to do
+    if (gpr.eflags & trace_bit)
+      return true;
+    else
+      gpr.eflags |= trace_bit;
+  } else {
+    // If the trace bit is already cleared, there is nothing to do
+    if (gpr.eflags & trace_bit)
+      gpr.eflags &= ~trace_bit;
+    else
+      return true;
+  }
 
+  return WriteGPR() == 0;
+}
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h
index 9568b03..aea8a29 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h
@@ -14,255 +14,200 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
 #include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
 
-class RegisterContextDarwin_i386 : public lldb_private::RegisterContext
-{
+class RegisterContextDarwin_i386 : public lldb_private::RegisterContext {
 public:
-    RegisterContextDarwin_i386(lldb_private::Thread &thread,
-                               uint32_t concrete_frame_idx);
-
-    ~RegisterContextDarwin_i386() override;
-
-    void
-    InvalidateAllRegisters() override;
-
-    size_t
-    GetRegisterCount() override;
-
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
-
-    size_t
-    GetRegisterSetCount() override;
-
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t set) override;
-
-    bool
-    ReadRegister(const lldb_private::RegisterInfo *reg_info,
-                 lldb_private::RegisterValue &value) override;
-
-    bool
-    WriteRegister(const lldb_private::RegisterInfo *reg_info,
-                  const lldb_private::RegisterValue &value) override;
-    
-    bool
-    ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-
-    bool
-    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
-
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
-    bool
-    HardwareSingleStep(bool enable) override;
-
-    struct GPR
-    {
-        uint32_t eax;
-        uint32_t ebx;
-        uint32_t ecx;
-        uint32_t edx;
-        uint32_t edi;
-        uint32_t esi;
-        uint32_t ebp;
-        uint32_t esp;
-        uint32_t ss;
-        uint32_t eflags;
-        uint32_t eip;
-        uint32_t cs;
-        uint32_t ds;
-        uint32_t es;
-        uint32_t fs;
-        uint32_t gs;
-    };
-
-    struct MMSReg
-    {
-        uint8_t bytes[10];
-        uint8_t pad[6];
-    };
-
-    struct XMMReg
-    {
-        uint8_t bytes[16];
-    };
-
-    struct FPU
-    {
-        uint32_t    pad[2];
-        uint16_t    fcw;
-        uint16_t    fsw;
-        uint8_t     ftw;
-        uint8_t     pad1;
-        uint16_t    fop;
-        uint32_t    ip;
-        uint16_t    cs;
-        uint16_t    pad2;
-        uint32_t    dp;
-        uint16_t    ds;
-        uint16_t    pad3;
-        uint32_t    mxcsr;
-        uint32_t    mxcsrmask;
-        MMSReg      stmm[8];
-        XMMReg      xmm[8];
-        uint8_t     pad4[14*16];
-        int         pad5;
-    };
-
-    struct EXC
-    {
-        uint32_t trapno;
-        uint32_t err;
-        uint32_t faultvaddr;
-    };
+  RegisterContextDarwin_i386(lldb_private::Thread &thread,
+                             uint32_t concrete_frame_idx);
+
+  ~RegisterContextDarwin_i386() override;
+
+  void InvalidateAllRegisters() override;
+
+  size_t GetRegisterCount() override;
+
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+  size_t GetRegisterSetCount() override;
+
+  const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+  bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+                    lldb_private::RegisterValue &value) override;
+
+  bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+                     const lldb_private::RegisterValue &value) override;
+
+  bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+  bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
+
+  bool HardwareSingleStep(bool enable) override;
+
+  struct GPR {
+    uint32_t eax;
+    uint32_t ebx;
+    uint32_t ecx;
+    uint32_t edx;
+    uint32_t edi;
+    uint32_t esi;
+    uint32_t ebp;
+    uint32_t esp;
+    uint32_t ss;
+    uint32_t eflags;
+    uint32_t eip;
+    uint32_t cs;
+    uint32_t ds;
+    uint32_t es;
+    uint32_t fs;
+    uint32_t gs;
+  };
+
+  struct MMSReg {
+    uint8_t bytes[10];
+    uint8_t pad[6];
+  };
+
+  struct XMMReg {
+    uint8_t bytes[16];
+  };
+
+  struct FPU {
+    uint32_t pad[2];
+    uint16_t fcw;
+    uint16_t fsw;
+    uint8_t ftw;
+    uint8_t pad1;
+    uint16_t fop;
+    uint32_t ip;
+    uint16_t cs;
+    uint16_t pad2;
+    uint32_t dp;
+    uint16_t ds;
+    uint16_t pad3;
+    uint32_t mxcsr;
+    uint32_t mxcsrmask;
+    MMSReg stmm[8];
+    XMMReg xmm[8];
+    uint8_t pad4[14 * 16];
+    int pad5;
+  };
+
+  struct EXC {
+    uint32_t trapno;
+    uint32_t err;
+    uint32_t faultvaddr;
+  };
 
 protected:
-    enum
-    {
-        GPRRegSet = 1,
-        FPURegSet = 2,
-        EXCRegSet = 3
-    };
-
-    enum
-    {
-        GPRWordCount = sizeof(GPR)/sizeof(uint32_t),
-        FPUWordCount = sizeof(FPU)/sizeof(uint32_t),
-        EXCWordCount = sizeof(EXC)/sizeof(uint32_t)
-    };
-
-    enum
-    {
-        Read = 0,
-        Write = 1,
-        kNumErrors = 2
-    };
-
-    GPR gpr;
-    FPU fpu;
-    EXC exc;
-    int gpr_errs[2]; // Read/Write errors
-    int fpu_errs[2]; // Read/Write errors
-    int exc_errs[2]; // Read/Write errors
-
-    void
-    InvalidateAllRegisterStates()
-    {
-        SetError (GPRRegSet, Read, -1);
-        SetError (FPURegSet, Read, -1);
-        SetError (EXCRegSet, Read, -1);
+  enum { GPRRegSet = 1, FPURegSet = 2, EXCRegSet = 3 };
+
+  enum {
+    GPRWordCount = sizeof(GPR) / sizeof(uint32_t),
+    FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
+    EXCWordCount = sizeof(EXC) / sizeof(uint32_t)
+  };
+
+  enum { Read = 0, Write = 1, kNumErrors = 2 };
+
+  GPR gpr;
+  FPU fpu;
+  EXC exc;
+  int gpr_errs[2]; // Read/Write errors
+  int fpu_errs[2]; // Read/Write errors
+  int exc_errs[2]; // Read/Write errors
+
+  void InvalidateAllRegisterStates() {
+    SetError(GPRRegSet, Read, -1);
+    SetError(FPURegSet, Read, -1);
+    SetError(EXCRegSet, Read, -1);
+  }
+
+  int GetError(int flavor, uint32_t err_idx) const {
+    if (err_idx < kNumErrors) {
+      switch (flavor) {
+      // When getting all errors, just OR all values together to see if
+      // we got any kind of error.
+      case GPRRegSet:
+        return gpr_errs[err_idx];
+      case FPURegSet:
+        return fpu_errs[err_idx];
+      case EXCRegSet:
+        return exc_errs[err_idx];
+      default:
+        break;
+      }
     }
-
-    int
-    GetError (int flavor, uint32_t err_idx) const
-    {
-        if (err_idx < kNumErrors)
-        {
-            switch (flavor)
-            {
-            // When getting all errors, just OR all values together to see if
-            // we got any kind of error.
-            case GPRRegSet:    return gpr_errs[err_idx];
-            case FPURegSet:    return fpu_errs[err_idx];
-            case EXCRegSet:    return exc_errs[err_idx];
-            default: break;
-            }
-        }
-        return -1;
+    return -1;
+  }
+
+  bool SetError(int flavor, uint32_t err_idx, int err) {
+    if (err_idx < kNumErrors) {
+      switch (flavor) {
+      case GPRRegSet:
+        gpr_errs[err_idx] = err;
+        return true;
+
+      case FPURegSet:
+        fpu_errs[err_idx] = err;
+        return true;
+
+      case EXCRegSet:
+        exc_errs[err_idx] = err;
+        return true;
+
+      default:
+        break;
+      }
     }
+    return false;
+  }
 
-    bool
-    SetError (int flavor, uint32_t err_idx, int err)
-    {
-        if (err_idx < kNumErrors)
-        {
-            switch (flavor)
-            {
-            case GPRRegSet:
-                gpr_errs[err_idx] = err;
-                return true;
-
-            case FPURegSet:
-                fpu_errs[err_idx] = err;
-                return true;
-
-            case EXCRegSet:
-                exc_errs[err_idx] = err;
-                return true;
-
-            default: break;
-            }
-        }
-        return false;
-    }
+  bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }
 
-    bool
-    RegisterSetIsCached (int set) const
-    {
-        return GetError(set, Read) == 0;
-    }
+  void LogGPR(lldb_private::Log *log, const char *title);
+
+  int ReadGPR(bool force);
+
+  int ReadFPU(bool force);
 
-    void
-    LogGPR (lldb_private::Log *log, const char *title);
+  int ReadEXC(bool force);
 
-    int
-    ReadGPR (bool force);
+  int WriteGPR();
 
-    int
-    ReadFPU (bool force);
+  int WriteFPU();
 
-    int
-    ReadEXC (bool force);
+  int WriteEXC();
 
-    int
-    WriteGPR ();
+  // Subclasses override these to do the actual reading.
+  virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) = 0;
 
-    int
-    WriteFPU ();
+  virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
 
-    int
-    WriteEXC ();
+  virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;
 
-    // Subclasses override these to do the actual reading.
-    virtual int
-    DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr) = 0;
-    
-    virtual int
-    DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
+  virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
 
-    virtual int
-    DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc) = 0;
+  virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
 
-    virtual int
-    DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
-    
-    virtual int
-    DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
-    
-    virtual int
-    DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc) = 0;
+  virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;
 
-    int
-    ReadRegisterSet (uint32_t set, bool force);
+  int ReadRegisterSet(uint32_t set, bool force);
 
-    int
-    WriteRegisterSet (uint32_t set);
+  int WriteRegisterSet(uint32_t set);
 
-    static uint32_t
-    GetRegisterNumber (uint32_t reg_kind, uint32_t reg_num);
+  static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);
 
-    static int
-    GetSetForNativeRegNum (int reg_num);
+  static int GetSetForNativeRegNum(int reg_num);
 
-    static size_t
-    GetRegisterInfosCount ();
+  static size_t GetRegisterInfosCount();
 
-    static const lldb_private::RegisterInfo *
-    GetRegisterInfos ();
+  static const lldb_private::RegisterInfo *GetRegisterInfos();
 };
 
 #endif // liblldb_RegisterContextDarwin_i386_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
index aee6e12..7c0bafa 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
@@ -7,11 +7,10 @@
 //
 //===----------------------------------------------------------------------===//
 
-
 // C Includes
 #include <inttypes.h> // PRIx64
 #include <stdarg.h>
-#include <stddef.h>  // offsetof
+#include <stddef.h> // offsetof
 
 // C++ Includes
 // Other libraries and framework includes
@@ -36,340 +35,489 @@
 using namespace lldb;
 using namespace lldb_private;
 
-enum
-{
-    gpr_rax = 0,
-    gpr_rbx,
-    gpr_rcx,
-    gpr_rdx,
-    gpr_rdi,
-    gpr_rsi,
-    gpr_rbp,
-    gpr_rsp,
-    gpr_r8,
-    gpr_r9,
-    gpr_r10,
-    gpr_r11,
-    gpr_r12,
-    gpr_r13,
-    gpr_r14,
-    gpr_r15,
-    gpr_rip,
-    gpr_rflags,
-    gpr_cs,
-    gpr_fs,
-    gpr_gs,
-
-    fpu_fcw,
-    fpu_fsw,
-    fpu_ftw,
-    fpu_fop,
-    fpu_ip,
-    fpu_cs,
-    fpu_dp,
-    fpu_ds,
-    fpu_mxcsr,
-    fpu_mxcsrmask,
-    fpu_stmm0,
-    fpu_stmm1,
-    fpu_stmm2,
-    fpu_stmm3,
-    fpu_stmm4,
-    fpu_stmm5,
-    fpu_stmm6,
-    fpu_stmm7,
-    fpu_xmm0,
-    fpu_xmm1,
-    fpu_xmm2,
-    fpu_xmm3,
-    fpu_xmm4,
-    fpu_xmm5,
-    fpu_xmm6,
-    fpu_xmm7,
-    fpu_xmm8,
-    fpu_xmm9,
-    fpu_xmm10,
-    fpu_xmm11,
-    fpu_xmm12,
-    fpu_xmm13,
-    fpu_xmm14,
-    fpu_xmm15,
-
-    exc_trapno,
-    exc_err,
-    exc_faultvaddr,
-
-    k_num_registers,
-
-    // Aliases
-    fpu_fctrl = fpu_fcw,
-    fpu_fstat = fpu_fsw,
-    fpu_ftag  = fpu_ftw,
-    fpu_fiseg = fpu_cs,
-    fpu_fioff = fpu_ip,
-    fpu_foseg = fpu_ds,
-    fpu_fooff = fpu_dp
+enum {
+  gpr_rax = 0,
+  gpr_rbx,
+  gpr_rcx,
+  gpr_rdx,
+  gpr_rdi,
+  gpr_rsi,
+  gpr_rbp,
+  gpr_rsp,
+  gpr_r8,
+  gpr_r9,
+  gpr_r10,
+  gpr_r11,
+  gpr_r12,
+  gpr_r13,
+  gpr_r14,
+  gpr_r15,
+  gpr_rip,
+  gpr_rflags,
+  gpr_cs,
+  gpr_fs,
+  gpr_gs,
+
+  fpu_fcw,
+  fpu_fsw,
+  fpu_ftw,
+  fpu_fop,
+  fpu_ip,
+  fpu_cs,
+  fpu_dp,
+  fpu_ds,
+  fpu_mxcsr,
+  fpu_mxcsrmask,
+  fpu_stmm0,
+  fpu_stmm1,
+  fpu_stmm2,
+  fpu_stmm3,
+  fpu_stmm4,
+  fpu_stmm5,
+  fpu_stmm6,
+  fpu_stmm7,
+  fpu_xmm0,
+  fpu_xmm1,
+  fpu_xmm2,
+  fpu_xmm3,
+  fpu_xmm4,
+  fpu_xmm5,
+  fpu_xmm6,
+  fpu_xmm7,
+  fpu_xmm8,
+  fpu_xmm9,
+  fpu_xmm10,
+  fpu_xmm11,
+  fpu_xmm12,
+  fpu_xmm13,
+  fpu_xmm14,
+  fpu_xmm15,
+
+  exc_trapno,
+  exc_err,
+  exc_faultvaddr,
+
+  k_num_registers,
+
+  // Aliases
+  fpu_fctrl = fpu_fcw,
+  fpu_fstat = fpu_fsw,
+  fpu_ftag = fpu_ftw,
+  fpu_fiseg = fpu_cs,
+  fpu_fioff = fpu_ip,
+  fpu_foseg = fpu_ds,
+  fpu_fooff = fpu_dp
 };
 
-enum ehframe_dwarf_regnums
-{
-    ehframe_dwarf_gpr_rax = 0,
-    ehframe_dwarf_gpr_rdx,
-    ehframe_dwarf_gpr_rcx,
-    ehframe_dwarf_gpr_rbx,
-    ehframe_dwarf_gpr_rsi,
-    ehframe_dwarf_gpr_rdi,
-    ehframe_dwarf_gpr_rbp,
-    ehframe_dwarf_gpr_rsp,
-    ehframe_dwarf_gpr_r8,
-    ehframe_dwarf_gpr_r9,
-    ehframe_dwarf_gpr_r10,
-    ehframe_dwarf_gpr_r11,
-    ehframe_dwarf_gpr_r12,
-    ehframe_dwarf_gpr_r13,
-    ehframe_dwarf_gpr_r14,
-    ehframe_dwarf_gpr_r15,
-    ehframe_dwarf_gpr_rip,
-    ehframe_dwarf_fpu_xmm0,
-    ehframe_dwarf_fpu_xmm1,
-    ehframe_dwarf_fpu_xmm2,
-    ehframe_dwarf_fpu_xmm3,
-    ehframe_dwarf_fpu_xmm4,
-    ehframe_dwarf_fpu_xmm5,
-    ehframe_dwarf_fpu_xmm6,
-    ehframe_dwarf_fpu_xmm7,
-    ehframe_dwarf_fpu_xmm8,
-    ehframe_dwarf_fpu_xmm9,
-    ehframe_dwarf_fpu_xmm10,
-    ehframe_dwarf_fpu_xmm11,
-    ehframe_dwarf_fpu_xmm12,
-    ehframe_dwarf_fpu_xmm13,
-    ehframe_dwarf_fpu_xmm14,
-    ehframe_dwarf_fpu_xmm15,
-    ehframe_dwarf_fpu_stmm0,
-    ehframe_dwarf_fpu_stmm1,
-    ehframe_dwarf_fpu_stmm2,
-    ehframe_dwarf_fpu_stmm3,
-    ehframe_dwarf_fpu_stmm4,
-    ehframe_dwarf_fpu_stmm5,
-    ehframe_dwarf_fpu_stmm6,
-    ehframe_dwarf_fpu_stmm7
+enum ehframe_dwarf_regnums {
+  ehframe_dwarf_gpr_rax = 0,
+  ehframe_dwarf_gpr_rdx,
+  ehframe_dwarf_gpr_rcx,
+  ehframe_dwarf_gpr_rbx,
+  ehframe_dwarf_gpr_rsi,
+  ehframe_dwarf_gpr_rdi,
+  ehframe_dwarf_gpr_rbp,
+  ehframe_dwarf_gpr_rsp,
+  ehframe_dwarf_gpr_r8,
+  ehframe_dwarf_gpr_r9,
+  ehframe_dwarf_gpr_r10,
+  ehframe_dwarf_gpr_r11,
+  ehframe_dwarf_gpr_r12,
+  ehframe_dwarf_gpr_r13,
+  ehframe_dwarf_gpr_r14,
+  ehframe_dwarf_gpr_r15,
+  ehframe_dwarf_gpr_rip,
+  ehframe_dwarf_fpu_xmm0,
+  ehframe_dwarf_fpu_xmm1,
+  ehframe_dwarf_fpu_xmm2,
+  ehframe_dwarf_fpu_xmm3,
+  ehframe_dwarf_fpu_xmm4,
+  ehframe_dwarf_fpu_xmm5,
+  ehframe_dwarf_fpu_xmm6,
+  ehframe_dwarf_fpu_xmm7,
+  ehframe_dwarf_fpu_xmm8,
+  ehframe_dwarf_fpu_xmm9,
+  ehframe_dwarf_fpu_xmm10,
+  ehframe_dwarf_fpu_xmm11,
+  ehframe_dwarf_fpu_xmm12,
+  ehframe_dwarf_fpu_xmm13,
+  ehframe_dwarf_fpu_xmm14,
+  ehframe_dwarf_fpu_xmm15,
+  ehframe_dwarf_fpu_stmm0,
+  ehframe_dwarf_fpu_stmm1,
+  ehframe_dwarf_fpu_stmm2,
+  ehframe_dwarf_fpu_stmm3,
+  ehframe_dwarf_fpu_stmm4,
+  ehframe_dwarf_fpu_stmm5,
+  ehframe_dwarf_fpu_stmm6,
+  ehframe_dwarf_fpu_stmm7
 
 };
 
-#define GPR_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_x86_64::GPR, reg))
-#define FPU_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_x86_64::FPU, reg) + sizeof (RegisterContextDarwin_x86_64::GPR))
-#define EXC_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_x86_64::EXC, reg) + sizeof (RegisterContextDarwin_x86_64::GPR) + sizeof (RegisterContextDarwin_x86_64::FPU))
+#define GPR_OFFSET(reg)                                                        \
+  (LLVM_EXTENSION offsetof(RegisterContextDarwin_x86_64::GPR, reg))
+#define FPU_OFFSET(reg)                                                        \
+  (LLVM_EXTENSION offsetof(RegisterContextDarwin_x86_64::FPU, reg) +           \
+   sizeof(RegisterContextDarwin_x86_64::GPR))
+#define EXC_OFFSET(reg)                                                        \
+  (LLVM_EXTENSION offsetof(RegisterContextDarwin_x86_64::EXC, reg) +           \
+   sizeof(RegisterContextDarwin_x86_64::GPR) +                                 \
+   sizeof(RegisterContextDarwin_x86_64::FPU))
 
 // These macros will auto define the register name, alt name, register size,
 // register offset, encoding, format and native register. This ensures that
 // the register state structures are defined correctly and have the correct
 // sizes and offsets.
-#define DEFINE_GPR(reg, alt)    #reg, alt, sizeof(((RegisterContextDarwin_x86_64::GPR *)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, eFormatHex
-#define DEFINE_FPU_UINT(reg)    #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::FPU *)NULL)->reg), FPU_OFFSET(reg), eEncodingUint, eFormatHex
-#define DEFINE_FPU_VECT(reg, i) #reg#i, NULL, sizeof(((RegisterContextDarwin_x86_64::FPU *)NULL)->reg[i].bytes), FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, { ehframe_dwarf_fpu_##reg##i, ehframe_dwarf_fpu_##reg##i, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_##reg##i }, NULL, NULL
-#define DEFINE_EXC(reg)         #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::EXC *)NULL)->reg), EXC_OFFSET(reg), eEncodingUint, eFormatHex
-
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_x86_64::GPR) + sizeof (RegisterContextDarwin_x86_64::FPU) + sizeof (RegisterContextDarwin_x86_64::EXC))
+#define DEFINE_GPR(reg, alt)                                                   \
+  #reg, alt, sizeof(((RegisterContextDarwin_x86_64::GPR *) NULL)->reg),        \
+                    GPR_OFFSET(reg), eEncodingUint, eFormatHex
+#define DEFINE_FPU_UINT(reg)                                                   \
+  #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::FPU *) NULL)->reg),       \
+                     FPU_OFFSET(reg), eEncodingUint, eFormatHex
+#define DEFINE_FPU_VECT(reg, i)                                                \
+  #reg #i, NULL,                                                               \
+      sizeof(((RegisterContextDarwin_x86_64::FPU *) NULL)->reg[i].bytes),      \
+              FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8,       \
+                         {ehframe_dwarf_fpu_##reg##i,                          \
+                          ehframe_dwarf_fpu_##reg##i, LLDB_INVALID_REGNUM,     \
+                          LLDB_INVALID_REGNUM, fpu_##reg##i },                 \
+                          nullptr, nullptr, nullptr, 0
+#define DEFINE_EXC(reg)                                                        \
+  #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::EXC *) NULL)->reg),       \
+                     EXC_OFFSET(reg), eEncodingUint, eFormatHex
+
+#define REG_CONTEXT_SIZE                                                       \
+  (sizeof(RegisterContextDarwin_x86_64::GPR) +                                 \
+   sizeof(RegisterContextDarwin_x86_64::FPU) +                                 \
+   sizeof(RegisterContextDarwin_x86_64::EXC))
 
 // General purpose registers for 64 bit
-static RegisterInfo g_register_infos[] =
-{
-//  Macro auto defines most stuff   EH_FRAME                    DWARF                    GENERIC                    PROCESS PLUGIN       LLDB                VALUE REGS    INVALIDATE REGS
-//  =============================== ======================      ===================      ========================== ==================== =================== ==========    ===============
-    { DEFINE_GPR (rax   , NULL)     , { ehframe_dwarf_gpr_rax  , ehframe_dwarf_gpr_rax  , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_rax       },       NULL,              NULL},
-    { DEFINE_GPR (rbx   , NULL)     , { ehframe_dwarf_gpr_rbx  , ehframe_dwarf_gpr_rbx  , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_rbx       },       NULL,              NULL},
-    { DEFINE_GPR (rcx   , NULL)     , { ehframe_dwarf_gpr_rcx  , ehframe_dwarf_gpr_rcx  , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_rcx       },       NULL,              NULL},
-    { DEFINE_GPR (rdx   , NULL)     , { ehframe_dwarf_gpr_rdx  , ehframe_dwarf_gpr_rdx  , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_rdx       },       NULL,              NULL},
-    { DEFINE_GPR (rdi   , NULL)     , { ehframe_dwarf_gpr_rdi  , ehframe_dwarf_gpr_rdi  , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_rdi       },       NULL,              NULL},
-    { DEFINE_GPR (rsi   , NULL)     , { ehframe_dwarf_gpr_rsi  , ehframe_dwarf_gpr_rsi  , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_rsi       },       NULL,              NULL},
-    { DEFINE_GPR (rbp   , "fp")     , { ehframe_dwarf_gpr_rbp  , ehframe_dwarf_gpr_rbp  , LLDB_REGNUM_GENERIC_FP   , LLDB_INVALID_REGNUM, gpr_rbp       },       NULL,              NULL},
-    { DEFINE_GPR (rsp   , "sp")     , { ehframe_dwarf_gpr_rsp  , ehframe_dwarf_gpr_rsp  , LLDB_REGNUM_GENERIC_SP   , LLDB_INVALID_REGNUM, gpr_rsp       },       NULL,              NULL},
-    { DEFINE_GPR (r8    , NULL)     , { ehframe_dwarf_gpr_r8   , ehframe_dwarf_gpr_r8   , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_r8        },       NULL,              NULL},
-    { DEFINE_GPR (r9    , NULL)     , { ehframe_dwarf_gpr_r9   , ehframe_dwarf_gpr_r9   , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_r9        },       NULL,              NULL},
-    { DEFINE_GPR (r10   , NULL)     , { ehframe_dwarf_gpr_r10  , ehframe_dwarf_gpr_r10  , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_r10       },       NULL,              NULL},
-    { DEFINE_GPR (r11   , NULL)     , { ehframe_dwarf_gpr_r11  , ehframe_dwarf_gpr_r11  , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_r11       },       NULL,              NULL},
-    { DEFINE_GPR (r12   , NULL)     , { ehframe_dwarf_gpr_r12  , ehframe_dwarf_gpr_r12  , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_r12       },       NULL,              NULL},
-    { DEFINE_GPR (r13   , NULL)     , { ehframe_dwarf_gpr_r13  , ehframe_dwarf_gpr_r13  , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_r13       },       NULL,              NULL},
-    { DEFINE_GPR (r14   , NULL)     , { ehframe_dwarf_gpr_r14  , ehframe_dwarf_gpr_r14  , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_r14       },       NULL,              NULL},
-    { DEFINE_GPR (r15   , NULL)     , { ehframe_dwarf_gpr_r15  , ehframe_dwarf_gpr_r15  , LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_r15       },       NULL,              NULL},
-    { DEFINE_GPR (rip   , "pc")     , { ehframe_dwarf_gpr_rip  , ehframe_dwarf_gpr_rip  , LLDB_REGNUM_GENERIC_PC   , LLDB_INVALID_REGNUM, gpr_rip       },       NULL,              NULL},
-    { DEFINE_GPR (rflags, "flags")  , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM, gpr_rflags    },       NULL,              NULL},
-    { DEFINE_GPR (cs    , NULL)     , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_cs        },       NULL,              NULL},
-    { DEFINE_GPR (fs    , NULL)     , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_fs        },       NULL,              NULL},
-    { DEFINE_GPR (gs    , NULL)     , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, gpr_gs        },       NULL,              NULL},
-
-    { DEFINE_FPU_UINT(fcw)          , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_fcw       },       NULL,              NULL},
-    { DEFINE_FPU_UINT(fsw)          , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_fsw       },       NULL,              NULL},
-    { DEFINE_FPU_UINT(ftw)          , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_ftw       },       NULL,              NULL},
-    { DEFINE_FPU_UINT(fop)          , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_fop       },       NULL,              NULL},
-    { DEFINE_FPU_UINT(ip)           , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_ip        },       NULL,              NULL},
-    { DEFINE_FPU_UINT(cs)           , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_cs        },       NULL,              NULL},
-    { DEFINE_FPU_UINT(dp)           , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_dp        },       NULL,              NULL},
-    { DEFINE_FPU_UINT(ds)           , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_ds        },       NULL,              NULL},
-    { DEFINE_FPU_UINT(mxcsr)        , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_mxcsr     },       NULL,              NULL},
-    { DEFINE_FPU_UINT(mxcsrmask)    , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, fpu_mxcsrmask },       NULL,              NULL},
-    { DEFINE_FPU_VECT(stmm,0)   },
-    { DEFINE_FPU_VECT(stmm,1)   },
-    { DEFINE_FPU_VECT(stmm,2)   },
-    { DEFINE_FPU_VECT(stmm,3)   },
-    { DEFINE_FPU_VECT(stmm,4)   },
-    { DEFINE_FPU_VECT(stmm,5)   },
-    { DEFINE_FPU_VECT(stmm,6)   },
-    { DEFINE_FPU_VECT(stmm,7)   },
-    { DEFINE_FPU_VECT(xmm,0)    },
-    { DEFINE_FPU_VECT(xmm,1)    },
-    { DEFINE_FPU_VECT(xmm,2)    },
-    { DEFINE_FPU_VECT(xmm,3)    },
-    { DEFINE_FPU_VECT(xmm,4)    },
-    { DEFINE_FPU_VECT(xmm,5)    },
-    { DEFINE_FPU_VECT(xmm,6)    },
-    { DEFINE_FPU_VECT(xmm,7)    },
-    { DEFINE_FPU_VECT(xmm,8)    },
-    { DEFINE_FPU_VECT(xmm,9)    },
-    { DEFINE_FPU_VECT(xmm,10)   },
-    { DEFINE_FPU_VECT(xmm,11)   },
-    { DEFINE_FPU_VECT(xmm,12)   },
-    { DEFINE_FPU_VECT(xmm,13)   },
-    { DEFINE_FPU_VECT(xmm,14)   },
-    { DEFINE_FPU_VECT(xmm,15)   },
-
-    { DEFINE_EXC(trapno)            , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, exc_trapno     },      NULL,              NULL},
-    { DEFINE_EXC(err)               , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, exc_err        },      NULL,              NULL},
-    { DEFINE_EXC(faultvaddr)        , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM      , LLDB_INVALID_REGNUM, exc_faultvaddr },      NULL,              NULL}
-};
+static RegisterInfo g_register_infos[] = {
+    //  Macro auto defines most stuff   EH_FRAME                    DWARF
+    //  GENERIC                    PROCESS PLUGIN       LLDB
+    //  =============================== ======================
+    //  ===================      ========================== ====================
+    //  ===================
+    {DEFINE_GPR(rax, NULL),
+     {ehframe_dwarf_gpr_rax, ehframe_dwarf_gpr_rax, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_rax},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(rbx, NULL),
+     {ehframe_dwarf_gpr_rbx, ehframe_dwarf_gpr_rbx, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_rbx},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(rcx, NULL),
+     {ehframe_dwarf_gpr_rcx, ehframe_dwarf_gpr_rcx, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_rcx},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(rdx, NULL),
+     {ehframe_dwarf_gpr_rdx, ehframe_dwarf_gpr_rdx, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_rdx},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(rdi, NULL),
+     {ehframe_dwarf_gpr_rdi, ehframe_dwarf_gpr_rdi, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_rdi},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(rsi, NULL),
+     {ehframe_dwarf_gpr_rsi, ehframe_dwarf_gpr_rsi, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_rsi},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(rbp, "fp"),
+     {ehframe_dwarf_gpr_rbp, ehframe_dwarf_gpr_rbp, LLDB_REGNUM_GENERIC_FP,
+      LLDB_INVALID_REGNUM, gpr_rbp},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(rsp, "sp"),
+     {ehframe_dwarf_gpr_rsp, ehframe_dwarf_gpr_rsp, LLDB_REGNUM_GENERIC_SP,
+      LLDB_INVALID_REGNUM, gpr_rsp},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(r8, NULL),
+     {ehframe_dwarf_gpr_r8, ehframe_dwarf_gpr_r8, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_r8},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(r9, NULL),
+     {ehframe_dwarf_gpr_r9, ehframe_dwarf_gpr_r9, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_r9},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(r10, NULL),
+     {ehframe_dwarf_gpr_r10, ehframe_dwarf_gpr_r10, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_r10},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(r11, NULL),
+     {ehframe_dwarf_gpr_r11, ehframe_dwarf_gpr_r11, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_r11},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(r12, NULL),
+     {ehframe_dwarf_gpr_r12, ehframe_dwarf_gpr_r12, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_r12},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(r13, NULL),
+     {ehframe_dwarf_gpr_r13, ehframe_dwarf_gpr_r13, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_r13},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(r14, NULL),
+     {ehframe_dwarf_gpr_r14, ehframe_dwarf_gpr_r14, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_r14},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(r15, NULL),
+     {ehframe_dwarf_gpr_r15, ehframe_dwarf_gpr_r15, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_r15},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(rip, "pc"),
+     {ehframe_dwarf_gpr_rip, ehframe_dwarf_gpr_rip, LLDB_REGNUM_GENERIC_PC,
+      LLDB_INVALID_REGNUM, gpr_rip},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(rflags, "flags"),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_FLAGS,
+      LLDB_INVALID_REGNUM, gpr_rflags},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(cs, NULL),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_cs},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(fs, NULL),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_fs},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_GPR(gs, NULL),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, gpr_gs},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+
+    {DEFINE_FPU_UINT(fcw),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_fcw},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(fsw),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_fsw},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(ftw),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_ftw},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(fop),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_fop},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(ip),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_ip},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(cs),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_cs},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(dp),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_dp},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(ds),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_ds},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(mxcsr),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_mxcsr},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_UINT(mxcsrmask),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_mxcsrmask},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_FPU_VECT(stmm, 0)},
+    {DEFINE_FPU_VECT(stmm, 1)},
+    {DEFINE_FPU_VECT(stmm, 2)},
+    {DEFINE_FPU_VECT(stmm, 3)},
+    {DEFINE_FPU_VECT(stmm, 4)},
+    {DEFINE_FPU_VECT(stmm, 5)},
+    {DEFINE_FPU_VECT(stmm, 6)},
+    {DEFINE_FPU_VECT(stmm, 7)},
+    {DEFINE_FPU_VECT(xmm, 0)},
+    {DEFINE_FPU_VECT(xmm, 1)},
+    {DEFINE_FPU_VECT(xmm, 2)},
+    {DEFINE_FPU_VECT(xmm, 3)},
+    {DEFINE_FPU_VECT(xmm, 4)},
+    {DEFINE_FPU_VECT(xmm, 5)},
+    {DEFINE_FPU_VECT(xmm, 6)},
+    {DEFINE_FPU_VECT(xmm, 7)},
+    {DEFINE_FPU_VECT(xmm, 8)},
+    {DEFINE_FPU_VECT(xmm, 9)},
+    {DEFINE_FPU_VECT(xmm, 10)},
+    {DEFINE_FPU_VECT(xmm, 11)},
+    {DEFINE_FPU_VECT(xmm, 12)},
+    {DEFINE_FPU_VECT(xmm, 13)},
+    {DEFINE_FPU_VECT(xmm, 14)},
+    {DEFINE_FPU_VECT(xmm, 15)},
+
+    {DEFINE_EXC(trapno),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, exc_trapno},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_EXC(err),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, exc_err},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {DEFINE_EXC(faultvaddr),
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, exc_faultvaddr},
+     nullptr,
+     nullptr,
+     nullptr,
+     0}};
 
 static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
 
-RegisterContextDarwin_x86_64::RegisterContextDarwin_x86_64 (Thread &thread, uint32_t concrete_frame_idx) :
-    RegisterContext (thread, concrete_frame_idx),
-    gpr(),
-    fpu(),
-    exc()
-{
-    uint32_t i;
-    for (i=0; i<kNumErrors; i++)
-    {
-        gpr_errs[i] = -1;
-        fpu_errs[i] = -1;
-        exc_errs[i] = -1;
-    }
-}
-
-RegisterContextDarwin_x86_64::~RegisterContextDarwin_x86_64()
-{
+RegisterContextDarwin_x86_64::RegisterContextDarwin_x86_64(
+    Thread &thread, uint32_t concrete_frame_idx)
+    : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() {
+  uint32_t i;
+  for (i = 0; i < kNumErrors; i++) {
+    gpr_errs[i] = -1;
+    fpu_errs[i] = -1;
+    exc_errs[i] = -1;
+  }
 }
 
+RegisterContextDarwin_x86_64::~RegisterContextDarwin_x86_64() {}
 
-void
-RegisterContextDarwin_x86_64::InvalidateAllRegisters ()
-{
-    InvalidateAllRegisterStates();
+void RegisterContextDarwin_x86_64::InvalidateAllRegisters() {
+  InvalidateAllRegisterStates();
 }
 
-
-size_t
-RegisterContextDarwin_x86_64::GetRegisterCount ()
-{
-    assert(k_num_register_infos == k_num_registers);
-    return k_num_registers;
+size_t RegisterContextDarwin_x86_64::GetRegisterCount() {
+  assert(k_num_register_infos == k_num_registers);
+  return k_num_registers;
 }
 
-
 const RegisterInfo *
-RegisterContextDarwin_x86_64::GetRegisterInfoAtIndex (size_t reg)
-{
-    assert(k_num_register_infos == k_num_registers);
-    if (reg < k_num_registers)
-        return &g_register_infos[reg];
-    return NULL;
+RegisterContextDarwin_x86_64::GetRegisterInfoAtIndex(size_t reg) {
+  assert(k_num_register_infos == k_num_registers);
+  if (reg < k_num_registers)
+    return &g_register_infos[reg];
+  return NULL;
 }
 
-
-size_t
-RegisterContextDarwin_x86_64::GetRegisterInfosCount ()
-{
-    return k_num_register_infos;
+size_t RegisterContextDarwin_x86_64::GetRegisterInfosCount() {
+  return k_num_register_infos;
 }
 
 const lldb_private::RegisterInfo *
-RegisterContextDarwin_x86_64::GetRegisterInfos ()
-{
-    return g_register_infos;
+RegisterContextDarwin_x86_64::GetRegisterInfos() {
+  return g_register_infos;
 }
 
+static uint32_t g_gpr_regnums[] = {
+    gpr_rax, gpr_rbx, gpr_rcx, gpr_rdx,    gpr_rdi, gpr_rsi, gpr_rbp,
+    gpr_rsp, gpr_r8,  gpr_r9,  gpr_r10,    gpr_r11, gpr_r12, gpr_r13,
+    gpr_r14, gpr_r15, gpr_rip, gpr_rflags, gpr_cs,  gpr_fs,  gpr_gs};
 
+static uint32_t g_fpu_regnums[] = {
+    fpu_fcw,   fpu_fsw,   fpu_ftw,   fpu_fop,       fpu_ip,    fpu_cs,
+    fpu_dp,    fpu_ds,    fpu_mxcsr, fpu_mxcsrmask, fpu_stmm0, fpu_stmm1,
+    fpu_stmm2, fpu_stmm3, fpu_stmm4, fpu_stmm5,     fpu_stmm6, fpu_stmm7,
+    fpu_xmm0,  fpu_xmm1,  fpu_xmm2,  fpu_xmm3,      fpu_xmm4,  fpu_xmm5,
+    fpu_xmm6,  fpu_xmm7,  fpu_xmm8,  fpu_xmm9,      fpu_xmm10, fpu_xmm11,
+    fpu_xmm12, fpu_xmm13, fpu_xmm14, fpu_xmm15};
 
-static uint32_t g_gpr_regnums[] =
-{
-    gpr_rax,
-    gpr_rbx,
-    gpr_rcx,
-    gpr_rdx,
-    gpr_rdi,
-    gpr_rsi,
-    gpr_rbp,
-    gpr_rsp,
-    gpr_r8,
-    gpr_r9,
-    gpr_r10,
-    gpr_r11,
-    gpr_r12,
-    gpr_r13,
-    gpr_r14,
-    gpr_r15,
-    gpr_rip,
-    gpr_rflags,
-    gpr_cs,
-    gpr_fs,
-    gpr_gs
-};
-
-static uint32_t g_fpu_regnums[] =
-{
-    fpu_fcw,
-    fpu_fsw,
-    fpu_ftw,
-    fpu_fop,
-    fpu_ip,
-    fpu_cs,
-    fpu_dp,
-    fpu_ds,
-    fpu_mxcsr,
-    fpu_mxcsrmask,
-    fpu_stmm0,
-    fpu_stmm1,
-    fpu_stmm2,
-    fpu_stmm3,
-    fpu_stmm4,
-    fpu_stmm5,
-    fpu_stmm6,
-    fpu_stmm7,
-    fpu_xmm0,
-    fpu_xmm1,
-    fpu_xmm2,
-    fpu_xmm3,
-    fpu_xmm4,
-    fpu_xmm5,
-    fpu_xmm6,
-    fpu_xmm7,
-    fpu_xmm8,
-    fpu_xmm9,
-    fpu_xmm10,
-    fpu_xmm11,
-    fpu_xmm12,
-    fpu_xmm13,
-    fpu_xmm14,
-    fpu_xmm15
-};
-
-static uint32_t
-g_exc_regnums[] =
-{
-    exc_trapno,
-    exc_err,
-    exc_faultvaddr
-};
+static uint32_t g_exc_regnums[] = {exc_trapno, exc_err, exc_faultvaddr};
 
 // Number of registers in each register set
 const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
@@ -381,562 +529,556 @@ const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
 // of zero is for all registers, followed by other registers sets. The
 // register information for the all register set need not be filled in.
 //----------------------------------------------------------------------
-static const RegisterSet g_reg_sets[] =
-{
-    { "General Purpose Registers",  "gpr",  k_num_gpr_registers,    g_gpr_regnums,      },
-    { "Floating Point Registers",   "fpu",  k_num_fpu_registers,    g_fpu_regnums       },
-    { "Exception State Registers",  "exc",  k_num_exc_registers,    g_exc_regnums       }
-};
+static const RegisterSet g_reg_sets[] = {
+    {
+        "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums,
+    },
+    {"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
+    {"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
 
 const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
 
-
-size_t
-RegisterContextDarwin_x86_64::GetRegisterSetCount ()
-{
-    return k_num_regsets;
+size_t RegisterContextDarwin_x86_64::GetRegisterSetCount() {
+  return k_num_regsets;
 }
 
 const RegisterSet *
-RegisterContextDarwin_x86_64::GetRegisterSet (size_t reg_set)
-{
-    if (reg_set < k_num_regsets)
-        return &g_reg_sets[reg_set];
-    return NULL;
-}
-
-int
-RegisterContextDarwin_x86_64::GetSetForNativeRegNum (int reg_num)
-{
-    if (reg_num < fpu_fcw)
-        return GPRRegSet;
-    else if (reg_num < exc_trapno)
-        return FPURegSet;
-    else if (reg_num < k_num_registers)
-        return EXCRegSet;
-    return -1;
+RegisterContextDarwin_x86_64::GetRegisterSet(size_t reg_set) {
+  if (reg_set < k_num_regsets)
+    return &g_reg_sets[reg_set];
+  return NULL;
 }
 
-void
-RegisterContextDarwin_x86_64::LogGPR(Log *log, const char *format, ...)
-{
-    if (log)
-    {
-        if (format)
-        {
-            va_list args;
-            va_start (args, format);
-            log->VAPrintf (format, args);
-            va_end (args);
-        }
-        for (uint32_t i=0; i<k_num_gpr_registers; i++)
-        {
-            uint32_t reg = gpr_rax + i;
-            log->Printf("%12s = 0x%16.16" PRIx64, g_register_infos[reg].name, (&gpr.rax)[reg]);
-        }
-    }
+int RegisterContextDarwin_x86_64::GetSetForNativeRegNum(int reg_num) {
+  if (reg_num < fpu_fcw)
+    return GPRRegSet;
+  else if (reg_num < exc_trapno)
+    return FPURegSet;
+  else if (reg_num < k_num_registers)
+    return EXCRegSet;
+  return -1;
 }
 
-int
-RegisterContextDarwin_x86_64::ReadGPR (bool force)
-{
-    int set = GPRRegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+void RegisterContextDarwin_x86_64::LogGPR(Log *log, const char *format, ...) {
+  if (log) {
+    if (format) {
+      va_list args;
+      va_start(args, format);
+      log->VAPrintf(format, args);
+      va_end(args);
     }
-    return GetError(GPRRegSet, Read);
-}
-
-int
-RegisterContextDarwin_x86_64::ReadFPU (bool force)
-{
-    int set = FPURegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+    for (uint32_t i = 0; i < k_num_gpr_registers; i++) {
+      uint32_t reg = gpr_rax + i;
+      log->Printf("%12s = 0x%16.16" PRIx64, g_register_infos[reg].name,
+                  (&gpr.rax)[reg]);
     }
-    return GetError(FPURegSet, Read);
+  }
 }
 
-int
-RegisterContextDarwin_x86_64::ReadEXC (bool force)
-{
-    int set = EXCRegSet;
-    if (force || !RegisterSetIsCached(set))
-    {
-        SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
-    }
-    return GetError(EXCRegSet, Read);
+int RegisterContextDarwin_x86_64::ReadGPR(bool force) {
+  int set = GPRRegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
+  }
+  return GetError(GPRRegSet, Read);
 }
 
-int
-RegisterContextDarwin_x86_64::WriteGPR ()
-{
-    int set = GPRRegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return -1;
-    }
-    SetError (set, Write, DoWriteGPR(GetThreadID(), set, gpr));
-    SetError (set, Read, -1);
-    return GetError (set, Write);
+int RegisterContextDarwin_x86_64::ReadFPU(bool force) {
+  int set = FPURegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
+  }
+  return GetError(FPURegSet, Read);
 }
 
-int
-RegisterContextDarwin_x86_64::WriteFPU ()
-{
-    int set = FPURegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return -1;
-    }
-    SetError (set, Write, DoWriteFPU(GetThreadID(), set, fpu));
-    SetError (set, Read, -1);
-    return GetError (set, Write);
+int RegisterContextDarwin_x86_64::ReadEXC(bool force) {
+  int set = EXCRegSet;
+  if (force || !RegisterSetIsCached(set)) {
+    SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
+  }
+  return GetError(EXCRegSet, Read);
 }
 
-int
-RegisterContextDarwin_x86_64::WriteEXC ()
-{
-    int set = EXCRegSet;
-    if (!RegisterSetIsCached(set))
-    {
-        SetError (set, Write, -1);
-        return -1;
-    }
-    SetError (set, Write, DoWriteEXC(GetThreadID(), set, exc));
-    SetError (set, Read, -1);
-    return GetError (set, Write);
+int RegisterContextDarwin_x86_64::WriteGPR() {
+  int set = GPRRegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
+    return -1;
+  }
+  SetError(set, Write, DoWriteGPR(GetThreadID(), set, gpr));
+  SetError(set, Read, -1);
+  return GetError(set, Write);
 }
 
-int
-RegisterContextDarwin_x86_64::ReadRegisterSet(uint32_t set, bool force)
-{
-    switch (set)
-    {
-    case GPRRegSet:    return ReadGPR (force);
-    case FPURegSet:    return ReadFPU (force);
-    case EXCRegSet:    return ReadEXC (force);
-    default: break;
-    }
+int RegisterContextDarwin_x86_64::WriteFPU() {
+  int set = FPURegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
     return -1;
+  }
+  SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu));
+  SetError(set, Read, -1);
+  return GetError(set, Write);
 }
 
-int
-RegisterContextDarwin_x86_64::WriteRegisterSet(uint32_t set)
-{
-    // Make sure we have a valid context to set.
-    switch (set)
-    {
-    case GPRRegSet:    return WriteGPR ();
-    case FPURegSet:    return WriteFPU ();
-    case EXCRegSet:    return WriteEXC ();
-    default: break;
-    }
+int RegisterContextDarwin_x86_64::WriteEXC() {
+  int set = EXCRegSet;
+  if (!RegisterSetIsCached(set)) {
+    SetError(set, Write, -1);
     return -1;
+  }
+  SetError(set, Write, DoWriteEXC(GetThreadID(), set, exc));
+  SetError(set, Read, -1);
+  return GetError(set, Write);
 }
 
+int RegisterContextDarwin_x86_64::ReadRegisterSet(uint32_t set, bool force) {
+  switch (set) {
+  case GPRRegSet:
+    return ReadGPR(force);
+  case FPURegSet:
+    return ReadFPU(force);
+  case EXCRegSet:
+    return ReadEXC(force);
+  default:
+    break;
+  }
+  return -1;
+}
 
-bool
-RegisterContextDarwin_x86_64::ReadRegister (const RegisterInfo *reg_info,
-                                          RegisterValue &value)
-{
-    const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
-    int set = RegisterContextDarwin_x86_64::GetSetForNativeRegNum (reg);
-    if (set == -1)
-        return false;
+int RegisterContextDarwin_x86_64::WriteRegisterSet(uint32_t set) {
+  // Make sure we have a valid context to set.
+  switch (set) {
+  case GPRRegSet:
+    return WriteGPR();
+  case FPURegSet:
+    return WriteFPU();
+  case EXCRegSet:
+    return WriteEXC();
+  default:
+    break;
+  }
+  return -1;
+}
 
-    if (ReadRegisterSet(set, false) != 0)
-        return false;
+bool RegisterContextDarwin_x86_64::ReadRegister(const RegisterInfo *reg_info,
+                                                RegisterValue &value) {
+  const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+  int set = RegisterContextDarwin_x86_64::GetSetForNativeRegNum(reg);
+  if (set == -1)
+    return false;
 
-    switch (reg)
-    {
-    case gpr_rax:
-    case gpr_rbx:
-    case gpr_rcx:
-    case gpr_rdx:
-    case gpr_rdi:
-    case gpr_rsi:
-    case gpr_rbp:
-    case gpr_rsp:
-    case gpr_r8:
-    case gpr_r9:
-    case gpr_r10:
-    case gpr_r11:
-    case gpr_r12:
-    case gpr_r13:
-    case gpr_r14:
-    case gpr_r15:
-    case gpr_rip:
-    case gpr_rflags:
-    case gpr_cs:
-    case gpr_fs:
-    case gpr_gs:
-        value = (&gpr.rax)[reg - gpr_rax];
-        break;
-
-    case fpu_fcw:
-        value = fpu.fcw;
-        break;
-
-    case fpu_fsw:
-        value = fpu.fsw;
-        break;
-
-    case fpu_ftw:
-        value = fpu.ftw;
-        break;
-
-    case fpu_fop:
-        value = fpu.fop;
-        break;
-
-    case fpu_ip:
-        value = fpu.ip;
-        break;
-
-    case fpu_cs:
-        value = fpu.cs;
-        break;
-
-    case fpu_dp:
-        value = fpu.dp;
-        break;
-
-    case fpu_ds:
-        value = fpu.ds;
-        break;
-
-    case fpu_mxcsr:
-        value = fpu.mxcsr;
-        break;
-
-    case fpu_mxcsrmask:
-        value = fpu.mxcsrmask;
-        break;
-
-    case fpu_stmm0:
-    case fpu_stmm1:
-    case fpu_stmm2:
-    case fpu_stmm3:
-    case fpu_stmm4:
-    case fpu_stmm5:
-    case fpu_stmm6:
-    case fpu_stmm7:
-        value.SetBytes(fpu.stmm[reg - fpu_stmm0].bytes, reg_info->byte_size, endian::InlHostByteOrder());
-        break;
-
-    case fpu_xmm0:
-    case fpu_xmm1:
-    case fpu_xmm2:
-    case fpu_xmm3:
-    case fpu_xmm4:
-    case fpu_xmm5:
-    case fpu_xmm6:
-    case fpu_xmm7:
-    case fpu_xmm8:
-    case fpu_xmm9:
-    case fpu_xmm10:
-    case fpu_xmm11:
-    case fpu_xmm12:
-    case fpu_xmm13:
-    case fpu_xmm14:
-    case fpu_xmm15:
-        value.SetBytes(fpu.xmm[reg - fpu_xmm0].bytes, reg_info->byte_size, endian::InlHostByteOrder());
-        break;
-
-    case exc_trapno:
-        value = exc.trapno;
-        break;
-
-    case exc_err:
-        value = exc.err;
-        break;
-
-    case exc_faultvaddr:
-        value = exc.faultvaddr;
-        break;
+  if (ReadRegisterSet(set, false) != 0)
+    return false;
 
-    default:
-        return false;
-    }
-    return true;
+  switch (reg) {
+  case gpr_rax:
+  case gpr_rbx:
+  case gpr_rcx:
+  case gpr_rdx:
+  case gpr_rdi:
+  case gpr_rsi:
+  case gpr_rbp:
+  case gpr_rsp:
+  case gpr_r8:
+  case gpr_r9:
+  case gpr_r10:
+  case gpr_r11:
+  case gpr_r12:
+  case gpr_r13:
+  case gpr_r14:
+  case gpr_r15:
+  case gpr_rip:
+  case gpr_rflags:
+  case gpr_cs:
+  case gpr_fs:
+  case gpr_gs:
+    value = (&gpr.rax)[reg - gpr_rax];
+    break;
+
+  case fpu_fcw:
+    value = fpu.fcw;
+    break;
+
+  case fpu_fsw:
+    value = fpu.fsw;
+    break;
+
+  case fpu_ftw:
+    value = fpu.ftw;
+    break;
+
+  case fpu_fop:
+    value = fpu.fop;
+    break;
+
+  case fpu_ip:
+    value = fpu.ip;
+    break;
+
+  case fpu_cs:
+    value = fpu.cs;
+    break;
+
+  case fpu_dp:
+    value = fpu.dp;
+    break;
+
+  case fpu_ds:
+    value = fpu.ds;
+    break;
+
+  case fpu_mxcsr:
+    value = fpu.mxcsr;
+    break;
+
+  case fpu_mxcsrmask:
+    value = fpu.mxcsrmask;
+    break;
+
+  case fpu_stmm0:
+  case fpu_stmm1:
+  case fpu_stmm2:
+  case fpu_stmm3:
+  case fpu_stmm4:
+  case fpu_stmm5:
+  case fpu_stmm6:
+  case fpu_stmm7:
+    value.SetBytes(fpu.stmm[reg - fpu_stmm0].bytes, reg_info->byte_size,
+                   endian::InlHostByteOrder());
+    break;
+
+  case fpu_xmm0:
+  case fpu_xmm1:
+  case fpu_xmm2:
+  case fpu_xmm3:
+  case fpu_xmm4:
+  case fpu_xmm5:
+  case fpu_xmm6:
+  case fpu_xmm7:
+  case fpu_xmm8:
+  case fpu_xmm9:
+  case fpu_xmm10:
+  case fpu_xmm11:
+  case fpu_xmm12:
+  case fpu_xmm13:
+  case fpu_xmm14:
+  case fpu_xmm15:
+    value.SetBytes(fpu.xmm[reg - fpu_xmm0].bytes, reg_info->byte_size,
+                   endian::InlHostByteOrder());
+    break;
+
+  case exc_trapno:
+    value = exc.trapno;
+    break;
+
+  case exc_err:
+    value = exc.err;
+    break;
+
+  case exc_faultvaddr:
+    value = exc.faultvaddr;
+    break;
+
+  default:
+    return false;
+  }
+  return true;
 }
 
+bool RegisterContextDarwin_x86_64::WriteRegister(const RegisterInfo *reg_info,
+                                                 const RegisterValue &value) {
+  const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+  int set = RegisterContextDarwin_x86_64::GetSetForNativeRegNum(reg);
 
-bool
-RegisterContextDarwin_x86_64::WriteRegister (const RegisterInfo *reg_info,
-                                           const RegisterValue &value)
-{
-    const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
-    int set = RegisterContextDarwin_x86_64::GetSetForNativeRegNum (reg);
-
-    if (set == -1)
-        return false;
+  if (set == -1)
+    return false;
 
-    if (ReadRegisterSet(set, false) != 0)
-        return false;
+  if (ReadRegisterSet(set, false) != 0)
+    return false;
 
-    switch (reg)
-    {
-    case gpr_rax:
-    case gpr_rbx:
-    case gpr_rcx:
-    case gpr_rdx:
-    case gpr_rdi:
-    case gpr_rsi:
-    case gpr_rbp:
-    case gpr_rsp:
-    case gpr_r8:
-    case gpr_r9:
-    case gpr_r10:
-    case gpr_r11:
-    case gpr_r12:
-    case gpr_r13:
-    case gpr_r14:
-    case gpr_r15:
-    case gpr_rip:
-    case gpr_rflags:
-    case gpr_cs:
-    case gpr_fs:
-    case gpr_gs:
-        (&gpr.rax)[reg - gpr_rax] = value.GetAsUInt64();
-        break;
-
-    case fpu_fcw:
-        fpu.fcw = value.GetAsUInt16();
-        break;
-
-    case fpu_fsw:
-        fpu.fsw = value.GetAsUInt16();
-        break;
-
-    case fpu_ftw:
-        fpu.ftw = value.GetAsUInt8();
-        break;
-
-    case fpu_fop:
-        fpu.fop = value.GetAsUInt16();
-        break;
-
-    case fpu_ip:
-        fpu.ip = value.GetAsUInt32();
-        break;
-
-    case fpu_cs:
-        fpu.cs = value.GetAsUInt16();
-        break;
-
-    case fpu_dp:
-        fpu.dp = value.GetAsUInt32();
-        break;
-
-    case fpu_ds:
-        fpu.ds = value.GetAsUInt16();
-        break;
-
-    case fpu_mxcsr:
-        fpu.mxcsr = value.GetAsUInt32();
-        break;
-
-    case fpu_mxcsrmask:
-        fpu.mxcsrmask = value.GetAsUInt32();
-        break;
-
-    case fpu_stmm0:
-    case fpu_stmm1:
-    case fpu_stmm2:
-    case fpu_stmm3:
-    case fpu_stmm4:
-    case fpu_stmm5:
-    case fpu_stmm6:
-    case fpu_stmm7:
-        ::memcpy (fpu.stmm[reg - fpu_stmm0].bytes, value.GetBytes(), value.GetByteSize());
-        break;
-
-    case fpu_xmm0:
-    case fpu_xmm1:
-    case fpu_xmm2:
-    case fpu_xmm3:
-    case fpu_xmm4:
-    case fpu_xmm5:
-    case fpu_xmm6:
-    case fpu_xmm7:
-    case fpu_xmm8:
-    case fpu_xmm9:
-    case fpu_xmm10:
-    case fpu_xmm11:
-    case fpu_xmm12:
-    case fpu_xmm13:
-    case fpu_xmm14:
-    case fpu_xmm15:
-        ::memcpy (fpu.xmm[reg - fpu_xmm0].bytes, value.GetBytes(), value.GetByteSize());
-        return false;
-
-    case exc_trapno:
-        exc.trapno = value.GetAsUInt32();
-        break;
-
-    case exc_err:
-        exc.err = value.GetAsUInt32();
-        break;
-
-    case exc_faultvaddr:
-        exc.faultvaddr = value.GetAsUInt64();
-        break;
+  switch (reg) {
+  case gpr_rax:
+  case gpr_rbx:
+  case gpr_rcx:
+  case gpr_rdx:
+  case gpr_rdi:
+  case gpr_rsi:
+  case gpr_rbp:
+  case gpr_rsp:
+  case gpr_r8:
+  case gpr_r9:
+  case gpr_r10:
+  case gpr_r11:
+  case gpr_r12:
+  case gpr_r13:
+  case gpr_r14:
+  case gpr_r15:
+  case gpr_rip:
+  case gpr_rflags:
+  case gpr_cs:
+  case gpr_fs:
+  case gpr_gs:
+    (&gpr.rax)[reg - gpr_rax] = value.GetAsUInt64();
+    break;
+
+  case fpu_fcw:
+    fpu.fcw = value.GetAsUInt16();
+    break;
+
+  case fpu_fsw:
+    fpu.fsw = value.GetAsUInt16();
+    break;
+
+  case fpu_ftw:
+    fpu.ftw = value.GetAsUInt8();
+    break;
+
+  case fpu_fop:
+    fpu.fop = value.GetAsUInt16();
+    break;
+
+  case fpu_ip:
+    fpu.ip = value.GetAsUInt32();
+    break;
+
+  case fpu_cs:
+    fpu.cs = value.GetAsUInt16();
+    break;
+
+  case fpu_dp:
+    fpu.dp = value.GetAsUInt32();
+    break;
+
+  case fpu_ds:
+    fpu.ds = value.GetAsUInt16();
+    break;
+
+  case fpu_mxcsr:
+    fpu.mxcsr = value.GetAsUInt32();
+    break;
+
+  case fpu_mxcsrmask:
+    fpu.mxcsrmask = value.GetAsUInt32();
+    break;
+
+  case fpu_stmm0:
+  case fpu_stmm1:
+  case fpu_stmm2:
+  case fpu_stmm3:
+  case fpu_stmm4:
+  case fpu_stmm5:
+  case fpu_stmm6:
+  case fpu_stmm7:
+    ::memcpy(fpu.stmm[reg - fpu_stmm0].bytes, value.GetBytes(),
+             value.GetByteSize());
+    break;
+
+  case fpu_xmm0:
+  case fpu_xmm1:
+  case fpu_xmm2:
+  case fpu_xmm3:
+  case fpu_xmm4:
+  case fpu_xmm5:
+  case fpu_xmm6:
+  case fpu_xmm7:
+  case fpu_xmm8:
+  case fpu_xmm9:
+  case fpu_xmm10:
+  case fpu_xmm11:
+  case fpu_xmm12:
+  case fpu_xmm13:
+  case fpu_xmm14:
+  case fpu_xmm15:
+    ::memcpy(fpu.xmm[reg - fpu_xmm0].bytes, value.GetBytes(),
+             value.GetByteSize());
+    return false;
 
-    default:
-        return false;
-    }
-    return WriteRegisterSet(set) == 0;
-}
+  case exc_trapno:
+    exc.trapno = value.GetAsUInt32();
+    break;
 
-bool
-RegisterContextDarwin_x86_64::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
-    data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0));
-    if (data_sp &&
-        ReadGPR (false) == 0 &&
-        ReadFPU (false) == 0 &&
-        ReadEXC (false) == 0)
-    {
-        uint8_t *dst = data_sp->GetBytes();
-        ::memcpy (dst, &gpr, sizeof(gpr));
-        dst += sizeof(gpr);
+  case exc_err:
+    exc.err = value.GetAsUInt32();
+    break;
 
-        ::memcpy (dst, &fpu, sizeof(fpu));
-        dst += sizeof(gpr);
+  case exc_faultvaddr:
+    exc.faultvaddr = value.GetAsUInt64();
+    break;
 
-        ::memcpy (dst, &exc, sizeof(exc));
-        return true;
-    }
+  default:
     return false;
+  }
+  return WriteRegisterSet(set) == 0;
 }
 
-bool
-RegisterContextDarwin_x86_64::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
-    if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE)
-    {
-        const uint8_t *src = data_sp->GetBytes();
-        ::memcpy (&gpr, src, sizeof(gpr));
-        src += sizeof(gpr);
-
-        ::memcpy (&fpu, src, sizeof(fpu));
-        src += sizeof(gpr);
-
-        ::memcpy (&exc, src, sizeof(exc));
-        uint32_t success_count = 0;
-        if (WriteGPR() == 0)
-            ++success_count;
-        if (WriteFPU() == 0)
-            ++success_count;
-        if (WriteEXC() == 0)
-            ++success_count;
-        return success_count == 3;
-    }
-    return false;
+bool RegisterContextDarwin_x86_64::ReadAllRegisterValues(
+    lldb::DataBufferSP &data_sp) {
+  data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
+  if (data_sp && ReadGPR(false) == 0 && ReadFPU(false) == 0 &&
+      ReadEXC(false) == 0) {
+    uint8_t *dst = data_sp->GetBytes();
+    ::memcpy(dst, &gpr, sizeof(gpr));
+    dst += sizeof(gpr);
+
+    ::memcpy(dst, &fpu, sizeof(fpu));
+    dst += sizeof(gpr);
+
+    ::memcpy(dst, &exc, sizeof(exc));
+    return true;
+  }
+  return false;
 }
 
+bool RegisterContextDarwin_x86_64::WriteAllRegisterValues(
+    const lldb::DataBufferSP &data_sp) {
+  if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE) {
+    const uint8_t *src = data_sp->GetBytes();
+    ::memcpy(&gpr, src, sizeof(gpr));
+    src += sizeof(gpr);
+
+    ::memcpy(&fpu, src, sizeof(fpu));
+    src += sizeof(gpr);
+
+    ::memcpy(&exc, src, sizeof(exc));
+    uint32_t success_count = 0;
+    if (WriteGPR() == 0)
+      ++success_count;
+    if (WriteFPU() == 0)
+      ++success_count;
+    if (WriteEXC() == 0)
+      ++success_count;
+    return success_count == 3;
+  }
+  return false;
+}
 
-uint32_t
-RegisterContextDarwin_x86_64::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t reg)
-{
-    if (kind == eRegisterKindGeneric)
-    {
-        switch (reg)
-        {
-        case LLDB_REGNUM_GENERIC_PC:    return gpr_rip;
-        case LLDB_REGNUM_GENERIC_SP:    return gpr_rsp;
-        case LLDB_REGNUM_GENERIC_FP:    return gpr_rbp;
-        case LLDB_REGNUM_GENERIC_FLAGS: return gpr_rflags;
-        case LLDB_REGNUM_GENERIC_RA:
-        default:
-            break;
-        }
-    }
-    else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF)
-    {
-        switch (reg)
-        {
-        case ehframe_dwarf_gpr_rax:  return gpr_rax;
-        case ehframe_dwarf_gpr_rdx:  return gpr_rdx;
-        case ehframe_dwarf_gpr_rcx:  return gpr_rcx;
-        case ehframe_dwarf_gpr_rbx:  return gpr_rbx;
-        case ehframe_dwarf_gpr_rsi:  return gpr_rsi;
-        case ehframe_dwarf_gpr_rdi:  return gpr_rdi;
-        case ehframe_dwarf_gpr_rbp:  return gpr_rbp;
-        case ehframe_dwarf_gpr_rsp:  return gpr_rsp;
-        case ehframe_dwarf_gpr_r8:   return gpr_r8;
-        case ehframe_dwarf_gpr_r9:   return gpr_r9;
-        case ehframe_dwarf_gpr_r10:  return gpr_r10;
-        case ehframe_dwarf_gpr_r11:  return gpr_r11;
-        case ehframe_dwarf_gpr_r12:  return gpr_r12;
-        case ehframe_dwarf_gpr_r13:  return gpr_r13;
-        case ehframe_dwarf_gpr_r14:  return gpr_r14;
-        case ehframe_dwarf_gpr_r15:  return gpr_r15;
-        case ehframe_dwarf_gpr_rip:  return gpr_rip;
-        case ehframe_dwarf_fpu_xmm0: return fpu_xmm0;
-        case ehframe_dwarf_fpu_xmm1: return fpu_xmm1;
-        case ehframe_dwarf_fpu_xmm2: return fpu_xmm2;
-        case ehframe_dwarf_fpu_xmm3: return fpu_xmm3;
-        case ehframe_dwarf_fpu_xmm4: return fpu_xmm4;
-        case ehframe_dwarf_fpu_xmm5: return fpu_xmm5;
-        case ehframe_dwarf_fpu_xmm6: return fpu_xmm6;
-        case ehframe_dwarf_fpu_xmm7: return fpu_xmm7;
-        case ehframe_dwarf_fpu_xmm8: return fpu_xmm8;
-        case ehframe_dwarf_fpu_xmm9: return fpu_xmm9;
-        case ehframe_dwarf_fpu_xmm10: return fpu_xmm10;
-        case ehframe_dwarf_fpu_xmm11: return fpu_xmm11;
-        case ehframe_dwarf_fpu_xmm12: return fpu_xmm12;
-        case ehframe_dwarf_fpu_xmm13: return fpu_xmm13;
-        case ehframe_dwarf_fpu_xmm14: return fpu_xmm14;
-        case ehframe_dwarf_fpu_xmm15: return fpu_xmm15;
-        case ehframe_dwarf_fpu_stmm0: return fpu_stmm0;
-        case ehframe_dwarf_fpu_stmm1: return fpu_stmm1;
-        case ehframe_dwarf_fpu_stmm2: return fpu_stmm2;
-        case ehframe_dwarf_fpu_stmm3: return fpu_stmm3;
-        case ehframe_dwarf_fpu_stmm4: return fpu_stmm4;
-        case ehframe_dwarf_fpu_stmm5: return fpu_stmm5;
-        case ehframe_dwarf_fpu_stmm6: return fpu_stmm6;
-        case ehframe_dwarf_fpu_stmm7: return fpu_stmm7;
-        default:
-            break;
-        }
+uint32_t RegisterContextDarwin_x86_64::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t reg) {
+  if (kind == eRegisterKindGeneric) {
+    switch (reg) {
+    case LLDB_REGNUM_GENERIC_PC:
+      return gpr_rip;
+    case LLDB_REGNUM_GENERIC_SP:
+      return gpr_rsp;
+    case LLDB_REGNUM_GENERIC_FP:
+      return gpr_rbp;
+    case LLDB_REGNUM_GENERIC_FLAGS:
+      return gpr_rflags;
+    case LLDB_REGNUM_GENERIC_RA:
+    default:
+      break;
     }
-    else if (kind == eRegisterKindLLDB)
-    {
-        return reg;
+  } else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF) {
+    switch (reg) {
+    case ehframe_dwarf_gpr_rax:
+      return gpr_rax;
+    case ehframe_dwarf_gpr_rdx:
+      return gpr_rdx;
+    case ehframe_dwarf_gpr_rcx:
+      return gpr_rcx;
+    case ehframe_dwarf_gpr_rbx:
+      return gpr_rbx;
+    case ehframe_dwarf_gpr_rsi:
+      return gpr_rsi;
+    case ehframe_dwarf_gpr_rdi:
+      return gpr_rdi;
+    case ehframe_dwarf_gpr_rbp:
+      return gpr_rbp;
+    case ehframe_dwarf_gpr_rsp:
+      return gpr_rsp;
+    case ehframe_dwarf_gpr_r8:
+      return gpr_r8;
+    case ehframe_dwarf_gpr_r9:
+      return gpr_r9;
+    case ehframe_dwarf_gpr_r10:
+      return gpr_r10;
+    case ehframe_dwarf_gpr_r11:
+      return gpr_r11;
+    case ehframe_dwarf_gpr_r12:
+      return gpr_r12;
+    case ehframe_dwarf_gpr_r13:
+      return gpr_r13;
+    case ehframe_dwarf_gpr_r14:
+      return gpr_r14;
+    case ehframe_dwarf_gpr_r15:
+      return gpr_r15;
+    case ehframe_dwarf_gpr_rip:
+      return gpr_rip;
+    case ehframe_dwarf_fpu_xmm0:
+      return fpu_xmm0;
+    case ehframe_dwarf_fpu_xmm1:
+      return fpu_xmm1;
+    case ehframe_dwarf_fpu_xmm2:
+      return fpu_xmm2;
+    case ehframe_dwarf_fpu_xmm3:
+      return fpu_xmm3;
+    case ehframe_dwarf_fpu_xmm4:
+      return fpu_xmm4;
+    case ehframe_dwarf_fpu_xmm5:
+      return fpu_xmm5;
+    case ehframe_dwarf_fpu_xmm6:
+      return fpu_xmm6;
+    case ehframe_dwarf_fpu_xmm7:
+      return fpu_xmm7;
+    case ehframe_dwarf_fpu_xmm8:
+      return fpu_xmm8;
+    case ehframe_dwarf_fpu_xmm9:
+      return fpu_xmm9;
+    case ehframe_dwarf_fpu_xmm10:
+      return fpu_xmm10;
+    case ehframe_dwarf_fpu_xmm11:
+      return fpu_xmm11;
+    case ehframe_dwarf_fpu_xmm12:
+      return fpu_xmm12;
+    case ehframe_dwarf_fpu_xmm13:
+      return fpu_xmm13;
+    case ehframe_dwarf_fpu_xmm14:
+      return fpu_xmm14;
+    case ehframe_dwarf_fpu_xmm15:
+      return fpu_xmm15;
+    case ehframe_dwarf_fpu_stmm0:
+      return fpu_stmm0;
+    case ehframe_dwarf_fpu_stmm1:
+      return fpu_stmm1;
+    case ehframe_dwarf_fpu_stmm2:
+      return fpu_stmm2;
+    case ehframe_dwarf_fpu_stmm3:
+      return fpu_stmm3;
+    case ehframe_dwarf_fpu_stmm4:
+      return fpu_stmm4;
+    case ehframe_dwarf_fpu_stmm5:
+      return fpu_stmm5;
+    case ehframe_dwarf_fpu_stmm6:
+      return fpu_stmm6;
+    case ehframe_dwarf_fpu_stmm7:
+      return fpu_stmm7;
+    default:
+      break;
     }
-    return LLDB_INVALID_REGNUM;
+  } else if (kind == eRegisterKindLLDB) {
+    return reg;
+  }
+  return LLDB_INVALID_REGNUM;
 }
 
-bool
-RegisterContextDarwin_x86_64::HardwareSingleStep (bool enable)
-{
-    if (ReadGPR(true) != 0)
-        return false;
+bool RegisterContextDarwin_x86_64::HardwareSingleStep(bool enable) {
+  if (ReadGPR(true) != 0)
+    return false;
 
-    const uint64_t trace_bit = 0x100ull;
-    if (enable)
-    {
+  const uint64_t trace_bit = 0x100ull;
+  if (enable) {
 
-        if (gpr.rflags & trace_bit)
-            return true;    // trace bit is already set, there is nothing to do
-        else
-            gpr.rflags |= trace_bit;
-    }
+    if (gpr.rflags & trace_bit)
+      return true; // trace bit is already set, there is nothing to do
     else
-    {
-        if (gpr.rflags & trace_bit)
-            gpr.rflags &= ~trace_bit;
-        else
-            return true;    // trace bit is clear, there is nothing to do
-    }
+      gpr.rflags |= trace_bit;
+  } else {
+    if (gpr.rflags & trace_bit)
+      gpr.rflags &= ~trace_bit;
+    else
+      return true; // trace bit is clear, there is nothing to do
+  }
 
-    return WriteGPR() == 0;
+  return WriteGPR() == 0;
 }
-
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h
index ed627e1..fdd5e80 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h
@@ -14,261 +14,205 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
 #include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
 
-class RegisterContextDarwin_x86_64 : public lldb_private::RegisterContext
-{
+class RegisterContextDarwin_x86_64 : public lldb_private::RegisterContext {
 public:
-    RegisterContextDarwin_x86_64 (lldb_private::Thread &thread,
-                                  uint32_t concrete_frame_idx);
-
-    ~RegisterContextDarwin_x86_64() override;
-
-    void
-    InvalidateAllRegisters() override;
-
-    size_t
-    GetRegisterCount() override;
-
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
-
-    size_t
-    GetRegisterSetCount() override;
-
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t set) override;
-
-    bool
-    ReadRegister(const lldb_private::RegisterInfo *reg_info,
-                 lldb_private::RegisterValue &value) override;
-
-    bool
-    WriteRegister(const lldb_private::RegisterInfo *reg_info,
-                  const lldb_private::RegisterValue &value) override;
-    
-    bool
-    ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-
-    bool
-    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
-
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
-    bool
-    HardwareSingleStep(bool enable) override;
-
-    struct GPR
-    {
-        uint64_t rax;
-        uint64_t rbx;
-        uint64_t rcx;
-        uint64_t rdx;
-        uint64_t rdi;
-        uint64_t rsi;
-        uint64_t rbp;
-        uint64_t rsp;
-        uint64_t r8;
-        uint64_t r9;
-        uint64_t r10;
-        uint64_t r11;
-        uint64_t r12;
-        uint64_t r13;
-        uint64_t r14;
-        uint64_t r15;
-        uint64_t rip;
-        uint64_t rflags;
-        uint64_t cs;
-        uint64_t fs;
-        uint64_t gs;
-    };
-
-    struct MMSReg
-    {
-        uint8_t bytes[10];
-        uint8_t pad[6];
-    };
-
-    struct XMMReg
-    {
-        uint8_t bytes[16];
-    };
-
-    struct FPU
-    {
-        uint32_t    pad[2];
-        uint16_t    fcw;    // "fctrl"
-        uint16_t    fsw;    // "fstat"
-        uint8_t     ftw;    // "ftag"
-        uint8_t     pad1;
-        uint16_t    fop;    // "fop"
-        uint32_t    ip;     // "fioff"
-        uint16_t    cs;     // "fiseg"
-        uint16_t    pad2;
-        uint32_t    dp;     // "fooff"
-        uint16_t    ds;     // "foseg"
-        uint16_t    pad3;
-        uint32_t    mxcsr;
-        uint32_t    mxcsrmask;
-        MMSReg      stmm[8];
-        XMMReg      xmm[16];
-        uint8_t     pad4[6*16];
-        int         pad5;
-    };
-
-    struct EXC
-    {
-        uint32_t trapno;
-        uint32_t err;
-        uint64_t faultvaddr;
-    };
+  RegisterContextDarwin_x86_64(lldb_private::Thread &thread,
+                               uint32_t concrete_frame_idx);
+
+  ~RegisterContextDarwin_x86_64() override;
+
+  void InvalidateAllRegisters() override;
+
+  size_t GetRegisterCount() override;
+
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+  size_t GetRegisterSetCount() override;
+
+  const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+  bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+                    lldb_private::RegisterValue &value) override;
+
+  bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+                     const lldb_private::RegisterValue &value) override;
+
+  bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+  bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
+
+  bool HardwareSingleStep(bool enable) override;
+
+  struct GPR {
+    uint64_t rax;
+    uint64_t rbx;
+    uint64_t rcx;
+    uint64_t rdx;
+    uint64_t rdi;
+    uint64_t rsi;
+    uint64_t rbp;
+    uint64_t rsp;
+    uint64_t r8;
+    uint64_t r9;
+    uint64_t r10;
+    uint64_t r11;
+    uint64_t r12;
+    uint64_t r13;
+    uint64_t r14;
+    uint64_t r15;
+    uint64_t rip;
+    uint64_t rflags;
+    uint64_t cs;
+    uint64_t fs;
+    uint64_t gs;
+  };
+
+  struct MMSReg {
+    uint8_t bytes[10];
+    uint8_t pad[6];
+  };
+
+  struct XMMReg {
+    uint8_t bytes[16];
+  };
+
+  struct FPU {
+    uint32_t pad[2];
+    uint16_t fcw; // "fctrl"
+    uint16_t fsw; // "fstat"
+    uint8_t ftw;  // "ftag"
+    uint8_t pad1;
+    uint16_t fop; // "fop"
+    uint32_t ip;  // "fioff"
+    uint16_t cs;  // "fiseg"
+    uint16_t pad2;
+    uint32_t dp; // "fooff"
+    uint16_t ds; // "foseg"
+    uint16_t pad3;
+    uint32_t mxcsr;
+    uint32_t mxcsrmask;
+    MMSReg stmm[8];
+    XMMReg xmm[16];
+    uint8_t pad4[6 * 16];
+    int pad5;
+  };
+
+  struct EXC {
+    uint32_t trapno;
+    uint32_t err;
+    uint64_t faultvaddr;
+  };
 
 protected:
-
-    enum
-    {
-        GPRRegSet = 4,
-        FPURegSet = 5,
-        EXCRegSet = 6
-    };
-
-    enum
-    {
-        GPRWordCount = sizeof(GPR)/sizeof(uint32_t),
-        FPUWordCount = sizeof(FPU)/sizeof(uint32_t),
-        EXCWordCount = sizeof(EXC)/sizeof(uint32_t)
-    };
-
-    enum
-    {
-        Read = 0,
-        Write = 1,
-        kNumErrors = 2
-    };
-
-    GPR gpr;
-    FPU fpu;
-    EXC exc;
-    int gpr_errs[2]; // Read/Write errors
-    int fpu_errs[2]; // Read/Write errors
-    int exc_errs[2]; // Read/Write errors
-
-    void
-    InvalidateAllRegisterStates()
-    {
-        SetError (GPRRegSet, Read, -1);
-        SetError (FPURegSet, Read, -1);
-        SetError (EXCRegSet, Read, -1);
+  enum { GPRRegSet = 4, FPURegSet = 5, EXCRegSet = 6 };
+
+  enum {
+    GPRWordCount = sizeof(GPR) / sizeof(uint32_t),
+    FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
+    EXCWordCount = sizeof(EXC) / sizeof(uint32_t)
+  };
+
+  enum { Read = 0, Write = 1, kNumErrors = 2 };
+
+  GPR gpr;
+  FPU fpu;
+  EXC exc;
+  int gpr_errs[2]; // Read/Write errors
+  int fpu_errs[2]; // Read/Write errors
+  int exc_errs[2]; // Read/Write errors
+
+  void InvalidateAllRegisterStates() {
+    SetError(GPRRegSet, Read, -1);
+    SetError(FPURegSet, Read, -1);
+    SetError(EXCRegSet, Read, -1);
+  }
+
+  int GetError(int flavor, uint32_t err_idx) const {
+    if (err_idx < kNumErrors) {
+      switch (flavor) {
+      // When getting all errors, just OR all values together to see if
+      // we got any kind of error.
+      case GPRRegSet:
+        return gpr_errs[err_idx];
+      case FPURegSet:
+        return fpu_errs[err_idx];
+      case EXCRegSet:
+        return exc_errs[err_idx];
+      default:
+        break;
+      }
     }
-
-    int
-    GetError (int flavor, uint32_t err_idx) const
-    {
-        if (err_idx < kNumErrors)
-        {
-            switch (flavor)
-            {
-            // When getting all errors, just OR all values together to see if
-            // we got any kind of error.
-            case GPRRegSet:    return gpr_errs[err_idx];
-            case FPURegSet:    return fpu_errs[err_idx];
-            case EXCRegSet:    return exc_errs[err_idx];
-            default: break;
-            }
-        }
-        return -1;
+    return -1;
+  }
+
+  bool SetError(int flavor, uint32_t err_idx, int err) {
+    if (err_idx < kNumErrors) {
+      switch (flavor) {
+      case GPRRegSet:
+        gpr_errs[err_idx] = err;
+        return true;
+
+      case FPURegSet:
+        fpu_errs[err_idx] = err;
+        return true;
+
+      case EXCRegSet:
+        exc_errs[err_idx] = err;
+        return true;
+
+      default:
+        break;
+      }
     }
+    return false;
+  }
 
-    bool
-    SetError (int flavor, uint32_t err_idx, int err)
-    {
-        if (err_idx < kNumErrors)
-        {
-            switch (flavor)
-            {
-            case GPRRegSet:
-                gpr_errs[err_idx] = err;
-                return true;
-
-            case FPURegSet:
-                fpu_errs[err_idx] = err;
-                return true;
-
-            case EXCRegSet:
-                exc_errs[err_idx] = err;
-                return true;
-
-            default: break;
-            }
-        }
-        return false;
-    }
+  bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }
 
-    bool
-    RegisterSetIsCached (int set) const
-    {
-        return GetError(set, Read) == 0;
-    }
+  void LogGPR(lldb_private::Log *log, const char *format, ...);
+
+  int ReadGPR(bool force);
+
+  int ReadFPU(bool force);
+
+  int ReadEXC(bool force);
+
+  int WriteGPR();
+
+  int WriteFPU();
+
+  int WriteEXC();
+
+  // Subclasses override these to do the actual reading.
+  virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) = 0;
+
+  virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
+
+  virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;
+
+  virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
+
+  virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
+
+  virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;
+
+  int ReadRegisterSet(uint32_t set, bool force);
+
+  int WriteRegisterSet(uint32_t set);
+
+  static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);
+
+  static int GetSetForNativeRegNum(int reg_num);
+
+  static size_t GetRegisterInfosCount();
 
-    void
-    LogGPR (lldb_private::Log *log, const char *format, ...);
-
-    int
-    ReadGPR (bool force);
-
-    int
-    ReadFPU (bool force);
-
-    int
-    ReadEXC (bool force);
-
-    int
-    WriteGPR ();
-
-    int
-    WriteFPU ();
-
-    int
-    WriteEXC ();
-
-    // Subclasses override these to do the actual reading.
-    virtual int
-    DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr) = 0;
-    
-    virtual int
-    DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
-    
-    virtual int
-    DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc) = 0;
-    
-    virtual int
-    DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
-    
-    virtual int
-    DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
-    
-    virtual int
-    DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc) = 0;
-    
-    int
-    ReadRegisterSet (uint32_t set, bool force);
-
-    int
-    WriteRegisterSet (uint32_t set);
-
-    static uint32_t
-    GetRegisterNumber (uint32_t reg_kind, uint32_t reg_num);
-
-    static int
-    GetSetForNativeRegNum (int reg_num);
-
-    static size_t
-    GetRegisterInfosCount ();
-
-    static const lldb_private::RegisterInfo *
-    GetRegisterInfos ();
+  static const lldb_private::RegisterInfo *GetRegisterInfos();
 };
 
 #endif // liblldb_RegisterContextDarwin_x86_64_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDummy.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDummy.cpp
index 0859e4e..93bb09b 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDummy.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDummy.cpp
@@ -1,4 +1,5 @@
-//===-- RegisterContextDummy.cpp ---------------------------------*- C++ -*-===//
+//===-- RegisterContextDummy.cpp ---------------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -7,8 +8,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-
-#include "lldb/lldb-private.h"
 #include "lldb/Core/Address.h"
 #include "lldb/Core/AddressRange.h"
 #include "lldb/Core/DataBufferHeap.h"
@@ -20,118 +19,103 @@
 #include "lldb/Symbol/FuncUnwinders.h"
 #include "lldb/Symbol/Function.h"
 #include "lldb/Symbol/ObjectFile.h"
-#include "lldb/Symbol/SymbolContext.h"
 #include "lldb/Symbol/Symbol.h"
+#include "lldb/Symbol/SymbolContext.h"
 #include "lldb/Target/ABI.h"
+#include "lldb/Target/DynamicLoader.h"
 #include "lldb/Target/ExecutionContext.h"
 #include "lldb/Target/Process.h"
 #include "lldb/Target/StackFrame.h"
 #include "lldb/Target/Target.h"
 #include "lldb/Target/Thread.h"
-#include "lldb/Target/DynamicLoader.h"
+#include "lldb/lldb-private.h"
 
 #include "RegisterContextDummy.h"
 
 using namespace lldb;
 using namespace lldb_private;
 
-RegisterContextDummy::RegisterContextDummy (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size) :
-RegisterContext (thread, concrete_frame_idx)
-{
-    m_reg_set0.name = "General Purpose Registers";
-    m_reg_set0.short_name = "GPR";
-    m_reg_set0.num_registers = 1;
-    m_reg_set0.registers = new uint32_t(0);
-    
-    m_pc_reg_info.name = "pc";
-    m_pc_reg_info.alt_name = "pc";
-    m_pc_reg_info.byte_offset = 0;
-    m_pc_reg_info.byte_size = address_byte_size;
-    m_pc_reg_info.encoding = eEncodingUint;
-    m_pc_reg_info.format = eFormatPointer;
-    m_pc_reg_info.invalidate_regs = NULL;
-    m_pc_reg_info.value_regs = NULL;
-    m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM;
-    m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM;
-    m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
-    m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM;
-    m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM;
+RegisterContextDummy::RegisterContextDummy(Thread &thread,
+                                           uint32_t concrete_frame_idx,
+                                           uint32_t address_byte_size)
+    : RegisterContext(thread, concrete_frame_idx) {
+  m_reg_set0.name = "General Purpose Registers";
+  m_reg_set0.short_name = "GPR";
+  m_reg_set0.num_registers = 1;
+  m_reg_set0.registers = new uint32_t(0);
+
+  m_pc_reg_info.name = "pc";
+  m_pc_reg_info.alt_name = "pc";
+  m_pc_reg_info.byte_offset = 0;
+  m_pc_reg_info.byte_size = address_byte_size;
+  m_pc_reg_info.encoding = eEncodingUint;
+  m_pc_reg_info.format = eFormatPointer;
+  m_pc_reg_info.invalidate_regs = NULL;
+  m_pc_reg_info.value_regs = NULL;
+  m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM;
+  m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM;
+  m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+  m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM;
+  m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM;
 }
 
-RegisterContextDummy::~RegisterContextDummy ()
-{
-    delete m_reg_set0.registers;
-    delete m_pc_reg_info.invalidate_regs;
-    delete m_pc_reg_info.value_regs;
+RegisterContextDummy::~RegisterContextDummy() {
+  delete m_reg_set0.registers;
+  delete m_pc_reg_info.invalidate_regs;
+  delete m_pc_reg_info.value_regs;
 }
 
-void
-RegisterContextDummy::InvalidateAllRegisters () {}
+void RegisterContextDummy::InvalidateAllRegisters() {}
 
-size_t
-RegisterContextDummy::GetRegisterCount ()
-{
-    return 1;
-}
+size_t RegisterContextDummy::GetRegisterCount() { return 1; }
 
 const lldb_private::RegisterInfo *
-RegisterContextDummy::GetRegisterInfoAtIndex (size_t reg)
-{
-    if (reg)
-        return NULL;
-    return &m_pc_reg_info;
+RegisterContextDummy::GetRegisterInfoAtIndex(size_t reg) {
+  if (reg)
+    return NULL;
+  return &m_pc_reg_info;
 }
 
-size_t
-RegisterContextDummy::GetRegisterSetCount ()
-{
-    return 1;
-}
+size_t RegisterContextDummy::GetRegisterSetCount() { return 1; }
 
 const lldb_private::RegisterSet *
-RegisterContextDummy::GetRegisterSet (size_t reg_set)
-{
-    if (reg_set)
-        return NULL;
-    return &m_reg_set0;
+RegisterContextDummy::GetRegisterSet(size_t reg_set) {
+  if (reg_set)
+    return NULL;
+  return &m_reg_set0;
 }
 
-bool
-RegisterContextDummy::ReadRegister (const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value)
-{
-    if (!reg_info)
-        return false;
-    uint32_t reg_number = reg_info->kinds[eRegisterKindGeneric];
-    if (reg_number == LLDB_REGNUM_GENERIC_PC)
-    {
-        value.SetUInt(LLDB_INVALID_ADDRESS, reg_info->byte_size);
-        return true;
-    }
+bool RegisterContextDummy::ReadRegister(
+    const lldb_private::RegisterInfo *reg_info,
+    lldb_private::RegisterValue &value) {
+  if (!reg_info)
     return false;
+  uint32_t reg_number = reg_info->kinds[eRegisterKindGeneric];
+  if (reg_number == LLDB_REGNUM_GENERIC_PC) {
+    value.SetUInt(LLDB_INVALID_ADDRESS, reg_info->byte_size);
+    return true;
+  }
+  return false;
 }
 
-bool
-RegisterContextDummy::WriteRegister (const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value)
-{
-    return false;
+bool RegisterContextDummy::WriteRegister(
+    const lldb_private::RegisterInfo *reg_info,
+    const lldb_private::RegisterValue &value) {
+  return false;
 }
 
-bool
-RegisterContextDummy::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
-    return false;
+bool RegisterContextDummy::ReadAllRegisterValues(lldb::DataBufferSP &data_sp) {
+  return false;
 }
 
-bool
-RegisterContextDummy::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
-    return false;
+bool RegisterContextDummy::WriteAllRegisterValues(
+    const lldb::DataBufferSP &data_sp) {
+  return false;
 }
 
-uint32_t
-RegisterContextDummy::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
-    if (kind == eRegisterKindGeneric && num == LLDB_REGNUM_GENERIC_PC)
-        return 0;
-    return LLDB_INVALID_REGNUM;
+uint32_t RegisterContextDummy::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t num) {
+  if (kind == eRegisterKindGeneric && num == LLDB_REGNUM_GENERIC_PC)
+    return 0;
+  return LLDB_INVALID_REGNUM;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDummy.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDummy.h
index 9f6a8dc..ea70288 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDummy.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDummy.h
@@ -1,4 +1,5 @@
-//===-- RegisterContextDummy.h ----------------------------------------*- C++ -*-===//
+//===-- RegisterContextDummy.h ----------------------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -16,62 +17,53 @@
 
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
 #include "lldb/Symbol/SymbolContext.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
 
 namespace lldb_private {
-    
-class RegisterContextDummy : public lldb_private::RegisterContext
-{
+
+class RegisterContextDummy : public lldb_private::RegisterContext {
 public:
-    typedef std::shared_ptr<RegisterContextDummy> SharedPtr;
-    
-    RegisterContextDummy (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size);
-    
-    ~RegisterContextDummy() override;
+  typedef std::shared_ptr<RegisterContextDummy> SharedPtr;
 
-    void
-    InvalidateAllRegisters() override;
+  RegisterContextDummy(Thread &thread, uint32_t concrete_frame_idx,
+                       uint32_t address_byte_size);
 
-    size_t
-    GetRegisterCount() override;
+  ~RegisterContextDummy() override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
+  void InvalidateAllRegisters() override;
 
-    size_t
-    GetRegisterSetCount() override;
+  size_t GetRegisterCount() override;
 
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t reg_set) override;
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
 
-    bool
-    ReadRegister(const lldb_private::RegisterInfo *reg_info,
-                 lldb_private::RegisterValue &value) override;
+  size_t GetRegisterSetCount() override;
 
-    bool
-    WriteRegister(const lldb_private::RegisterInfo *reg_info,
-                  const lldb_private::RegisterValue &value) override;
+  const lldb_private::RegisterSet *GetRegisterSet(size_t reg_set) override;
 
-    bool
-    ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+  bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+                    lldb_private::RegisterValue &value) override;
 
-    bool
-    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+  bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+                     const lldb_private::RegisterValue &value) override;
+
+  bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+  bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
 
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-    
 private:
-    //------------------------------------------------------------------
-    // For RegisterContextLLDB only
-    //------------------------------------------------------------------
-    
-    lldb_private::RegisterSet m_reg_set0; // register set 0 (PC only)
-    lldb_private::RegisterInfo m_pc_reg_info;
-    
-    DISALLOW_COPY_AND_ASSIGN (RegisterContextDummy);
+  //------------------------------------------------------------------
+  // For RegisterContextLLDB only
+  //------------------------------------------------------------------
+
+  lldb_private::RegisterSet m_reg_set0; // register set 0 (PC only)
+  lldb_private::RegisterInfo m_pc_reg_info;
+
+  DISALLOW_COPY_AND_ASSIGN(RegisterContextDummy);
 };
 
 } // namespace lldb_private
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
index 588793d..fecfae0 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
@@ -7,12 +7,12 @@
 //
 //===---------------------------------------------------------------------===//
 
+#include <cassert>
 #include <stddef.h>
 #include <vector>
-#include <cassert>
 
-#include "llvm/Support/Compiler.h"
 #include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
 
 #include "RegisterContextFreeBSD_arm.h"
 
@@ -21,14 +21,31 @@ using namespace lldb_private;
 
 // Based on RegisterContextLinux_arm.cpp and
 // http://svnweb.freebsd.org/base/head/sys/arm/include/reg.h
-#define GPR_OFFSET(idx) ((idx) * 4)
-#define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR))
-#define FPSCR_OFFSET (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm::FPU, fpscr) + sizeof (RegisterContextFreeBSD_arm::GPR))
-#define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU))
-#define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm::DBG, reg) + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU) + sizeof (RegisterContextFreeBSD_arm::EXC)))
+#define GPR_OFFSET(idx) ((idx)*4)
+#define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterContextFreeBSD_arm::GPR))
+#define FPSCR_OFFSET                                                           \
+  (LLVM_EXTENSION offsetof(RegisterContextFreeBSD_arm::FPU, fpscr) +           \
+   sizeof(RegisterContextFreeBSD_arm::GPR))
+#define EXC_OFFSET(idx)                                                        \
+  ((idx)*4 + sizeof(RegisterContextFreeBSD_arm::GPR) +                         \
+   sizeof(RegisterContextFreeBSD_arm::FPU))
+#define DBG_OFFSET(reg)                                                        \
+  ((LLVM_EXTENSION offsetof(RegisterContextFreeBSD_arm::DBG, reg) +            \
+    sizeof(RegisterContextFreeBSD_arm::GPR) +                                  \
+    sizeof(RegisterContextFreeBSD_arm::FPU) +                                  \
+    sizeof(RegisterContextFreeBSD_arm::EXC)))
 
-#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextFreeBSD_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU) + sizeof (RegisterContextFreeBSD_arm::EXC))
+#define DEFINE_DBG(reg, i)                                                     \
+  #reg, NULL, sizeof(((RegisterContextFreeBSD_arm::DBG *) NULL)->reg[i]),      \
+                      DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex,           \
+                                 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,    \
+                                  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,    \
+                                  dbg_##reg##i },                              \
+                                  NULL, NULL, NULL, 0
+#define REG_CONTEXT_SIZE                                                       \
+  (sizeof(RegisterContextFreeBSD_arm::GPR) +                                   \
+   sizeof(RegisterContextFreeBSD_arm::FPU) +                                   \
+   sizeof(RegisterContextFreeBSD_arm::EXC))
 
 //-----------------------------------------------------------------------------
 // Include RegisterInfos_arm to declare our g_register_infos_arm structure.
@@ -38,52 +55,43 @@ using namespace lldb_private;
 #undef DECLARE_REGISTER_INFOS_ARM_STRUCT
 
 static const lldb_private::RegisterInfo *
-GetRegisterInfoPtr (const lldb_private::ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::arm:
-            return g_register_infos_arm;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return NULL;
-    }
+GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::arm:
+    return g_register_infos_arm;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return NULL;
+  }
 }
 
 static uint32_t
-GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::arm:
-            return static_cast<uint32_t>(sizeof(g_register_infos_arm) / sizeof(g_register_infos_arm[0]));
-        default:
-            assert(false && "Unhandled target architecture.");
-            return 0;
-    }
+GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::arm:
+    return static_cast<uint32_t>(sizeof(g_register_infos_arm) /
+                                 sizeof(g_register_infos_arm[0]));
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
 }
 
-RegisterContextFreeBSD_arm::RegisterContextFreeBSD_arm(const lldb_private::ArchSpec &target_arch) :
-    lldb_private::RegisterInfoInterface(target_arch),
-    m_register_info_p(GetRegisterInfoPtr(target_arch)),
-    m_register_info_count(GetRegisterInfoCount(target_arch))
-{
-}
+RegisterContextFreeBSD_arm::RegisterContextFreeBSD_arm(
+    const lldb_private::ArchSpec &target_arch)
+    : lldb_private::RegisterInfoInterface(target_arch),
+      m_register_info_p(GetRegisterInfoPtr(target_arch)),
+      m_register_info_count(GetRegisterInfoCount(target_arch)) {}
 
-size_t
-RegisterContextFreeBSD_arm::GetGPRSize() const
-{
-    return sizeof(struct RegisterContextFreeBSD_arm::GPR);
+size_t RegisterContextFreeBSD_arm::GetGPRSize() const {
+  return sizeof(struct RegisterContextFreeBSD_arm::GPR);
 }
 
 const lldb_private::RegisterInfo *
-RegisterContextFreeBSD_arm::GetRegisterInfo() const
-{
-    return m_register_info_p;
+RegisterContextFreeBSD_arm::GetRegisterInfo() const {
+  return m_register_info_p;
 }
 
-uint32_t
-RegisterContextFreeBSD_arm::GetRegisterCount() const
-{
-    return m_register_info_count;
+uint32_t RegisterContextFreeBSD_arm::GetRegisterCount() const {
+  return m_register_info_count;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h
index f2d9364..422ecb7 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h
@@ -10,65 +10,53 @@
 #ifndef liblldb_RegisterContextFreeBSD_arm_h_
 #define liblldb_RegisterContextFreeBSD_arm_h_
 
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
 #include "RegisterInfoInterface.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
 
-class RegisterContextFreeBSD_arm
-    : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_arm : public lldb_private::RegisterInfoInterface {
 public:
-
-    struct GPR
-    {
-        uint32_t    r[16];  // R0-R15
-        uint32_t    cpsr;   // CPSR
-    };
-
-
-    struct QReg
-    {
-        uint8_t bytes[16];
-    };
-
-    struct FPU
-    {
-        union {
-            uint32_t s[32];
-            uint64_t d[32];
-            QReg     q[16];  // the 128-bit NEON registers
-        } floats;
-        uint32_t fpscr;
-    };
-    struct EXC
-    {
-        uint32_t    exception;
-        uint32_t    fsr; /* Fault status */
-        uint32_t    far; /* Virtual Fault Address */
-    };
-
-    struct DBG
-    {
-        uint32_t bvr[16];
-        uint32_t bcr[16];
-        uint32_t wvr[16];
-        uint32_t wcr[16];
-    };
-
-    RegisterContextFreeBSD_arm(const lldb_private::ArchSpec &target_arch);
-
-    size_t
-    GetGPRSize() const override;
-
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
-
-    uint32_t
-    GetRegisterCount () const override;
+  struct GPR {
+    uint32_t r[16]; // R0-R15
+    uint32_t cpsr;  // CPSR
+  };
+
+  struct QReg {
+    uint8_t bytes[16];
+  };
+
+  struct FPU {
+    union {
+      uint32_t s[32];
+      uint64_t d[32];
+      QReg q[16]; // the 128-bit NEON registers
+    } floats;
+    uint32_t fpscr;
+  };
+  struct EXC {
+    uint32_t exception;
+    uint32_t fsr; /* Fault status */
+    uint32_t far; /* Virtual Fault Address */
+  };
+
+  struct DBG {
+    uint32_t bvr[16];
+    uint32_t bcr[16];
+    uint32_t wvr[16];
+    uint32_t wcr[16];
+  };
+
+  RegisterContextFreeBSD_arm(const lldb_private::ArchSpec &target_arch);
+
+  size_t GetGPRSize() const override;
+
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
+
+  uint32_t GetRegisterCount() const override;
 
 private:
-    const lldb_private::RegisterInfo *m_register_info_p;
-    uint32_t m_register_info_count;
+  const lldb_private::RegisterInfo *m_register_info_p;
+  uint32_t m_register_info_count;
 };
 
-#endif  // liblldb_RegisterContextFreeBSD_arm_h_
+#endif // liblldb_RegisterContextFreeBSD_arm_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp
deleted file mode 100644
index 6e7e9e6..0000000
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp
+++ /dev/null
@@ -1,86 +0,0 @@
-//===-- RegisterContextFreeBSD_arm64.cpp ----------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===---------------------------------------------------------------------===//
-
-#include <vector>
-#include "RegisterContextPOSIX_arm64.h"
-#include "RegisterContextFreeBSD_arm64.h"
-
-using namespace lldb;
-
-// Based on RegisterContextDarwin_arm64.cpp
-#define GPR_OFFSET(idx) ((idx) * 8)
-#define GPR_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::GPR, reg))
-
-#define FPU_OFFSET(idx) ((idx) * 16 + sizeof (RegisterContextFreeBSD_arm64::GPR))
-#define FPU_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::FPU, reg))
-
-#define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::EXC, reg) + sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU))
-#define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::DBG, reg) + sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU) + sizeof (RegisterContextFreeBSD_arm64::EXC))
-
-#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextFreeBSD_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU) + sizeof (RegisterContextFreeBSD_arm64::EXC))
-
-//-----------------------------------------------------------------------------
-// Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
-//-----------------------------------------------------------------------------
-#define DECLARE_REGISTER_INFOS_ARM64_STRUCT
-#include "RegisterInfos_arm64.h"
-#undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
-
-static const lldb_private::RegisterInfo *
-GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::aarch64:
-            return g_register_infos_arm64;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return nullptr;
-    }
-}
-
-static uint32_t
-GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::aarch64:
-            return static_cast<uint32_t>(sizeof(g_register_infos_arm64) / sizeof(g_register_infos_arm64[0]));
-        default:
-            assert(false && "Unhandled target architecture.");
-            return 0;
-    }
-}
-
-RegisterContextFreeBSD_arm64::RegisterContextFreeBSD_arm64(const lldb_private::ArchSpec &target_arch) :
-    RegisterInfoInterface(target_arch),
-    m_register_info_p(GetRegisterInfoPtr(target_arch)),
-    m_register_info_count(GetRegisterInfoCount(target_arch))
-{
-}
-
-size_t
-RegisterContextFreeBSD_arm64::GetGPRSize() const
-{
-    return sizeof(struct RegisterContextFreeBSD_arm64::GPR);
-}
-
-const lldb_private::RegisterInfo *
-RegisterContextFreeBSD_arm64::GetRegisterInfo() const
-{
-    return m_register_info_p;
-}
-
-uint32_t
-RegisterContextFreeBSD_arm64::GetRegisterCount() const
-{
-    return m_register_info_count;
-}
-
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h
deleted file mode 100644
index cfdae4d..0000000
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h
+++ /dev/null
@@ -1,78 +0,0 @@
-//===-- RegisterContextFreeBSD_arm64.h --------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef liblldb_RegisterContextFreeBSD_arm64_H_
-#define liblldb_RegisterContextFreeBSD_arm64_H_
-
-#include "RegisterInfoInterface.h"
-
-class RegisterContextFreeBSD_arm64:
-    public lldb_private::RegisterInfoInterface
-{
-public:
-    // based on RegisterContextDarwin_arm64.h
-    struct GPR
-    {
-        uint64_t    x[29];  // x0-x28
-        uint64_t    fp;     // x29
-        uint64_t    lr;     // x30
-        uint64_t    sp;     // x31
-        uint64_t    pc;     // pc
-        uint32_t    cpsr;   // cpsr
-    };
-
-    // based on RegisterContextDarwin_arm64.h
-    struct VReg
-    {
-        uint8_t bytes[16];
-    };
-
-    // based on RegisterContextDarwin_arm64.h
-    struct FPU
-    {
-        VReg        v[32];
-        uint32_t    fpsr;
-        uint32_t    fpcr;
-    };
-
-    // based on RegisterContextDarwin_arm64.h
-    struct EXC
-    {
-        uint64_t    far;       // Virtual Fault Address
-        uint32_t    esr;       // Exception syndrome
-        uint32_t    exception; // number of arm exception token
-    };
-
-    // based on RegisterContextDarwin_arm64.h
-    struct DBG
-    {
-        uint64_t bvr[16];
-        uint64_t bcr[16];
-        uint64_t wvr[16];
-        uint64_t wcr[16];
-        uint64_t mdscr_el1;
-    };
-
-    RegisterContextFreeBSD_arm64(const lldb_private::ArchSpec &target_arch);
-
-    size_t
-    GetGPRSize() const override;
-
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
-
-    uint32_t
-    GetRegisterCount () const override;
-
-private:
-    const lldb_private::RegisterInfo *m_register_info_p;
-    uint32_t m_register_info_count;
-};
-
-#endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp
index 0171da6..4ccfa2a 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp
@@ -7,55 +7,52 @@
 //
 //===---------------------------------------------------------------------===//
 
-#include "RegisterContextPOSIX_x86.h"
 #include "RegisterContextFreeBSD_i386.h"
+#include "RegisterContextPOSIX_x86.h"
 
 using namespace lldb_private;
 using namespace lldb;
 
 // http://svnweb.freebsd.org/base/head/sys/x86/include/reg.h
-struct GPR
-{
-    uint32_t fs;
-    uint32_t es;
-    uint32_t ds;
-    uint32_t edi;
-    uint32_t esi;
-    uint32_t ebp;
-    uint32_t isp;
-    uint32_t ebx;
-    uint32_t edx;
-    uint32_t ecx;
-    uint32_t eax;
-    uint32_t trapno;
-    uint32_t err;
-    uint32_t eip;
-    uint32_t cs;
-    uint32_t eflags;
-    uint32_t esp;
-    uint32_t ss;
-    uint32_t gs;
+struct GPR {
+  uint32_t fs;
+  uint32_t es;
+  uint32_t ds;
+  uint32_t edi;
+  uint32_t esi;
+  uint32_t ebp;
+  uint32_t isp;
+  uint32_t ebx;
+  uint32_t edx;
+  uint32_t ecx;
+  uint32_t eax;
+  uint32_t trapno;
+  uint32_t err;
+  uint32_t eip;
+  uint32_t cs;
+  uint32_t eflags;
+  uint32_t esp;
+  uint32_t ss;
+  uint32_t gs;
 };
 
 struct dbreg {
-    uint32_t  dr[8];     /* debug registers */
-                         /* Index 0-3: debug address registers */
-                         /* Index 4-5: reserved */
-                         /* Index 6: debug status */
-                         /* Index 7: debug control */
+  uint32_t dr[8]; /* debug registers */
+                  /* Index 0-3: debug address registers */
+                  /* Index 4-5: reserved */
+                  /* Index 6: debug status */
+                  /* Index 7: debug control */
 };
 
 using FPR_i386 = FXSAVE;
 
-struct UserArea
-{
-    GPR gpr;
-    FPR_i386 i387;
+struct UserArea {
+  GPR gpr;
+  FPR_i386 i387;
 };
 
 #define DR_SIZE sizeof(uint32_t)
-#define DR_OFFSET(reg_index) \
-    (LLVM_EXTENSION offsetof(dbreg, dr[reg_index]))
+#define DR_OFFSET(reg_index) (LLVM_EXTENSION offsetof(dbreg, dr[reg_index]))
 
 //---------------------------------------------------------------------------
 // Include RegisterInfos_i386 to declare our g_register_infos_i386 structure.
@@ -64,32 +61,23 @@ struct UserArea
 #include "RegisterInfos_i386.h"
 #undef DECLARE_REGISTER_INFOS_I386_STRUCT
 
-RegisterContextFreeBSD_i386::RegisterContextFreeBSD_i386(const ArchSpec &target_arch) :
-    RegisterInfoInterface(target_arch)
-{
-}
+RegisterContextFreeBSD_i386::RegisterContextFreeBSD_i386(
+    const ArchSpec &target_arch)
+    : RegisterInfoInterface(target_arch) {}
 
-size_t
-RegisterContextFreeBSD_i386::GetGPRSize() const
-{
-    return sizeof(GPR);
-}
+size_t RegisterContextFreeBSD_i386::GetGPRSize() const { return sizeof(GPR); }
 
-const RegisterInfo *
-RegisterContextFreeBSD_i386::GetRegisterInfo() const
-{
-    switch (m_target_arch.GetMachine())
-    {
-        case llvm::Triple::x86:
-            return g_register_infos_i386;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return NULL;
-    }
+const RegisterInfo *RegisterContextFreeBSD_i386::GetRegisterInfo() const {
+  switch (m_target_arch.GetMachine()) {
+  case llvm::Triple::x86:
+    return g_register_infos_i386;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return NULL;
+  }
 }
 
-uint32_t
-RegisterContextFreeBSD_i386::GetRegisterCount () const
-{
-    return static_cast<uint32_t> (sizeof (g_register_infos_i386) / sizeof (g_register_infos_i386 [0]));
+uint32_t RegisterContextFreeBSD_i386::GetRegisterCount() const {
+  return static_cast<uint32_t>(sizeof(g_register_infos_i386) /
+                               sizeof(g_register_infos_i386[0]));
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h
index 9527fc03..35a79c1 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h
@@ -12,20 +12,15 @@
 
 #include "RegisterInfoInterface.h"
 
-class RegisterContextFreeBSD_i386
-  : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_i386 : public lldb_private::RegisterInfoInterface {
 public:
-    RegisterContextFreeBSD_i386(const lldb_private::ArchSpec &target_arch);
+  RegisterContextFreeBSD_i386(const lldb_private::ArchSpec &target_arch);
 
-    size_t
-    GetGPRSize() const override;
+  size_t GetGPRSize() const override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
-    uint32_t
-    GetRegisterCount () const override;
+  uint32_t GetRegisterCount() const override;
 };
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp
index 53fa416..c114cfb 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp
@@ -7,87 +7,79 @@
 //
 //===---------------------------------------------------------------------===//
 
-#include <vector>
-#include "RegisterContextPOSIX_mips64.h"
 #include "RegisterContextFreeBSD_mips64.h"
+#include "RegisterContextPOSIX_mips64.h"
+#include <vector>
 
 using namespace lldb_private;
 using namespace lldb;
 
 // http://svnweb.freebsd.org/base/head/sys/mips/include/regnum.h
-typedef struct _GPR
-{
-    uint64_t zero;
-    uint64_t r1;
-    uint64_t r2;        
-    uint64_t r3;
-    uint64_t r4;
-    uint64_t r5;
-    uint64_t r6;
-    uint64_t r7;
-    uint64_t r8;
-    uint64_t r9;
-    uint64_t r10;
-    uint64_t r11;
-    uint64_t r12;
-    uint64_t r13;
-    uint64_t r14;
-    uint64_t r15;
-    uint64_t r16;
-    uint64_t r17;
-    uint64_t r18;
-    uint64_t r19;
-    uint64_t r20;
-    uint64_t r21;
-    uint64_t r22;
-    uint64_t r23;
-    uint64_t r24;
-    uint64_t r25;
-    uint64_t r26;
-    uint64_t r27;
-    uint64_t gp;
-    uint64_t sp;
-    uint64_t r30;
-    uint64_t ra;
-    uint64_t sr;
-    uint64_t mullo;
-    uint64_t mulhi;
-    uint64_t badvaddr;
-    uint64_t cause;
-    uint64_t pc;
-    uint64_t ic;
-    uint64_t dummy;
+typedef struct _GPR {
+  uint64_t zero;
+  uint64_t r1;
+  uint64_t r2;
+  uint64_t r3;
+  uint64_t r4;
+  uint64_t r5;
+  uint64_t r6;
+  uint64_t r7;
+  uint64_t r8;
+  uint64_t r9;
+  uint64_t r10;
+  uint64_t r11;
+  uint64_t r12;
+  uint64_t r13;
+  uint64_t r14;
+  uint64_t r15;
+  uint64_t r16;
+  uint64_t r17;
+  uint64_t r18;
+  uint64_t r19;
+  uint64_t r20;
+  uint64_t r21;
+  uint64_t r22;
+  uint64_t r23;
+  uint64_t r24;
+  uint64_t r25;
+  uint64_t r26;
+  uint64_t r27;
+  uint64_t gp;
+  uint64_t sp;
+  uint64_t r30;
+  uint64_t ra;
+  uint64_t sr;
+  uint64_t mullo;
+  uint64_t mulhi;
+  uint64_t badvaddr;
+  uint64_t cause;
+  uint64_t pc;
+  uint64_t ic;
+  uint64_t dummy;
 } GPR_freebsd_mips;
 
 //---------------------------------------------------------------------------
-// Include RegisterInfos_mips64 to declare our g_register_infos_mips64 structure.
+// Include RegisterInfos_mips64 to declare our g_register_infos_mips64
+// structure.
 //---------------------------------------------------------------------------
 #define DECLARE_REGISTER_INFOS_MIPS64_STRUCT
 #include "RegisterInfos_mips64.h"
 #undef DECLARE_REGISTER_INFOS_MIPS64_STRUCT
 
-RegisterContextFreeBSD_mips64::RegisterContextFreeBSD_mips64(const ArchSpec &target_arch) :
-    RegisterInfoInterface(target_arch)
-{
-}
+RegisterContextFreeBSD_mips64::RegisterContextFreeBSD_mips64(
+    const ArchSpec &target_arch)
+    : RegisterInfoInterface(target_arch) {}
 
-size_t
-RegisterContextFreeBSD_mips64::GetGPRSize() const
-{
-    return sizeof(GPR_freebsd_mips);
+size_t RegisterContextFreeBSD_mips64::GetGPRSize() const {
+  return sizeof(GPR_freebsd_mips);
 }
 
-const RegisterInfo *
-RegisterContextFreeBSD_mips64::GetRegisterInfo() const
-{
-    assert (m_target_arch.GetCore() == ArchSpec::eCore_mips64);
-    return g_register_infos_mips64;
+const RegisterInfo *RegisterContextFreeBSD_mips64::GetRegisterInfo() const {
+  assert(m_target_arch.GetCore() == ArchSpec::eCore_mips64);
+  return g_register_infos_mips64;
 }
 
-uint32_t
-RegisterContextFreeBSD_mips64::GetRegisterCount () const
-{
-    return static_cast<uint32_t> (sizeof (g_register_infos_mips64) / sizeof (g_register_infos_mips64 [0]));
+uint32_t RegisterContextFreeBSD_mips64::GetRegisterCount() const {
+  return static_cast<uint32_t>(sizeof(g_register_infos_mips64) /
+                               sizeof(g_register_infos_mips64[0]));
 }
-
-
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h
index 5c042af..043e638 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h
@@ -12,20 +12,16 @@
 
 #include "RegisterInfoInterface.h"
 
-class RegisterContextFreeBSD_mips64:
-    public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_mips64
+    : public lldb_private::RegisterInfoInterface {
 public:
-    RegisterContextFreeBSD_mips64(const lldb_private::ArchSpec &target_arch);
+  RegisterContextFreeBSD_mips64(const lldb_private::ArchSpec &target_arch);
 
-    size_t
-    GetGPRSize() const override;
+  size_t GetGPRSize() const override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
-    uint32_t
-    GetRegisterCount () const override;
+  uint32_t GetRegisterCount() const override;
 };
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp
index 5133d60..efa4cc6 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp
@@ -7,263 +7,233 @@
 //
 //===---------------------------------------------------------------------===//
 
-#include <vector>
-#include "RegisterContextPOSIX_powerpc.h"
 #include "RegisterContextFreeBSD_powerpc.h"
+#include "RegisterContextPOSIX_powerpc.h"
+#include <vector>
 
 using namespace lldb_private;
 using namespace lldb;
 
 // http://svnweb.freebsd.org/base/head/sys/powerpc/include/reg.h
-typedef struct _GPR64
-{
-    uint64_t r0;
-    uint64_t r1;
-    uint64_t r2;
-    uint64_t r3;
-    uint64_t r4;
-    uint64_t r5;
-    uint64_t r6;
-    uint64_t r7;
-    uint64_t r8;
-    uint64_t r9;
-    uint64_t r10;
-    uint64_t r11;
-    uint64_t r12;
-    uint64_t r13;
-    uint64_t r14;
-    uint64_t r15;
-    uint64_t r16;
-    uint64_t r17;
-    uint64_t r18;
-    uint64_t r19;
-    uint64_t r20;
-    uint64_t r21;
-    uint64_t r22;
-    uint64_t r23;
-    uint64_t r24;
-    uint64_t r25;
-    uint64_t r26;
-    uint64_t r27;
-    uint64_t r28;
-    uint64_t r29;
-    uint64_t r30;
-    uint64_t r31;
-    uint64_t lr;
-    uint64_t cr;
-    uint64_t xer;
-    uint64_t ctr;
-    uint64_t pc;
+typedef struct _GPR64 {
+  uint64_t r0;
+  uint64_t r1;
+  uint64_t r2;
+  uint64_t r3;
+  uint64_t r4;
+  uint64_t r5;
+  uint64_t r6;
+  uint64_t r7;
+  uint64_t r8;
+  uint64_t r9;
+  uint64_t r10;
+  uint64_t r11;
+  uint64_t r12;
+  uint64_t r13;
+  uint64_t r14;
+  uint64_t r15;
+  uint64_t r16;
+  uint64_t r17;
+  uint64_t r18;
+  uint64_t r19;
+  uint64_t r20;
+  uint64_t r21;
+  uint64_t r22;
+  uint64_t r23;
+  uint64_t r24;
+  uint64_t r25;
+  uint64_t r26;
+  uint64_t r27;
+  uint64_t r28;
+  uint64_t r29;
+  uint64_t r30;
+  uint64_t r31;
+  uint64_t lr;
+  uint64_t cr;
+  uint64_t xer;
+  uint64_t ctr;
+  uint64_t pc;
 } GPR64;
 
-typedef struct _GPR32
-{
-    uint32_t r0;
-    uint32_t r1;
-    uint32_t r2;
-    uint32_t r3;
-    uint32_t r4;
-    uint32_t r5;
-    uint32_t r6;
-    uint32_t r7;
-    uint32_t r8;
-    uint32_t r9;
-    uint32_t r10;
-    uint32_t r11;
-    uint32_t r12;
-    uint32_t r13;
-    uint32_t r14;
-    uint32_t r15;
-    uint32_t r16;
-    uint32_t r17;
-    uint32_t r18;
-    uint32_t r19;
-    uint32_t r20;
-    uint32_t r21;
-    uint32_t r22;
-    uint32_t r23;
-    uint32_t r24;
-    uint32_t r25;
-    uint32_t r26;
-    uint32_t r27;
-    uint32_t r28;
-    uint32_t r29;
-    uint32_t r30;
-    uint32_t r31;
-    uint32_t lr;
-    uint32_t cr;
-    uint32_t xer;
-    uint32_t ctr;
-    uint32_t pc;
+typedef struct _GPR32 {
+  uint32_t r0;
+  uint32_t r1;
+  uint32_t r2;
+  uint32_t r3;
+  uint32_t r4;
+  uint32_t r5;
+  uint32_t r6;
+  uint32_t r7;
+  uint32_t r8;
+  uint32_t r9;
+  uint32_t r10;
+  uint32_t r11;
+  uint32_t r12;
+  uint32_t r13;
+  uint32_t r14;
+  uint32_t r15;
+  uint32_t r16;
+  uint32_t r17;
+  uint32_t r18;
+  uint32_t r19;
+  uint32_t r20;
+  uint32_t r21;
+  uint32_t r22;
+  uint32_t r23;
+  uint32_t r24;
+  uint32_t r25;
+  uint32_t r26;
+  uint32_t r27;
+  uint32_t r28;
+  uint32_t r29;
+  uint32_t r30;
+  uint32_t r31;
+  uint32_t lr;
+  uint32_t cr;
+  uint32_t xer;
+  uint32_t ctr;
+  uint32_t pc;
 } GPR32;
 
-typedef struct _FPR
-{
-    uint64_t f0;
-    uint64_t f1;
-    uint64_t f2;
-    uint64_t f3;
-    uint64_t f4;
-    uint64_t f5;
-    uint64_t f6;
-    uint64_t f7;
-    uint64_t f8;
-    uint64_t f9;
-    uint64_t f10;
-    uint64_t f11;
-    uint64_t f12;
-    uint64_t f13;
-    uint64_t f14;
-    uint64_t f15;
-    uint64_t f16;
-    uint64_t f17;
-    uint64_t f18;
-    uint64_t f19;
-    uint64_t f20;
-    uint64_t f21;
-    uint64_t f22;
-    uint64_t f23;
-    uint64_t f24;
-    uint64_t f25;
-    uint64_t f26;
-    uint64_t f27;
-    uint64_t f28;
-    uint64_t f29;
-    uint64_t f30;
-    uint64_t f31;
-    uint64_t fpscr;
+typedef struct _FPR {
+  uint64_t f0;
+  uint64_t f1;
+  uint64_t f2;
+  uint64_t f3;
+  uint64_t f4;
+  uint64_t f5;
+  uint64_t f6;
+  uint64_t f7;
+  uint64_t f8;
+  uint64_t f9;
+  uint64_t f10;
+  uint64_t f11;
+  uint64_t f12;
+  uint64_t f13;
+  uint64_t f14;
+  uint64_t f15;
+  uint64_t f16;
+  uint64_t f17;
+  uint64_t f18;
+  uint64_t f19;
+  uint64_t f20;
+  uint64_t f21;
+  uint64_t f22;
+  uint64_t f23;
+  uint64_t f24;
+  uint64_t f25;
+  uint64_t f26;
+  uint64_t f27;
+  uint64_t f28;
+  uint64_t f29;
+  uint64_t f30;
+  uint64_t f31;
+  uint64_t fpscr;
 } FPR;
 
-typedef struct _VMX
-{
-    uint32_t v0[4];
-    uint32_t v1[4];
-    uint32_t v2[4];
-    uint32_t v3[4];
-    uint32_t v4[4];
-    uint32_t v5[4];
-    uint32_t v6[4];
-    uint32_t v7[4];
-    uint32_t v8[4];
-    uint32_t v9[4];
-    uint32_t v10[4];
-    uint32_t v11[4];
-    uint32_t v12[4];
-    uint32_t v13[4];
-    uint32_t v14[4];
-    uint32_t v15[4];
-    uint32_t v16[4];
-    uint32_t v17[4];
-    uint32_t v18[4];
-    uint32_t v19[4];
-    uint32_t v20[4];
-    uint32_t v21[4];
-    uint32_t v22[4];
-    uint32_t v23[4];
-    uint32_t v24[4];
-    uint32_t v25[4];
-    uint32_t v26[4];
-    uint32_t v27[4];
-    uint32_t v28[4];
-    uint32_t v29[4];
-    uint32_t v30[4];
-    uint32_t v31[4];
-    uint32_t pad[2];
-    uint32_t vrsave;
-    uint32_t vscr;
+typedef struct _VMX {
+  uint32_t v0[4];
+  uint32_t v1[4];
+  uint32_t v2[4];
+  uint32_t v3[4];
+  uint32_t v4[4];
+  uint32_t v5[4];
+  uint32_t v6[4];
+  uint32_t v7[4];
+  uint32_t v8[4];
+  uint32_t v9[4];
+  uint32_t v10[4];
+  uint32_t v11[4];
+  uint32_t v12[4];
+  uint32_t v13[4];
+  uint32_t v14[4];
+  uint32_t v15[4];
+  uint32_t v16[4];
+  uint32_t v17[4];
+  uint32_t v18[4];
+  uint32_t v19[4];
+  uint32_t v20[4];
+  uint32_t v21[4];
+  uint32_t v22[4];
+  uint32_t v23[4];
+  uint32_t v24[4];
+  uint32_t v25[4];
+  uint32_t v26[4];
+  uint32_t v27[4];
+  uint32_t v28[4];
+  uint32_t v29[4];
+  uint32_t v30[4];
+  uint32_t v31[4];
+  uint32_t pad[2];
+  uint32_t vrsave;
+  uint32_t vscr;
 } VMX;
 
 //---------------------------------------------------------------------------
-// Include RegisterInfos_powerpc to declare our g_register_infos_powerpc structure.
+// Include RegisterInfos_powerpc to declare our g_register_infos_powerpc
+// structure.
 //---------------------------------------------------------------------------
 #define DECLARE_REGISTER_INFOS_POWERPC_STRUCT
 #include "RegisterInfos_powerpc.h"
 #undef DECLARE_REGISTER_INFOS_POWERPC_STRUCT
 
-RegisterContextFreeBSD_powerpc::RegisterContextFreeBSD_powerpc(const ArchSpec &target_arch) :
-    RegisterInfoInterface(target_arch)
-{
-}
+RegisterContextFreeBSD_powerpc::RegisterContextFreeBSD_powerpc(
+    const ArchSpec &target_arch)
+    : RegisterInfoInterface(target_arch) {}
 
-RegisterContextFreeBSD_powerpc::~RegisterContextFreeBSD_powerpc()
-{
-}
+RegisterContextFreeBSD_powerpc::~RegisterContextFreeBSD_powerpc() {}
 
-size_t
-RegisterContextFreeBSD_powerpc::GetGPRSize() const
-{
-    // This is an 'abstract' base, so no GPR struct.
-    return 0;
+size_t RegisterContextFreeBSD_powerpc::GetGPRSize() const {
+  // This is an 'abstract' base, so no GPR struct.
+  return 0;
 }
 
-const RegisterInfo *
-RegisterContextFreeBSD_powerpc::GetRegisterInfo() const
-{
-    //assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
-    llvm_unreachable("Abstract class!");
-    return NULL;
+const RegisterInfo *RegisterContextFreeBSD_powerpc::GetRegisterInfo() const {
+  // assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
+  llvm_unreachable("Abstract class!");
+  return NULL;
 }
 
-uint32_t
-RegisterContextFreeBSD_powerpc::GetRegisterCount () const
-{
-    return 0;
-}
+uint32_t RegisterContextFreeBSD_powerpc::GetRegisterCount() const { return 0; }
 
-RegisterContextFreeBSD_powerpc32::RegisterContextFreeBSD_powerpc32(const ArchSpec &target_arch) :
-    RegisterContextFreeBSD_powerpc(target_arch)
-{
-}
+RegisterContextFreeBSD_powerpc32::RegisterContextFreeBSD_powerpc32(
+    const ArchSpec &target_arch)
+    : RegisterContextFreeBSD_powerpc(target_arch) {}
 
-RegisterContextFreeBSD_powerpc32::~RegisterContextFreeBSD_powerpc32()
-{
-}
+RegisterContextFreeBSD_powerpc32::~RegisterContextFreeBSD_powerpc32() {}
 
-size_t
-RegisterContextFreeBSD_powerpc32::GetGPRSize() const
-{
-    return sizeof(GPR32);
+size_t RegisterContextFreeBSD_powerpc32::GetGPRSize() const {
+  return sizeof(GPR32);
 }
 
-const RegisterInfo *
-RegisterContextFreeBSD_powerpc32::GetRegisterInfo() const
-{
-    //assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
-    return g_register_infos_powerpc32;
+const RegisterInfo *RegisterContextFreeBSD_powerpc32::GetRegisterInfo() const {
+  // assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
+  return g_register_infos_powerpc32;
 }
 
-uint32_t
-RegisterContextFreeBSD_powerpc32::GetRegisterCount () const
-{
-    return static_cast<uint32_t> (sizeof (g_register_infos_powerpc32) / sizeof (g_register_infos_powerpc32 [0]));
+uint32_t RegisterContextFreeBSD_powerpc32::GetRegisterCount() const {
+  return static_cast<uint32_t>(sizeof(g_register_infos_powerpc32) /
+                               sizeof(g_register_infos_powerpc32[0]));
 }
 
-RegisterContextFreeBSD_powerpc64::RegisterContextFreeBSD_powerpc64(const ArchSpec &target_arch) :
-    RegisterContextFreeBSD_powerpc(target_arch)
-{
-}
+RegisterContextFreeBSD_powerpc64::RegisterContextFreeBSD_powerpc64(
+    const ArchSpec &target_arch)
+    : RegisterContextFreeBSD_powerpc(target_arch) {}
 
-RegisterContextFreeBSD_powerpc64::~RegisterContextFreeBSD_powerpc64()
-{
-}
+RegisterContextFreeBSD_powerpc64::~RegisterContextFreeBSD_powerpc64() {}
 
-size_t
-RegisterContextFreeBSD_powerpc64::GetGPRSize() const
-{
-    return sizeof(GPR64);
+size_t RegisterContextFreeBSD_powerpc64::GetGPRSize() const {
+  return sizeof(GPR64);
 }
 
-const RegisterInfo *
-RegisterContextFreeBSD_powerpc64::GetRegisterInfo() const
-{
-    //assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
-    if (m_target_arch.GetMachine() == llvm::Triple::ppc)
-        return g_register_infos_powerpc64_32;
-    return g_register_infos_powerpc64;
+const RegisterInfo *RegisterContextFreeBSD_powerpc64::GetRegisterInfo() const {
+  // assert (m_target_arch.GetCore() == ArchSpec::eCore_powerpc);
+  if (m_target_arch.GetMachine() == llvm::Triple::ppc)
+    return g_register_infos_powerpc64_32;
+  return g_register_infos_powerpc64;
 }
 
-uint32_t
-RegisterContextFreeBSD_powerpc64::GetRegisterCount () const
-{
-    return static_cast<uint32_t> (sizeof (g_register_infos_powerpc64) / sizeof (g_register_infos_powerpc64 [0]));
+uint32_t RegisterContextFreeBSD_powerpc64::GetRegisterCount() const {
+  return static_cast<uint32_t>(sizeof(g_register_infos_powerpc64) /
+                               sizeof(g_register_infos_powerpc64[0]));
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h
index 930683f8..c9a65b1 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h
@@ -1,4 +1,5 @@
-//===-- RegisterContextFreeBSD_powerpc.h -------------------------*- C++ -*-===//
+//===-- RegisterContextFreeBSD_powerpc.h -------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -16,55 +17,41 @@
 // Project includes
 #include "RegisterInfoInterface.h"
 
-class RegisterContextFreeBSD_powerpc:
-    public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_powerpc
+    : public lldb_private::RegisterInfoInterface {
 public:
-    RegisterContextFreeBSD_powerpc(const lldb_private::ArchSpec &target_arch);
-    ~RegisterContextFreeBSD_powerpc() override;
+  RegisterContextFreeBSD_powerpc(const lldb_private::ArchSpec &target_arch);
+  ~RegisterContextFreeBSD_powerpc() override;
 
-    size_t
-    GetGPRSize() const override;
+  size_t GetGPRSize() const override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
-    uint32_t
-    GetRegisterCount() const override;
+  uint32_t GetRegisterCount() const override;
 };
 
-class RegisterContextFreeBSD_powerpc32:
-    public RegisterContextFreeBSD_powerpc
-{
+class RegisterContextFreeBSD_powerpc32 : public RegisterContextFreeBSD_powerpc {
 public:
-    RegisterContextFreeBSD_powerpc32(const lldb_private::ArchSpec &target_arch);
-    ~RegisterContextFreeBSD_powerpc32() override;
+  RegisterContextFreeBSD_powerpc32(const lldb_private::ArchSpec &target_arch);
+  ~RegisterContextFreeBSD_powerpc32() override;
 
-    size_t
-    GetGPRSize() const override;
+  size_t GetGPRSize() const override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
-    uint32_t
-    GetRegisterCount() const override;
+  uint32_t GetRegisterCount() const override;
 };
 
-class RegisterContextFreeBSD_powerpc64:
-    public RegisterContextFreeBSD_powerpc
-{
+class RegisterContextFreeBSD_powerpc64 : public RegisterContextFreeBSD_powerpc {
 public:
-    RegisterContextFreeBSD_powerpc64(const lldb_private::ArchSpec &target_arch);
-    ~RegisterContextFreeBSD_powerpc64() override;
+  RegisterContextFreeBSD_powerpc64(const lldb_private::ArchSpec &target_arch);
+  ~RegisterContextFreeBSD_powerpc64() override;
 
-    size_t
-    GetGPRSize() const override;
+  size_t GetGPRSize() const override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
-    uint32_t
-    GetRegisterCount() const override;
+  uint32_t GetRegisterCount() const override;
 };
 
 #endif // liblldb_RegisterContextFreeBSD_powerpc_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp
index 34f2d18..4bbbd5c 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp
@@ -7,158 +7,142 @@
 //
 //===---------------------------------------------------------------------===//
 
-#include <vector>
-#include "RegisterContextPOSIX_x86.h"
-#include "RegisterContextFreeBSD_i386.h"
 #include "RegisterContextFreeBSD_x86_64.h"
+#include "RegisterContextFreeBSD_i386.h"
+#include "RegisterContextPOSIX_x86.h"
+#include <vector>
 
 using namespace lldb_private;
 using namespace lldb;
 
 // http://svnweb.freebsd.org/base/head/sys/x86/include/reg.h
-typedef struct _GPR
-{
-    uint64_t r15;
-    uint64_t r14;
-    uint64_t r13;
-    uint64_t r12;
-    uint64_t r11;
-    uint64_t r10;
-    uint64_t r9;
-    uint64_t r8;
-    uint64_t rdi;
-    uint64_t rsi;
-    uint64_t rbp;
-    uint64_t rbx;
-    uint64_t rdx;
-    uint64_t rcx;
-    uint64_t rax;
-    uint32_t trapno;
-    uint16_t fs;
-    uint16_t gs;
-    uint32_t err;
-    uint16_t es;
-    uint16_t ds;
-    uint64_t rip;
-    uint64_t cs;
-    uint64_t rflags;
-    uint64_t rsp;
-    uint64_t ss;
+typedef struct _GPR {
+  uint64_t r15;
+  uint64_t r14;
+  uint64_t r13;
+  uint64_t r12;
+  uint64_t r11;
+  uint64_t r10;
+  uint64_t r9;
+  uint64_t r8;
+  uint64_t rdi;
+  uint64_t rsi;
+  uint64_t rbp;
+  uint64_t rbx;
+  uint64_t rdx;
+  uint64_t rcx;
+  uint64_t rax;
+  uint32_t trapno;
+  uint16_t fs;
+  uint16_t gs;
+  uint32_t err;
+  uint16_t es;
+  uint16_t ds;
+  uint64_t rip;
+  uint64_t cs;
+  uint64_t rflags;
+  uint64_t rsp;
+  uint64_t ss;
 } GPR;
 
 struct DBG {
-    uint64_t  dr[16];  /* debug registers */
-                       /* Index 0-3: debug address registers */
-                       /* Index 4-5: reserved */
-                       /* Index 6: debug status */
-                       /* Index 7: debug control */
-                       /* Index 8-15: reserved */
+  uint64_t dr[16]; /* debug registers */
+                   /* Index 0-3: debug address registers */
+                   /* Index 4-5: reserved */
+                   /* Index 6: debug status */
+                   /* Index 7: debug control */
+                   /* Index 8-15: reserved */
 };
 
-struct UserArea
-{
-    GPR gpr;
-    FPR fpr;
-    DBG dbg;
+struct UserArea {
+  GPR gpr;
+  FPR fpr;
+  DBG dbg;
 };
 
-#define DR_OFFSET(reg_index) \
-    (LLVM_EXTENSION offsetof(DBG, dr[reg_index]))
+#define DR_OFFSET(reg_index) (LLVM_EXTENSION offsetof(DBG, dr[reg_index]))
 
 //---------------------------------------------------------------------------
-// Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64 structure.
+// Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64
+// structure.
 //---------------------------------------------------------------------------
 #define DECLARE_REGISTER_INFOS_X86_64_STRUCT
 #include "RegisterInfos_x86_64.h"
 #undef DECLARE_REGISTER_INFOS_X86_64_STRUCT
 
-static std::vector<lldb_private::RegisterInfo>&
-GetSharedRegisterInfoVector ()
-{
-    static std::vector<lldb_private::RegisterInfo> register_infos;
-    return register_infos;
+static std::vector<lldb_private::RegisterInfo> &GetSharedRegisterInfoVector() {
+  static std::vector<lldb_private::RegisterInfo> register_infos;
+  return register_infos;
 }
 
 static const RegisterInfo *
-GetRegisterInfo_i386(const lldb_private::ArchSpec& arch)
-{
-    static std::vector<lldb_private::RegisterInfo> g_register_infos (GetSharedRegisterInfoVector ());
-
-    // Allocate RegisterInfo only once
-    if (g_register_infos.empty())
-    {
-        // Copy the register information from base class
-        std::unique_ptr<RegisterContextFreeBSD_i386> reg_interface(new RegisterContextFreeBSD_i386 (arch));
-        const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
-        g_register_infos.insert(g_register_infos.end(), &base_info[0], &base_info[k_num_registers_i386]);
-
-        //---------------------------------------------------------------------------
-        // Include RegisterInfos_x86_64 to update the g_register_infos structure
-        //  with x86_64 offsets.
-        //---------------------------------------------------------------------------
-        #define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
-        #include "RegisterInfos_x86_64.h"
-        #undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
-    }
-
-    return &g_register_infos[0];
+GetRegisterInfo_i386(const lldb_private::ArchSpec &arch) {
+  static std::vector<lldb_private::RegisterInfo> g_register_infos(
+      GetSharedRegisterInfoVector());
+
+  // Allocate RegisterInfo only once
+  if (g_register_infos.empty()) {
+    // Copy the register information from base class
+    std::unique_ptr<RegisterContextFreeBSD_i386> reg_interface(
+        new RegisterContextFreeBSD_i386(arch));
+    const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
+    g_register_infos.insert(g_register_infos.end(), &base_info[0],
+                            &base_info[k_num_registers_i386]);
+
+//---------------------------------------------------------------------------
+// Include RegisterInfos_x86_64 to update the g_register_infos structure
+//  with x86_64 offsets.
+//---------------------------------------------------------------------------
+#define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
+#include "RegisterInfos_x86_64.h"
+#undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
+  }
+
+  return &g_register_infos[0];
 }
 
 static const RegisterInfo *
-PrivateGetRegisterInfoPtr (const lldb_private::ArchSpec& target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::x86:
-            return GetRegisterInfo_i386 (target_arch);
-        case llvm::Triple::x86_64:
-            return g_register_infos_x86_64;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return nullptr;
-    }
+PrivateGetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::x86:
+    return GetRegisterInfo_i386(target_arch);
+  case llvm::Triple::x86_64:
+    return g_register_infos_x86_64;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return nullptr;
+  }
 }
 
 static uint32_t
-PrivateGetRegisterCount (const lldb_private::ArchSpec& target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::x86:
-            // This vector should have already been filled.
-            assert (!GetSharedRegisterInfoVector ().empty () && "i386 register info vector not filled.");
-            return static_cast<uint32_t> (GetSharedRegisterInfoVector().size ());
-        case llvm::Triple::x86_64:
-            return static_cast<uint32_t> (sizeof (g_register_infos_x86_64) / sizeof (g_register_infos_x86_64 [0]));
-        default:
-            assert(false && "Unhandled target architecture.");
-            return 0;
-    }
+PrivateGetRegisterCount(const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::x86:
+    // This vector should have already been filled.
+    assert(!GetSharedRegisterInfoVector().empty() &&
+           "i386 register info vector not filled.");
+    return static_cast<uint32_t>(GetSharedRegisterInfoVector().size());
+  case llvm::Triple::x86_64:
+    return static_cast<uint32_t>(sizeof(g_register_infos_x86_64) /
+                                 sizeof(g_register_infos_x86_64[0]));
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
 }
 
-RegisterContextFreeBSD_x86_64::RegisterContextFreeBSD_x86_64(const ArchSpec &target_arch) :
-    lldb_private::RegisterInfoInterface(target_arch),
-    m_register_info_p (PrivateGetRegisterInfoPtr (target_arch)),
-    m_register_count (PrivateGetRegisterCount (target_arch))
-{
-}
+RegisterContextFreeBSD_x86_64::RegisterContextFreeBSD_x86_64(
+    const ArchSpec &target_arch)
+    : lldb_private::RegisterInfoInterface(target_arch),
+      m_register_info_p(PrivateGetRegisterInfoPtr(target_arch)),
+      m_register_count(PrivateGetRegisterCount(target_arch)) {}
 
-size_t
-RegisterContextFreeBSD_x86_64::GetGPRSize() const
-{
-    return sizeof(GPR);
-}
+size_t RegisterContextFreeBSD_x86_64::GetGPRSize() const { return sizeof(GPR); }
 
-const RegisterInfo *
-RegisterContextFreeBSD_x86_64::GetRegisterInfo() const
-{
-    return m_register_info_p;
+const RegisterInfo *RegisterContextFreeBSD_x86_64::GetRegisterInfo() const {
+  return m_register_info_p;
 }
 
-uint32_t
-RegisterContextFreeBSD_x86_64::GetRegisterCount () const
-{
-    return m_register_count;
+uint32_t RegisterContextFreeBSD_x86_64::GetRegisterCount() const {
+  return m_register_count;
 }
-
-
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h
index e739fa5..dc30f17 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h
@@ -12,24 +12,20 @@
 
 #include "RegisterInfoInterface.h"
 
-class RegisterContextFreeBSD_x86_64:
-    public lldb_private::RegisterInfoInterface
-{
+class RegisterContextFreeBSD_x86_64
+    : public lldb_private::RegisterInfoInterface {
 public:
-    RegisterContextFreeBSD_x86_64(const lldb_private::ArchSpec &target_arch);
+  RegisterContextFreeBSD_x86_64(const lldb_private::ArchSpec &target_arch);
 
-    size_t
-    GetGPRSize() const override;
+  size_t GetGPRSize() const override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
-    uint32_t
-    GetRegisterCount () const override;
+  uint32_t GetRegisterCount() const override;
 
 private:
-    const lldb_private::RegisterInfo *m_register_info_p;
-    const uint32_t m_register_count;
+  const lldb_private::RegisterInfo *m_register_info_p;
+  const uint32_t m_register_count;
 };
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextHistory.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextHistory.cpp
index 9d21813..0fc47fc 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextHistory.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextHistory.cpp
@@ -1,4 +1,5 @@
-//===-- RegisterContextHistory.cpp ---------------------------------*- C++ -*-===//
+//===-- RegisterContextHistory.cpp ---------------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -7,8 +8,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-
-#include "lldb/lldb-private.h"
 #include "lldb/Core/Address.h"
 #include "lldb/Core/AddressRange.h"
 #include "lldb/Core/DataBufferHeap.h"
@@ -20,119 +19,105 @@
 #include "lldb/Symbol/FuncUnwinders.h"
 #include "lldb/Symbol/Function.h"
 #include "lldb/Symbol/ObjectFile.h"
-#include "lldb/Symbol/SymbolContext.h"
 #include "lldb/Symbol/Symbol.h"
+#include "lldb/Symbol/SymbolContext.h"
 #include "lldb/Target/ABI.h"
+#include "lldb/Target/DynamicLoader.h"
 #include "lldb/Target/ExecutionContext.h"
 #include "lldb/Target/Process.h"
 #include "lldb/Target/StackFrame.h"
 #include "lldb/Target/Target.h"
 #include "lldb/Target/Thread.h"
-#include "lldb/Target/DynamicLoader.h"
+#include "lldb/lldb-private.h"
 
 #include "RegisterContextHistory.h"
 
 using namespace lldb;
 using namespace lldb_private;
 
-RegisterContextHistory::RegisterContextHistory (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size, addr_t pc_value) :
-RegisterContext (thread, concrete_frame_idx),
-    m_pc_value (pc_value)
-{
-    m_reg_set0.name = "General Purpose Registers";
-    m_reg_set0.short_name = "GPR";
-    m_reg_set0.num_registers = 1;
-    m_reg_set0.registers = new uint32_t(0);
-    
-    m_pc_reg_info.name = "pc";
-    m_pc_reg_info.alt_name = "pc";
-    m_pc_reg_info.byte_offset = 0;
-    m_pc_reg_info.byte_size = address_byte_size;
-    m_pc_reg_info.encoding = eEncodingUint;
-    m_pc_reg_info.format = eFormatPointer;
-    m_pc_reg_info.invalidate_regs = NULL;
-    m_pc_reg_info.value_regs = NULL;
-    m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM;
-    m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM;
-    m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
-    m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM;
-    m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM;
+RegisterContextHistory::RegisterContextHistory(Thread &thread,
+                                               uint32_t concrete_frame_idx,
+                                               uint32_t address_byte_size,
+                                               addr_t pc_value)
+    : RegisterContext(thread, concrete_frame_idx), m_pc_value(pc_value) {
+  m_reg_set0.name = "General Purpose Registers";
+  m_reg_set0.short_name = "GPR";
+  m_reg_set0.num_registers = 1;
+  m_reg_set0.registers = new uint32_t(0);
+
+  m_pc_reg_info.name = "pc";
+  m_pc_reg_info.alt_name = "pc";
+  m_pc_reg_info.byte_offset = 0;
+  m_pc_reg_info.byte_size = address_byte_size;
+  m_pc_reg_info.encoding = eEncodingUint;
+  m_pc_reg_info.format = eFormatPointer;
+  m_pc_reg_info.invalidate_regs = NULL;
+  m_pc_reg_info.value_regs = NULL;
+  m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM;
+  m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM;
+  m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC;
+  m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM;
+  m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM;
 }
 
-RegisterContextHistory::~RegisterContextHistory ()
-{
-    delete m_reg_set0.registers;
-    delete m_pc_reg_info.invalidate_regs;
-    delete m_pc_reg_info.value_regs;
+RegisterContextHistory::~RegisterContextHistory() {
+  delete m_reg_set0.registers;
+  delete m_pc_reg_info.invalidate_regs;
+  delete m_pc_reg_info.value_regs;
 }
 
-void
-RegisterContextHistory::InvalidateAllRegisters () {}
+void RegisterContextHistory::InvalidateAllRegisters() {}
 
-size_t
-RegisterContextHistory::GetRegisterCount ()
-{
-    return 1;
-}
+size_t RegisterContextHistory::GetRegisterCount() { return 1; }
 
 const lldb_private::RegisterInfo *
-RegisterContextHistory::GetRegisterInfoAtIndex (size_t reg)
-{
-    if (reg)
-        return NULL;
-    return &m_pc_reg_info;
+RegisterContextHistory::GetRegisterInfoAtIndex(size_t reg) {
+  if (reg)
+    return NULL;
+  return &m_pc_reg_info;
 }
 
-size_t
-RegisterContextHistory::GetRegisterSetCount ()
-{
-    return 1;
-}
+size_t RegisterContextHistory::GetRegisterSetCount() { return 1; }
 
 const lldb_private::RegisterSet *
-RegisterContextHistory::GetRegisterSet (size_t reg_set)
-{
-    if (reg_set)
-        return NULL;
-    return &m_reg_set0;
+RegisterContextHistory::GetRegisterSet(size_t reg_set) {
+  if (reg_set)
+    return NULL;
+  return &m_reg_set0;
 }
 
-bool
-RegisterContextHistory::ReadRegister (const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value)
-{
-    if (!reg_info)
-        return false;
-    uint32_t reg_number = reg_info->kinds[eRegisterKindGeneric];
-    if (reg_number == LLDB_REGNUM_GENERIC_PC)
-    {
-        value.SetUInt(m_pc_value, reg_info->byte_size);
-        return true;
-    }
+bool RegisterContextHistory::ReadRegister(
+    const lldb_private::RegisterInfo *reg_info,
+    lldb_private::RegisterValue &value) {
+  if (!reg_info)
     return false;
+  uint32_t reg_number = reg_info->kinds[eRegisterKindGeneric];
+  if (reg_number == LLDB_REGNUM_GENERIC_PC) {
+    value.SetUInt(m_pc_value, reg_info->byte_size);
+    return true;
+  }
+  return false;
 }
 
-bool
-RegisterContextHistory::WriteRegister (const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value)
-{
-    return false;
+bool RegisterContextHistory::WriteRegister(
+    const lldb_private::RegisterInfo *reg_info,
+    const lldb_private::RegisterValue &value) {
+  return false;
 }
 
-bool
-RegisterContextHistory::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
-    return false;
+bool RegisterContextHistory::ReadAllRegisterValues(
+    lldb::DataBufferSP &data_sp) {
+  return false;
 }
 
-bool
-RegisterContextHistory::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
-    return false;
+bool RegisterContextHistory::WriteAllRegisterValues(
+    const lldb::DataBufferSP &data_sp) {
+  return false;
 }
 
-uint32_t
-RegisterContextHistory::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
-    if (kind == eRegisterKindGeneric && num == LLDB_REGNUM_GENERIC_PC)
-        return 0;
-    return LLDB_INVALID_REGNUM;
+uint32_t RegisterContextHistory::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t num) {
+  if (kind == eRegisterKindGeneric && num == LLDB_REGNUM_GENERIC_PC)
+    return 0;
+  return LLDB_INVALID_REGNUM;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextHistory.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextHistory.h
index 3f44a1f..acaf8fe 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextHistory.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextHistory.h
@@ -1,4 +1,5 @@
-//===-- RegisterContextHistory.h ----------------------------------------*- C++ -*-===//
+//===-- RegisterContextHistory.h ----------------------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -16,64 +17,55 @@
 
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
 #include "lldb/Symbol/SymbolContext.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
 
 namespace lldb_private {
-    
-class RegisterContextHistory : public lldb_private::RegisterContext
-{
+
+class RegisterContextHistory : public lldb_private::RegisterContext {
 public:
-    typedef std::shared_ptr<RegisterContextHistory> SharedPtr;
-    
-    RegisterContextHistory (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size, lldb::addr_t pc_value);
-    
-    ~RegisterContextHistory() override;
+  typedef std::shared_ptr<RegisterContextHistory> SharedPtr;
+
+  RegisterContextHistory(Thread &thread, uint32_t concrete_frame_idx,
+                         uint32_t address_byte_size, lldb::addr_t pc_value);
 
-    void
-    InvalidateAllRegisters() override;
+  ~RegisterContextHistory() override;
 
-    size_t
-    GetRegisterCount() override;
+  void InvalidateAllRegisters() override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
+  size_t GetRegisterCount() override;
 
-    size_t
-    GetRegisterSetCount() override;
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
 
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t reg_set) override;
+  size_t GetRegisterSetCount() override;
 
-    bool
-    ReadRegister(const lldb_private::RegisterInfo *reg_info,
-                 lldb_private::RegisterValue &value) override;
+  const lldb_private::RegisterSet *GetRegisterSet(size_t reg_set) override;
 
-    bool
-    WriteRegister(const lldb_private::RegisterInfo *reg_info,
-                  const lldb_private::RegisterValue &value) override;
+  bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+                    lldb_private::RegisterValue &value) override;
 
-    bool
-    ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+  bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+                     const lldb_private::RegisterValue &value) override;
 
-    bool
-    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+  bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+  bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
 
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-    
 private:
-    //------------------------------------------------------------------
-    // For RegisterContextLLDB only
-    //------------------------------------------------------------------
-    
-    lldb_private::RegisterSet m_reg_set0; // register set 0 (PC only)
-    lldb_private::RegisterInfo m_pc_reg_info;
-
-    lldb::addr_t m_pc_value;
-    
-    DISALLOW_COPY_AND_ASSIGN (RegisterContextHistory);
+  //------------------------------------------------------------------
+  // For RegisterContextLLDB only
+  //------------------------------------------------------------------
+
+  lldb_private::RegisterSet m_reg_set0; // register set 0 (PC only)
+  lldb_private::RegisterInfo m_pc_reg_info;
+
+  lldb::addr_t m_pc_value;
+
+  DISALLOW_COPY_AND_ASSIGN(RegisterContextHistory);
 };
 } // namespace lldb_private
 
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLLDB.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLLDB.cpp
index 8bbaeb8..ba84c40 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLLDB.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLLDB.cpp
@@ -7,8 +7,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-
-#include "lldb/lldb-private.h"
 #include "lldb/Core/Address.h"
 #include "lldb/Core/AddressRange.h"
 #include "lldb/Core/DataBufferHeap.h"
@@ -33,1829 +31,1820 @@
 #include "lldb/Target/StackFrame.h"
 #include "lldb/Target/Target.h"
 #include "lldb/Target/Thread.h"
+#include "lldb/lldb-private.h"
 
 #include "RegisterContextLLDB.h"
 
 using namespace lldb;
 using namespace lldb_private;
 
-static ConstString GetSymbolOrFunctionName(const SymbolContext &sym_ctx)
-{
-    if (sym_ctx.symbol)
-        return sym_ctx.symbol->GetName();
-    else if (sym_ctx.function)
-        return sym_ctx.function->GetName();
-    return ConstString();
+static ConstString GetSymbolOrFunctionName(const SymbolContext &sym_ctx) {
+  if (sym_ctx.symbol)
+    return sym_ctx.symbol->GetName();
+  else if (sym_ctx.function)
+    return sym_ctx.function->GetName();
+  return ConstString();
 }
 
-RegisterContextLLDB::RegisterContextLLDB
-(
-    Thread& thread,
-    const SharedPtr &next_frame,
-    SymbolContext& sym_ctx,
-    uint32_t frame_number,
-    UnwindLLDB& unwind_lldb
-) :
-    RegisterContext (thread, frame_number),
-    m_thread(thread),
-    m_fast_unwind_plan_sp (),
-    m_full_unwind_plan_sp (),
-    m_fallback_unwind_plan_sp (),
-    m_all_registers_available(false),
-    m_frame_type (-1),
-    m_cfa (LLDB_INVALID_ADDRESS),
-    m_start_pc (),
-    m_current_pc (),
-    m_current_offset (0),
-    m_current_offset_backed_up_one (0),
-    m_sym_ctx(sym_ctx),
-    m_sym_ctx_valid (false),
-    m_frame_number (frame_number),
-    m_registers(),
-    m_parent_unwind (unwind_lldb)
-{
-    m_sym_ctx.Clear(false);
-    m_sym_ctx_valid = false;
-
-    if (IsFrameZero ())
-    {
-        InitializeZerothFrame ();
-    }
-    else
-    {
-        InitializeNonZerothFrame ();
-    }
-
-    // This same code exists over in the GetFullUnwindPlanForFrame() but it may not have been executed yet
-    if (IsFrameZero()
-        || next_frame->m_frame_type == eTrapHandlerFrame
-        || next_frame->m_frame_type == eDebuggerFrame)
-    {
-        m_all_registers_available = true;
-    }
+RegisterContextLLDB::RegisterContextLLDB(Thread &thread,
+                                         const SharedPtr &next_frame,
+                                         SymbolContext &sym_ctx,
+                                         uint32_t frame_number,
+                                         UnwindLLDB &unwind_lldb)
+    : RegisterContext(thread, frame_number), m_thread(thread),
+      m_fast_unwind_plan_sp(), m_full_unwind_plan_sp(),
+      m_fallback_unwind_plan_sp(), m_all_registers_available(false),
+      m_frame_type(-1), m_cfa(LLDB_INVALID_ADDRESS), m_start_pc(),
+      m_current_pc(), m_current_offset(0), m_current_offset_backed_up_one(0),
+      m_sym_ctx(sym_ctx), m_sym_ctx_valid(false), m_frame_number(frame_number),
+      m_registers(), m_parent_unwind(unwind_lldb) {
+  m_sym_ctx.Clear(false);
+  m_sym_ctx_valid = false;
+
+  if (IsFrameZero()) {
+    InitializeZerothFrame();
+  } else {
+    InitializeNonZerothFrame();
+  }
+
+  // This same code exists over in the GetFullUnwindPlanForFrame() but it may
+  // not have been executed yet
+  if (IsFrameZero() || next_frame->m_frame_type == eTrapHandlerFrame ||
+      next_frame->m_frame_type == eDebuggerFrame) {
+    m_all_registers_available = true;
+  }
 }
 
-bool
-RegisterContextLLDB::IsUnwindPlanValidForCurrentPC(lldb::UnwindPlanSP unwind_plan_sp, int &valid_pc_offset)
-{
-    if (!unwind_plan_sp)
-        return false;
+bool RegisterContextLLDB::IsUnwindPlanValidForCurrentPC(
+    lldb::UnwindPlanSP unwind_plan_sp, int &valid_pc_offset) {
+  if (!unwind_plan_sp)
+    return false;
 
-    // check if m_current_pc is valid
-    if (unwind_plan_sp->PlanValidAtAddress(m_current_pc))
-    {
-        // yes - current offset can be used as is
-        valid_pc_offset = m_current_offset;
-        return true;
-    }
+  // check if m_current_pc is valid
+  if (unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+    // yes - current offset can be used as is
+    valid_pc_offset = m_current_offset;
+    return true;
+  }
 
-    // if m_current_offset <= 0, we've got nothing else to try
-    if (m_current_offset <= 0)
-        return false;
+  // if m_current_offset <= 0, we've got nothing else to try
+  if (m_current_offset <= 0)
+    return false;
 
-    // check pc - 1 to see if it's valid
-    Address pc_minus_one (m_current_pc);
-    pc_minus_one.SetOffset(m_current_pc.GetOffset() - 1);
-    if (unwind_plan_sp->PlanValidAtAddress(pc_minus_one))
-    {
-        // *valid_pc_offset = m_current_offset - 1;
-        valid_pc_offset = m_current_pc.GetOffset() - 1;
-        return true;
-    }
+  // check pc - 1 to see if it's valid
+  Address pc_minus_one(m_current_pc);
+  pc_minus_one.SetOffset(m_current_pc.GetOffset() - 1);
+  if (unwind_plan_sp->PlanValidAtAddress(pc_minus_one)) {
+    // *valid_pc_offset = m_current_offset - 1;
+    valid_pc_offset = m_current_pc.GetOffset() - 1;
+    return true;
+  }
 
-    return false;
+  return false;
 }
 
-// Initialize a RegisterContextLLDB which is the first frame of a stack -- the zeroth frame or currently
+// Initialize a RegisterContextLLDB which is the first frame of a stack -- the
+// zeroth frame or currently
 // executing frame.
 
-void
-RegisterContextLLDB::InitializeZerothFrame()
-{
-    Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
-    ExecutionContext exe_ctx(m_thread.shared_from_this());
-    RegisterContextSP reg_ctx_sp = m_thread.GetRegisterContext();
-
-    if (reg_ctx_sp.get() == NULL)
-    {
-        m_frame_type = eNotAValidFrame;
-        UnwindLogMsg ("frame does not have a register context");
-        return;
-    }
-
-    addr_t current_pc = reg_ctx_sp->GetPC();
+void RegisterContextLLDB::InitializeZerothFrame() {
+  Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+  ExecutionContext exe_ctx(m_thread.shared_from_this());
+  RegisterContextSP reg_ctx_sp = m_thread.GetRegisterContext();
 
-    if (current_pc == LLDB_INVALID_ADDRESS)
-    {
-        m_frame_type = eNotAValidFrame;
-        UnwindLogMsg ("frame does not have a pc");
-        return;
-    }
-
-    Process *process = exe_ctx.GetProcessPtr();
-
-    // Let ABIs fixup code addresses to make sure they are valid. In ARM ABIs
-    // this will strip bit zero in case we read a PC from memory or from the LR.
-    // (which would be a no-op in frame 0 where we get it from the register set,
-    // but still a good idea to make the call here for other ABIs that may exist.)
-    ABI *abi = process->GetABI().get();
-    if (abi)
-        current_pc = abi->FixCodeAddress(current_pc);
-
-    // Initialize m_current_pc, an Address object, based on current_pc, an addr_t.
-    m_current_pc.SetLoadAddress (current_pc, &process->GetTarget());
-
-    // If we don't have a Module for some reason, we're not going to find symbol/function information - just
-    // stick in some reasonable defaults and hope we can unwind past this frame.
-    ModuleSP pc_module_sp (m_current_pc.GetModule());
-    if (!m_current_pc.IsValid() || !pc_module_sp)
-    {
-        UnwindLogMsg ("using architectural default unwind method");
-    }
+  if (reg_ctx_sp.get() == NULL) {
+    m_frame_type = eNotAValidFrame;
+    UnwindLogMsg("frame does not have a register context");
+    return;
+  }
 
-    // We require either a symbol or function in the symbols context to be successfully
-    // filled in or this context is of no use to us.
-    const uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
-    if (pc_module_sp.get()
-        && (pc_module_sp->ResolveSymbolContextForAddress (m_current_pc, resolve_scope, m_sym_ctx) & resolve_scope))
-    {
-        m_sym_ctx_valid = true;
-    }
+  addr_t current_pc = reg_ctx_sp->GetPC();
 
-    if (m_sym_ctx.symbol)
-    {
-        UnwindLogMsg ("with pc value of 0x%" PRIx64 ", symbol name is '%s'",
-                      current_pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
-    }
-    else if (m_sym_ctx.function)
-    {
-        UnwindLogMsg ("with pc value of 0x%" PRIx64 ", function name is '%s'",
-                      current_pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
-    }
-    else
-    {
-        UnwindLogMsg ("with pc value of 0x%" PRIx64 ", no symbol/function name is known.", current_pc);
-    }
-
-    AddressRange addr_range;
-    m_sym_ctx.GetAddressRange (resolve_scope, 0, false, addr_range);
+  if (current_pc == LLDB_INVALID_ADDRESS) {
+    m_frame_type = eNotAValidFrame;
+    UnwindLogMsg("frame does not have a pc");
+    return;
+  }
+
+  Process *process = exe_ctx.GetProcessPtr();
+
+  // Let ABIs fixup code addresses to make sure they are valid. In ARM ABIs
+  // this will strip bit zero in case we read a PC from memory or from the LR.
+  // (which would be a no-op in frame 0 where we get it from the register set,
+  // but still a good idea to make the call here for other ABIs that may exist.)
+  ABI *abi = process->GetABI().get();
+  if (abi)
+    current_pc = abi->FixCodeAddress(current_pc);
+
+  // Initialize m_current_pc, an Address object, based on current_pc, an addr_t.
+  m_current_pc.SetLoadAddress(current_pc, &process->GetTarget());
+
+  // If we don't have a Module for some reason, we're not going to find
+  // symbol/function information - just
+  // stick in some reasonable defaults and hope we can unwind past this frame.
+  ModuleSP pc_module_sp(m_current_pc.GetModule());
+  if (!m_current_pc.IsValid() || !pc_module_sp) {
+    UnwindLogMsg("using architectural default unwind method");
+  }
+
+  // We require either a symbol or function in the symbols context to be
+  // successfully
+  // filled in or this context is of no use to us.
+  const uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
+  if (pc_module_sp.get() && (pc_module_sp->ResolveSymbolContextForAddress(
+                                 m_current_pc, resolve_scope, m_sym_ctx) &
+                             resolve_scope)) {
+    m_sym_ctx_valid = true;
+  }
+
+  if (m_sym_ctx.symbol) {
+    UnwindLogMsg("with pc value of 0x%" PRIx64 ", symbol name is '%s'",
+                 current_pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+  } else if (m_sym_ctx.function) {
+    UnwindLogMsg("with pc value of 0x%" PRIx64 ", function name is '%s'",
+                 current_pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+  } else {
+    UnwindLogMsg("with pc value of 0x%" PRIx64
+                 ", no symbol/function name is known.",
+                 current_pc);
+  }
+
+  AddressRange addr_range;
+  m_sym_ctx.GetAddressRange(resolve_scope, 0, false, addr_range);
+
+  if (IsTrapHandlerSymbol(process, m_sym_ctx)) {
+    m_frame_type = eTrapHandlerFrame;
+  } else {
+    // FIXME:  Detect eDebuggerFrame here.
+    m_frame_type = eNormalFrame;
+  }
+
+  // If we were able to find a symbol/function, set addr_range to the bounds of
+  // that symbol/function.
+  // else treat the current pc value as the start_pc and record no offset.
+  if (addr_range.GetBaseAddress().IsValid()) {
+    m_start_pc = addr_range.GetBaseAddress();
+    if (m_current_pc.GetSection() == m_start_pc.GetSection()) {
+      m_current_offset = m_current_pc.GetOffset() - m_start_pc.GetOffset();
+    } else if (m_current_pc.GetModule() == m_start_pc.GetModule()) {
+      // This means that whatever symbol we kicked up isn't really correct
+      // --- we should not cross section boundaries ... We really should NULL
+      // out
+      // the function/symbol in this case unless there is a bad assumption
+      // here due to inlined functions?
+      m_current_offset =
+          m_current_pc.GetFileAddress() - m_start_pc.GetFileAddress();
+    }
+    m_current_offset_backed_up_one = m_current_offset;
+  } else {
+    m_start_pc = m_current_pc;
+    m_current_offset = -1;
+    m_current_offset_backed_up_one = -1;
+  }
+
+  // We've set m_frame_type and m_sym_ctx before these calls.
+
+  m_fast_unwind_plan_sp = GetFastUnwindPlanForFrame();
+  m_full_unwind_plan_sp = GetFullUnwindPlanForFrame();
+
+  UnwindPlan::RowSP active_row;
+  lldb::RegisterKind row_register_kind = eRegisterKindGeneric;
+  if (m_full_unwind_plan_sp &&
+      m_full_unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+    active_row =
+        m_full_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+    row_register_kind = m_full_unwind_plan_sp->GetRegisterKind();
+    if (active_row.get() && log) {
+      StreamString active_row_strm;
+      active_row->Dump(active_row_strm, m_full_unwind_plan_sp.get(), &m_thread,
+                       m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
+      UnwindLogMsg("%s", active_row_strm.GetData());
+    }
+  }
+
+  if (!active_row.get()) {
+    UnwindLogMsg("could not find an unwindplan row for this frame's pc");
+    m_frame_type = eNotAValidFrame;
+    return;
+  }
 
-    if (IsTrapHandlerSymbol (process, m_sym_ctx))
-    {
-        m_frame_type = eTrapHandlerFrame;
-    }
-    else
-    {
-        // FIXME:  Detect eDebuggerFrame here.
-        m_frame_type = eNormalFrame;
-    }
+  if (!ReadCFAValueForRow(row_register_kind, active_row, m_cfa)) {
+    // Try the fall back unwind plan since the
+    // full unwind plan failed.
+    FuncUnwindersSP func_unwinders_sp;
+    UnwindPlanSP call_site_unwind_plan;
+    bool cfa_status = false;
 
-    // If we were able to find a symbol/function, set addr_range to the bounds of that symbol/function.
-    // else treat the current pc value as the start_pc and record no offset.
-    if (addr_range.GetBaseAddress().IsValid())
-    {
-        m_start_pc = addr_range.GetBaseAddress();
-        if (m_current_pc.GetSection() == m_start_pc.GetSection())
-        {
-            m_current_offset = m_current_pc.GetOffset() - m_start_pc.GetOffset();
-        }
-        else if (m_current_pc.GetModule() == m_start_pc.GetModule())
-        {
-            // This means that whatever symbol we kicked up isn't really correct
-            // --- we should not cross section boundaries ... We really should NULL out
-            // the function/symbol in this case unless there is a bad assumption
-            // here due to inlined functions?
-            m_current_offset = m_current_pc.GetFileAddress() - m_start_pc.GetFileAddress();
-        }
-        m_current_offset_backed_up_one = m_current_offset;
-    }
-    else
-    {
-        m_start_pc = m_current_pc;
-        m_current_offset = -1;
-        m_current_offset_backed_up_one = -1;
+    if (m_sym_ctx_valid) {
+      func_unwinders_sp =
+          pc_module_sp->GetObjectFile()
+              ->GetUnwindTable()
+              .GetFuncUnwindersContainingAddress(m_current_pc, m_sym_ctx);
     }
 
-    // We've set m_frame_type and m_sym_ctx before these calls.
+    if (func_unwinders_sp.get() != nullptr)
+      call_site_unwind_plan = func_unwinders_sp->GetUnwindPlanAtCallSite(
+          process->GetTarget(), m_current_offset_backed_up_one);
 
-    m_fast_unwind_plan_sp = GetFastUnwindPlanForFrame ();
-    m_full_unwind_plan_sp = GetFullUnwindPlanForFrame ();
-
-    UnwindPlan::RowSP active_row;
-    lldb::RegisterKind row_register_kind = eRegisterKindGeneric;
-    if (m_full_unwind_plan_sp && m_full_unwind_plan_sp->PlanValidAtAddress (m_current_pc))
-    {
-        active_row = m_full_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
-        row_register_kind = m_full_unwind_plan_sp->GetRegisterKind ();
-        if (active_row.get() && log)
-        {
-            StreamString active_row_strm;
-            active_row->Dump(active_row_strm, m_full_unwind_plan_sp.get(), &m_thread, m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
-            UnwindLogMsg ("%s", active_row_strm.GetString().c_str());
-        }
+    if (call_site_unwind_plan.get() != nullptr) {
+      m_fallback_unwind_plan_sp = call_site_unwind_plan;
+      if (TryFallbackUnwindPlan())
+        cfa_status = true;
     }
-
-    if (!active_row.get())
-    {
-        UnwindLogMsg ("could not find an unwindplan row for this frame's pc");
-        m_frame_type = eNotAValidFrame;
-        return;
-    }
-
-
-    if (!ReadCFAValueForRow (row_register_kind, active_row, m_cfa))
-    {
-        // Try the fall back unwind plan since the
-        // full unwind plan failed.
-        FuncUnwindersSP func_unwinders_sp;
-        UnwindPlanSP call_site_unwind_plan;
-        bool cfa_status = false;
-
-        if (m_sym_ctx_valid)
-        {
-            func_unwinders_sp = pc_module_sp->GetObjectFile()->GetUnwindTable().GetFuncUnwindersContainingAddress (m_current_pc, m_sym_ctx);
-        }
-
-        if(func_unwinders_sp.get() != nullptr)
-            call_site_unwind_plan = func_unwinders_sp->GetUnwindPlanAtCallSite(process->GetTarget(), m_current_offset_backed_up_one);
-
-        if (call_site_unwind_plan.get() != nullptr)
-        {
-            m_fallback_unwind_plan_sp = call_site_unwind_plan;
-            if(TryFallbackUnwindPlan())
-                cfa_status = true;
-        }
-        if (!cfa_status)
-        {
-            UnwindLogMsg ("could not read CFA value for first frame.");
-            m_frame_type = eNotAValidFrame;
-            return;
-        }
+    if (!cfa_status) {
+      UnwindLogMsg("could not read CFA value for first frame.");
+      m_frame_type = eNotAValidFrame;
+      return;
     }
+  }
 
-    UnwindLogMsg ("initialized frame current pc is 0x%" PRIx64 " cfa is 0x%" PRIx64 " using %s UnwindPlan",
-            (uint64_t) m_current_pc.GetLoadAddress (exe_ctx.GetTargetPtr()),
-            (uint64_t) m_cfa,
-            m_full_unwind_plan_sp->GetSourceName().GetCString());
+  UnwindLogMsg("initialized frame current pc is 0x%" PRIx64 " cfa is 0x%" PRIx64
+               " using %s UnwindPlan",
+               (uint64_t)m_current_pc.GetLoadAddress(exe_ctx.GetTargetPtr()),
+               (uint64_t)m_cfa,
+               m_full_unwind_plan_sp->GetSourceName().GetCString());
 }
 
-// Initialize a RegisterContextLLDB for the non-zeroth frame -- rely on the RegisterContextLLDB "below" it
+// Initialize a RegisterContextLLDB for the non-zeroth frame -- rely on the
+// RegisterContextLLDB "below" it
 // to provide things like its current pc value.
 
-void
-RegisterContextLLDB::InitializeNonZerothFrame()
-{
-    Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
-    if (IsFrameZero ())
-    {
-        m_frame_type = eNotAValidFrame;
-        UnwindLogMsg ("non-zeroth frame tests positive for IsFrameZero -- that shouldn't happen.");
-        return;
-    }
-
-    if (!GetNextFrame().get() || !GetNextFrame()->IsValid())
-    {
-        m_frame_type = eNotAValidFrame;
-        UnwindLogMsg ("Could not get next frame, marking this frame as invalid.");
-        return;
-    }
-    if (!m_thread.GetRegisterContext())
-    {
-        m_frame_type = eNotAValidFrame;
-        UnwindLogMsg ("Could not get register context for this thread, marking this frame as invalid.");
-        return;
-    }
+void RegisterContextLLDB::InitializeNonZerothFrame() {
+  Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+  if (IsFrameZero()) {
+    m_frame_type = eNotAValidFrame;
+    UnwindLogMsg("non-zeroth frame tests positive for IsFrameZero -- that "
+                 "shouldn't happen.");
+    return;
+  }
 
-    addr_t pc;
-    if (!ReadGPRValue (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, pc))
-    {
-        UnwindLogMsg ("could not get pc value");
+  if (!GetNextFrame().get() || !GetNextFrame()->IsValid()) {
+    m_frame_type = eNotAValidFrame;
+    UnwindLogMsg("Could not get next frame, marking this frame as invalid.");
+    return;
+  }
+  if (!m_thread.GetRegisterContext()) {
+    m_frame_type = eNotAValidFrame;
+    UnwindLogMsg("Could not get register context for this thread, marking this "
+                 "frame as invalid.");
+    return;
+  }
+
+  addr_t pc;
+  if (!ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, pc)) {
+    UnwindLogMsg("could not get pc value");
+    m_frame_type = eNotAValidFrame;
+    return;
+  }
+
+  if (log) {
+    UnwindLogMsg("pc = 0x%" PRIx64, pc);
+    addr_t reg_val;
+    if (ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FP, reg_val))
+      UnwindLogMsg("fp = 0x%" PRIx64, reg_val);
+    if (ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, reg_val))
+      UnwindLogMsg("sp = 0x%" PRIx64, reg_val);
+  }
+
+  // A pc of 0x0 means it's the end of the stack crawl unless we're above a trap
+  // handler function
+  bool above_trap_handler = false;
+  if (GetNextFrame().get() && GetNextFrame()->IsValid() &&
+      GetNextFrame()->IsTrapHandlerFrame())
+    above_trap_handler = true;
+
+  if (pc == 0 || pc == 0x1) {
+    if (above_trap_handler == false) {
+      m_frame_type = eNotAValidFrame;
+      UnwindLogMsg("this frame has a pc of 0x0");
+      return;
+    }
+  }
+
+  ExecutionContext exe_ctx(m_thread.shared_from_this());
+  Process *process = exe_ctx.GetProcessPtr();
+  // Let ABIs fixup code addresses to make sure they are valid. In ARM ABIs
+  // this will strip bit zero in case we read a PC from memory or from the LR.
+  ABI *abi = process->GetABI().get();
+  if (abi)
+    pc = abi->FixCodeAddress(pc);
+
+  m_current_pc.SetLoadAddress(pc, &process->GetTarget());
+
+  // If we don't have a Module for some reason, we're not going to find
+  // symbol/function information - just
+  // stick in some reasonable defaults and hope we can unwind past this frame.
+  ModuleSP pc_module_sp(m_current_pc.GetModule());
+  if (!m_current_pc.IsValid() || !pc_module_sp) {
+    UnwindLogMsg("using architectural default unwind method");
+
+    // Test the pc value to see if we know it's in an unmapped/non-executable
+    // region of memory.
+    uint32_t permissions;
+    if (process->GetLoadAddressPermissions(pc, permissions) &&
+        (permissions & ePermissionsExecutable) == 0) {
+      // If this is the second frame off the stack, we may have unwound the
+      // first frame
+      // incorrectly.  But using the architecture default unwind plan may get us
+      // back on
+      // track -- albeit possibly skipping a real frame.  Give this frame a
+      // clearly-invalid
+      // pc and see if we can get any further.
+      if (GetNextFrame().get() && GetNextFrame()->IsValid() &&
+          GetNextFrame()->IsFrameZero()) {
+        UnwindLogMsg("had a pc of 0x%" PRIx64 " which is not in executable "
+                                              "memory but on frame 1 -- "
+                                              "allowing it once.",
+                     (uint64_t)pc);
+        m_frame_type = eSkipFrame;
+      } else {
+        // anywhere other than the second frame, a non-executable pc means we're
+        // off in the weeds -- stop now.
         m_frame_type = eNotAValidFrame;
+        UnwindLogMsg("pc is in a non-executable section of memory and this "
+                     "isn't the 2nd frame in the stack walk.");
         return;
+      }
     }
 
-    if (log)
-    {
-        UnwindLogMsg ("pc = 0x%" PRIx64, pc);
-        addr_t reg_val;
-        if (ReadGPRValue (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FP, reg_val))
-            UnwindLogMsg ("fp = 0x%" PRIx64, reg_val);
-        if (ReadGPRValue (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, reg_val))
-            UnwindLogMsg ("sp = 0x%" PRIx64, reg_val);
-    }
-
-    // A pc of 0x0 means it's the end of the stack crawl unless we're above a trap handler function
-    bool above_trap_handler = false;
-    if (GetNextFrame().get() && GetNextFrame()->IsValid() && GetNextFrame()->IsTrapHandlerFrame())
-        above_trap_handler = true;
-
-    if (pc == 0 || pc == 0x1)
-    {
-        if (above_trap_handler == false)
-        {
+    if (abi) {
+      m_fast_unwind_plan_sp.reset();
+      m_full_unwind_plan_sp.reset(new UnwindPlan(lldb::eRegisterKindGeneric));
+      abi->CreateDefaultUnwindPlan(*m_full_unwind_plan_sp);
+      if (m_frame_type != eSkipFrame) // don't override eSkipFrame
+      {
+        m_frame_type = eNormalFrame;
+      }
+      m_all_registers_available = false;
+      m_current_offset = -1;
+      m_current_offset_backed_up_one = -1;
+      RegisterKind row_register_kind = m_full_unwind_plan_sp->GetRegisterKind();
+      UnwindPlan::RowSP row = m_full_unwind_plan_sp->GetRowForFunctionOffset(0);
+      if (row.get()) {
+        if (!ReadCFAValueForRow(row_register_kind, row, m_cfa)) {
+          UnwindLogMsg("failed to get cfa value");
+          if (m_frame_type != eSkipFrame) // don't override eSkipFrame
+          {
             m_frame_type = eNotAValidFrame;
-            UnwindLogMsg ("this frame has a pc of 0x0");
-            return;
+          }
+          return;
         }
-    }
 
-    ExecutionContext exe_ctx(m_thread.shared_from_this());
-    Process *process = exe_ctx.GetProcessPtr();
-    // Let ABIs fixup code addresses to make sure they are valid. In ARM ABIs
-    // this will strip bit zero in case we read a PC from memory or from the LR.
-    ABI *abi = process->GetABI().get();
-    if (abi)
-        pc = abi->FixCodeAddress(pc);
-
-    m_current_pc.SetLoadAddress (pc, &process->GetTarget());
-
-    // If we don't have a Module for some reason, we're not going to find symbol/function information - just
-    // stick in some reasonable defaults and hope we can unwind past this frame.
-    ModuleSP pc_module_sp (m_current_pc.GetModule());
-    if (!m_current_pc.IsValid() || !pc_module_sp)
-    {
-        UnwindLogMsg ("using architectural default unwind method");
-
-        // Test the pc value to see if we know it's in an unmapped/non-executable region of memory.
-        uint32_t permissions;
-        if (process->GetLoadAddressPermissions(pc, permissions)
-            && (permissions & ePermissionsExecutable) == 0)
-        {
-            // If this is the second frame off the stack, we may have unwound the first frame
-            // incorrectly.  But using the architecture default unwind plan may get us back on
-            // track -- albeit possibly skipping a real frame.  Give this frame a clearly-invalid
-            // pc and see if we can get any further.
-            if (GetNextFrame().get() && GetNextFrame()->IsValid() && GetNextFrame()->IsFrameZero())
-            {
-                UnwindLogMsg ("had a pc of 0x%" PRIx64 " which is not in executable memory but on frame 1 -- allowing it once.",
-                         (uint64_t) pc);
-                m_frame_type = eSkipFrame;
-            }
-            else
-            {
-                // anywhere other than the second frame, a non-executable pc means we're off in the weeds -- stop now.
-                m_frame_type = eNotAValidFrame;
-                UnwindLogMsg ("pc is in a non-executable section of memory and this isn't the 2nd frame in the stack walk.");
-                return;
-            }
+        // A couple of sanity checks..
+        if (m_cfa == LLDB_INVALID_ADDRESS || m_cfa == 0 || m_cfa == 1) {
+          UnwindLogMsg("could not find a valid cfa address");
+          m_frame_type = eNotAValidFrame;
+          return;
         }
 
-        if (abi)
-        {
-            m_fast_unwind_plan_sp.reset ();
-            m_full_unwind_plan_sp.reset (new UnwindPlan (lldb::eRegisterKindGeneric));
-            abi->CreateDefaultUnwindPlan(*m_full_unwind_plan_sp);
-            if (m_frame_type != eSkipFrame)  // don't override eSkipFrame
-            {
-                m_frame_type = eNormalFrame;
-            }
-            m_all_registers_available = false;
-            m_current_offset = -1;
-            m_current_offset_backed_up_one = -1;
-            RegisterKind row_register_kind = m_full_unwind_plan_sp->GetRegisterKind ();
-            UnwindPlan::RowSP row = m_full_unwind_plan_sp->GetRowForFunctionOffset(0);
-            if (row.get())
-            {
-                if (!ReadCFAValueForRow (row_register_kind, row, m_cfa))
-                {
-                    UnwindLogMsg ("failed to get cfa value");
-                    if (m_frame_type != eSkipFrame)   // don't override eSkipFrame
-                    {
-                        m_frame_type = eNotAValidFrame;
-                    }
-                    return;
-                }
-
-                // A couple of sanity checks..
-                if (m_cfa == LLDB_INVALID_ADDRESS || m_cfa == 0 || m_cfa == 1)
-                {
-                    UnwindLogMsg ("could not find a valid cfa address");
-                    m_frame_type = eNotAValidFrame;
-                    return;
-                }
-
-                // m_cfa should point into the stack memory; if we can query memory region permissions,
-                // see if the memory is allocated & readable.
-                if (process->GetLoadAddressPermissions(m_cfa, permissions)
-                    && (permissions & ePermissionsReadable) == 0)
-                {
-                    m_frame_type = eNotAValidFrame;
-                    UnwindLogMsg ("the CFA points to a region of memory that is not readable");
-                    return;
-                }
-            }
-            else
-            {
-                UnwindLogMsg ("could not find a row for function offset zero");
-                m_frame_type = eNotAValidFrame;
-                return;
-            }
-
-            if (CheckIfLoopingStack ())
-            {
-                TryFallbackUnwindPlan();
-                if (CheckIfLoopingStack ())
-                {
-                    UnwindLogMsg ("same CFA address as next frame, assuming the unwind is looping - stopping");
-                    m_frame_type = eNotAValidFrame;
-                    return;
-                }
-            }
-
-            UnwindLogMsg ("initialized frame cfa is 0x%" PRIx64, (uint64_t) m_cfa);
-            return;
+        // m_cfa should point into the stack memory; if we can query memory
+        // region permissions,
+        // see if the memory is allocated & readable.
+        if (process->GetLoadAddressPermissions(m_cfa, permissions) &&
+            (permissions & ePermissionsReadable) == 0) {
+          m_frame_type = eNotAValidFrame;
+          UnwindLogMsg(
+              "the CFA points to a region of memory that is not readable");
+          return;
         }
+      } else {
+        UnwindLogMsg("could not find a row for function offset zero");
         m_frame_type = eNotAValidFrame;
-        UnwindLogMsg ("could not find any symbol for this pc, or a default unwind plan, to continue unwind.");
         return;
-    }
-
-    bool resolve_tail_call_address = false; // m_current_pc can be one past the address range of the function...
-                                            // If the saved pc does not point to a function/symbol because it is
-                                            // beyond the bounds of the correct function and there's no symbol there,
-                                            // we do *not* want ResolveSymbolContextForAddress to back up the pc by 1,
-                                            // because then we might not find the correct unwind information later.
-                                            // Instead, let ResolveSymbolContextForAddress fail, and handle the case
-                                            // via decr_pc_and_recompute_addr_range below.
-    const uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
-    uint32_t resolved_scope = pc_module_sp->ResolveSymbolContextForAddress (m_current_pc,
-                                                                            resolve_scope,
-                                                                            m_sym_ctx, resolve_tail_call_address);
-
-    // We require either a symbol or function in the symbols context to be successfully
-    // filled in or this context is of no use to us.
-    if (resolve_scope & resolved_scope)
-    {
-        m_sym_ctx_valid = true;
-    }
-
-    if (m_sym_ctx.symbol)
-    {
-        UnwindLogMsg ("with pc value of 0x%" PRIx64 ", symbol name is '%s'",
-                      pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
-    }
-    else if (m_sym_ctx.function)
-    {
-        UnwindLogMsg ("with pc value of 0x%" PRIx64 ", function name is '%s'",
-                      pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
-    }
-    else
-    {
-        UnwindLogMsg ("with pc value of 0x%" PRIx64 ", no symbol/function name is known.", pc);
-    }
+      }
 
-    AddressRange addr_range;
-    if (!m_sym_ctx.GetAddressRange (resolve_scope, 0, false, addr_range))
-    {
-        m_sym_ctx_valid = false;
-    }
-
-    bool decr_pc_and_recompute_addr_range = false;
-
-    // If the symbol lookup failed...
-    if (m_sym_ctx_valid == false)
-       decr_pc_and_recompute_addr_range = true;
-
-    // Or if we're in the middle of the stack (and not "above" an asynchronous event like sigtramp),
-    // and our "current" pc is the start of a function...
-    if (m_sym_ctx_valid
-        && GetNextFrame()->m_frame_type != eTrapHandlerFrame
-        && GetNextFrame()->m_frame_type != eDebuggerFrame
-        && addr_range.GetBaseAddress().IsValid()
-        && addr_range.GetBaseAddress().GetSection() == m_current_pc.GetSection()
-        && addr_range.GetBaseAddress().GetOffset() == m_current_pc.GetOffset())
-    {
-        decr_pc_and_recompute_addr_range = true;
-    }
-
-    // We need to back up the pc by 1 byte and re-search for the Symbol to handle the case where the "saved pc"
-    // value is pointing to the next function, e.g. if a function ends with a CALL instruction.
-    // FIXME this may need to be an architectural-dependent behavior; if so we'll need to add a member function
-    // to the ABI plugin and consult that.
-    if (decr_pc_and_recompute_addr_range)
-    {
-        UnwindLogMsg ("Backing up the pc value of 0x%" PRIx64 " by 1 and re-doing symbol lookup; old symbol was %s",
-                      pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
-        Address temporary_pc;
-        temporary_pc.SetLoadAddress (pc - 1, &process->GetTarget());
-        m_sym_ctx.Clear (false);
-        m_sym_ctx_valid = false;
-        uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
-        
-        ModuleSP temporary_module_sp = temporary_pc.GetModule();
-        if (temporary_module_sp &&
-            temporary_module_sp->ResolveSymbolContextForAddress (temporary_pc, resolve_scope, m_sym_ctx) & resolve_scope)
-        {
-            if (m_sym_ctx.GetAddressRange (resolve_scope, 0, false,  addr_range))
-                m_sym_ctx_valid = true;
-        }
-        UnwindLogMsg ("Symbol is now %s", GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
-    }
-
-    // If we were able to find a symbol/function, set addr_range_ptr to the bounds of that symbol/function.
-    // else treat the current pc value as the start_pc and record no offset.
-    if (addr_range.GetBaseAddress().IsValid())
-    {
-        m_start_pc = addr_range.GetBaseAddress();
-        m_current_offset = pc - m_start_pc.GetLoadAddress (&process->GetTarget());
-        m_current_offset_backed_up_one = m_current_offset;
-        if (decr_pc_and_recompute_addr_range && m_current_offset_backed_up_one > 0)
-        {
-            m_current_offset_backed_up_one--;
-            if (m_sym_ctx_valid)
-            {
-                m_current_pc.SetLoadAddress (pc - 1, &process->GetTarget());
-            }
-        }
-    }
-    else
-    {
-        m_start_pc = m_current_pc;
-        m_current_offset = -1;
-        m_current_offset_backed_up_one = -1;
-    }
-
-    if (IsTrapHandlerSymbol (process, m_sym_ctx))
-    {
-        m_frame_type = eTrapHandlerFrame;
-    }
-    else
-    {
-        // FIXME:  Detect eDebuggerFrame here.
-        if (m_frame_type != eSkipFrame) // don't override eSkipFrame
-        {
-            m_frame_type = eNormalFrame;
+      if (CheckIfLoopingStack()) {
+        TryFallbackUnwindPlan();
+        if (CheckIfLoopingStack()) {
+          UnwindLogMsg("same CFA address as next frame, assuming the unwind is "
+                       "looping - stopping");
+          m_frame_type = eNotAValidFrame;
+          return;
         }
-    }
-
-    // We've set m_frame_type and m_sym_ctx before this call.
-    m_fast_unwind_plan_sp = GetFastUnwindPlanForFrame ();
+      }
 
-    UnwindPlan::RowSP active_row;
-    RegisterKind row_register_kind = eRegisterKindGeneric;
-
-    // Try to get by with just the fast UnwindPlan if possible - the full UnwindPlan may be expensive to get
-    // (e.g. if we have to parse the entire eh_frame section of an ObjectFile for the first time.)
-
-    if (m_fast_unwind_plan_sp && m_fast_unwind_plan_sp->PlanValidAtAddress (m_current_pc))
-    {
-        active_row = m_fast_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
-        row_register_kind = m_fast_unwind_plan_sp->GetRegisterKind ();
-        if (active_row.get() && log)
-        {
-            StreamString active_row_strm;
-            active_row->Dump(active_row_strm, m_fast_unwind_plan_sp.get(), &m_thread, m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
-            UnwindLogMsg ("active row: %s", active_row_strm.GetString().c_str());
-        }
-    }
-    else
-    {
-        m_full_unwind_plan_sp = GetFullUnwindPlanForFrame ();
-        int valid_offset = -1;
-        if (IsUnwindPlanValidForCurrentPC(m_full_unwind_plan_sp, valid_offset))
-        {
-            active_row = m_full_unwind_plan_sp->GetRowForFunctionOffset (valid_offset);
-            row_register_kind = m_full_unwind_plan_sp->GetRegisterKind ();
-            if (active_row.get() && log)
-            {
-                StreamString active_row_strm;
-                active_row->Dump(active_row_strm, m_full_unwind_plan_sp.get(), &m_thread, m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
-                UnwindLogMsg ("active row: %s", active_row_strm.GetString().c_str());
-            }
-        }
+      UnwindLogMsg("initialized frame cfa is 0x%" PRIx64, (uint64_t)m_cfa);
+      return;
     }
-
-    if (!active_row.get())
-    {
-        m_frame_type = eNotAValidFrame;
-        UnwindLogMsg ("could not find unwind row for this pc");
-        return;
+    m_frame_type = eNotAValidFrame;
+    UnwindLogMsg("could not find any symbol for this pc, or a default unwind "
+                 "plan, to continue unwind.");
+    return;
+  }
+
+  bool resolve_tail_call_address = false; // m_current_pc can be one past the
+                                          // address range of the function...
+  // If the saved pc does not point to a function/symbol because it is
+  // beyond the bounds of the correct function and there's no symbol there,
+  // we do *not* want ResolveSymbolContextForAddress to back up the pc by 1,
+  // because then we might not find the correct unwind information later.
+  // Instead, let ResolveSymbolContextForAddress fail, and handle the case
+  // via decr_pc_and_recompute_addr_range below.
+  const uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
+  uint32_t resolved_scope = pc_module_sp->ResolveSymbolContextForAddress(
+      m_current_pc, resolve_scope, m_sym_ctx, resolve_tail_call_address);
+
+  // We require either a symbol or function in the symbols context to be
+  // successfully
+  // filled in or this context is of no use to us.
+  if (resolve_scope & resolved_scope) {
+    m_sym_ctx_valid = true;
+  }
+
+  if (m_sym_ctx.symbol) {
+    UnwindLogMsg("with pc value of 0x%" PRIx64 ", symbol name is '%s'", pc,
+                 GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+  } else if (m_sym_ctx.function) {
+    UnwindLogMsg("with pc value of 0x%" PRIx64 ", function name is '%s'", pc,
+                 GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+  } else {
+    UnwindLogMsg("with pc value of 0x%" PRIx64
+                 ", no symbol/function name is known.",
+                 pc);
+  }
+
+  AddressRange addr_range;
+  if (!m_sym_ctx.GetAddressRange(resolve_scope, 0, false, addr_range)) {
+    m_sym_ctx_valid = false;
+  }
+
+  bool decr_pc_and_recompute_addr_range = false;
+
+  // If the symbol lookup failed...
+  if (m_sym_ctx_valid == false)
+    decr_pc_and_recompute_addr_range = true;
+
+  // Or if we're in the middle of the stack (and not "above" an asynchronous
+  // event like sigtramp),
+  // and our "current" pc is the start of a function...
+  if (m_sym_ctx_valid && GetNextFrame()->m_frame_type != eTrapHandlerFrame &&
+      GetNextFrame()->m_frame_type != eDebuggerFrame &&
+      addr_range.GetBaseAddress().IsValid() &&
+      addr_range.GetBaseAddress().GetSection() == m_current_pc.GetSection() &&
+      addr_range.GetBaseAddress().GetOffset() == m_current_pc.GetOffset()) {
+    decr_pc_and_recompute_addr_range = true;
+  }
+
+  // We need to back up the pc by 1 byte and re-search for the Symbol to handle
+  // the case where the "saved pc"
+  // value is pointing to the next function, e.g. if a function ends with a CALL
+  // instruction.
+  // FIXME this may need to be an architectural-dependent behavior; if so we'll
+  // need to add a member function
+  // to the ABI plugin and consult that.
+  if (decr_pc_and_recompute_addr_range) {
+    UnwindLogMsg("Backing up the pc value of 0x%" PRIx64
+                 " by 1 and re-doing symbol lookup; old symbol was %s",
+                 pc, GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+    Address temporary_pc;
+    temporary_pc.SetLoadAddress(pc - 1, &process->GetTarget());
+    m_sym_ctx.Clear(false);
+    m_sym_ctx_valid = false;
+    uint32_t resolve_scope = eSymbolContextFunction | eSymbolContextSymbol;
+
+    ModuleSP temporary_module_sp = temporary_pc.GetModule();
+    if (temporary_module_sp &&
+        temporary_module_sp->ResolveSymbolContextForAddress(
+            temporary_pc, resolve_scope, m_sym_ctx) &
+            resolve_scope) {
+      if (m_sym_ctx.GetAddressRange(resolve_scope, 0, false, addr_range))
+        m_sym_ctx_valid = true;
     }
+    UnwindLogMsg("Symbol is now %s",
+                 GetSymbolOrFunctionName(m_sym_ctx).AsCString(""));
+  }
+
+  // If we were able to find a symbol/function, set addr_range_ptr to the bounds
+  // of that symbol/function.
+  // else treat the current pc value as the start_pc and record no offset.
+  if (addr_range.GetBaseAddress().IsValid()) {
+    m_start_pc = addr_range.GetBaseAddress();
+    m_current_offset = pc - m_start_pc.GetLoadAddress(&process->GetTarget());
+    m_current_offset_backed_up_one = m_current_offset;
+    if (decr_pc_and_recompute_addr_range &&
+        m_current_offset_backed_up_one > 0) {
+      m_current_offset_backed_up_one--;
+      if (m_sym_ctx_valid) {
+        m_current_pc.SetLoadAddress(pc - 1, &process->GetTarget());
+      }
+    }
+  } else {
+    m_start_pc = m_current_pc;
+    m_current_offset = -1;
+    m_current_offset_backed_up_one = -1;
+  }
+
+  if (IsTrapHandlerSymbol(process, m_sym_ctx)) {
+    m_frame_type = eTrapHandlerFrame;
+  } else {
+    // FIXME:  Detect eDebuggerFrame here.
+    if (m_frame_type != eSkipFrame) // don't override eSkipFrame
+    {
+      m_frame_type = eNormalFrame;
+    }
+  }
+
+  // We've set m_frame_type and m_sym_ctx before this call.
+  m_fast_unwind_plan_sp = GetFastUnwindPlanForFrame();
+
+  UnwindPlan::RowSP active_row;
+  RegisterKind row_register_kind = eRegisterKindGeneric;
+
+  // Try to get by with just the fast UnwindPlan if possible - the full
+  // UnwindPlan may be expensive to get
+  // (e.g. if we have to parse the entire eh_frame section of an ObjectFile for
+  // the first time.)
+
+  if (m_fast_unwind_plan_sp &&
+      m_fast_unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+    active_row =
+        m_fast_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+    row_register_kind = m_fast_unwind_plan_sp->GetRegisterKind();
+    if (active_row.get() && log) {
+      StreamString active_row_strm;
+      active_row->Dump(active_row_strm, m_fast_unwind_plan_sp.get(), &m_thread,
+                       m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
+      UnwindLogMsg("active row: %s", active_row_strm.GetData());
+    }
+  } else {
+    m_full_unwind_plan_sp = GetFullUnwindPlanForFrame();
+    int valid_offset = -1;
+    if (IsUnwindPlanValidForCurrentPC(m_full_unwind_plan_sp, valid_offset)) {
+      active_row = m_full_unwind_plan_sp->GetRowForFunctionOffset(valid_offset);
+      row_register_kind = m_full_unwind_plan_sp->GetRegisterKind();
+      if (active_row.get() && log) {
+        StreamString active_row_strm;
+        active_row->Dump(active_row_strm, m_full_unwind_plan_sp.get(),
+                         &m_thread,
+                         m_start_pc.GetLoadAddress(exe_ctx.GetTargetPtr()));
+        UnwindLogMsg("active row: %s", active_row_strm.GetData());
+      }
+    }
+  }
+
+  if (!active_row.get()) {
+    m_frame_type = eNotAValidFrame;
+    UnwindLogMsg("could not find unwind row for this pc");
+    return;
+  }
 
-    if (!ReadCFAValueForRow (row_register_kind, active_row, m_cfa))
-    {
-        UnwindLogMsg ("failed to get cfa");
-        m_frame_type = eNotAValidFrame;
-        return;
-    }
+  if (!ReadCFAValueForRow(row_register_kind, active_row, m_cfa)) {
+    UnwindLogMsg("failed to get cfa");
+    m_frame_type = eNotAValidFrame;
+    return;
+  }
 
-    UnwindLogMsg ("m_cfa = 0x%" PRIx64, m_cfa);
+  UnwindLogMsg("m_cfa = 0x%" PRIx64, m_cfa);
 
-    if (CheckIfLoopingStack ())
-    {
-        TryFallbackUnwindPlan();
-        if (CheckIfLoopingStack ())
-        {
-            UnwindLogMsg ("same CFA address as next frame, assuming the unwind is looping - stopping");
-            m_frame_type = eNotAValidFrame;
-            return;
-        }
+  if (CheckIfLoopingStack()) {
+    TryFallbackUnwindPlan();
+    if (CheckIfLoopingStack()) {
+      UnwindLogMsg("same CFA address as next frame, assuming the unwind is "
+                   "looping - stopping");
+      m_frame_type = eNotAValidFrame;
+      return;
     }
+  }
 
-    UnwindLogMsg ("initialized frame current pc is 0x%" PRIx64 " cfa is 0x%" PRIx64,
-            (uint64_t) m_current_pc.GetLoadAddress (exe_ctx.GetTargetPtr()), (uint64_t) m_cfa);
+  UnwindLogMsg("initialized frame current pc is 0x%" PRIx64
+               " cfa is 0x%" PRIx64,
+               (uint64_t)m_current_pc.GetLoadAddress(exe_ctx.GetTargetPtr()),
+               (uint64_t)m_cfa);
 }
 
-bool
-RegisterContextLLDB::CheckIfLoopingStack ()
-{
-    // If we have a bad stack setup, we can get the same CFA value multiple times -- or even
-    // more devious, we can actually oscillate between two CFA values. Detect that here and
-    // break out to avoid a possible infinite loop in lldb trying to unwind the stack.
-    // To detect when we have the same CFA value multiple times, we compare the CFA of the current
-    // frame with the 2nd next frame because in some specail case (e.g. signal hanlders, hand
-    // written assembly without ABI compiance) we can have 2 frames with the same CFA (in theory we
-    // can have arbitrary number of frames with the same CFA, but more then 2 is very very unlikely)
-
-    RegisterContextLLDB::SharedPtr next_frame = GetNextFrame();
-    if (next_frame)
-    {
-        RegisterContextLLDB::SharedPtr next_next_frame = next_frame->GetNextFrame();
-        addr_t next_next_frame_cfa = LLDB_INVALID_ADDRESS;
-        if (next_next_frame && next_next_frame->GetCFA(next_next_frame_cfa))
-        {
-            if (next_next_frame_cfa == m_cfa)
-            {
-                // We have a loop in the stack unwind
-                return true; 
-            }
-        }
+bool RegisterContextLLDB::CheckIfLoopingStack() {
+  // If we have a bad stack setup, we can get the same CFA value multiple times
+  // -- or even
+  // more devious, we can actually oscillate between two CFA values. Detect that
+  // here and
+  // break out to avoid a possible infinite loop in lldb trying to unwind the
+  // stack.
+  // To detect when we have the same CFA value multiple times, we compare the
+  // CFA of the current
+  // frame with the 2nd next frame because in some specail case (e.g. signal
+  // hanlders, hand
+  // written assembly without ABI compiance) we can have 2 frames with the same
+  // CFA (in theory we
+  // can have arbitrary number of frames with the same CFA, but more then 2 is
+  // very very unlikely)
+
+  RegisterContextLLDB::SharedPtr next_frame = GetNextFrame();
+  if (next_frame) {
+    RegisterContextLLDB::SharedPtr next_next_frame = next_frame->GetNextFrame();
+    addr_t next_next_frame_cfa = LLDB_INVALID_ADDRESS;
+    if (next_next_frame && next_next_frame->GetCFA(next_next_frame_cfa)) {
+      if (next_next_frame_cfa == m_cfa) {
+        // We have a loop in the stack unwind
+        return true;
+      }
     }
-    return false;
-}
-
-bool
-RegisterContextLLDB::IsFrameZero () const
-{
-    return m_frame_number == 0;
+  }
+  return false;
 }
 
+bool RegisterContextLLDB::IsFrameZero() const { return m_frame_number == 0; }
 
 // Find a fast unwind plan for this frame, if possible.
 //
 // On entry to this method,
 //
-//   1. m_frame_type should already be set to eTrapHandlerFrame/eDebuggerFrame if either of those are correct,
+//   1. m_frame_type should already be set to eTrapHandlerFrame/eDebuggerFrame
+//   if either of those are correct,
 //   2. m_sym_ctx should already be filled in, and
 //   3. m_current_pc should have the current pc value for this frame
-//   4. m_current_offset_backed_up_one should have the current byte offset into the function, maybe backed up by 1, -1 if unknown
+//   4. m_current_offset_backed_up_one should have the current byte offset into
+//   the function, maybe backed up by 1, -1 if unknown
 
-UnwindPlanSP
-RegisterContextLLDB::GetFastUnwindPlanForFrame ()
-{
-    UnwindPlanSP unwind_plan_sp;
-    ModuleSP pc_module_sp (m_current_pc.GetModule());
+UnwindPlanSP RegisterContextLLDB::GetFastUnwindPlanForFrame() {
+  UnwindPlanSP unwind_plan_sp;
+  ModuleSP pc_module_sp(m_current_pc.GetModule());
 
-    if (!m_current_pc.IsValid() || !pc_module_sp || pc_module_sp->GetObjectFile() == NULL)
-        return unwind_plan_sp;
+  if (!m_current_pc.IsValid() || !pc_module_sp ||
+      pc_module_sp->GetObjectFile() == NULL)
+    return unwind_plan_sp;
 
-    if (IsFrameZero ())
-        return unwind_plan_sp;
+  if (IsFrameZero())
+    return unwind_plan_sp;
 
-    FuncUnwindersSP func_unwinders_sp (pc_module_sp->GetObjectFile()->GetUnwindTable().GetFuncUnwindersContainingAddress (m_current_pc, m_sym_ctx));
-    if (!func_unwinders_sp)
-        return unwind_plan_sp;
+  FuncUnwindersSP func_unwinders_sp(
+      pc_module_sp->GetObjectFile()
+          ->GetUnwindTable()
+          .GetFuncUnwindersContainingAddress(m_current_pc, m_sym_ctx));
+  if (!func_unwinders_sp)
+    return unwind_plan_sp;
 
-    // If we're in _sigtramp(), unwinding past this frame requires special knowledge.
-    if (m_frame_type == eTrapHandlerFrame || m_frame_type == eDebuggerFrame)
-        return unwind_plan_sp;
+  // If we're in _sigtramp(), unwinding past this frame requires special
+  // knowledge.
+  if (m_frame_type == eTrapHandlerFrame || m_frame_type == eDebuggerFrame)
+    return unwind_plan_sp;
 
-    unwind_plan_sp = func_unwinders_sp->GetUnwindPlanFastUnwind (*m_thread.CalculateTarget(), m_thread);
-    if (unwind_plan_sp)
-    {
-        if (unwind_plan_sp->PlanValidAtAddress (m_current_pc))
-        {
-            Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
-            if (log && log->GetVerbose())
-            {
-                if (m_fast_unwind_plan_sp)
-                    UnwindLogMsgVerbose ("frame, and has a fast UnwindPlan");
-                else
-                    UnwindLogMsgVerbose ("frame");
-            }
-            m_frame_type = eNormalFrame;
-            return unwind_plan_sp;
-        }
+  unwind_plan_sp = func_unwinders_sp->GetUnwindPlanFastUnwind(
+      *m_thread.CalculateTarget(), m_thread);
+  if (unwind_plan_sp) {
+    if (unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+      Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+      if (log && log->GetVerbose()) {
+        if (m_fast_unwind_plan_sp)
+          UnwindLogMsgVerbose("frame, and has a fast UnwindPlan");
         else
-        {
-            unwind_plan_sp.reset();
-        }
-    }
-    return unwind_plan_sp;
+          UnwindLogMsgVerbose("frame");
+      }
+      m_frame_type = eNormalFrame;
+      return unwind_plan_sp;
+    } else {
+      unwind_plan_sp.reset();
+    }
+  }
+  return unwind_plan_sp;
 }
 
 // On entry to this method,
 //
-//   1. m_frame_type should already be set to eTrapHandlerFrame/eDebuggerFrame if either of those are correct,
+//   1. m_frame_type should already be set to eTrapHandlerFrame/eDebuggerFrame
+//   if either of those are correct,
 //   2. m_sym_ctx should already be filled in, and
 //   3. m_current_pc should have the current pc value for this frame
-//   4. m_current_offset_backed_up_one should have the current byte offset into the function, maybe backed up by 1, -1 if unknown
-
-UnwindPlanSP
-RegisterContextLLDB::GetFullUnwindPlanForFrame ()
-{
-    UnwindPlanSP unwind_plan_sp;
-    UnwindPlanSP arch_default_unwind_plan_sp;
-    ExecutionContext exe_ctx(m_thread.shared_from_this());
-    Process *process = exe_ctx.GetProcessPtr();
-    ABI *abi = process ? process->GetABI().get() : NULL;
-    if (abi)
-    {
-        arch_default_unwind_plan_sp.reset (new UnwindPlan (lldb::eRegisterKindGeneric));
-        abi->CreateDefaultUnwindPlan(*arch_default_unwind_plan_sp);
-    }
-    else
-    {
-        UnwindLogMsg ("unable to get architectural default UnwindPlan from ABI plugin");
-    }
-
-    bool behaves_like_zeroth_frame = false;
-    if (IsFrameZero ()
-        || GetNextFrame()->m_frame_type == eTrapHandlerFrame
-        || GetNextFrame()->m_frame_type == eDebuggerFrame)
-    {
-        behaves_like_zeroth_frame = true;
-        // If this frame behaves like a 0th frame (currently executing or
-        // interrupted asynchronously), all registers can be retrieved.
-        m_all_registers_available = true;
-    }
-
-    // If we've done a jmp 0x0 / bl 0x0 (called through a null function pointer) so the pc is 0x0
-    // in the zeroth frame, we need to use the "unwind at first instruction" arch default UnwindPlan
-    // Also, if this Process can report on memory region attributes, any non-executable region means
-    // we jumped through a bad function pointer - handle the same way as 0x0.
-    // Note, if we have a symbol context & a symbol, we don't want to follow this code path.  This is
-    // for jumping to memory regions without any information available.
-
-    if ((!m_sym_ctx_valid || (m_sym_ctx.function == NULL && m_sym_ctx.symbol == NULL)) && behaves_like_zeroth_frame && m_current_pc.IsValid())
-    {
-        uint32_t permissions;
-        addr_t current_pc_addr = m_current_pc.GetLoadAddress (exe_ctx.GetTargetPtr());
-        if (current_pc_addr == 0
-            || (process &&
-                process->GetLoadAddressPermissions (current_pc_addr, permissions)
-                && (permissions & ePermissionsExecutable) == 0))
-        {
-            if (abi)
-            {
-                unwind_plan_sp.reset (new UnwindPlan (lldb::eRegisterKindGeneric));
-                abi->CreateFunctionEntryUnwindPlan(*unwind_plan_sp);
-                m_frame_type = eNormalFrame;
-                return unwind_plan_sp;
-            }
-        }
-    }
-
-    // No Module for the current pc, try using the architecture default unwind.
-    ModuleSP pc_module_sp (m_current_pc.GetModule());
-    if (!m_current_pc.IsValid() || !pc_module_sp || pc_module_sp->GetObjectFile() == NULL)
-    {
+//   4. m_current_offset_backed_up_one should have the current byte offset into
+//   the function, maybe backed up by 1, -1 if unknown
+
+UnwindPlanSP RegisterContextLLDB::GetFullUnwindPlanForFrame() {
+  UnwindPlanSP unwind_plan_sp;
+  UnwindPlanSP arch_default_unwind_plan_sp;
+  ExecutionContext exe_ctx(m_thread.shared_from_this());
+  Process *process = exe_ctx.GetProcessPtr();
+  ABI *abi = process ? process->GetABI().get() : NULL;
+  if (abi) {
+    arch_default_unwind_plan_sp.reset(
+        new UnwindPlan(lldb::eRegisterKindGeneric));
+    abi->CreateDefaultUnwindPlan(*arch_default_unwind_plan_sp);
+  } else {
+    UnwindLogMsg(
+        "unable to get architectural default UnwindPlan from ABI plugin");
+  }
+
+  bool behaves_like_zeroth_frame = false;
+  if (IsFrameZero() || GetNextFrame()->m_frame_type == eTrapHandlerFrame ||
+      GetNextFrame()->m_frame_type == eDebuggerFrame) {
+    behaves_like_zeroth_frame = true;
+    // If this frame behaves like a 0th frame (currently executing or
+    // interrupted asynchronously), all registers can be retrieved.
+    m_all_registers_available = true;
+  }
+
+  // If we've done a jmp 0x0 / bl 0x0 (called through a null function pointer)
+  // so the pc is 0x0
+  // in the zeroth frame, we need to use the "unwind at first instruction" arch
+  // default UnwindPlan
+  // Also, if this Process can report on memory region attributes, any
+  // non-executable region means
+  // we jumped through a bad function pointer - handle the same way as 0x0.
+  // Note, if we have a symbol context & a symbol, we don't want to follow this
+  // code path.  This is
+  // for jumping to memory regions without any information available.
+
+  if ((!m_sym_ctx_valid ||
+       (m_sym_ctx.function == NULL && m_sym_ctx.symbol == NULL)) &&
+      behaves_like_zeroth_frame && m_current_pc.IsValid()) {
+    uint32_t permissions;
+    addr_t current_pc_addr =
+        m_current_pc.GetLoadAddress(exe_ctx.GetTargetPtr());
+    if (current_pc_addr == 0 ||
+        (process &&
+         process->GetLoadAddressPermissions(current_pc_addr, permissions) &&
+         (permissions & ePermissionsExecutable) == 0)) {
+      if (abi) {
+        unwind_plan_sp.reset(new UnwindPlan(lldb::eRegisterKindGeneric));
+        abi->CreateFunctionEntryUnwindPlan(*unwind_plan_sp);
         m_frame_type = eNormalFrame;
-        return arch_default_unwind_plan_sp;
-    }
-
-    FuncUnwindersSP func_unwinders_sp;
-    if (m_sym_ctx_valid)
-    {
-        func_unwinders_sp = pc_module_sp->GetObjectFile()->GetUnwindTable().GetFuncUnwindersContainingAddress (m_current_pc, m_sym_ctx);
-    }
-
-    // No FuncUnwinders available for this pc (stripped function symbols, lldb could not augment its
-    // function table with another source, like LC_FUNCTION_STARTS or eh_frame in ObjectFileMachO).
-    // See if eh_frame or the .ARM.exidx tables have unwind information for this address, else fall
-    // back to the architectural default unwind.
-    if (!func_unwinders_sp)
-    {
-        m_frame_type = eNormalFrame;
-
-        if (!pc_module_sp || !pc_module_sp->GetObjectFile() || !m_current_pc.IsValid())
-            return arch_default_unwind_plan_sp;
-
-        // Even with -fomit-frame-pointer, we can try eh_frame to get back on track.
-        DWARFCallFrameInfo *eh_frame = pc_module_sp->GetObjectFile()->GetUnwindTable().GetEHFrameInfo();
-        if (eh_frame)
-        {
-            unwind_plan_sp.reset (new UnwindPlan (lldb::eRegisterKindGeneric));
-            if (eh_frame->GetUnwindPlan (m_current_pc, *unwind_plan_sp))
-                return unwind_plan_sp;
-            else
-                unwind_plan_sp.reset();
-        }
-
-        ArmUnwindInfo *arm_exidx = pc_module_sp->GetObjectFile()->GetUnwindTable().GetArmUnwindInfo();
-        if (arm_exidx)
-        {
-            unwind_plan_sp.reset (new UnwindPlan (lldb::eRegisterKindGeneric));
-            if (arm_exidx->GetUnwindPlan (exe_ctx.GetTargetRef(), m_current_pc, *unwind_plan_sp))
-                return unwind_plan_sp;
-            else
-                unwind_plan_sp.reset();
-        }
-
-        return arch_default_unwind_plan_sp;
-    }
-
-    // If we're in _sigtramp(), unwinding past this frame requires special knowledge.  On Mac OS X this knowledge
-    // is properly encoded in the eh_frame section, so prefer that if available.
-    // On other platforms we may need to provide a platform-specific UnwindPlan which encodes the details of
-    // how to unwind out of sigtramp.
-    if (m_frame_type == eTrapHandlerFrame && process)
-    {
-        m_fast_unwind_plan_sp.reset();
-        unwind_plan_sp = func_unwinders_sp->GetEHFrameUnwindPlan (process->GetTarget(), m_current_offset_backed_up_one);
-        if (unwind_plan_sp && unwind_plan_sp->PlanValidAtAddress (m_current_pc) && unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolYes)
-        {
-            return unwind_plan_sp;
-        }
-    }
-
-    // Ask the DynamicLoader if the eh_frame CFI should be trusted in this frame even when it's frame zero
-    // This comes up if we have hand-written functions in a Module and hand-written eh_frame.  The assembly
-    // instruction inspection may fail and the eh_frame CFI were probably written with some care to do the
-    // right thing.  It'd be nice if there was a way to ask the eh_frame directly if it is asynchronous
-    // (can be trusted at every instruction point) or synchronous (the normal case - only at call sites).
-    // But there is not.
-    if (process && process->GetDynamicLoader() && process->GetDynamicLoader()->AlwaysRelyOnEHUnwindInfo (m_sym_ctx))
-    {
-        // We must specifically call the GetEHFrameUnwindPlan() method here -- normally we would
-        // call GetUnwindPlanAtCallSite() -- because CallSite may return an unwind plan sourced from
-        // either eh_frame (that's what we intend) or compact unwind (this won't work)
-        unwind_plan_sp = func_unwinders_sp->GetEHFrameUnwindPlan (process->GetTarget(), m_current_offset_backed_up_one);
-        if (unwind_plan_sp && unwind_plan_sp->PlanValidAtAddress (m_current_pc))
-        {
-            UnwindLogMsgVerbose ("frame uses %s for full UnwindPlan because the DynamicLoader suggested we prefer it",
-                           unwind_plan_sp->GetSourceName().GetCString());
-            return unwind_plan_sp;
-        }
+        return unwind_plan_sp;
+      }
     }
+  }
 
-    // Typically the NonCallSite UnwindPlan is the unwind created by inspecting the assembly language instructions
-    if (behaves_like_zeroth_frame && process)
-    {
-        unwind_plan_sp = func_unwinders_sp->GetUnwindPlanAtNonCallSite (process->GetTarget(), m_thread, m_current_offset_backed_up_one);
-        if (unwind_plan_sp && unwind_plan_sp->PlanValidAtAddress (m_current_pc))
-        {
-            if (unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolNo)
-            {
-                // We probably have an UnwindPlan created by inspecting assembly instructions. The
-                // assembly profilers work really well with compiler-generated functions but hand-
-                // written assembly can be problematic. We set the eh_frame based unwind plan as our
-                // fallback unwind plan if instruction emulation doesn't work out even for non call
-                // sites if it is available and use the architecture default unwind plan if it is
-                // not available. The eh_frame unwind plan is more reliable even on non call sites
-                // then the architecture default plan and for hand written assembly code it is often
-                // written in a way that it valid at all location what helps in the most common
-                // cases when the instruction emulation fails.
-                UnwindPlanSP call_site_unwind_plan = func_unwinders_sp->GetUnwindPlanAtCallSite(process->GetTarget(), m_current_offset_backed_up_one);
-                if (call_site_unwind_plan &&
-                    call_site_unwind_plan.get() != unwind_plan_sp.get() &&
-                    call_site_unwind_plan->GetSourceName() != unwind_plan_sp->GetSourceName())
-                {
-                    m_fallback_unwind_plan_sp = call_site_unwind_plan;
-                }
-                else
-                {
-                    m_fallback_unwind_plan_sp = arch_default_unwind_plan_sp;
-                }
-            }
-            UnwindLogMsgVerbose ("frame uses %s for full UnwindPlan", unwind_plan_sp->GetSourceName().GetCString());
-            return unwind_plan_sp;
-        }
+  // No Module for the current pc, try using the architecture default unwind.
+  ModuleSP pc_module_sp(m_current_pc.GetModule());
+  if (!m_current_pc.IsValid() || !pc_module_sp ||
+      pc_module_sp->GetObjectFile() == NULL) {
+    m_frame_type = eNormalFrame;
+    return arch_default_unwind_plan_sp;
+  }
+
+  FuncUnwindersSP func_unwinders_sp;
+  if (m_sym_ctx_valid) {
+    func_unwinders_sp =
+        pc_module_sp->GetObjectFile()
+            ->GetUnwindTable()
+            .GetFuncUnwindersContainingAddress(m_current_pc, m_sym_ctx);
+  }
+
+  // No FuncUnwinders available for this pc (stripped function symbols, lldb
+  // could not augment its
+  // function table with another source, like LC_FUNCTION_STARTS or eh_frame in
+  // ObjectFileMachO).
+  // See if eh_frame or the .ARM.exidx tables have unwind information for this
+  // address, else fall
+  // back to the architectural default unwind.
+  if (!func_unwinders_sp) {
+    m_frame_type = eNormalFrame;
+
+    if (!pc_module_sp || !pc_module_sp->GetObjectFile() ||
+        !m_current_pc.IsValid())
+      return arch_default_unwind_plan_sp;
+
+    // Even with -fomit-frame-pointer, we can try eh_frame to get back on track.
+    DWARFCallFrameInfo *eh_frame =
+        pc_module_sp->GetObjectFile()->GetUnwindTable().GetEHFrameInfo();
+    if (eh_frame) {
+      unwind_plan_sp.reset(new UnwindPlan(lldb::eRegisterKindGeneric));
+      if (eh_frame->GetUnwindPlan(m_current_pc, *unwind_plan_sp))
+        return unwind_plan_sp;
+      else
+        unwind_plan_sp.reset();
     }
 
-    // Typically this is unwind info from an eh_frame section intended for exception handling; only valid at call sites
-    if (process)
-    {
-        unwind_plan_sp = func_unwinders_sp->GetUnwindPlanAtCallSite (process->GetTarget(), m_current_offset_backed_up_one);
-    }
-    int valid_offset = -1;
-    if (IsUnwindPlanValidForCurrentPC(unwind_plan_sp, valid_offset))
-    {
-        UnwindLogMsgVerbose ("frame uses %s for full UnwindPlan", unwind_plan_sp->GetSourceName().GetCString());
+    ArmUnwindInfo *arm_exidx =
+        pc_module_sp->GetObjectFile()->GetUnwindTable().GetArmUnwindInfo();
+    if (arm_exidx) {
+      unwind_plan_sp.reset(new UnwindPlan(lldb::eRegisterKindGeneric));
+      if (arm_exidx->GetUnwindPlan(exe_ctx.GetTargetRef(), m_current_pc,
+                                   *unwind_plan_sp))
         return unwind_plan_sp;
+      else
+        unwind_plan_sp.reset();
     }
 
-    // We'd prefer to use an UnwindPlan intended for call sites when we're at a call site but if we've
-    // struck out on that, fall back to using the non-call-site assembly inspection UnwindPlan if possible.
-    if (process)
-    {
-        unwind_plan_sp = func_unwinders_sp->GetUnwindPlanAtNonCallSite (process->GetTarget(), m_thread, m_current_offset_backed_up_one);
-    }
-    if (unwind_plan_sp && unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolNo)
-    {
-        // We probably have an UnwindPlan created by inspecting assembly instructions. The assembly
-        // profilers work really well with compiler-generated functions but hand- written assembly
-        // can be problematic. We set the eh_frame based unwind plan as our fallback unwind plan if
-        // instruction emulation doesn't work out even for non call sites if it is available and use
-        // the architecture default unwind plan if it is not available. The eh_frame unwind plan is
-        // more reliable even on non call sites then the architecture default plan and for hand
-        // written assembly code it is often written in a way that it valid at all location what
-        // helps in the most common cases when the instruction emulation fails.
-        UnwindPlanSP call_site_unwind_plan = func_unwinders_sp->GetUnwindPlanAtCallSite(process->GetTarget(), m_current_offset_backed_up_one);
+    return arch_default_unwind_plan_sp;
+  }
+
+  // If we're in _sigtramp(), unwinding past this frame requires special
+  // knowledge.  On Mac OS X this knowledge
+  // is properly encoded in the eh_frame section, so prefer that if available.
+  // On other platforms we may need to provide a platform-specific UnwindPlan
+  // which encodes the details of
+  // how to unwind out of sigtramp.
+  if (m_frame_type == eTrapHandlerFrame && process) {
+    m_fast_unwind_plan_sp.reset();
+    unwind_plan_sp = func_unwinders_sp->GetEHFrameUnwindPlan(
+        process->GetTarget(), m_current_offset_backed_up_one);
+    if (unwind_plan_sp && unwind_plan_sp->PlanValidAtAddress(m_current_pc) &&
+        unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolYes) {
+      return unwind_plan_sp;
+    }
+  }
+
+  // Ask the DynamicLoader if the eh_frame CFI should be trusted in this frame
+  // even when it's frame zero
+  // This comes up if we have hand-written functions in a Module and
+  // hand-written eh_frame.  The assembly
+  // instruction inspection may fail and the eh_frame CFI were probably written
+  // with some care to do the
+  // right thing.  It'd be nice if there was a way to ask the eh_frame directly
+  // if it is asynchronous
+  // (can be trusted at every instruction point) or synchronous (the normal case
+  // - only at call sites).
+  // But there is not.
+  if (process && process->GetDynamicLoader() &&
+      process->GetDynamicLoader()->AlwaysRelyOnEHUnwindInfo(m_sym_ctx)) {
+    // We must specifically call the GetEHFrameUnwindPlan() method here --
+    // normally we would
+    // call GetUnwindPlanAtCallSite() -- because CallSite may return an unwind
+    // plan sourced from
+    // either eh_frame (that's what we intend) or compact unwind (this won't
+    // work)
+    unwind_plan_sp = func_unwinders_sp->GetEHFrameUnwindPlan(
+        process->GetTarget(), m_current_offset_backed_up_one);
+    if (unwind_plan_sp && unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+      UnwindLogMsgVerbose("frame uses %s for full UnwindPlan because the "
+                          "DynamicLoader suggested we prefer it",
+                          unwind_plan_sp->GetSourceName().GetCString());
+      return unwind_plan_sp;
+    }
+  }
+
+  // Typically the NonCallSite UnwindPlan is the unwind created by inspecting
+  // the assembly language instructions
+  if (behaves_like_zeroth_frame && process) {
+    unwind_plan_sp = func_unwinders_sp->GetUnwindPlanAtNonCallSite(
+        process->GetTarget(), m_thread, m_current_offset_backed_up_one);
+    if (unwind_plan_sp && unwind_plan_sp->PlanValidAtAddress(m_current_pc)) {
+      if (unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolNo) {
+        // We probably have an UnwindPlan created by inspecting assembly
+        // instructions. The
+        // assembly profilers work really well with compiler-generated functions
+        // but hand-
+        // written assembly can be problematic. We set the eh_frame based unwind
+        // plan as our
+        // fallback unwind plan if instruction emulation doesn't work out even
+        // for non call
+        // sites if it is available and use the architecture default unwind plan
+        // if it is
+        // not available. The eh_frame unwind plan is more reliable even on non
+        // call sites
+        // then the architecture default plan and for hand written assembly code
+        // it is often
+        // written in a way that it valid at all location what helps in the most
+        // common
+        // cases when the instruction emulation fails.
+        UnwindPlanSP call_site_unwind_plan =
+            func_unwinders_sp->GetUnwindPlanAtCallSite(
+                process->GetTarget(), m_current_offset_backed_up_one);
         if (call_site_unwind_plan &&
             call_site_unwind_plan.get() != unwind_plan_sp.get() &&
-            call_site_unwind_plan->GetSourceName() != unwind_plan_sp->GetSourceName())
-        {
-            m_fallback_unwind_plan_sp = call_site_unwind_plan;
-        }
-        else
-        {
-            m_fallback_unwind_plan_sp = arch_default_unwind_plan_sp;
+            call_site_unwind_plan->GetSourceName() !=
+                unwind_plan_sp->GetSourceName()) {
+          m_fallback_unwind_plan_sp = call_site_unwind_plan;
+        } else {
+          m_fallback_unwind_plan_sp = arch_default_unwind_plan_sp;
         }
-    }
-
-    if (IsUnwindPlanValidForCurrentPC(unwind_plan_sp, valid_offset))
-    {
-        UnwindLogMsgVerbose ("frame uses %s for full UnwindPlan", unwind_plan_sp->GetSourceName().GetCString());
-        return unwind_plan_sp;
-    }
-
-    // If we're on the first instruction of a function, and we have an architectural default UnwindPlan
-    // for the initial instruction of a function, use that.
-    if (m_current_offset_backed_up_one == 0)
-    {
-        unwind_plan_sp = func_unwinders_sp->GetUnwindPlanArchitectureDefaultAtFunctionEntry (m_thread);
-        if (unwind_plan_sp)
-        {
-            UnwindLogMsgVerbose ("frame uses %s for full UnwindPlan", unwind_plan_sp->GetSourceName().GetCString());
-            return unwind_plan_sp;
-        }
-    }
-
-    // If nothing else, use the architectural default UnwindPlan and hope that does the job.
-    if (arch_default_unwind_plan_sp)
-        UnwindLogMsgVerbose ("frame uses %s for full UnwindPlan", arch_default_unwind_plan_sp->GetSourceName().GetCString());
-    else
-        UnwindLogMsg ("Unable to find any UnwindPlan for full unwind of this frame.");
-
-    return arch_default_unwind_plan_sp;
+      }
+      UnwindLogMsgVerbose("frame uses %s for full UnwindPlan",
+                          unwind_plan_sp->GetSourceName().GetCString());
+      return unwind_plan_sp;
+    }
+  }
+
+  // Typically this is unwind info from an eh_frame section intended for
+  // exception handling; only valid at call sites
+  if (process) {
+    unwind_plan_sp = func_unwinders_sp->GetUnwindPlanAtCallSite(
+        process->GetTarget(), m_current_offset_backed_up_one);
+  }
+  int valid_offset = -1;
+  if (IsUnwindPlanValidForCurrentPC(unwind_plan_sp, valid_offset)) {
+    UnwindLogMsgVerbose("frame uses %s for full UnwindPlan",
+                        unwind_plan_sp->GetSourceName().GetCString());
+    return unwind_plan_sp;
+  }
+
+  // We'd prefer to use an UnwindPlan intended for call sites when we're at a
+  // call site but if we've
+  // struck out on that, fall back to using the non-call-site assembly
+  // inspection UnwindPlan if possible.
+  if (process) {
+    unwind_plan_sp = func_unwinders_sp->GetUnwindPlanAtNonCallSite(
+        process->GetTarget(), m_thread, m_current_offset_backed_up_one);
+  }
+  if (unwind_plan_sp &&
+      unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolNo) {
+    // We probably have an UnwindPlan created by inspecting assembly
+    // instructions. The assembly
+    // profilers work really well with compiler-generated functions but hand-
+    // written assembly
+    // can be problematic. We set the eh_frame based unwind plan as our fallback
+    // unwind plan if
+    // instruction emulation doesn't work out even for non call sites if it is
+    // available and use
+    // the architecture default unwind plan if it is not available. The eh_frame
+    // unwind plan is
+    // more reliable even on non call sites then the architecture default plan
+    // and for hand
+    // written assembly code it is often written in a way that it valid at all
+    // location what
+    // helps in the most common cases when the instruction emulation fails.
+    UnwindPlanSP call_site_unwind_plan =
+        func_unwinders_sp->GetUnwindPlanAtCallSite(
+            process->GetTarget(), m_current_offset_backed_up_one);
+    if (call_site_unwind_plan &&
+        call_site_unwind_plan.get() != unwind_plan_sp.get() &&
+        call_site_unwind_plan->GetSourceName() !=
+            unwind_plan_sp->GetSourceName()) {
+      m_fallback_unwind_plan_sp = call_site_unwind_plan;
+    } else {
+      m_fallback_unwind_plan_sp = arch_default_unwind_plan_sp;
+    }
+  }
+
+  if (IsUnwindPlanValidForCurrentPC(unwind_plan_sp, valid_offset)) {
+    UnwindLogMsgVerbose("frame uses %s for full UnwindPlan",
+                        unwind_plan_sp->GetSourceName().GetCString());
+    return unwind_plan_sp;
+  }
+
+  // If we're on the first instruction of a function, and we have an
+  // architectural default UnwindPlan
+  // for the initial instruction of a function, use that.
+  if (m_current_offset_backed_up_one == 0) {
+    unwind_plan_sp =
+        func_unwinders_sp->GetUnwindPlanArchitectureDefaultAtFunctionEntry(
+            m_thread);
+    if (unwind_plan_sp) {
+      UnwindLogMsgVerbose("frame uses %s for full UnwindPlan",
+                          unwind_plan_sp->GetSourceName().GetCString());
+      return unwind_plan_sp;
+    }
+  }
+
+  // If nothing else, use the architectural default UnwindPlan and hope that
+  // does the job.
+  if (arch_default_unwind_plan_sp)
+    UnwindLogMsgVerbose(
+        "frame uses %s for full UnwindPlan",
+        arch_default_unwind_plan_sp->GetSourceName().GetCString());
+  else
+    UnwindLogMsg(
+        "Unable to find any UnwindPlan for full unwind of this frame.");
+
+  return arch_default_unwind_plan_sp;
 }
 
-
-void
-RegisterContextLLDB::InvalidateAllRegisters ()
-{
-    m_frame_type = eNotAValidFrame;
+void RegisterContextLLDB::InvalidateAllRegisters() {
+  m_frame_type = eNotAValidFrame;
 }
 
-size_t
-RegisterContextLLDB::GetRegisterCount ()
-{
-    return m_thread.GetRegisterContext()->GetRegisterCount();
+size_t RegisterContextLLDB::GetRegisterCount() {
+  return m_thread.GetRegisterContext()->GetRegisterCount();
 }
 
-const RegisterInfo *
-RegisterContextLLDB::GetRegisterInfoAtIndex (size_t reg)
-{
-    return m_thread.GetRegisterContext()->GetRegisterInfoAtIndex (reg);
+const RegisterInfo *RegisterContextLLDB::GetRegisterInfoAtIndex(size_t reg) {
+  return m_thread.GetRegisterContext()->GetRegisterInfoAtIndex(reg);
 }
 
-size_t
-RegisterContextLLDB::GetRegisterSetCount ()
-{
-    return m_thread.GetRegisterContext()->GetRegisterSetCount ();
+size_t RegisterContextLLDB::GetRegisterSetCount() {
+  return m_thread.GetRegisterContext()->GetRegisterSetCount();
 }
 
-const RegisterSet *
-RegisterContextLLDB::GetRegisterSet (size_t reg_set)
-{
-    return m_thread.GetRegisterContext()->GetRegisterSet (reg_set);
+const RegisterSet *RegisterContextLLDB::GetRegisterSet(size_t reg_set) {
+  return m_thread.GetRegisterContext()->GetRegisterSet(reg_set);
 }
 
-uint32_t
-RegisterContextLLDB::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
-    return m_thread.GetRegisterContext()->ConvertRegisterKindToRegisterNumber (kind, num);
+uint32_t RegisterContextLLDB::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t num) {
+  return m_thread.GetRegisterContext()->ConvertRegisterKindToRegisterNumber(
+      kind, num);
 }
 
-bool
-RegisterContextLLDB::ReadRegisterValueFromRegisterLocation (lldb_private::UnwindLLDB::RegisterLocation regloc,
-                                                            const RegisterInfo *reg_info,
-                                                            RegisterValue &value)
-{
-    if (!IsValid())
-        return false;
-    bool success = false;
-
-    switch (regloc.type)
-    {
-    case UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext:
-        {
-            const RegisterInfo *other_reg_info = GetRegisterInfoAtIndex(regloc.location.register_number);
-
-            if (!other_reg_info)
-                return false;
-
-            success = m_thread.GetRegisterContext()->ReadRegister (other_reg_info, value);
-        }
-        break;
-    case UnwindLLDB::RegisterLocation::eRegisterInRegister:
-        {
-            const RegisterInfo *other_reg_info = GetRegisterInfoAtIndex(regloc.location.register_number);
-
-            if (!other_reg_info)
-                return false;
-
-            if (IsFrameZero ())
-            {
-                success = m_thread.GetRegisterContext()->ReadRegister (other_reg_info, value);
-            }
-            else
-            {
-                success = GetNextFrame()->ReadRegister (other_reg_info, value);
-            }
-        }
-        break;
-    case UnwindLLDB::RegisterLocation::eRegisterValueInferred:
-        success = value.SetUInt (regloc.location.inferred_value, reg_info->byte_size);
-        break;
-
-    case UnwindLLDB::RegisterLocation::eRegisterNotSaved:
-        break;
-    case UnwindLLDB::RegisterLocation::eRegisterSavedAtHostMemoryLocation:
-        assert ("FIXME debugger inferior function call unwind");
-        break;
-    case UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation:
-        {
-            Error error (ReadRegisterValueFromMemory(reg_info,
-                                                     regloc.location.target_memory_location,
-                                                     reg_info->byte_size,
-                                                     value));
-            success = error.Success();
-        }
-        break;
-    default:
-        assert ("Unknown RegisterLocation type.");
-        break;
-    }
-    return success;
+bool RegisterContextLLDB::ReadRegisterValueFromRegisterLocation(
+    lldb_private::UnwindLLDB::RegisterLocation regloc,
+    const RegisterInfo *reg_info, RegisterValue &value) {
+  if (!IsValid())
+    return false;
+  bool success = false;
+
+  switch (regloc.type) {
+  case UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext: {
+    const RegisterInfo *other_reg_info =
+        GetRegisterInfoAtIndex(regloc.location.register_number);
+
+    if (!other_reg_info)
+      return false;
+
+    success =
+        m_thread.GetRegisterContext()->ReadRegister(other_reg_info, value);
+  } break;
+  case UnwindLLDB::RegisterLocation::eRegisterInRegister: {
+    const RegisterInfo *other_reg_info =
+        GetRegisterInfoAtIndex(regloc.location.register_number);
+
+    if (!other_reg_info)
+      return false;
+
+    if (IsFrameZero()) {
+      success =
+          m_thread.GetRegisterContext()->ReadRegister(other_reg_info, value);
+    } else {
+      success = GetNextFrame()->ReadRegister(other_reg_info, value);
+    }
+  } break;
+  case UnwindLLDB::RegisterLocation::eRegisterValueInferred:
+    success =
+        value.SetUInt(regloc.location.inferred_value, reg_info->byte_size);
+    break;
+
+  case UnwindLLDB::RegisterLocation::eRegisterNotSaved:
+    break;
+  case UnwindLLDB::RegisterLocation::eRegisterSavedAtHostMemoryLocation:
+    llvm_unreachable("FIXME debugger inferior function call unwind");
+  case UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation: {
+    Error error(ReadRegisterValueFromMemory(
+        reg_info, regloc.location.target_memory_location, reg_info->byte_size,
+        value));
+    success = error.Success();
+  } break;
+  default:
+    llvm_unreachable("Unknown RegisterLocation type.");
+  }
+  return success;
 }
 
-bool
-RegisterContextLLDB::WriteRegisterValueToRegisterLocation (lldb_private::UnwindLLDB::RegisterLocation regloc,
-                                                           const RegisterInfo *reg_info,
-                                                           const RegisterValue &value)
-{
-    if (!IsValid())
-        return false;
-
-    bool success = false;
+bool RegisterContextLLDB::WriteRegisterValueToRegisterLocation(
+    lldb_private::UnwindLLDB::RegisterLocation regloc,
+    const RegisterInfo *reg_info, const RegisterValue &value) {
+  if (!IsValid())
+    return false;
 
-    switch (regloc.type)
-    {
-        case UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext:
-            {
-                const RegisterInfo *other_reg_info = GetRegisterInfoAtIndex(regloc.location.register_number);
-                success = m_thread.GetRegisterContext()->WriteRegister (other_reg_info, value);
-            }
-            break;
-        case UnwindLLDB::RegisterLocation::eRegisterInRegister:
-            {
-                const RegisterInfo *other_reg_info = GetRegisterInfoAtIndex(regloc.location.register_number);
-                if (IsFrameZero ())
-                {
-                    success = m_thread.GetRegisterContext()->WriteRegister (other_reg_info, value);
-                }
-                else
-                {
-                    success = GetNextFrame()->WriteRegister (other_reg_info, value);
-                }
-            }
-            break;
-        case UnwindLLDB::RegisterLocation::eRegisterValueInferred:
-        case UnwindLLDB::RegisterLocation::eRegisterNotSaved:
-            break;
-        case UnwindLLDB::RegisterLocation::eRegisterSavedAtHostMemoryLocation:
-            assert ("FIXME debugger inferior function call unwind");
-            break;
-        case UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation:
-            {
-                Error error (WriteRegisterValueToMemory (reg_info,
-                                                         regloc.location.target_memory_location,
-                                                         reg_info->byte_size,
-                                                         value));
-                success = error.Success();
-            }
-            break;
-        default:
-            assert ("Unknown RegisterLocation type.");
-            break;
-    }
-    return success;
+  bool success = false;
+
+  switch (regloc.type) {
+  case UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext: {
+    const RegisterInfo *other_reg_info =
+        GetRegisterInfoAtIndex(regloc.location.register_number);
+    success =
+        m_thread.GetRegisterContext()->WriteRegister(other_reg_info, value);
+  } break;
+  case UnwindLLDB::RegisterLocation::eRegisterInRegister: {
+    const RegisterInfo *other_reg_info =
+        GetRegisterInfoAtIndex(regloc.location.register_number);
+    if (IsFrameZero()) {
+      success =
+          m_thread.GetRegisterContext()->WriteRegister(other_reg_info, value);
+    } else {
+      success = GetNextFrame()->WriteRegister(other_reg_info, value);
+    }
+  } break;
+  case UnwindLLDB::RegisterLocation::eRegisterValueInferred:
+  case UnwindLLDB::RegisterLocation::eRegisterNotSaved:
+    break;
+  case UnwindLLDB::RegisterLocation::eRegisterSavedAtHostMemoryLocation:
+    llvm_unreachable("FIXME debugger inferior function call unwind");
+  case UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation: {
+    Error error(WriteRegisterValueToMemory(
+        reg_info, regloc.location.target_memory_location, reg_info->byte_size,
+        value));
+    success = error.Success();
+  } break;
+  default:
+    llvm_unreachable("Unknown RegisterLocation type.");
+  }
+  return success;
 }
 
-
-bool
-RegisterContextLLDB::IsValid () const
-{
-    return m_frame_type != eNotAValidFrame;
+bool RegisterContextLLDB::IsValid() const {
+  return m_frame_type != eNotAValidFrame;
 }
 
-// After the final stack frame in a stack walk we'll get one invalid (eNotAValidFrame) stack frame --
-// one past the end of the stack walk.  But higher-level code will need to tell the differnece between
-// "the unwind plan below this frame failed" versus "we successfully completed the stack walk" so
+// After the final stack frame in a stack walk we'll get one invalid
+// (eNotAValidFrame) stack frame --
+// one past the end of the stack walk.  But higher-level code will need to tell
+// the differnece between
+// "the unwind plan below this frame failed" versus "we successfully completed
+// the stack walk" so
 // this method helps to disambiguate that.
 
-bool
-RegisterContextLLDB::IsTrapHandlerFrame () const
-{
-    return m_frame_type == eTrapHandlerFrame;
+bool RegisterContextLLDB::IsTrapHandlerFrame() const {
+  return m_frame_type == eTrapHandlerFrame;
 }
 
-// A skip frame is a bogus frame on the stack -- but one where we're likely to find a real frame farther
-// up the stack if we keep looking.  It's always the second frame in an unwind (i.e. the first frame after
-// frame zero) where unwinding can be the trickiest.  Ideally we'll mark up this frame in some way so the
-// user knows we're displaying bad data and we may have skipped one frame of their real program in the
+// A skip frame is a bogus frame on the stack -- but one where we're likely to
+// find a real frame farther
+// up the stack if we keep looking.  It's always the second frame in an unwind
+// (i.e. the first frame after
+// frame zero) where unwinding can be the trickiest.  Ideally we'll mark up this
+// frame in some way so the
+// user knows we're displaying bad data and we may have skipped one frame of
+// their real program in the
 // process of getting back on track.
 
-bool
-RegisterContextLLDB::IsSkipFrame () const
-{
-    return m_frame_type == eSkipFrame;
+bool RegisterContextLLDB::IsSkipFrame() const {
+  return m_frame_type == eSkipFrame;
 }
 
-bool
-RegisterContextLLDB::IsTrapHandlerSymbol (lldb_private::Process *process, const lldb_private::SymbolContext &m_sym_ctx) const
-{
-    PlatformSP platform_sp (process->GetTarget().GetPlatform());
-    if (platform_sp)
-    {
-        const std::vector<ConstString> trap_handler_names (platform_sp->GetTrapHandlerSymbolNames());
-        for (ConstString name : trap_handler_names)
-        {
-            if ((m_sym_ctx.function && m_sym_ctx.function->GetName() == name) ||
-                (m_sym_ctx.symbol   && m_sym_ctx.symbol->GetName()   == name))
-            {
-                return true;
-            }
-        }
+bool RegisterContextLLDB::IsTrapHandlerSymbol(
+    lldb_private::Process *process,
+    const lldb_private::SymbolContext &m_sym_ctx) const {
+  PlatformSP platform_sp(process->GetTarget().GetPlatform());
+  if (platform_sp) {
+    const std::vector<ConstString> trap_handler_names(
+        platform_sp->GetTrapHandlerSymbolNames());
+    for (ConstString name : trap_handler_names) {
+      if ((m_sym_ctx.function && m_sym_ctx.function->GetName() == name) ||
+          (m_sym_ctx.symbol && m_sym_ctx.symbol->GetName() == name)) {
+        return true;
+      }
     }
-    const std::vector<ConstString> user_specified_trap_handler_names (m_parent_unwind.GetUserSpecifiedTrapHandlerFunctionNames());
-    for (ConstString name : user_specified_trap_handler_names)
-    {   
-        if ((m_sym_ctx.function && m_sym_ctx.function->GetName() == name) ||
-            (m_sym_ctx.symbol   && m_sym_ctx.symbol->GetName()   == name))
-        {   
-            return true;
-        }   
-    }   
+  }
+  const std::vector<ConstString> user_specified_trap_handler_names(
+      m_parent_unwind.GetUserSpecifiedTrapHandlerFunctionNames());
+  for (ConstString name : user_specified_trap_handler_names) {
+    if ((m_sym_ctx.function && m_sym_ctx.function->GetName() == name) ||
+        (m_sym_ctx.symbol && m_sym_ctx.symbol->GetName() == name)) {
+      return true;
+    }
+  }
 
-    return false;
+  return false;
 }
 
-// Answer the question: Where did THIS frame save the CALLER frame ("previous" frame)'s register value?
+// Answer the question: Where did THIS frame save the CALLER frame ("previous"
+// frame)'s register value?
 
 enum UnwindLLDB::RegisterSearchResult
-RegisterContextLLDB::SavedLocationForRegister (uint32_t lldb_regnum, lldb_private::UnwindLLDB::RegisterLocation &regloc)
-{
-    RegisterNumber regnum (m_thread, eRegisterKindLLDB, lldb_regnum);
-
-    // Have we already found this register location?
-    if (!m_registers.empty())
-    {
-        std::map<uint32_t, lldb_private::UnwindLLDB::RegisterLocation>::const_iterator iterator;
-        iterator = m_registers.find (regnum.GetAsKind (eRegisterKindLLDB));
-        if (iterator != m_registers.end())
-        {
-            regloc = iterator->second;
-            UnwindLogMsg ("supplying caller's saved %s (%d)'s location, cached", 
-                           regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-            return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+RegisterContextLLDB::SavedLocationForRegister(
+    uint32_t lldb_regnum, lldb_private::UnwindLLDB::RegisterLocation &regloc) {
+  RegisterNumber regnum(m_thread, eRegisterKindLLDB, lldb_regnum);
+
+  // Have we already found this register location?
+  if (!m_registers.empty()) {
+    std::map<uint32_t,
+             lldb_private::UnwindLLDB::RegisterLocation>::const_iterator
+        iterator;
+    iterator = m_registers.find(regnum.GetAsKind(eRegisterKindLLDB));
+    if (iterator != m_registers.end()) {
+      regloc = iterator->second;
+      UnwindLogMsg("supplying caller's saved %s (%d)'s location, cached",
+                   regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+      return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+    }
+  }
+
+  // Look through the available UnwindPlans for the register location.
+
+  UnwindPlan::Row::RegisterLocation unwindplan_regloc;
+  bool have_unwindplan_regloc = false;
+  RegisterKind unwindplan_registerkind = kNumRegisterKinds;
+
+  if (m_fast_unwind_plan_sp) {
+    UnwindPlan::RowSP active_row =
+        m_fast_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+    unwindplan_registerkind = m_fast_unwind_plan_sp->GetRegisterKind();
+    if (regnum.GetAsKind(unwindplan_registerkind) == LLDB_INVALID_REGNUM) {
+      UnwindLogMsg("could not convert lldb regnum %s (%d) into %d RegisterKind "
+                   "reg numbering scheme",
+                   regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB),
+                   (int)unwindplan_registerkind);
+      return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+    }
+    if (active_row->GetRegisterInfo(regnum.GetAsKind(unwindplan_registerkind),
+                                    unwindplan_regloc)) {
+      UnwindLogMsg(
+          "supplying caller's saved %s (%d)'s location using FastUnwindPlan",
+          regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+      have_unwindplan_regloc = true;
+    }
+  }
+
+  if (!have_unwindplan_regloc) {
+    // m_full_unwind_plan_sp being NULL means that we haven't tried to find a
+    // full UnwindPlan yet
+    if (!m_full_unwind_plan_sp)
+      m_full_unwind_plan_sp = GetFullUnwindPlanForFrame();
+
+    if (m_full_unwind_plan_sp) {
+      RegisterNumber pc_regnum(m_thread, eRegisterKindGeneric,
+                               LLDB_REGNUM_GENERIC_PC);
+
+      UnwindPlan::RowSP active_row =
+          m_full_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+      unwindplan_registerkind = m_full_unwind_plan_sp->GetRegisterKind();
+
+      RegisterNumber return_address_reg;
+
+      // If we're fetching the saved pc and this UnwindPlan defines a
+      // ReturnAddress register (e.g. lr on arm),
+      // look for the return address register number in the UnwindPlan's row.
+      if (pc_regnum.IsValid() && pc_regnum == regnum &&
+          m_full_unwind_plan_sp->GetReturnAddressRegister() !=
+              LLDB_INVALID_REGNUM) {
+
+        return_address_reg.init(
+            m_thread, m_full_unwind_plan_sp->GetRegisterKind(),
+            m_full_unwind_plan_sp->GetReturnAddressRegister());
+        regnum = return_address_reg;
+        UnwindLogMsg("requested caller's saved PC but this UnwindPlan uses a "
+                     "RA reg; getting %s (%d) instead",
+                     return_address_reg.GetName(),
+                     return_address_reg.GetAsKind(eRegisterKindLLDB));
+      } else {
+        if (regnum.GetAsKind(unwindplan_registerkind) == LLDB_INVALID_REGNUM) {
+          if (unwindplan_registerkind == eRegisterKindGeneric) {
+            UnwindLogMsg("could not convert lldb regnum %s (%d) into "
+                         "eRegisterKindGeneric reg numbering scheme",
+                         regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+          } else {
+            UnwindLogMsg("could not convert lldb regnum %s (%d) into %d "
+                         "RegisterKind reg numbering scheme",
+                         regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB),
+                         (int)unwindplan_registerkind);
+          }
+          return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
         }
-    }
-
-    // Look through the available UnwindPlans for the register location.
-
-    UnwindPlan::Row::RegisterLocation unwindplan_regloc;
-    bool have_unwindplan_regloc = false;
-    RegisterKind unwindplan_registerkind = kNumRegisterKinds;
-
-    if (m_fast_unwind_plan_sp)
-    {
-        UnwindPlan::RowSP active_row = m_fast_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
-        unwindplan_registerkind = m_fast_unwind_plan_sp->GetRegisterKind ();
-        if (regnum.GetAsKind (unwindplan_registerkind) == LLDB_INVALID_REGNUM)
-        {
-            UnwindLogMsg ("could not convert lldb regnum %s (%d) into %d RegisterKind reg numbering scheme",
-                    regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB), (int) unwindplan_registerkind);
-            return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
-        }
-        if (active_row->GetRegisterInfo (regnum.GetAsKind (unwindplan_registerkind), unwindplan_regloc))
-        {
-            UnwindLogMsg ("supplying caller's saved %s (%d)'s location using FastUnwindPlan", 
-                          regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-            have_unwindplan_regloc = true;
+      }
+
+      if (regnum.IsValid() &&
+          active_row->GetRegisterInfo(regnum.GetAsKind(unwindplan_registerkind),
+                                      unwindplan_regloc)) {
+        have_unwindplan_regloc = true;
+        UnwindLogMsg(
+            "supplying caller's saved %s (%d)'s location using %s UnwindPlan",
+            regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB),
+            m_full_unwind_plan_sp->GetSourceName().GetCString());
+      }
+
+      // This is frame 0 and we're retrieving the PC and it's saved in a Return
+      // Address register and
+      // it hasn't been saved anywhere yet -- that is, it's still live in the
+      // actual register.
+      // Handle this specially.
+
+      if (have_unwindplan_regloc == false && return_address_reg.IsValid() &&
+          IsFrameZero()) {
+        if (return_address_reg.GetAsKind(eRegisterKindLLDB) !=
+            LLDB_INVALID_REGNUM) {
+          lldb_private::UnwindLLDB::RegisterLocation new_regloc;
+          new_regloc.type =
+              UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext;
+          new_regloc.location.register_number =
+              return_address_reg.GetAsKind(eRegisterKindLLDB);
+          m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = new_regloc;
+          regloc = new_regloc;
+          UnwindLogMsg("supplying caller's register %s (%d) from the live "
+                       "RegisterContext at frame 0, saved in %d",
+                       return_address_reg.GetName(),
+                       return_address_reg.GetAsKind(eRegisterKindLLDB),
+                       return_address_reg.GetAsKind(eRegisterKindLLDB));
+          return UnwindLLDB::RegisterSearchResult::eRegisterFound;
         }
-    }
-
-    if (!have_unwindplan_regloc)
-    {
-        // m_full_unwind_plan_sp being NULL means that we haven't tried to find a full UnwindPlan yet
-        if (!m_full_unwind_plan_sp)
-            m_full_unwind_plan_sp = GetFullUnwindPlanForFrame ();
-
-        if (m_full_unwind_plan_sp)
-        {
-            RegisterNumber pc_regnum (m_thread, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
-
-            UnwindPlan::RowSP active_row = m_full_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
-            unwindplan_registerkind = m_full_unwind_plan_sp->GetRegisterKind ();
-
-            RegisterNumber return_address_reg;
-
-            // If we're fetching the saved pc and this UnwindPlan defines a ReturnAddress register (e.g. lr on arm),
-            // look for the return address register number in the UnwindPlan's row.
-            if (pc_regnum.IsValid()
-                && pc_regnum == regnum
-                && m_full_unwind_plan_sp->GetReturnAddressRegister() != LLDB_INVALID_REGNUM)
-            {
-                
-                return_address_reg.init (m_thread, m_full_unwind_plan_sp->GetRegisterKind(), m_full_unwind_plan_sp->GetReturnAddressRegister());
-                regnum = return_address_reg;
-                UnwindLogMsg ("requested caller's saved PC but this UnwindPlan uses a RA reg; getting %s (%d) instead",
-                              return_address_reg.GetName(), return_address_reg.GetAsKind (eRegisterKindLLDB));
-            }
-            else
-            {
-                if (regnum.GetAsKind (unwindplan_registerkind) == LLDB_INVALID_REGNUM)
-                {
-                    if (unwindplan_registerkind == eRegisterKindGeneric)
-                    {
-                        UnwindLogMsg ("could not convert lldb regnum %s (%d) into eRegisterKindGeneric reg numbering scheme", 
-                                      regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-                    }
-                    else
-                    {
-                        UnwindLogMsg ("could not convert lldb regnum %s (%d) into %d RegisterKind reg numbering scheme",
-                                    regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB), (int) unwindplan_registerkind);
-                    }
-                    return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
-                }
+      }
+
+      // If this architecture stores the return address in a register (it
+      // defines a Return Address register)
+      // and we're on a non-zero stack frame and the Full UnwindPlan says that
+      // the pc is stored in the
+      // RA registers (e.g. lr on arm), then we know that the full unwindplan is
+      // not trustworthy -- this
+      // is an impossible situation and the instruction emulation code has
+      // likely been misled.
+      // If this stack frame meets those criteria, we need to throw away the
+      // Full UnwindPlan that the
+      // instruction emulation came up with and fall back to the architecture's
+      // Default UnwindPlan so
+      // the stack walk can get past this point.
+
+      // Special note:  If the Full UnwindPlan was generated from the compiler,
+      // don't second-guess it
+      // when we're at a call site location.
+
+      // arch_default_ra_regnum is the return address register # in the Full
+      // UnwindPlan register numbering
+      RegisterNumber arch_default_ra_regnum(m_thread, eRegisterKindGeneric,
+                                            LLDB_REGNUM_GENERIC_RA);
+
+      if (arch_default_ra_regnum.GetAsKind(unwindplan_registerkind) !=
+              LLDB_INVALID_REGNUM &&
+          pc_regnum == regnum && unwindplan_regloc.IsInOtherRegister() &&
+          unwindplan_regloc.GetRegisterNumber() ==
+              arch_default_ra_regnum.GetAsKind(unwindplan_registerkind) &&
+          m_full_unwind_plan_sp->GetSourcedFromCompiler() != eLazyBoolYes &&
+          !m_all_registers_available) {
+        UnwindLogMsg("%s UnwindPlan tried to restore the pc from the link "
+                     "register but this is a non-zero frame",
+                     m_full_unwind_plan_sp->GetSourceName().GetCString());
+
+        // Throw away the full unwindplan; install the arch default unwindplan
+        if (ForceSwitchToFallbackUnwindPlan()) {
+          // Update for the possibly new unwind plan
+          unwindplan_registerkind = m_full_unwind_plan_sp->GetRegisterKind();
+          UnwindPlan::RowSP active_row =
+              m_full_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+
+          // Sanity check: Verify that we can fetch a pc value and CFA value
+          // with this unwind plan
+
+          RegisterNumber arch_default_pc_reg(m_thread, eRegisterKindGeneric,
+                                             LLDB_REGNUM_GENERIC_PC);
+          bool can_fetch_pc_value = false;
+          bool can_fetch_cfa = false;
+          addr_t cfa_value;
+          if (active_row) {
+            if (arch_default_pc_reg.GetAsKind(unwindplan_registerkind) !=
+                    LLDB_INVALID_REGNUM &&
+                active_row->GetRegisterInfo(
+                    arch_default_pc_reg.GetAsKind(unwindplan_registerkind),
+                    unwindplan_regloc)) {
+              can_fetch_pc_value = true;
             }
-
-            if (regnum.IsValid() 
-                && active_row->GetRegisterInfo (regnum.GetAsKind (unwindplan_registerkind), unwindplan_regloc))
-            {
-                have_unwindplan_regloc = true;
-                UnwindLogMsg ("supplying caller's saved %s (%d)'s location using %s UnwindPlan", 
-                              regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB),
-                              m_full_unwind_plan_sp->GetSourceName().GetCString());
-            }
-
-            // This is frame 0 and we're retrieving the PC and it's saved in a Return Address register and
-            // it hasn't been saved anywhere yet -- that is, it's still live in the actual register.
-            // Handle this specially.
-
-            if (have_unwindplan_regloc == false 
-                && return_address_reg.IsValid()
-                && IsFrameZero())
-            {
-                if (return_address_reg.GetAsKind (eRegisterKindLLDB) != LLDB_INVALID_REGNUM)
-                {
-                    lldb_private::UnwindLLDB::RegisterLocation new_regloc;
-                    new_regloc.type = UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext;
-                    new_regloc.location.register_number = return_address_reg.GetAsKind (eRegisterKindLLDB);
-                    m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = new_regloc;
-                    regloc = new_regloc;
-                    UnwindLogMsg ("supplying caller's register %s (%d) from the live RegisterContext at frame 0, saved in %d", 
-                                  return_address_reg.GetName(), return_address_reg.GetAsKind (eRegisterKindLLDB), 
-                                  return_address_reg.GetAsKind (eRegisterKindLLDB));
-                    return UnwindLLDB::RegisterSearchResult::eRegisterFound;
-                }
-            }
-
-            // If this architecture stores the return address in a register (it defines a Return Address register)
-            // and we're on a non-zero stack frame and the Full UnwindPlan says that the pc is stored in the
-            // RA registers (e.g. lr on arm), then we know that the full unwindplan is not trustworthy -- this
-            // is an impossible situation and the instruction emulation code has likely been misled.  
-            // If this stack frame meets those criteria, we need to throw away the Full UnwindPlan that the 
-            // instruction emulation came up with and fall back to the architecture's Default UnwindPlan so
-            // the stack walk can get past this point.
-
-            // Special note:  If the Full UnwindPlan was generated from the compiler, don't second-guess it 
-            // when we're at a call site location.
-
-            // arch_default_ra_regnum is the return address register # in the Full UnwindPlan register numbering
-            RegisterNumber arch_default_ra_regnum (m_thread, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_RA);
-
-            if (arch_default_ra_regnum.GetAsKind (unwindplan_registerkind) != LLDB_INVALID_REGNUM
-                && pc_regnum == regnum
-                && unwindplan_regloc.IsInOtherRegister()
-                && unwindplan_regloc.GetRegisterNumber() == arch_default_ra_regnum.GetAsKind (unwindplan_registerkind)
-                && m_full_unwind_plan_sp->GetSourcedFromCompiler() != eLazyBoolYes
-                && !m_all_registers_available)
-            {
-                UnwindLogMsg ("%s UnwindPlan tried to restore the pc from the link register but this is a non-zero frame",
-                              m_full_unwind_plan_sp->GetSourceName().GetCString());
-
-                // Throw away the full unwindplan; install the arch default unwindplan
-                if (ForceSwitchToFallbackUnwindPlan())
-                {
-                    // Update for the possibly new unwind plan
-                    unwindplan_registerkind = m_full_unwind_plan_sp->GetRegisterKind ();
-                    UnwindPlan::RowSP active_row = m_full_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
-
-                    // Sanity check: Verify that we can fetch a pc value and CFA value with this unwind plan
-
-                    RegisterNumber arch_default_pc_reg (m_thread, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
-                    bool can_fetch_pc_value = false;
-                    bool can_fetch_cfa = false;
-                    addr_t cfa_value;
-                    if (active_row)
-                    {
-                        if (arch_default_pc_reg.GetAsKind (unwindplan_registerkind) != LLDB_INVALID_REGNUM
-                            && active_row->GetRegisterInfo (arch_default_pc_reg.GetAsKind (unwindplan_registerkind), unwindplan_regloc))
-                        {
-                            can_fetch_pc_value = true;
-                        }
-                        if (ReadCFAValueForRow (unwindplan_registerkind, active_row, cfa_value))
-                        {
-                            can_fetch_cfa = true;
-                        }
-                    }
-
-                    if (can_fetch_pc_value && can_fetch_cfa)
-                    {
-                        have_unwindplan_regloc = true;
-                    }
-                    else
-                    {
-                        have_unwindplan_regloc = false;
-                    }
-                }
-                else
-                {
-                    // We were unable to fall back to another unwind plan
-                    have_unwindplan_regloc = false;
-                }
+            if (ReadCFAValueForRow(unwindplan_registerkind, active_row,
+                                   cfa_value)) {
+              can_fetch_cfa = true;
             }
-        }
-    }
+          }
 
-    ExecutionContext exe_ctx(m_thread.shared_from_this());
-    Process *process = exe_ctx.GetProcessPtr();
-    if (have_unwindplan_regloc == false)
-    {
-        // If the UnwindPlan failed to give us an unwind location for this register, we may be able to fall back
-        // to some ABI-defined default.  For example, some ABIs allow to determine the caller's SP via the CFA.
-        // Also, the ABI may set volatile registers to the undefined state.
-        ABI *abi = process ? process->GetABI().get() : NULL;
-        if (abi)
-        {
-            const RegisterInfo *reg_info = GetRegisterInfoAtIndex(regnum.GetAsKind (eRegisterKindLLDB));
-            if (reg_info && abi->GetFallbackRegisterLocation (reg_info, unwindplan_regloc))
-            {
-                UnwindLogMsg ("supplying caller's saved %s (%d)'s location using ABI default",
-                              regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-                have_unwindplan_regloc = true;
-            }
-        }
-    }
-
-    if (have_unwindplan_regloc == false)
-    {
-        if (IsFrameZero ())
-        {
-            // This is frame 0 - we should return the actual live register context value
-            lldb_private::UnwindLLDB::RegisterLocation new_regloc;
-            new_regloc.type = UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext;
-            new_regloc.location.register_number = regnum.GetAsKind (eRegisterKindLLDB);
-            m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = new_regloc;
-            regloc = new_regloc;
-            UnwindLogMsg ("supplying caller's register %s (%d) from the live RegisterContext at frame 0", 
-                           regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-            return UnwindLLDB::RegisterSearchResult::eRegisterFound;
-        }
-        else
-        {
-            std::string unwindplan_name ("");
-            if (m_full_unwind_plan_sp)
-            {
-                unwindplan_name += "via '";
-                unwindplan_name += m_full_unwind_plan_sp->GetSourceName().AsCString();
-                unwindplan_name += "'";
-            }
-            UnwindLogMsg ("no save location for %s (%d) %s", 
-                      regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB),
-                      unwindplan_name.c_str());
-        }
-        return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
-    }
-
-    // unwindplan_regloc has valid contents about where to retrieve the register
-    if (unwindplan_regloc.IsUnspecified())
-    {
-        lldb_private::UnwindLLDB::RegisterLocation new_regloc;
-        new_regloc.type = UnwindLLDB::RegisterLocation::eRegisterNotSaved;
-        m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = new_regloc;
-        UnwindLogMsg ("save location for %s (%d) is unspecified, continue searching", 
-                      regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-        return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
-    }
-
-    if (unwindplan_regloc.IsUndefined())
-    {
-         UnwindLogMsg ("did not supply reg location for %s (%d) because it is volatile",
-                       regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-         return UnwindLLDB::RegisterSearchResult::eRegisterIsVolatile;
-    }
-
-    if (unwindplan_regloc.IsSame())
-    {
-        if (IsFrameZero() == false 
-            && (regnum.GetAsKind (eRegisterKindGeneric) == LLDB_REGNUM_GENERIC_PC
-                || regnum.GetAsKind (eRegisterKindGeneric) == LLDB_REGNUM_GENERIC_RA))
-        {
-            UnwindLogMsg ("register %s (%d) is marked as 'IsSame' - it is a pc or return address reg on a non-zero frame -- treat as if we have no information", 
-                        regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-            return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
-        }
-        else
-        {
-            regloc.type = UnwindLLDB::RegisterLocation::eRegisterInRegister;
-            regloc.location.register_number = regnum.GetAsKind (eRegisterKindLLDB);
-            m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = regloc;
-            UnwindLogMsg ("supplying caller's register %s (%d), saved in register %s (%d)", 
-                        regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB), 
-                        regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-            return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+          if (can_fetch_pc_value && can_fetch_cfa) {
+            have_unwindplan_regloc = true;
+          } else {
+            have_unwindplan_regloc = false;
+          }
+        } else {
+          // We were unable to fall back to another unwind plan
+          have_unwindplan_regloc = false;
         }
+      }
+    }
+  }
+
+  ExecutionContext exe_ctx(m_thread.shared_from_this());
+  Process *process = exe_ctx.GetProcessPtr();
+  if (have_unwindplan_regloc == false) {
+    // If the UnwindPlan failed to give us an unwind location for this register,
+    // we may be able to fall back
+    // to some ABI-defined default.  For example, some ABIs allow to determine
+    // the caller's SP via the CFA.
+    // Also, the ABI may set volatile registers to the undefined state.
+    ABI *abi = process ? process->GetABI().get() : NULL;
+    if (abi) {
+      const RegisterInfo *reg_info =
+          GetRegisterInfoAtIndex(regnum.GetAsKind(eRegisterKindLLDB));
+      if (reg_info &&
+          abi->GetFallbackRegisterLocation(reg_info, unwindplan_regloc)) {
+        UnwindLogMsg(
+            "supplying caller's saved %s (%d)'s location using ABI default",
+            regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+        have_unwindplan_regloc = true;
+      }
+    }
+  }
+
+  if (have_unwindplan_regloc == false) {
+    if (IsFrameZero()) {
+      // This is frame 0 - we should return the actual live register context
+      // value
+      lldb_private::UnwindLLDB::RegisterLocation new_regloc;
+      new_regloc.type =
+          UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext;
+      new_regloc.location.register_number = regnum.GetAsKind(eRegisterKindLLDB);
+      m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = new_regloc;
+      regloc = new_regloc;
+      UnwindLogMsg("supplying caller's register %s (%d) from the live "
+                   "RegisterContext at frame 0",
+                   regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+      return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+    } else {
+      std::string unwindplan_name("");
+      if (m_full_unwind_plan_sp) {
+        unwindplan_name += "via '";
+        unwindplan_name += m_full_unwind_plan_sp->GetSourceName().AsCString();
+        unwindplan_name += "'";
+      }
+      UnwindLogMsg("no save location for %s (%d) %s", regnum.GetName(),
+                   regnum.GetAsKind(eRegisterKindLLDB),
+                   unwindplan_name.c_str());
     }
-
-    if (unwindplan_regloc.IsCFAPlusOffset())
-    {
-        int offset = unwindplan_regloc.GetOffset();
+    return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+  }
+
+  // unwindplan_regloc has valid contents about where to retrieve the register
+  if (unwindplan_regloc.IsUnspecified()) {
+    lldb_private::UnwindLLDB::RegisterLocation new_regloc;
+    new_regloc.type = UnwindLLDB::RegisterLocation::eRegisterNotSaved;
+    m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = new_regloc;
+    UnwindLogMsg("save location for %s (%d) is unspecified, continue searching",
+                 regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+    return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+  }
+
+  if (unwindplan_regloc.IsUndefined()) {
+    UnwindLogMsg(
+        "did not supply reg location for %s (%d) because it is volatile",
+        regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+    return UnwindLLDB::RegisterSearchResult::eRegisterIsVolatile;
+  }
+
+  if (unwindplan_regloc.IsSame()) {
+    if (IsFrameZero() == false &&
+        (regnum.GetAsKind(eRegisterKindGeneric) == LLDB_REGNUM_GENERIC_PC ||
+         regnum.GetAsKind(eRegisterKindGeneric) == LLDB_REGNUM_GENERIC_RA)) {
+      UnwindLogMsg("register %s (%d) is marked as 'IsSame' - it is a pc or "
+                   "return address reg on a non-zero frame -- treat as if we "
+                   "have no information",
+                   regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+      return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+    } else {
+      regloc.type = UnwindLLDB::RegisterLocation::eRegisterInRegister;
+      regloc.location.register_number = regnum.GetAsKind(eRegisterKindLLDB);
+      m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = regloc;
+      UnwindLogMsg(
+          "supplying caller's register %s (%d), saved in register %s (%d)",
+          regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB),
+          regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+      return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+    }
+  }
+
+  if (unwindplan_regloc.IsCFAPlusOffset()) {
+    int offset = unwindplan_regloc.GetOffset();
+    regloc.type = UnwindLLDB::RegisterLocation::eRegisterValueInferred;
+    regloc.location.inferred_value = m_cfa + offset;
+    m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = regloc;
+    UnwindLogMsg("supplying caller's register %s (%d), value is CFA plus "
+                 "offset %d [value is 0x%" PRIx64 "]",
+                 regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB), offset,
+                 regloc.location.inferred_value);
+    return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+  }
+
+  if (unwindplan_regloc.IsAtCFAPlusOffset()) {
+    int offset = unwindplan_regloc.GetOffset();
+    regloc.type = UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation;
+    regloc.location.target_memory_location = m_cfa + offset;
+    m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = regloc;
+    UnwindLogMsg("supplying caller's register %s (%d) from the stack, saved at "
+                 "CFA plus offset %d [saved at 0x%" PRIx64 "]",
+                 regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB), offset,
+                 regloc.location.target_memory_location);
+    return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+  }
+
+  if (unwindplan_regloc.IsInOtherRegister()) {
+    uint32_t unwindplan_regnum = unwindplan_regloc.GetRegisterNumber();
+    RegisterNumber row_regnum(m_thread, unwindplan_registerkind,
+                              unwindplan_regnum);
+    if (row_regnum.GetAsKind(eRegisterKindLLDB) == LLDB_INVALID_REGNUM) {
+      UnwindLogMsg("could not supply caller's %s (%d) location - was saved in "
+                   "another reg but couldn't convert that regnum",
+                   regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+      return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+    }
+    regloc.type = UnwindLLDB::RegisterLocation::eRegisterInRegister;
+    regloc.location.register_number = row_regnum.GetAsKind(eRegisterKindLLDB);
+    m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = regloc;
+    UnwindLogMsg(
+        "supplying caller's register %s (%d), saved in register %s (%d)",
+        regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB),
+        row_regnum.GetName(), row_regnum.GetAsKind(eRegisterKindLLDB));
+    return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+  }
+
+  if (unwindplan_regloc.IsDWARFExpression() ||
+      unwindplan_regloc.IsAtDWARFExpression()) {
+    DataExtractor dwarfdata(unwindplan_regloc.GetDWARFExpressionBytes(),
+                            unwindplan_regloc.GetDWARFExpressionLength(),
+                            process->GetByteOrder(),
+                            process->GetAddressByteSize());
+    ModuleSP opcode_ctx;
+    DWARFExpression dwarfexpr(opcode_ctx, dwarfdata, nullptr, 0,
+                              unwindplan_regloc.GetDWARFExpressionLength());
+    dwarfexpr.SetRegisterKind(unwindplan_registerkind);
+    Value result;
+    Error error;
+    if (dwarfexpr.Evaluate(&exe_ctx, nullptr, nullptr, this, 0, nullptr,
+                           nullptr, result, &error)) {
+      addr_t val;
+      val = result.GetScalar().ULongLong();
+      if (unwindplan_regloc.IsDWARFExpression()) {
         regloc.type = UnwindLLDB::RegisterLocation::eRegisterValueInferred;
-        regloc.location.inferred_value = m_cfa + offset;
-        m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = regloc;
-        UnwindLogMsg ("supplying caller's register %s (%d), value is CFA plus offset %d [value is 0x%" PRIx64 "]", 
-                      regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB), 
-                      offset, regloc.location.inferred_value);
+        regloc.location.inferred_value = val;
+        m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = regloc;
+        UnwindLogMsg("supplying caller's register %s (%d) via DWARF expression "
+                     "(IsDWARFExpression)",
+                     regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
         return UnwindLLDB::RegisterSearchResult::eRegisterFound;
-    }
-
-    if (unwindplan_regloc.IsAtCFAPlusOffset())
-    {
-        int offset = unwindplan_regloc.GetOffset();
-        regloc.type = UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation;
-        regloc.location.target_memory_location = m_cfa + offset;
-        m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = regloc;
-        UnwindLogMsg ("supplying caller's register %s (%d) from the stack, saved at CFA plus offset %d [saved at 0x%" PRIx64 "]", 
-                      regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB), 
-                      offset, regloc.location.target_memory_location);
+      } else {
+        regloc.type =
+            UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation;
+        regloc.location.target_memory_location = val;
+        m_registers[regnum.GetAsKind(eRegisterKindLLDB)] = regloc;
+        UnwindLogMsg("supplying caller's register %s (%d) via DWARF expression "
+                     "(IsAtDWARFExpression)",
+                     regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
         return UnwindLLDB::RegisterSearchResult::eRegisterFound;
+      }
     }
+    UnwindLogMsg("tried to use IsDWARFExpression or IsAtDWARFExpression for %s "
+                 "(%d) but failed",
+                 regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
+    return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+  }
 
-    if (unwindplan_regloc.IsInOtherRegister())
-    {
-        uint32_t unwindplan_regnum = unwindplan_regloc.GetRegisterNumber();
-        RegisterNumber row_regnum (m_thread, unwindplan_registerkind, unwindplan_regnum);
-        if (row_regnum.GetAsKind (eRegisterKindLLDB) == LLDB_INVALID_REGNUM)
-        {
-            UnwindLogMsg ("could not supply caller's %s (%d) location - was saved in another reg but couldn't convert that regnum", 
-                          regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-            return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
-        }
-        regloc.type = UnwindLLDB::RegisterLocation::eRegisterInRegister;
-        regloc.location.register_number = row_regnum.GetAsKind (eRegisterKindLLDB);
-        m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = regloc;
-        UnwindLogMsg ("supplying caller's register %s (%d), saved in register %s (%d)", 
-                      regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB), 
-                      row_regnum.GetName(), row_regnum.GetAsKind (eRegisterKindLLDB));
-        return UnwindLLDB::RegisterSearchResult::eRegisterFound;
-    }
-
-    if (unwindplan_regloc.IsDWARFExpression() || unwindplan_regloc.IsAtDWARFExpression())
-    {
-        DataExtractor dwarfdata (unwindplan_regloc.GetDWARFExpressionBytes(),
-                                 unwindplan_regloc.GetDWARFExpressionLength(),
-                                 process->GetByteOrder(), process->GetAddressByteSize());
-        ModuleSP opcode_ctx;
-        DWARFExpression dwarfexpr (opcode_ctx,
-                                   dwarfdata,
-                                   nullptr,
-                                   0,
-                                   unwindplan_regloc.GetDWARFExpressionLength());
-        dwarfexpr.SetRegisterKind (unwindplan_registerkind);
-        Value result;
-        Error error;
-        if (dwarfexpr.Evaluate (&exe_ctx, nullptr, nullptr, this, 0, nullptr, nullptr, result, &error))
-        {
-            addr_t val;
-            val = result.GetScalar().ULongLong();
-            if (unwindplan_regloc.IsDWARFExpression())
-             {
-                regloc.type = UnwindLLDB::RegisterLocation::eRegisterValueInferred;
-                regloc.location.inferred_value = val;
-                m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = regloc;
-                UnwindLogMsg ("supplying caller's register %s (%d) via DWARF expression (IsDWARFExpression)", 
-                              regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-                return UnwindLLDB::RegisterSearchResult::eRegisterFound;
-            }
-            else
-            {
-                regloc.type = UnwindLLDB::RegisterLocation::eRegisterSavedAtMemoryLocation;
-                regloc.location.target_memory_location = val;
-                m_registers[regnum.GetAsKind (eRegisterKindLLDB)] = regloc;
-                UnwindLogMsg ("supplying caller's register %s (%d) via DWARF expression (IsAtDWARFExpression)", 
-                              regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-                return UnwindLLDB::RegisterSearchResult::eRegisterFound;
-            }
-        }
-        UnwindLogMsg ("tried to use IsDWARFExpression or IsAtDWARFExpression for %s (%d) but failed", 
-                      regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
-        return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
-    }
-
-    UnwindLogMsg ("no save location for %s (%d) in this stack frame", 
-                   regnum.GetName(), regnum.GetAsKind (eRegisterKindLLDB));
+  UnwindLogMsg("no save location for %s (%d) in this stack frame",
+               regnum.GetName(), regnum.GetAsKind(eRegisterKindLLDB));
 
-    // FIXME UnwindPlan::Row types atDWARFExpression and isDWARFExpression are unsupported.
+  // FIXME UnwindPlan::Row types atDWARFExpression and isDWARFExpression are
+  // unsupported.
 
-    return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+  return UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
 }
 
 // TryFallbackUnwindPlan() -- this method is a little tricky.
-// 
-// When this is called, the frame above -- the caller frame, the "previous" frame --
-// is invalid or bad. 
 //
-// Instead of stopping the stack walk here, we'll try a different UnwindPlan and see
-// if we can get a valid frame above us.  
+// When this is called, the frame above -- the caller frame, the "previous"
+// frame --
+// is invalid or bad.
+//
+// Instead of stopping the stack walk here, we'll try a different UnwindPlan and
+// see
+// if we can get a valid frame above us.
 //
-// This most often happens when an unwind plan based on assembly instruction inspection
-// is not correct -- mostly with hand-written assembly functions or functions where the
-// stack frame is set up "out of band", e.g. the kernel saved the register context and
+// This most often happens when an unwind plan based on assembly instruction
+// inspection
+// is not correct -- mostly with hand-written assembly functions or functions
+// where the
+// stack frame is set up "out of band", e.g. the kernel saved the register
+// context and
 // then called an asynchronous trap handler like _sigtramp.
 //
-// Often in these cases, if we just do a dumb stack walk we'll get past this tricky
+// Often in these cases, if we just do a dumb stack walk we'll get past this
+// tricky
 // frame and our usual techniques can continue to be used.
 
-bool
-RegisterContextLLDB::TryFallbackUnwindPlan ()
-{
-    if (m_fallback_unwind_plan_sp.get() == nullptr)
-        return false;
-
-    if (m_full_unwind_plan_sp.get() == nullptr)
-        return false;
-
-    if (m_full_unwind_plan_sp.get() == m_fallback_unwind_plan_sp.get()
-        || m_full_unwind_plan_sp->GetSourceName() == m_fallback_unwind_plan_sp->GetSourceName())
-    {
-        return false;
-    }
+bool RegisterContextLLDB::TryFallbackUnwindPlan() {
+  if (m_fallback_unwind_plan_sp.get() == nullptr)
+    return false;
 
-    // If a compiler generated unwind plan failed, trying the arch default unwindplan
-    // isn't going to do any better.
-    if (m_full_unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolYes)
-        return false;
+  if (m_full_unwind_plan_sp.get() == nullptr)
+    return false;
 
+  if (m_full_unwind_plan_sp.get() == m_fallback_unwind_plan_sp.get() ||
+      m_full_unwind_plan_sp->GetSourceName() ==
+          m_fallback_unwind_plan_sp->GetSourceName()) {
+    return false;
+  }
 
-    // Get the caller's pc value and our own CFA value.
-    // Swap in the fallback unwind plan, re-fetch the caller's pc value and CFA value.
-    // If they're the same, then the fallback unwind plan provides no benefit.
+  // If a compiler generated unwind plan failed, trying the arch default
+  // unwindplan
+  // isn't going to do any better.
+  if (m_full_unwind_plan_sp->GetSourcedFromCompiler() == eLazyBoolYes)
+    return false;
 
-    RegisterNumber pc_regnum (m_thread, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
+  // Get the caller's pc value and our own CFA value.
+  // Swap in the fallback unwind plan, re-fetch the caller's pc value and CFA
+  // value.
+  // If they're the same, then the fallback unwind plan provides no benefit.
+
+  RegisterNumber pc_regnum(m_thread, eRegisterKindGeneric,
+                           LLDB_REGNUM_GENERIC_PC);
+
+  addr_t old_caller_pc_value = LLDB_INVALID_ADDRESS;
+  addr_t new_caller_pc_value = LLDB_INVALID_ADDRESS;
+  addr_t old_this_frame_cfa_value = m_cfa;
+  UnwindLLDB::RegisterLocation regloc;
+  if (SavedLocationForRegister(pc_regnum.GetAsKind(eRegisterKindLLDB),
+                               regloc) ==
+      UnwindLLDB::RegisterSearchResult::eRegisterFound) {
+    const RegisterInfo *reg_info =
+        GetRegisterInfoAtIndex(pc_regnum.GetAsKind(eRegisterKindLLDB));
+    if (reg_info) {
+      RegisterValue reg_value;
+      if (ReadRegisterValueFromRegisterLocation(regloc, reg_info, reg_value)) {
+        old_caller_pc_value = reg_value.GetAsUInt64();
+      }
+    }
+  }
+
+  // This is a tricky wrinkle!  If SavedLocationForRegister() detects a really
+  // impossible
+  // register location for the full unwind plan, it may call
+  // ForceSwitchToFallbackUnwindPlan()
+  // which in turn replaces the full unwindplan with the fallback... in short,
+  // we're done,
+  // we're using the fallback UnwindPlan.
+  // We checked if m_fallback_unwind_plan_sp was nullptr at the top -- the only
+  // way it
+  // became nullptr since then is via SavedLocationForRegister().
+  if (m_fallback_unwind_plan_sp.get() == nullptr)
+    return true;
 
-    addr_t old_caller_pc_value = LLDB_INVALID_ADDRESS;
-    addr_t new_caller_pc_value = LLDB_INVALID_ADDRESS;
-    addr_t old_this_frame_cfa_value = m_cfa;
-    UnwindLLDB::RegisterLocation regloc;
-    if (SavedLocationForRegister (pc_regnum.GetAsKind (eRegisterKindLLDB), regloc) == UnwindLLDB::RegisterSearchResult::eRegisterFound)
-    {
-        const RegisterInfo *reg_info = GetRegisterInfoAtIndex(pc_regnum.GetAsKind (eRegisterKindLLDB));
-        if (reg_info)
-        {
-            RegisterValue reg_value;
-            if (ReadRegisterValueFromRegisterLocation (regloc, reg_info, reg_value))
-            {
-                old_caller_pc_value = reg_value.GetAsUInt64();
-            }
+  // Switch the full UnwindPlan to be the fallback UnwindPlan.  If we decide
+  // this isn't
+  // working, we need to restore.
+  // We'll also need to save & restore the value of the m_cfa ivar.  Save is
+  // down below a bit in 'old_cfa'.
+  UnwindPlanSP original_full_unwind_plan_sp = m_full_unwind_plan_sp;
+  addr_t old_cfa = m_cfa;
+
+  m_registers.clear();
+
+  m_full_unwind_plan_sp = m_fallback_unwind_plan_sp;
+
+  UnwindPlan::RowSP active_row =
+      m_fallback_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
+
+  if (active_row &&
+      active_row->GetCFAValue().GetValueType() !=
+          UnwindPlan::Row::CFAValue::unspecified) {
+    addr_t new_cfa;
+    if (!ReadCFAValueForRow(m_fallback_unwind_plan_sp->GetRegisterKind(),
+                            active_row, new_cfa) ||
+        new_cfa == 0 || new_cfa == 1 || new_cfa == LLDB_INVALID_ADDRESS) {
+      UnwindLogMsg("failed to get cfa with fallback unwindplan");
+      m_fallback_unwind_plan_sp.reset();
+      m_full_unwind_plan_sp = original_full_unwind_plan_sp;
+      m_cfa = old_cfa;
+      return false;
+    }
+    m_cfa = new_cfa;
+
+    if (SavedLocationForRegister(pc_regnum.GetAsKind(eRegisterKindLLDB),
+                                 regloc) ==
+        UnwindLLDB::RegisterSearchResult::eRegisterFound) {
+      const RegisterInfo *reg_info =
+          GetRegisterInfoAtIndex(pc_regnum.GetAsKind(eRegisterKindLLDB));
+      if (reg_info) {
+        RegisterValue reg_value;
+        if (ReadRegisterValueFromRegisterLocation(regloc, reg_info,
+                                                  reg_value)) {
+          new_caller_pc_value = reg_value.GetAsUInt64();
         }
+      }
     }
 
-    // This is a tricky wrinkle!  If SavedLocationForRegister() detects a really impossible 
-    // register location for the full unwind plan, it may call ForceSwitchToFallbackUnwindPlan()
-    // which in turn replaces the full unwindplan with the fallback... in short, we're done,
-    // we're using the fallback UnwindPlan.
-    // We checked if m_fallback_unwind_plan_sp was nullptr at the top -- the only way it 
-    // became nullptr since then is via SavedLocationForRegister().
-    if (m_fallback_unwind_plan_sp.get() == nullptr)
-        return true;
-
-
-    // Switch the full UnwindPlan to be the fallback UnwindPlan.  If we decide this isn't
-    // working, we need to restore.
-    // We'll also need to save & restore the value of the m_cfa ivar.  Save is down below a bit in 'old_cfa'.
-    UnwindPlanSP original_full_unwind_plan_sp = m_full_unwind_plan_sp;
-    addr_t old_cfa = m_cfa;
-
-    m_registers.clear();
-
-    m_full_unwind_plan_sp = m_fallback_unwind_plan_sp;
-
-    UnwindPlan::RowSP active_row = m_fallback_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
-    
-    if (active_row && active_row->GetCFAValue().GetValueType() != UnwindPlan::Row::CFAValue::unspecified)
-    {
-        addr_t new_cfa;
-        if (!ReadCFAValueForRow (m_fallback_unwind_plan_sp->GetRegisterKind(), active_row, new_cfa)
-            || new_cfa == 0 || new_cfa == 1 || new_cfa == LLDB_INVALID_ADDRESS)
-        {
-            UnwindLogMsg ("failed to get cfa with fallback unwindplan");
-            m_fallback_unwind_plan_sp.reset();
-            m_full_unwind_plan_sp = original_full_unwind_plan_sp;
-            m_cfa = old_cfa;
-            return false;
-        }
-        m_cfa = new_cfa;
-
-        if (SavedLocationForRegister (pc_regnum.GetAsKind (eRegisterKindLLDB), regloc) == UnwindLLDB::RegisterSearchResult::eRegisterFound)
-        {
-            const RegisterInfo *reg_info = GetRegisterInfoAtIndex(pc_regnum.GetAsKind (eRegisterKindLLDB));
-            if (reg_info)
-            {
-                RegisterValue reg_value;
-                if (ReadRegisterValueFromRegisterLocation (regloc, reg_info, reg_value))
-                {
-                    new_caller_pc_value = reg_value.GetAsUInt64();
-                }
-            }
-        }
+    if (new_caller_pc_value == LLDB_INVALID_ADDRESS) {
+      UnwindLogMsg("failed to get a pc value for the caller frame with the "
+                   "fallback unwind plan");
+      m_fallback_unwind_plan_sp.reset();
+      m_full_unwind_plan_sp = original_full_unwind_plan_sp;
+      m_cfa = old_cfa;
+      return false;
+    }
 
+    if (old_caller_pc_value != LLDB_INVALID_ADDRESS) {
+      if (old_caller_pc_value == new_caller_pc_value &&
+          new_cfa == old_this_frame_cfa_value) {
+        UnwindLogMsg("fallback unwind plan got the same values for this frame "
+                     "CFA and caller frame pc, not using");
+        m_fallback_unwind_plan_sp.reset();
+        m_full_unwind_plan_sp = original_full_unwind_plan_sp;
+        m_cfa = old_cfa;
+        return false;
+      }
+    }
 
-        if (new_caller_pc_value == LLDB_INVALID_ADDRESS)
-        {
-            UnwindLogMsg ("failed to get a pc value for the caller frame with the fallback unwind plan");
-            m_fallback_unwind_plan_sp.reset();
-            m_full_unwind_plan_sp = original_full_unwind_plan_sp;
-            m_cfa = old_cfa;
-            return false;
-        }
+    UnwindLogMsg("trying to unwind from this function with the UnwindPlan '%s' "
+                 "because UnwindPlan '%s' failed.",
+                 m_fallback_unwind_plan_sp->GetSourceName().GetCString(),
+                 original_full_unwind_plan_sp->GetSourceName().GetCString());
 
-        if (old_caller_pc_value != LLDB_INVALID_ADDRESS)
-        {
-            if (old_caller_pc_value == new_caller_pc_value && new_cfa == old_this_frame_cfa_value)
-            {
-                UnwindLogMsg ("fallback unwind plan got the same values for this frame CFA and caller frame pc, not using");
-                m_fallback_unwind_plan_sp.reset();
-                m_full_unwind_plan_sp = original_full_unwind_plan_sp;
-                m_cfa = old_cfa;
-                return false;
-            }
-        }
+    // We've copied the fallback unwind plan into the full - now clear the
+    // fallback.
+    m_fallback_unwind_plan_sp.reset();
+  }
 
-        UnwindLogMsg ("trying to unwind from this function with the UnwindPlan '%s' because UnwindPlan '%s' failed.", 
-                      m_fallback_unwind_plan_sp->GetSourceName().GetCString(),
-                      original_full_unwind_plan_sp->GetSourceName().GetCString());
+  return true;
+}
 
-        // We've copied the fallback unwind plan into the full - now clear the fallback.
-        m_fallback_unwind_plan_sp.reset();
-    }
+bool RegisterContextLLDB::ForceSwitchToFallbackUnwindPlan() {
+  if (m_fallback_unwind_plan_sp.get() == NULL)
+    return false;
 
-    return true;
-}
+  if (m_full_unwind_plan_sp.get() == NULL)
+    return false;
 
-bool
-RegisterContextLLDB::ForceSwitchToFallbackUnwindPlan ()
-{
-    if (m_fallback_unwind_plan_sp.get() == NULL)
-        return false;
+  if (m_full_unwind_plan_sp.get() == m_fallback_unwind_plan_sp.get() ||
+      m_full_unwind_plan_sp->GetSourceName() ==
+          m_fallback_unwind_plan_sp->GetSourceName()) {
+    return false;
+  }
 
-    if (m_full_unwind_plan_sp.get() == NULL)
-        return false;
+  UnwindPlan::RowSP active_row =
+      m_fallback_unwind_plan_sp->GetRowForFunctionOffset(m_current_offset);
 
-    if (m_full_unwind_plan_sp.get() == m_fallback_unwind_plan_sp.get()
-        || m_full_unwind_plan_sp->GetSourceName() == m_fallback_unwind_plan_sp->GetSourceName())
-    {
-        return false;
+  if (active_row &&
+      active_row->GetCFAValue().GetValueType() !=
+          UnwindPlan::Row::CFAValue::unspecified) {
+    addr_t new_cfa;
+    if (!ReadCFAValueForRow(m_fallback_unwind_plan_sp->GetRegisterKind(),
+                            active_row, new_cfa) ||
+        new_cfa == 0 || new_cfa == 1 || new_cfa == LLDB_INVALID_ADDRESS) {
+      UnwindLogMsg("failed to get cfa with fallback unwindplan");
+      m_fallback_unwind_plan_sp.reset();
+      return false;
     }
 
-    UnwindPlan::RowSP active_row = m_fallback_unwind_plan_sp->GetRowForFunctionOffset (m_current_offset);
-    
-    if (active_row && active_row->GetCFAValue().GetValueType() != UnwindPlan::Row::CFAValue::unspecified)
-    {
-        addr_t new_cfa;
-        if (!ReadCFAValueForRow (m_fallback_unwind_plan_sp->GetRegisterKind(), active_row, new_cfa)
-            || new_cfa == 0 || new_cfa == 1 || new_cfa == LLDB_INVALID_ADDRESS)
-        {
-            UnwindLogMsg ("failed to get cfa with fallback unwindplan");
-            m_fallback_unwind_plan_sp.reset();
-            return false;
-        }
-
-        m_full_unwind_plan_sp = m_fallback_unwind_plan_sp;
-        m_fallback_unwind_plan_sp.reset();
+    m_full_unwind_plan_sp = m_fallback_unwind_plan_sp;
+    m_fallback_unwind_plan_sp.reset();
 
-        m_registers.clear();
+    m_registers.clear();
 
-        m_cfa = new_cfa;
+    m_cfa = new_cfa;
 
-        UnwindLogMsg ("switched unconditionally to the fallback unwindplan %s", m_full_unwind_plan_sp->GetSourceName().GetCString());
-        return true;
-    }
-    return false;
+    UnwindLogMsg("switched unconditionally to the fallback unwindplan %s",
+                 m_full_unwind_plan_sp->GetSourceName().GetCString());
+    return true;
+  }
+  return false;
 }
 
-bool
-RegisterContextLLDB::ReadCFAValueForRow (lldb::RegisterKind row_register_kind,
-                                         const UnwindPlan::RowSP &row,
-                                         addr_t &cfa_value)
-{
-    RegisterValue reg_value;
-
-    cfa_value = LLDB_INVALID_ADDRESS;
-    addr_t cfa_reg_contents;
-
-    switch (row->GetCFAValue().GetValueType())
-    {
-    case UnwindPlan::Row::CFAValue::isRegisterDereferenced:
-        {
-            RegisterNumber cfa_reg (m_thread, row_register_kind, row->GetCFAValue().GetRegisterNumber());
-            if (ReadGPRValue (cfa_reg, cfa_reg_contents))
-            {
-                const RegisterInfo *reg_info = GetRegisterInfoAtIndex (cfa_reg.GetAsKind (eRegisterKindLLDB));
-                RegisterValue reg_value;
-                if (reg_info)
-                {
-                    Error error = ReadRegisterValueFromMemory(reg_info,
-                                                              cfa_reg_contents,
-                                                              reg_info->byte_size,
-                                                              reg_value);
-                    if (error.Success ())
-                    {
-                        cfa_value = reg_value.GetAsUInt64();
-                        UnwindLogMsg ("CFA value via dereferencing reg %s (%d): reg has val 0x%" PRIx64 ", CFA value is 0x%" PRIx64,
-                                      cfa_reg.GetName(), cfa_reg.GetAsKind (eRegisterKindLLDB),
-                                      cfa_reg_contents, cfa_value);
-                        return true;
-                    }
-                    else
-                    {
-                        UnwindLogMsg ("Tried to deref reg %s (%d) [0x%" PRIx64 "] but memory read failed.",
-                                      cfa_reg.GetName(), cfa_reg.GetAsKind (eRegisterKindLLDB),
-                                      cfa_reg_contents);
-                    }
-                }
-            }
-            break;
-        }
-    case UnwindPlan::Row::CFAValue::isRegisterPlusOffset:
-        {
-            RegisterNumber cfa_reg (m_thread, row_register_kind, row->GetCFAValue().GetRegisterNumber());
-            if (ReadGPRValue (cfa_reg, cfa_reg_contents))
-            {
-                if (cfa_reg_contents == LLDB_INVALID_ADDRESS || cfa_reg_contents == 0 || cfa_reg_contents == 1)
-                {
-                    UnwindLogMsg ("Got an invalid CFA register value - reg %s (%d), value 0x%" PRIx64,
-                                  cfa_reg.GetName(), cfa_reg.GetAsKind (eRegisterKindLLDB),
-                                  cfa_reg_contents);
-                    cfa_reg_contents = LLDB_INVALID_ADDRESS;
-                    return false;
-                }
-                cfa_value = cfa_reg_contents + row->GetCFAValue().GetOffset();
-                UnwindLogMsg ("CFA is 0x%" PRIx64 ": Register %s (%d) contents are 0x%" PRIx64 ", offset is %d",
-                              cfa_value,
-                              cfa_reg.GetName(), cfa_reg.GetAsKind (eRegisterKindLLDB),
-                              cfa_reg_contents, row->GetCFAValue().GetOffset());
-                return true;
-            }
-            break;
+bool RegisterContextLLDB::ReadCFAValueForRow(
+    lldb::RegisterKind row_register_kind, const UnwindPlan::RowSP &row,
+    addr_t &cfa_value) {
+  RegisterValue reg_value;
+
+  cfa_value = LLDB_INVALID_ADDRESS;
+  addr_t cfa_reg_contents;
+
+  switch (row->GetCFAValue().GetValueType()) {
+  case UnwindPlan::Row::CFAValue::isRegisterDereferenced: {
+    RegisterNumber cfa_reg(m_thread, row_register_kind,
+                           row->GetCFAValue().GetRegisterNumber());
+    if (ReadGPRValue(cfa_reg, cfa_reg_contents)) {
+      const RegisterInfo *reg_info =
+          GetRegisterInfoAtIndex(cfa_reg.GetAsKind(eRegisterKindLLDB));
+      RegisterValue reg_value;
+      if (reg_info) {
+        Error error = ReadRegisterValueFromMemory(
+            reg_info, cfa_reg_contents, reg_info->byte_size, reg_value);
+        if (error.Success()) {
+          cfa_value = reg_value.GetAsUInt64();
+          UnwindLogMsg(
+              "CFA value via dereferencing reg %s (%d): reg has val 0x%" PRIx64
+              ", CFA value is 0x%" PRIx64,
+              cfa_reg.GetName(), cfa_reg.GetAsKind(eRegisterKindLLDB),
+              cfa_reg_contents, cfa_value);
+          return true;
+        } else {
+          UnwindLogMsg("Tried to deref reg %s (%d) [0x%" PRIx64
+                       "] but memory read failed.",
+                       cfa_reg.GetName(), cfa_reg.GetAsKind(eRegisterKindLLDB),
+                       cfa_reg_contents);
         }
-    case UnwindPlan::Row::CFAValue::isDWARFExpression:
-        {
-            ExecutionContext exe_ctx(m_thread.shared_from_this());
-            Process *process = exe_ctx.GetProcessPtr();
-            DataExtractor dwarfdata (row->GetCFAValue().GetDWARFExpressionBytes(),
-                                     row->GetCFAValue().GetDWARFExpressionLength(),
-                                     process->GetByteOrder(), process->GetAddressByteSize());
-            ModuleSP opcode_ctx;
-            DWARFExpression dwarfexpr (opcode_ctx,
-                                       dwarfdata,
-                                       nullptr,
-                                       0,
-                                       row->GetCFAValue().GetDWARFExpressionLength());
-            dwarfexpr.SetRegisterKind (row_register_kind);
-            Value result;
-            Error error;
-            if (dwarfexpr.Evaluate (&exe_ctx, nullptr, nullptr, this, 0, nullptr, nullptr, result, &error))
-            {
-                cfa_value = result.GetScalar().ULongLong();
-
-                UnwindLogMsg ("CFA value set by DWARF expression is 0x%" PRIx64, cfa_value);
-                return true;
-            }
-            UnwindLogMsg ("Failed to set CFA value via DWARF expression: %s", error.AsCString());
-            break;
-        }
-    default:
+      }
+    }
+    break;
+  }
+  case UnwindPlan::Row::CFAValue::isRegisterPlusOffset: {
+    RegisterNumber cfa_reg(m_thread, row_register_kind,
+                           row->GetCFAValue().GetRegisterNumber());
+    if (ReadGPRValue(cfa_reg, cfa_reg_contents)) {
+      if (cfa_reg_contents == LLDB_INVALID_ADDRESS || cfa_reg_contents == 0 ||
+          cfa_reg_contents == 1) {
+        UnwindLogMsg(
+            "Got an invalid CFA register value - reg %s (%d), value 0x%" PRIx64,
+            cfa_reg.GetName(), cfa_reg.GetAsKind(eRegisterKindLLDB),
+            cfa_reg_contents);
+        cfa_reg_contents = LLDB_INVALID_ADDRESS;
         return false;
-    }
+      }
+      cfa_value = cfa_reg_contents + row->GetCFAValue().GetOffset();
+      UnwindLogMsg(
+          "CFA is 0x%" PRIx64 ": Register %s (%d) contents are 0x%" PRIx64
+          ", offset is %d",
+          cfa_value, cfa_reg.GetName(), cfa_reg.GetAsKind(eRegisterKindLLDB),
+          cfa_reg_contents, row->GetCFAValue().GetOffset());
+      return true;
+    }
+    break;
+  }
+  case UnwindPlan::Row::CFAValue::isDWARFExpression: {
+    ExecutionContext exe_ctx(m_thread.shared_from_this());
+    Process *process = exe_ctx.GetProcessPtr();
+    DataExtractor dwarfdata(row->GetCFAValue().GetDWARFExpressionBytes(),
+                            row->GetCFAValue().GetDWARFExpressionLength(),
+                            process->GetByteOrder(),
+                            process->GetAddressByteSize());
+    ModuleSP opcode_ctx;
+    DWARFExpression dwarfexpr(opcode_ctx, dwarfdata, nullptr, 0,
+                              row->GetCFAValue().GetDWARFExpressionLength());
+    dwarfexpr.SetRegisterKind(row_register_kind);
+    Value result;
+    Error error;
+    if (dwarfexpr.Evaluate(&exe_ctx, nullptr, nullptr, this, 0, nullptr,
+                           nullptr, result, &error)) {
+      cfa_value = result.GetScalar().ULongLong();
+
+      UnwindLogMsg("CFA value set by DWARF expression is 0x%" PRIx64,
+                   cfa_value);
+      return true;
+    }
+    UnwindLogMsg("Failed to set CFA value via DWARF expression: %s",
+                 error.AsCString());
+    break;
+  }
+  default:
     return false;
+  }
+  return false;
 }
 
-// Retrieve a general purpose register value for THIS frame, as saved by the NEXT frame, i.e. the frame that
+// Retrieve a general purpose register value for THIS frame, as saved by the
+// NEXT frame, i.e. the frame that
 // this frame called.  e.g.
 //
 //  foo () { }
@@ -1866,278 +1855,241 @@ RegisterContextLLDB::ReadCFAValueForRow (lldb::RegisterKind row_register_kind,
 //     frame 0 - foo
 //     frame 1 - bar
 //     frame 2 - main
-//  and this RegisterContext is for frame 1 (bar) - if we want to get the pc value for frame 1, we need to ask
+//  and this RegisterContext is for frame 1 (bar) - if we want to get the pc
+//  value for frame 1, we need to ask
 //  where frame 0 (the "next" frame) saved that and retrieve the value.
 
-bool
-RegisterContextLLDB::ReadGPRValue (lldb::RegisterKind register_kind, uint32_t regnum, addr_t &value)
-{
-    if (!IsValid())
-        return false;
-
-    uint32_t lldb_regnum;
-    if (register_kind == eRegisterKindLLDB)
-    {
-        lldb_regnum = regnum;
-    }
-    else if (!m_thread.GetRegisterContext()->ConvertBetweenRegisterKinds (register_kind, regnum, eRegisterKindLLDB, lldb_regnum))
-    {
-        return false;
-    }
+bool RegisterContextLLDB::ReadGPRValue(lldb::RegisterKind register_kind,
+                                       uint32_t regnum, addr_t &value) {
+  if (!IsValid())
+    return false;
 
-    const RegisterInfo *reg_info = GetRegisterInfoAtIndex(lldb_regnum);
-    RegisterValue reg_value;
-    // if this is frame 0 (currently executing frame), get the requested reg contents from the actual thread registers
-    if (IsFrameZero ())
-    {
-        if (m_thread.GetRegisterContext()->ReadRegister (reg_info, reg_value))
-        {
-            value = reg_value.GetAsUInt64();
-            return true;
-        }
-        return false;
-    }
+  uint32_t lldb_regnum;
+  if (register_kind == eRegisterKindLLDB) {
+    lldb_regnum = regnum;
+  } else if (!m_thread.GetRegisterContext()->ConvertBetweenRegisterKinds(
+                 register_kind, regnum, eRegisterKindLLDB, lldb_regnum)) {
+    return false;
+  }
 
-    bool pc_register = false;
-    uint32_t generic_regnum;
-    if (register_kind == eRegisterKindGeneric 
-        && (regnum == LLDB_REGNUM_GENERIC_PC || regnum == LLDB_REGNUM_GENERIC_RA))
-    {
-        pc_register = true;
-    }
-    else if (m_thread.GetRegisterContext()->ConvertBetweenRegisterKinds (register_kind, regnum, eRegisterKindGeneric, generic_regnum)
-             && (generic_regnum == LLDB_REGNUM_GENERIC_PC || generic_regnum == LLDB_REGNUM_GENERIC_RA))
-    {
-        pc_register = true;
-    }
-
-    lldb_private::UnwindLLDB::RegisterLocation regloc;
-    if (!m_parent_unwind.SearchForSavedLocationForRegister (lldb_regnum, regloc, m_frame_number - 1, pc_register))
-    {
-        return false;
-    }
-    if (ReadRegisterValueFromRegisterLocation (regloc, reg_info, reg_value))
-    {
-        value = reg_value.GetAsUInt64();
-        return true;
+  const RegisterInfo *reg_info = GetRegisterInfoAtIndex(lldb_regnum);
+  RegisterValue reg_value;
+  // if this is frame 0 (currently executing frame), get the requested reg
+  // contents from the actual thread registers
+  if (IsFrameZero()) {
+    if (m_thread.GetRegisterContext()->ReadRegister(reg_info, reg_value)) {
+      value = reg_value.GetAsUInt64();
+      return true;
     }
     return false;
+  }
+
+  bool pc_register = false;
+  uint32_t generic_regnum;
+  if (register_kind == eRegisterKindGeneric &&
+      (regnum == LLDB_REGNUM_GENERIC_PC || regnum == LLDB_REGNUM_GENERIC_RA)) {
+    pc_register = true;
+  } else if (m_thread.GetRegisterContext()->ConvertBetweenRegisterKinds(
+                 register_kind, regnum, eRegisterKindGeneric, generic_regnum) &&
+             (generic_regnum == LLDB_REGNUM_GENERIC_PC ||
+              generic_regnum == LLDB_REGNUM_GENERIC_RA)) {
+    pc_register = true;
+  }
+
+  lldb_private::UnwindLLDB::RegisterLocation regloc;
+  if (!m_parent_unwind.SearchForSavedLocationForRegister(
+          lldb_regnum, regloc, m_frame_number - 1, pc_register)) {
+    return false;
+  }
+  if (ReadRegisterValueFromRegisterLocation(regloc, reg_info, reg_value)) {
+    value = reg_value.GetAsUInt64();
+    return true;
+  }
+  return false;
 }
 
-bool
-RegisterContextLLDB::ReadGPRValue (const RegisterNumber &regnum, addr_t &value)
-{
-    return ReadGPRValue (regnum.GetRegisterKind(), regnum.GetRegisterNumber(), value);
+bool RegisterContextLLDB::ReadGPRValue(const RegisterNumber &regnum,
+                                       addr_t &value) {
+  return ReadGPRValue(regnum.GetRegisterKind(), regnum.GetRegisterNumber(),
+                      value);
 }
 
 // Find the value of a register in THIS frame
 
-bool
-RegisterContextLLDB::ReadRegister (const RegisterInfo *reg_info, RegisterValue &value)
-{
-    if (!IsValid())
-        return false;
-
-    const uint32_t lldb_regnum = reg_info->kinds[eRegisterKindLLDB];
-    UnwindLogMsgVerbose ("looking for register saved location for reg %d", lldb_regnum);
-
-    // If this is the 0th frame, hand this over to the live register context
-    if (IsFrameZero ())
-    {
-        UnwindLogMsgVerbose ("passing along to the live register context for reg %d", lldb_regnum);
-        return m_thread.GetRegisterContext()->ReadRegister (reg_info, value);
-    }
-
-    bool is_pc_regnum = false;
-    if (reg_info->kinds[eRegisterKindGeneric] == LLDB_REGNUM_GENERIC_PC 
-        || reg_info->kinds[eRegisterKindGeneric] == LLDB_REGNUM_GENERIC_RA)
-    {
-        is_pc_regnum = true;
-    }
+bool RegisterContextLLDB::ReadRegister(const RegisterInfo *reg_info,
+                                       RegisterValue &value) {
+  if (!IsValid())
+    return false;
 
-    lldb_private::UnwindLLDB::RegisterLocation regloc;
-    // Find out where the NEXT frame saved THIS frame's register contents
-    if (!m_parent_unwind.SearchForSavedLocationForRegister (lldb_regnum, regloc, m_frame_number - 1, is_pc_regnum))
-        return false;
+  const uint32_t lldb_regnum = reg_info->kinds[eRegisterKindLLDB];
+  UnwindLogMsgVerbose("looking for register saved location for reg %d",
+                      lldb_regnum);
+
+  // If this is the 0th frame, hand this over to the live register context
+  if (IsFrameZero()) {
+    UnwindLogMsgVerbose("passing along to the live register context for reg %d",
+                        lldb_regnum);
+    return m_thread.GetRegisterContext()->ReadRegister(reg_info, value);
+  }
+
+  bool is_pc_regnum = false;
+  if (reg_info->kinds[eRegisterKindGeneric] == LLDB_REGNUM_GENERIC_PC ||
+      reg_info->kinds[eRegisterKindGeneric] == LLDB_REGNUM_GENERIC_RA) {
+    is_pc_regnum = true;
+  }
+
+  lldb_private::UnwindLLDB::RegisterLocation regloc;
+  // Find out where the NEXT frame saved THIS frame's register contents
+  if (!m_parent_unwind.SearchForSavedLocationForRegister(
+          lldb_regnum, regloc, m_frame_number - 1, is_pc_regnum))
+    return false;
 
-    return ReadRegisterValueFromRegisterLocation (regloc, reg_info, value);
+  return ReadRegisterValueFromRegisterLocation(regloc, reg_info, value);
 }
 
-bool
-RegisterContextLLDB::WriteRegister (const RegisterInfo *reg_info, const RegisterValue &value)
-{
-    if (!IsValid())
-        return false;
-
-    const uint32_t lldb_regnum = reg_info->kinds[eRegisterKindLLDB];
-    UnwindLogMsgVerbose ("looking for register saved location for reg %d", lldb_regnum);
-
-    // If this is the 0th frame, hand this over to the live register context
-    if (IsFrameZero ())
-    {
-        UnwindLogMsgVerbose ("passing along to the live register context for reg %d", lldb_regnum);
-        return m_thread.GetRegisterContext()->WriteRegister (reg_info, value);
-    }
+bool RegisterContextLLDB::WriteRegister(const RegisterInfo *reg_info,
+                                        const RegisterValue &value) {
+  if (!IsValid())
+    return false;
 
-    lldb_private::UnwindLLDB::RegisterLocation regloc;
-    // Find out where the NEXT frame saved THIS frame's register contents
-    if (!m_parent_unwind.SearchForSavedLocationForRegister (lldb_regnum, regloc, m_frame_number - 1, false))
-        return false;
+  const uint32_t lldb_regnum = reg_info->kinds[eRegisterKindLLDB];
+  UnwindLogMsgVerbose("looking for register saved location for reg %d",
+                      lldb_regnum);
+
+  // If this is the 0th frame, hand this over to the live register context
+  if (IsFrameZero()) {
+    UnwindLogMsgVerbose("passing along to the live register context for reg %d",
+                        lldb_regnum);
+    return m_thread.GetRegisterContext()->WriteRegister(reg_info, value);
+  }
+
+  lldb_private::UnwindLLDB::RegisterLocation regloc;
+  // Find out where the NEXT frame saved THIS frame's register contents
+  if (!m_parent_unwind.SearchForSavedLocationForRegister(
+          lldb_regnum, regloc, m_frame_number - 1, false))
+    return false;
 
-    return WriteRegisterValueToRegisterLocation (regloc, reg_info, value);
+  return WriteRegisterValueToRegisterLocation(regloc, reg_info, value);
 }
 
 // Don't need to implement this one
-bool
-RegisterContextLLDB::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
-    return false;
+bool RegisterContextLLDB::ReadAllRegisterValues(lldb::DataBufferSP &data_sp) {
+  return false;
 }
 
 // Don't need to implement this one
-bool
-RegisterContextLLDB::WriteAllRegisterValues (const lldb::DataBufferSP& data_sp)
-{
-    return false;
+bool RegisterContextLLDB::WriteAllRegisterValues(
+    const lldb::DataBufferSP &data_sp) {
+  return false;
 }
 
 // Retrieve the pc value for THIS from
 
-bool
-RegisterContextLLDB::GetCFA (addr_t& cfa)
-{
-    if (!IsValid())
-    {
-        return false;
-    }
-    if (m_cfa == LLDB_INVALID_ADDRESS)
-    {
-        return false;
-    }
-    cfa = m_cfa;
-    return true;
+bool RegisterContextLLDB::GetCFA(addr_t &cfa) {
+  if (!IsValid()) {
+    return false;
+  }
+  if (m_cfa == LLDB_INVALID_ADDRESS) {
+    return false;
+  }
+  cfa = m_cfa;
+  return true;
 }
 
-
-RegisterContextLLDB::SharedPtr
-RegisterContextLLDB::GetNextFrame () const
-{
-    RegisterContextLLDB::SharedPtr regctx;
-    if (m_frame_number == 0)
-      return regctx;
-    return m_parent_unwind.GetRegisterContextForFrameNum (m_frame_number - 1);
+RegisterContextLLDB::SharedPtr RegisterContextLLDB::GetNextFrame() const {
+  RegisterContextLLDB::SharedPtr regctx;
+  if (m_frame_number == 0)
+    return regctx;
+  return m_parent_unwind.GetRegisterContextForFrameNum(m_frame_number - 1);
 }
 
-RegisterContextLLDB::SharedPtr
-RegisterContextLLDB::GetPrevFrame () const
-{
-    RegisterContextLLDB::SharedPtr regctx;
-    return m_parent_unwind.GetRegisterContextForFrameNum (m_frame_number + 1);
+RegisterContextLLDB::SharedPtr RegisterContextLLDB::GetPrevFrame() const {
+  RegisterContextLLDB::SharedPtr regctx;
+  return m_parent_unwind.GetRegisterContextForFrameNum(m_frame_number + 1);
 }
 
 // Retrieve the address of the start of the function of THIS frame
 
-bool
-RegisterContextLLDB::GetStartPC (addr_t& start_pc)
-{
-    if (!IsValid())
-        return false;
+bool RegisterContextLLDB::GetStartPC(addr_t &start_pc) {
+  if (!IsValid())
+    return false;
 
-    if (!m_start_pc.IsValid())
-    {
-        return ReadPC (start_pc);
-    }
-    start_pc = m_start_pc.GetLoadAddress (CalculateTarget().get());
-    return true;
+  if (!m_start_pc.IsValid()) {
+    return ReadPC(start_pc);
+  }
+  start_pc = m_start_pc.GetLoadAddress(CalculateTarget().get());
+  return true;
 }
 
 // Retrieve the current pc value for THIS frame, as saved by the NEXT frame.
 
-bool
-RegisterContextLLDB::ReadPC (addr_t& pc)
-{
-    if (!IsValid())
-        return false;
-
-    bool above_trap_handler = false;
-    if (GetNextFrame().get() && GetNextFrame()->IsValid() && GetNextFrame()->IsTrapHandlerFrame())
-        above_trap_handler = true;
+bool RegisterContextLLDB::ReadPC(addr_t &pc) {
+  if (!IsValid())
+    return false;
 
-    if (ReadGPRValue (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, pc))
-    {
-        // A pc value of 0 or 1 is impossible in the middle of the stack -- it indicates the end of a stack walk.
-        // On the currently executing frame (or such a frame interrupted asynchronously by sigtramp et al) this may
-        // occur if code has jumped through a NULL pointer -- we want to be able to unwind past that frame to help
-        // find the bug.
-
-        if (m_all_registers_available == false
-            && above_trap_handler == false
-            && (pc == 0 || pc == 1))
-        {
-            return false;
-        }
-        else
-        {
-            return true;
-        }
-    }
-    else
-    {
-        return false;
-    }
+  bool above_trap_handler = false;
+  if (GetNextFrame().get() && GetNextFrame()->IsValid() &&
+      GetNextFrame()->IsTrapHandlerFrame())
+    above_trap_handler = true;
+
+  if (ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, pc)) {
+    // A pc value of 0 or 1 is impossible in the middle of the stack -- it
+    // indicates the end of a stack walk.
+    // On the currently executing frame (or such a frame interrupted
+    // asynchronously by sigtramp et al) this may
+    // occur if code has jumped through a NULL pointer -- we want to be able to
+    // unwind past that frame to help
+    // find the bug.
+
+    if (m_all_registers_available == false && above_trap_handler == false &&
+        (pc == 0 || pc == 1)) {
+      return false;
+    } else {
+      return true;
+    }
+  } else {
+    return false;
+  }
 }
 
-
-void
-RegisterContextLLDB::UnwindLogMsg (const char *fmt, ...)
-{
-    Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
-    if (log)
-    {
-        va_list args;
-        va_start (args, fmt);
-
-        char *logmsg;
-        if (vasprintf (&logmsg, fmt, args) == -1 || logmsg == NULL)
-        {
-            if (logmsg)
-                free (logmsg);
-            va_end (args);
-            return;
-        }
-        va_end (args);
-
-        log->Printf ("%*sth%d/fr%u %s",
-                      m_frame_number < 100 ? m_frame_number : 100, "", m_thread.GetIndexID(), m_frame_number,
-                      logmsg);
-        free (logmsg);
-    }
+void RegisterContextLLDB::UnwindLogMsg(const char *fmt, ...) {
+  Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+  if (log) {
+    va_list args;
+    va_start(args, fmt);
+
+    char *logmsg;
+    if (vasprintf(&logmsg, fmt, args) == -1 || logmsg == NULL) {
+      if (logmsg)
+        free(logmsg);
+      va_end(args);
+      return;
+    }
+    va_end(args);
+
+    log->Printf("%*sth%d/fr%u %s", m_frame_number < 100 ? m_frame_number : 100,
+                "", m_thread.GetIndexID(), m_frame_number, logmsg);
+    free(logmsg);
+  }
 }
 
-void
-RegisterContextLLDB::UnwindLogMsgVerbose (const char *fmt, ...)
-{
-    Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
-    if (log && log->GetVerbose())
-    {
-        va_list args;
-        va_start (args, fmt);
-
-        char *logmsg;
-        if (vasprintf (&logmsg, fmt, args) == -1 || logmsg == NULL)
-        {
-            if (logmsg)
-                free (logmsg);
-            va_end (args);
-            return;
-        }
-        va_end (args);
-
-        log->Printf ("%*sth%d/fr%u %s",
-                      m_frame_number < 100 ? m_frame_number : 100, "", m_thread.GetIndexID(), m_frame_number,
-                      logmsg);
-        free (logmsg);
-    }
+void RegisterContextLLDB::UnwindLogMsgVerbose(const char *fmt, ...) {
+  Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+  if (log && log->GetVerbose()) {
+    va_list args;
+    va_start(args, fmt);
+
+    char *logmsg;
+    if (vasprintf(&logmsg, fmt, args) == -1 || logmsg == NULL) {
+      if (logmsg)
+        free(logmsg);
+      va_end(args);
+      return;
+    }
+    va_end(args);
+
+    log->Printf("%*sth%d/fr%u %s", m_frame_number < 100 ? m_frame_number : 100,
+                "", m_thread.GetIndexID(), m_frame_number, logmsg);
+    free(logmsg);
+  }
 }
-
-
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLLDB.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLLDB.h
index 68dca3d..cb22eed 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLLDB.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLLDB.h
@@ -1,4 +1,5 @@
-//===-- RegisterContextLLDB.h --------------------------------------------*- C++ -*-===//
+//===-- RegisterContextLLDB.h --------------------------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -16,253 +17,247 @@
 
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
-#include "lldb/Symbol/UnwindPlan.h"
+#include "UnwindLLDB.h"
 #include "lldb/Symbol/SymbolContext.h"
+#include "lldb/Symbol/UnwindPlan.h"
+#include "lldb/Target/RegisterContext.h"
 #include "lldb/Utility/RegisterNumber.h"
-#include "UnwindLLDB.h"
+#include "lldb/lldb-private.h"
 
 namespace lldb_private {
 
 class UnwindLLDB;
 
-class RegisterContextLLDB : public lldb_private::RegisterContext
-{
+class RegisterContextLLDB : public lldb_private::RegisterContext {
 public:
-    typedef std::shared_ptr<RegisterContextLLDB> SharedPtr;
+  typedef std::shared_ptr<RegisterContextLLDB> SharedPtr;
 
-    RegisterContextLLDB (lldb_private::Thread &thread,
-                         const SharedPtr& next_frame,
-                         lldb_private::SymbolContext& sym_ctx,
-                         uint32_t frame_number, lldb_private::UnwindLLDB& unwind_lldb);
+  RegisterContextLLDB(lldb_private::Thread &thread, const SharedPtr &next_frame,
+                      lldb_private::SymbolContext &sym_ctx,
+                      uint32_t frame_number,
+                      lldb_private::UnwindLLDB &unwind_lldb);
 
-    ~RegisterContextLLDB() override = default;
+  ~RegisterContextLLDB() override = default;
 
-    void
-    InvalidateAllRegisters() override;
+  void InvalidateAllRegisters() override;
 
-    size_t
-    GetRegisterCount() override;
+  size_t GetRegisterCount() override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
 
-    size_t
-    GetRegisterSetCount() override;
+  size_t GetRegisterSetCount() override;
 
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t reg_set) override;
+  const lldb_private::RegisterSet *GetRegisterSet(size_t reg_set) override;
 
-    bool
-    ReadRegister(const lldb_private::RegisterInfo *reg_info,
-                 lldb_private::RegisterValue &value) override;
+  bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+                    lldb_private::RegisterValue &value) override;
 
-    bool
-    WriteRegister(const lldb_private::RegisterInfo *reg_info,
-                  const lldb_private::RegisterValue &value) override;
+  bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+                     const lldb_private::RegisterValue &value) override;
 
-    bool
-    ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+  bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
 
-    bool
-    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+  bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
 
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
 
-    bool
-    IsValid () const;
+  bool IsValid() const;
 
-    bool
-    IsTrapHandlerFrame () const;
+  bool IsTrapHandlerFrame() const;
 
-    bool
-    GetCFA (lldb::addr_t& cfa);
+  bool GetCFA(lldb::addr_t &cfa);
 
-    bool
-    GetStartPC (lldb::addr_t& start_pc);
+  bool GetStartPC(lldb::addr_t &start_pc);
 
-    bool
-    ReadPC (lldb::addr_t& start_pc);
+  bool ReadPC(lldb::addr_t &start_pc);
 
 private:
-
-    enum FrameType
-    {
-        eNormalFrame,
-        eTrapHandlerFrame,
-        eDebuggerFrame,  // a debugger inferior function call frame; we get caller's registers from debugger
-        eSkipFrame,      // The unwind resulted in a bogus frame but may get back on track so we don't want to give up yet
-        eNotAValidFrame  // this frame is invalid for some reason - most likely it is past the top (end) of the stack
-    };
-
-    // UnwindLLDB needs to pass around references to RegisterLocations
-    friend class UnwindLLDB;
-
-    // Returns true if we have an unwind loop -- the same stack frame unwinding 
-    // multiple times.
-    bool
-    CheckIfLoopingStack ();
-
-    // Indicates whether this frame is frame zero -- the currently
-    // executing frame -- or not.
-    bool
-    IsFrameZero () const;
-
-    void
-    InitializeZerothFrame ();
-
-    void
-    InitializeNonZerothFrame();
-
-    SharedPtr
-    GetNextFrame () const;
-
-    SharedPtr
-    GetPrevFrame () const;
-
-    // A SkipFrame occurs when the unwind out of frame 0 didn't go right -- we've got one bogus frame at frame #1.
-    // There is a good chance we'll get back on track if we follow the frame pointer chain (or whatever is appropriate
-    // on this ABI) so we allow one invalid frame to be in the stack.  Ideally we'll mark this frame specially at some
-    // point and indicate to the user that the unwinder had a hiccup.  Often when this happens we will miss a frame of
-    // the program's actual stack in the unwind and we want to flag that for the user somehow.
-    bool
-    IsSkipFrame () const;
-
-    //------------------------------------------------------------------
-    /// Determines if a SymbolContext is a trap handler or not
-    ///
-    /// Given a SymbolContext, determines if this is a trap handler function
-    /// aka asynchronous signal handler.
-    ///
-    /// @return
-    ///     Returns true if the SymbolContext is a trap handler.
-    //------------------------------------------------------------------
-    bool
-    IsTrapHandlerSymbol (lldb_private::Process *process, const lldb_private::SymbolContext &m_sym_ctx) const;
-
-    // Provide a location for where THIS function saved the CALLER's register value
-    // Or a frame "below" this one saved it, i.e. a function called by this one, preserved a register that this
-    // function didn't modify/use.
-    //
-    // The RegisterLocation type may be set to eRegisterNotAvailable -- this will happen for a volatile register
-    // being queried mid-stack.  Instead of floating frame 0's contents of that register up the stack (which may
-    // or may not be the value of that reg when the function was executing), we won't return any value.
-    //
-    // If a non-volatile register (a "preserved" register) is requested mid-stack and no frames "below" the requested
-    // stack have saved the register anywhere, it is safe to assume that frame 0's register values are still the same
-    // as the requesting frame's.
-    lldb_private::UnwindLLDB::RegisterSearchResult
-    SavedLocationForRegister (uint32_t lldb_regnum, lldb_private::UnwindLLDB::RegisterLocation &regloc);
-
-    bool
-    ReadRegisterValueFromRegisterLocation (lldb_private::UnwindLLDB::RegisterLocation regloc,
-                                           const lldb_private::RegisterInfo *reg_info,
-                                           lldb_private::RegisterValue &value);
-
-    bool
-    WriteRegisterValueToRegisterLocation (lldb_private::UnwindLLDB::RegisterLocation regloc,
-                                          const lldb_private::RegisterInfo *reg_info,
-                                          const lldb_private::RegisterValue &value);
-
-    //------------------------------------------------------------------
-    /// If the unwind has to the caller frame has failed, try something else
-    ///
-    /// If lldb is using an assembly language based UnwindPlan for a frame and
-    /// the unwind to the caller frame fails, try falling back to a generic
-    /// UnwindPlan (architecture default unwindplan) to see if that might work
-    /// better.  This is mostly helping to work around problems where the 
-    /// assembly language inspection fails on hand-written assembly code.
-    ///
-    /// @return
-    ///     Returns true if a fallback unwindplan was found & was installed.
-    //------------------------------------------------------------------
-    bool
-    TryFallbackUnwindPlan ();
-
-    //------------------------------------------------------------------
-    /// Switch to the fallback unwind plan unconditionally without any safety
-    /// checks that it is providing better results than the normal unwind plan.
-    ///
-    /// The only time it is valid to call this method is if the full unwindplan is
-    /// found to be fundamentally incorrect/impossible.
-    ///
-    /// Returns true if it was able to install the fallback unwind plan.
-    //------------------------------------------------------------------
-    bool
-    ForceSwitchToFallbackUnwindPlan ();
-
-    // Get the contents of a general purpose (address-size) register for this frame
-    // (usually retrieved from the next frame)
-    bool
-    ReadGPRValue (lldb::RegisterKind register_kind, uint32_t regnum, lldb::addr_t &value);
-
-    bool
-    ReadGPRValue (const RegisterNumber &reg_num, lldb::addr_t &value);
-
-    // Get the CFA register for a given frame.
-    bool
-    ReadCFAValueForRow (lldb::RegisterKind register_kind, const UnwindPlan::RowSP &row, lldb::addr_t &value);
-
-    lldb::UnwindPlanSP
-    GetFastUnwindPlanForFrame ();
-
-    lldb::UnwindPlanSP
-    GetFullUnwindPlanForFrame ();
-
-    void
-    UnwindLogMsg (const char *fmt, ...) __attribute__ ((format (printf, 2, 3)));
-
-    void
-    UnwindLogMsgVerbose (const char *fmt, ...) __attribute__ ((format (printf, 2, 3)));
-
-    bool
-    IsUnwindPlanValidForCurrentPC(lldb::UnwindPlanSP unwind_plan_sp, int &valid_pc_offset);
-
-    lldb_private::Thread& m_thread;
-
-    ///
-    // The following tell us how to retrieve the CALLER's register values (ie the "previous" frame, aka the frame above)
-    // i.e. where THIS frame saved them
-    ///
-
-    lldb::UnwindPlanSP m_fast_unwind_plan_sp;     // may be NULL
-    lldb::UnwindPlanSP m_full_unwind_plan_sp;
-    lldb::UnwindPlanSP m_fallback_unwind_plan_sp; // may be NULL
-
-    bool m_all_registers_available;               // Can we retrieve all regs or just nonvolatile regs?
-    int m_frame_type;                             // enum FrameType
-
-    lldb::addr_t m_cfa;
-    lldb_private::Address m_start_pc;
-    lldb_private::Address m_current_pc;
-
-    int m_current_offset;                         // how far into the function we've executed; -1 if unknown
-                                                  // 0 if no instructions have been executed yet.
-
-    int m_current_offset_backed_up_one;           // how far into the function we've executed; -1 if unknown
-                                                  // 0 if no instructions have been executed yet.
-                                                  // On architectures where the return address on the stack points
-                                                  // to the instruction after the CALL, this value will have 1
-                                                  // subtracted from it.  Else a function that ends in a CALL will
-                                                  // have an offset pointing into the next function's address range.
-                                                  // m_current_pc has the actual address of the "current" pc.
-
-    lldb_private::SymbolContext& m_sym_ctx;
-    bool m_sym_ctx_valid;                         // if ResolveSymbolContextForAddress fails, don't try to use m_sym_ctx
-
-    uint32_t m_frame_number;                      // What stack frame this RegisterContext is
-
-    std::map<uint32_t, lldb_private::UnwindLLDB::RegisterLocation> m_registers; // where to find reg values for this frame
-
-    lldb_private::UnwindLLDB& m_parent_unwind;    // The UnwindLLDB that is creating this RegisterContextLLDB
-
-    //------------------------------------------------------------------
-    // For RegisterContextLLDB only
-    //------------------------------------------------------------------
-
-    DISALLOW_COPY_AND_ASSIGN (RegisterContextLLDB);
+  enum FrameType {
+    eNormalFrame,
+    eTrapHandlerFrame,
+    eDebuggerFrame, // a debugger inferior function call frame; we get caller's
+                    // registers from debugger
+    eSkipFrame,     // The unwind resulted in a bogus frame but may get back on
+                    // track so we don't want to give up yet
+    eNotAValidFrame // this frame is invalid for some reason - most likely it is
+                    // past the top (end) of the stack
+  };
+
+  // UnwindLLDB needs to pass around references to RegisterLocations
+  friend class UnwindLLDB;
+
+  // Returns true if we have an unwind loop -- the same stack frame unwinding
+  // multiple times.
+  bool CheckIfLoopingStack();
+
+  // Indicates whether this frame is frame zero -- the currently
+  // executing frame -- or not.
+  bool IsFrameZero() const;
+
+  void InitializeZerothFrame();
+
+  void InitializeNonZerothFrame();
+
+  SharedPtr GetNextFrame() const;
+
+  SharedPtr GetPrevFrame() const;
+
+  // A SkipFrame occurs when the unwind out of frame 0 didn't go right -- we've
+  // got one bogus frame at frame #1.
+  // There is a good chance we'll get back on track if we follow the frame
+  // pointer chain (or whatever is appropriate
+  // on this ABI) so we allow one invalid frame to be in the stack.  Ideally
+  // we'll mark this frame specially at some
+  // point and indicate to the user that the unwinder had a hiccup.  Often when
+  // this happens we will miss a frame of
+  // the program's actual stack in the unwind and we want to flag that for the
+  // user somehow.
+  bool IsSkipFrame() const;
+
+  //------------------------------------------------------------------
+  /// Determines if a SymbolContext is a trap handler or not
+  ///
+  /// Given a SymbolContext, determines if this is a trap handler function
+  /// aka asynchronous signal handler.
+  ///
+  /// @return
+  ///     Returns true if the SymbolContext is a trap handler.
+  //------------------------------------------------------------------
+  bool IsTrapHandlerSymbol(lldb_private::Process *process,
+                           const lldb_private::SymbolContext &m_sym_ctx) const;
+
+  // Provide a location for where THIS function saved the CALLER's register
+  // value
+  // Or a frame "below" this one saved it, i.e. a function called by this one,
+  // preserved a register that this
+  // function didn't modify/use.
+  //
+  // The RegisterLocation type may be set to eRegisterNotAvailable -- this will
+  // happen for a volatile register
+  // being queried mid-stack.  Instead of floating frame 0's contents of that
+  // register up the stack (which may
+  // or may not be the value of that reg when the function was executing), we
+  // won't return any value.
+  //
+  // If a non-volatile register (a "preserved" register) is requested mid-stack
+  // and no frames "below" the requested
+  // stack have saved the register anywhere, it is safe to assume that frame 0's
+  // register values are still the same
+  // as the requesting frame's.
+  lldb_private::UnwindLLDB::RegisterSearchResult
+  SavedLocationForRegister(uint32_t lldb_regnum,
+                           lldb_private::UnwindLLDB::RegisterLocation &regloc);
+
+  bool ReadRegisterValueFromRegisterLocation(
+      lldb_private::UnwindLLDB::RegisterLocation regloc,
+      const lldb_private::RegisterInfo *reg_info,
+      lldb_private::RegisterValue &value);
+
+  bool WriteRegisterValueToRegisterLocation(
+      lldb_private::UnwindLLDB::RegisterLocation regloc,
+      const lldb_private::RegisterInfo *reg_info,
+      const lldb_private::RegisterValue &value);
+
+  //------------------------------------------------------------------
+  /// If the unwind has to the caller frame has failed, try something else
+  ///
+  /// If lldb is using an assembly language based UnwindPlan for a frame and
+  /// the unwind to the caller frame fails, try falling back to a generic
+  /// UnwindPlan (architecture default unwindplan) to see if that might work
+  /// better.  This is mostly helping to work around problems where the
+  /// assembly language inspection fails on hand-written assembly code.
+  ///
+  /// @return
+  ///     Returns true if a fallback unwindplan was found & was installed.
+  //------------------------------------------------------------------
+  bool TryFallbackUnwindPlan();
+
+  //------------------------------------------------------------------
+  /// Switch to the fallback unwind plan unconditionally without any safety
+  /// checks that it is providing better results than the normal unwind plan.
+  ///
+  /// The only time it is valid to call this method is if the full unwindplan is
+  /// found to be fundamentally incorrect/impossible.
+  ///
+  /// Returns true if it was able to install the fallback unwind plan.
+  //------------------------------------------------------------------
+  bool ForceSwitchToFallbackUnwindPlan();
+
+  // Get the contents of a general purpose (address-size) register for this
+  // frame
+  // (usually retrieved from the next frame)
+  bool ReadGPRValue(lldb::RegisterKind register_kind, uint32_t regnum,
+                    lldb::addr_t &value);
+
+  bool ReadGPRValue(const RegisterNumber &reg_num, lldb::addr_t &value);
+
+  // Get the CFA register for a given frame.
+  bool ReadCFAValueForRow(lldb::RegisterKind register_kind,
+                          const UnwindPlan::RowSP &row, lldb::addr_t &value);
+
+  lldb::UnwindPlanSP GetFastUnwindPlanForFrame();
+
+  lldb::UnwindPlanSP GetFullUnwindPlanForFrame();
+
+  void UnwindLogMsg(const char *fmt, ...) __attribute__((format(printf, 2, 3)));
+
+  void UnwindLogMsgVerbose(const char *fmt, ...)
+      __attribute__((format(printf, 2, 3)));
+
+  bool IsUnwindPlanValidForCurrentPC(lldb::UnwindPlanSP unwind_plan_sp,
+                                     int &valid_pc_offset);
+
+  lldb_private::Thread &m_thread;
+
+  ///
+  // The following tell us how to retrieve the CALLER's register values (ie the
+  // "previous" frame, aka the frame above)
+  // i.e. where THIS frame saved them
+  ///
+
+  lldb::UnwindPlanSP m_fast_unwind_plan_sp; // may be NULL
+  lldb::UnwindPlanSP m_full_unwind_plan_sp;
+  lldb::UnwindPlanSP m_fallback_unwind_plan_sp; // may be NULL
+
+  bool m_all_registers_available; // Can we retrieve all regs or just
+                                  // nonvolatile regs?
+  int m_frame_type;               // enum FrameType
+
+  lldb::addr_t m_cfa;
+  lldb_private::Address m_start_pc;
+  lldb_private::Address m_current_pc;
+
+  int m_current_offset; // how far into the function we've executed; -1 if
+                        // unknown
+                        // 0 if no instructions have been executed yet.
+
+  int m_current_offset_backed_up_one; // how far into the function we've
+                                      // executed; -1 if unknown
+  // 0 if no instructions have been executed yet.
+  // On architectures where the return address on the stack points
+  // to the instruction after the CALL, this value will have 1
+  // subtracted from it.  Else a function that ends in a CALL will
+  // have an offset pointing into the next function's address range.
+  // m_current_pc has the actual address of the "current" pc.
+
+  lldb_private::SymbolContext &m_sym_ctx;
+  bool m_sym_ctx_valid; // if ResolveSymbolContextForAddress fails, don't try to
+                        // use m_sym_ctx
+
+  uint32_t m_frame_number; // What stack frame this RegisterContext is
+
+  std::map<uint32_t, lldb_private::UnwindLLDB::RegisterLocation>
+      m_registers; // where to find reg values for this frame
+
+  lldb_private::UnwindLLDB &m_parent_unwind; // The UnwindLLDB that is creating
+                                             // this RegisterContextLLDB
+
+  //------------------------------------------------------------------
+  // For RegisterContextLLDB only
+  //------------------------------------------------------------------
+
+  DISALLOW_COPY_AND_ASSIGN(RegisterContextLLDB);
 };
 
 } // namespace lldb_private
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp
index a4d8738..afa105f 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp
@@ -7,12 +7,12 @@
 //
 //===---------------------------------------------------------------------===//
 
+#include <cassert>
 #include <stddef.h>
 #include <vector>
-#include <cassert>
 
-#include "llvm/Support/Compiler.h"
 #include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
 
 #include "RegisterContextLinux_arm.h"
 
@@ -20,14 +20,31 @@ using namespace lldb;
 using namespace lldb_private;
 
 // Based on RegisterContextDarwin_arm.cpp
-#define GPR_OFFSET(idx) ((idx) * 4)
-#define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextLinux_arm::GPR))
-#define FPSCR_OFFSET (LLVM_EXTENSION offsetof (RegisterContextLinux_arm::FPU, fpscr) + sizeof (RegisterContextLinux_arm::GPR))
-#define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU))
-#define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextLinux_arm::DBG, reg) + sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU) + sizeof (RegisterContextLinux_arm::EXC)))
+#define GPR_OFFSET(idx) ((idx)*4)
+#define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterContextLinux_arm::GPR))
+#define FPSCR_OFFSET                                                           \
+  (LLVM_EXTENSION offsetof(RegisterContextLinux_arm::FPU, fpscr) +             \
+   sizeof(RegisterContextLinux_arm::GPR))
+#define EXC_OFFSET(idx)                                                        \
+  ((idx)*4 + sizeof(RegisterContextLinux_arm::GPR) +                           \
+   sizeof(RegisterContextLinux_arm::FPU))
+#define DBG_OFFSET(reg)                                                        \
+  ((LLVM_EXTENSION offsetof(RegisterContextLinux_arm::DBG, reg) +              \
+    sizeof(RegisterContextLinux_arm::GPR) +                                    \
+    sizeof(RegisterContextLinux_arm::FPU) +                                    \
+    sizeof(RegisterContextLinux_arm::EXC)))
 
-#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextLinux_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU) + sizeof (RegisterContextLinux_arm::EXC))
+#define DEFINE_DBG(reg, i)                                                     \
+  #reg, NULL, sizeof(((RegisterContextLinux_arm::DBG *) NULL)->reg[i]),        \
+                      DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex,           \
+                                 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,    \
+                                  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,    \
+                                  dbg_##reg##i },                              \
+                                  NULL, NULL, NULL, 0
+#define REG_CONTEXT_SIZE                                                       \
+  (sizeof(RegisterContextLinux_arm::GPR) +                                     \
+   sizeof(RegisterContextLinux_arm::FPU) +                                     \
+   sizeof(RegisterContextLinux_arm::EXC))
 
 //-----------------------------------------------------------------------------
 // Include RegisterInfos_arm to declare our g_register_infos_arm structure.
@@ -37,52 +54,43 @@ using namespace lldb_private;
 #undef DECLARE_REGISTER_INFOS_ARM_STRUCT
 
 static const lldb_private::RegisterInfo *
-GetRegisterInfoPtr (const lldb_private::ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::arm:
-            return g_register_infos_arm;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return NULL;
-    }
+GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::arm:
+    return g_register_infos_arm;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return NULL;
+  }
 }
 
 static uint32_t
-GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::arm:
-            return static_cast<uint32_t>(sizeof(g_register_infos_arm) / sizeof(g_register_infos_arm[0]));
-        default:
-            assert(false && "Unhandled target architecture.");
-            return 0;
-    }
+GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::arm:
+    return static_cast<uint32_t>(sizeof(g_register_infos_arm) /
+                                 sizeof(g_register_infos_arm[0]));
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
 }
 
-RegisterContextLinux_arm::RegisterContextLinux_arm(const lldb_private::ArchSpec &target_arch) :
-    lldb_private::RegisterInfoInterface(target_arch),
-    m_register_info_p(GetRegisterInfoPtr(target_arch)),
-    m_register_info_count(GetRegisterInfoCount(target_arch))
-{
-}
+RegisterContextLinux_arm::RegisterContextLinux_arm(
+    const lldb_private::ArchSpec &target_arch)
+    : lldb_private::RegisterInfoInterface(target_arch),
+      m_register_info_p(GetRegisterInfoPtr(target_arch)),
+      m_register_info_count(GetRegisterInfoCount(target_arch)) {}
 
-size_t
-RegisterContextLinux_arm::GetGPRSize() const
-{
-    return sizeof(struct RegisterContextLinux_arm::GPR);
+size_t RegisterContextLinux_arm::GetGPRSize() const {
+  return sizeof(struct RegisterContextLinux_arm::GPR);
 }
 
 const lldb_private::RegisterInfo *
-RegisterContextLinux_arm::GetRegisterInfo() const
-{
-    return m_register_info_p;
+RegisterContextLinux_arm::GetRegisterInfo() const {
+  return m_register_info_p;
 }
 
-uint32_t
-RegisterContextLinux_arm::GetRegisterCount() const
-{
-    return m_register_info_count;
+uint32_t RegisterContextLinux_arm::GetRegisterCount() const {
+  return m_register_info_count;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm.h
index c3d41f6..9065bc0 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm.h
@@ -10,66 +10,53 @@
 #ifndef liblldb_RegisterContextLinux_arm_h_
 #define liblldb_RegisterContextLinux_arm_h_
 
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
 #include "RegisterInfoInterface.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
 
-class RegisterContextLinux_arm
-    : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_arm : public lldb_private::RegisterInfoInterface {
 public:
-
-    struct GPR
-    {
-        uint32_t    r[16];  // R0-R15
-        uint32_t    cpsr;   // CPSR
-    };
-
-
-    struct QReg
-    {
-        uint8_t bytes[16];
-    };
-
-    struct FPU
-    {
-        union {
-            uint32_t s[32];
-            uint64_t d[32];
-            QReg     q[16];  // the 128-bit NEON registers
-        } floats;
-        uint32_t fpscr;
-    };
-    struct EXC
-    {
-        uint32_t    exception;
-        uint32_t    fsr; /* Fault status */
-        uint32_t    far; /* Virtual Fault Address */
-    };
-
-    struct DBG
-    {
-        uint32_t bvr[16];
-        uint32_t bcr[16];
-        uint32_t wvr[16];
-        uint32_t wcr[16];
-    };
-
-    RegisterContextLinux_arm(const lldb_private::ArchSpec &target_arch);
-
-    size_t
-    GetGPRSize() const override;
-
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
-
-    uint32_t
-    GetRegisterCount () const override;
+  struct GPR {
+    uint32_t r[16]; // R0-R15
+    uint32_t cpsr;  // CPSR
+  };
+
+  struct QReg {
+    uint8_t bytes[16];
+  };
+
+  struct FPU {
+    union {
+      uint32_t s[32];
+      uint64_t d[32];
+      QReg q[16]; // the 128-bit NEON registers
+    } floats;
+    uint32_t fpscr;
+  };
+  struct EXC {
+    uint32_t exception;
+    uint32_t fsr; /* Fault status */
+    uint32_t far; /* Virtual Fault Address */
+  };
+
+  struct DBG {
+    uint32_t bvr[16];
+    uint32_t bcr[16];
+    uint32_t wvr[16];
+    uint32_t wcr[16];
+  };
+
+  RegisterContextLinux_arm(const lldb_private::ArchSpec &target_arch);
+
+  size_t GetGPRSize() const override;
+
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
+
+  uint32_t GetRegisterCount() const override;
 
 private:
-    const lldb_private::RegisterInfo *m_register_info_p;
-    uint32_t m_register_info_count;
+  const lldb_private::RegisterInfo *m_register_info_p;
+  uint32_t m_register_info_count;
 };
 
-#endif  // liblldb_RegisterContextLinux_arm_h_
-
+#endif // liblldb_RegisterContextLinux_arm_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp
deleted file mode 100644
index e65537a..0000000
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp
+++ /dev/null
@@ -1,89 +0,0 @@
-//===-- RegisterContextLinux_arm64.cpp -------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===---------------------------------------------------------------------===//
-
-#include <stddef.h>
-#include <vector>
-#include <cassert>
-
-#include "llvm/Support/Compiler.h"
-#include "lldb/lldb-defines.h"
-
-#include "RegisterContextLinux_arm64.h"
-
-// Based on RegisterContextDarwin_arm64.cpp
-#define GPR_OFFSET(idx) ((idx) * 8)
-#define GPR_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::GPR, reg))
-
-#define FPU_OFFSET(idx) ((idx) * 16 + sizeof (RegisterContextLinux_arm64::GPR))
-#define FPU_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::FPU, reg) + sizeof (RegisterContextLinux_arm64::GPR))
-
-#define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::EXC, reg) + sizeof (RegisterContextLinux_arm64::GPR) + sizeof (RegisterContextLinux_arm64::FPU))
-#define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::DBG, reg) + sizeof (RegisterContextLinux_arm64::GPR) + sizeof (RegisterContextLinux_arm64::FPU) + sizeof (RegisterContextLinux_arm64::EXC))
-
-#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextLinux_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
-#define REG_CONTEXT_SIZE (sizeof (RegisterContextLinux_arm64::GPR) + sizeof (RegisterContextLinux_arm64::FPU) + sizeof (RegisterContextLinux_arm64::EXC))
-
-
-//-----------------------------------------------------------------------------
-// Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
-//-----------------------------------------------------------------------------
-#define DECLARE_REGISTER_INFOS_ARM64_STRUCT
-#include "RegisterInfos_arm64.h"
-#undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
-
-static const lldb_private::RegisterInfo *
-GetRegisterInfoPtr (const lldb_private::ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::aarch64:
-            return g_register_infos_arm64;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return NULL;
-    }
-}
-
-static uint32_t
-GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::aarch64:
-            return static_cast<uint32_t>(sizeof(g_register_infos_arm64) / sizeof(g_register_infos_arm64[0]));
-        default:
-            assert(false && "Unhandled target architecture.");
-            return 0;
-    }
-}
-
-RegisterContextLinux_arm64::RegisterContextLinux_arm64(const lldb_private::ArchSpec &target_arch) :
-    lldb_private::RegisterInfoInterface(target_arch),
-    m_register_info_p(GetRegisterInfoPtr(target_arch)),
-    m_register_info_count(GetRegisterInfoCount(target_arch))
-{
-}
-
-size_t
-RegisterContextLinux_arm64::GetGPRSize() const
-{
-    return sizeof(struct RegisterContextLinux_arm64::GPR);
-}
-
-const lldb_private::RegisterInfo *
-RegisterContextLinux_arm64::GetRegisterInfo() const
-{
-    return m_register_info_p;
-}
-
-uint32_t
-RegisterContextLinux_arm64::GetRegisterCount() const
-{
-    return m_register_info_count;
-}
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm64.h
deleted file mode 100644
index 3de94b8..0000000
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_arm64.h
+++ /dev/null
@@ -1,80 +0,0 @@
-//===-- RegisterContextLinux_arm64.h ----------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef liblldb_RegisterContextLinux_arm64_H_
-#define liblldb_RegisterContextLinux_arm64_H_
-
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
-#include "RegisterInfoInterface.h"
-
-class RegisterContextLinux_arm64
-    : public lldb_private::RegisterInfoInterface
-{
-public:
-    // based on RegisterContextDarwin_arm64.h
-    struct GPR
-    {
-        uint64_t    x[29];  // x0-x28
-        uint64_t    fp;     // x29
-        uint64_t    lr;     // x30
-        uint64_t    sp;     // x31
-        uint64_t    pc;     // pc
-        uint32_t    cpsr;   // cpsr
-    };
-
-    // based on RegisterContextDarwin_arm64.h
-    struct VReg
-    {
-        uint8_t bytes[16];
-    };
-
-    // based on RegisterContextDarwin_arm64.h
-    struct FPU
-    {
-        VReg        v[32];
-        uint32_t    fpsr;
-        uint32_t    fpcr;
-    };
-
-    // based on RegisterContextDarwin_arm64.h
-    struct EXC
-    {
-        uint64_t    far;       // Virtual Fault Address
-        uint32_t    esr;       // Exception syndrome
-        uint32_t    exception; // number of arm exception token
-    };
-
-    // based on RegisterContextDarwin_arm64.h
-    struct DBG
-    {
-        uint64_t bvr[16];
-        uint64_t bcr[16];
-        uint64_t wvr[16];
-        uint64_t wcr[16];
-        uint64_t mdscr_el1;
-    };
-
-    RegisterContextLinux_arm64(const lldb_private::ArchSpec &target_arch);
-
-    size_t
-    GetGPRSize() const override;
-
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
-
-    uint32_t
-    GetRegisterCount () const override;
-
-private:
-    const lldb_private::RegisterInfo *m_register_info_p;
-    uint32_t m_register_info_count;
-};
-
-#endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp
index e39beef..6563796 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp
@@ -7,87 +7,81 @@
 //
 //===---------------------------------------------------------------------===//
 
-#include "RegisterContextPOSIX_x86.h"
 #include "RegisterContextLinux_i386.h"
+#include "RegisterContextPOSIX_x86.h"
 
 using namespace lldb_private;
 using namespace lldb;
 
-struct GPR
-{
-    uint32_t ebx;
-    uint32_t ecx;
-    uint32_t edx;
-    uint32_t esi;
-    uint32_t edi;
-    uint32_t ebp;
-    uint32_t eax;
-    uint32_t ds;
-    uint32_t es;
-    uint32_t fs;
-    uint32_t gs;
-    uint32_t orig_eax;
-    uint32_t eip;
-    uint32_t cs;
-    uint32_t eflags;
-    uint32_t esp;
-    uint32_t ss;
+struct GPR {
+  uint32_t ebx;
+  uint32_t ecx;
+  uint32_t edx;
+  uint32_t esi;
+  uint32_t edi;
+  uint32_t ebp;
+  uint32_t eax;
+  uint32_t ds;
+  uint32_t es;
+  uint32_t fs;
+  uint32_t gs;
+  uint32_t orig_eax;
+  uint32_t eip;
+  uint32_t cs;
+  uint32_t eflags;
+  uint32_t esp;
+  uint32_t ss;
 };
 
-struct FPR_i386
-{
-    uint16_t fctrl;         // FPU Control Word (fcw)
-    uint16_t fstat;         // FPU Status Word (fsw)
-    uint8_t ftag;           // FPU Tag Word (ftw)
-    uint8_t reserved_1;     // Reserved
-    uint16_t fop;           // Last Instruction Opcode (fop)
-    union
-    {
-        struct
-        {
-            uint64_t fip;   // Instruction Pointer
-            uint64_t fdp;   // Data Pointer
-        } x86_64;
-        struct
-        {
-            uint32_t fioff;   // FPU IP Offset (fip)
-            uint32_t fiseg;   // FPU IP Selector (fcs)
-            uint32_t fooff;   // FPU Operand Pointer Offset (foo)
-            uint32_t foseg;   // FPU Operand Pointer Selector (fos)
-        } i386_;// Added _ in the end to avoid error with gcc defining i386 in some cases
-    } ptr;
-    uint32_t mxcsr;         // MXCSR Register State
-    uint32_t mxcsrmask;     // MXCSR Mask
-    MMSReg   stmm[8];       // 8*16 bytes for each FP-reg = 128 bytes
-    XMMReg   xmm[8];        // 8*16 bytes for each XMM-reg = 128 bytes
-    uint32_t padding[56];
+struct FPR_i386 {
+  uint16_t fctrl;     // FPU Control Word (fcw)
+  uint16_t fstat;     // FPU Status Word (fsw)
+  uint8_t ftag;       // FPU Tag Word (ftw)
+  uint8_t reserved_1; // Reserved
+  uint16_t fop;       // Last Instruction Opcode (fop)
+  union {
+    struct {
+      uint64_t fip; // Instruction Pointer
+      uint64_t fdp; // Data Pointer
+    } x86_64;
+    struct {
+      uint32_t fioff; // FPU IP Offset (fip)
+      uint32_t fiseg; // FPU IP Selector (fcs)
+      uint32_t fooff; // FPU Operand Pointer Offset (foo)
+      uint32_t foseg; // FPU Operand Pointer Selector (fos)
+    } i386_; // Added _ in the end to avoid error with gcc defining i386 in some
+             // cases
+  } ptr;
+  uint32_t mxcsr;     // MXCSR Register State
+  uint32_t mxcsrmask; // MXCSR Mask
+  MMSReg stmm[8];     // 8*16 bytes for each FP-reg = 128 bytes
+  XMMReg xmm[8];      // 8*16 bytes for each XMM-reg = 128 bytes
+  uint32_t padding[56];
 };
 
-struct UserArea
-{
-    GPR      regs;          // General purpose registers.
-    int32_t  fpvalid;       // True if FPU is being used.
-    FPR_i386 i387;          // FPU registers.
-    uint32_t tsize;         // Text segment size.
-    uint32_t dsize;         // Data segment size.
-    uint32_t ssize;         // Stack segment size.
-    uint32_t start_code;    // VM address of text.
-    uint32_t start_stack;   // VM address of stack bottom (top in rsp).
-    int32_t  signal;        // Signal causing core dump.
-    int32_t  reserved;      // Unused.
-    uint32_t ar0;           // Location of GPR's.
-    uint32_t fpstate;       // Location of FPR's. Should be a FXSTATE *, but this
-	                        //  has to be 32-bits even on 64-bit systems.
-    uint32_t magic;         // Identifier for core dumps.
-    char     u_comm[32];    // Command causing core dump.
-    uint32_t u_debugreg[8]; // Debug registers (DR0 - DR7).
+struct UserArea {
+  GPR regs;               // General purpose registers.
+  int32_t fpvalid;        // True if FPU is being used.
+  FPR_i386 i387;          // FPU registers.
+  uint32_t tsize;         // Text segment size.
+  uint32_t dsize;         // Data segment size.
+  uint32_t ssize;         // Stack segment size.
+  uint32_t start_code;    // VM address of text.
+  uint32_t start_stack;   // VM address of stack bottom (top in rsp).
+  int32_t signal;         // Signal causing core dump.
+  int32_t reserved;       // Unused.
+  uint32_t ar0;           // Location of GPR's.
+  uint32_t fpstate;       // Location of FPR's. Should be a FXSTATE *, but this
+                          //  has to be 32-bits even on 64-bit systems.
+  uint32_t magic;         // Identifier for core dumps.
+  char u_comm[32];        // Command causing core dump.
+  uint32_t u_debugreg[8]; // Debug registers (DR0 - DR7).
 };
 
-#define DR_SIZE sizeof(((UserArea*)NULL)->u_debugreg[0])
+#define DR_SIZE sizeof(((UserArea *)NULL)->u_debugreg[0])
 #define DR_0_OFFSET 0xFC
-#define DR_OFFSET(reg_index) \
-    (DR_0_OFFSET + (reg_index * 4))
-#define FPR_SIZE(reg) sizeof(((FPR_i386*)NULL)->reg)
+#define DR_OFFSET(reg_index) (DR_0_OFFSET + (reg_index * 4))
+#define FPR_SIZE(reg) sizeof(((FPR_i386 *)NULL)->reg)
 
 //---------------------------------------------------------------------------
 // Include RegisterInfos_i386 to declare our g_register_infos_i386 structure.
@@ -96,48 +90,48 @@ struct UserArea
 #include "RegisterInfos_i386.h"
 #undef DECLARE_REGISTER_INFOS_I386_STRUCT
 
-RegisterContextLinux_i386::RegisterContextLinux_i386(const ArchSpec &target_arch) :
-    RegisterInfoInterface(target_arch)
-{
-    RegisterInfo orig_ax = { "orig_eax", NULL, sizeof(((GPR*)NULL)->orig_eax), (LLVM_EXTENSION offsetof(GPR, orig_eax)), eEncodingUint, \
-              eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL };
-    d_register_infos.push_back(orig_ax);
+RegisterContextLinux_i386::RegisterContextLinux_i386(
+    const ArchSpec &target_arch)
+    : RegisterInfoInterface(target_arch) {
+  RegisterInfo orig_ax = {"orig_eax",
+                          NULL,
+                          sizeof(((GPR *)NULL)->orig_eax),
+                          (LLVM_EXTENSION offsetof(GPR, orig_eax)),
+                          eEncodingUint,
+                          eFormatHex,
+                          {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+                           LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+                           LLDB_INVALID_REGNUM},
+                          nullptr,
+                          nullptr,
+                          nullptr,
+                          0};
+  d_register_infos.push_back(orig_ax);
 }
 
-size_t
-RegisterContextLinux_i386::GetGPRSize() const
-{
-    return sizeof(GPR);
-}
+size_t RegisterContextLinux_i386::GetGPRSize() const { return sizeof(GPR); }
 
-const RegisterInfo *
-RegisterContextLinux_i386::GetRegisterInfo() const
-{
-    switch (m_target_arch.GetMachine())
-    {
-        case llvm::Triple::x86:            
-        case llvm::Triple::x86_64:
-            return g_register_infos_i386;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return NULL;
-    }
+const RegisterInfo *RegisterContextLinux_i386::GetRegisterInfo() const {
+  switch (m_target_arch.GetMachine()) {
+  case llvm::Triple::x86:
+  case llvm::Triple::x86_64:
+    return g_register_infos_i386;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return NULL;
+  }
 }
 
-uint32_t
-RegisterContextLinux_i386::GetRegisterCount () const
-{
-    return static_cast<uint32_t> (sizeof (g_register_infos_i386) / sizeof (g_register_infos_i386 [0]));
+uint32_t RegisterContextLinux_i386::GetRegisterCount() const {
+  return static_cast<uint32_t>(sizeof(g_register_infos_i386) /
+                               sizeof(g_register_infos_i386[0]));
 }
 
-uint32_t
-RegisterContextLinux_i386::GetUserRegisterCount () const
-{
-    return static_cast<uint32_t> (k_num_user_registers_i386);
+uint32_t RegisterContextLinux_i386::GetUserRegisterCount() const {
+  return static_cast<uint32_t>(k_num_user_registers_i386);
 }
 
 const std::vector<lldb_private::RegisterInfo> *
-RegisterContextLinux_i386::GetDynamicRegisterInfoP() const
-{
-    return &d_register_infos;
+RegisterContextLinux_i386::GetDynamicRegisterInfoP() const {
+  return &d_register_infos;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.h
index 6c4768f..fbf8037 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.h
@@ -12,29 +12,23 @@
 
 #include "RegisterInfoInterface.h"
 
-class RegisterContextLinux_i386
-  : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_i386 : public lldb_private::RegisterInfoInterface {
 public:
-    RegisterContextLinux_i386(const lldb_private::ArchSpec &target_arch);
+  RegisterContextLinux_i386(const lldb_private::ArchSpec &target_arch);
 
-    size_t
-    GetGPRSize() const override;
+  size_t GetGPRSize() const override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
-    uint32_t
-    GetRegisterCount () const override;
+  uint32_t GetRegisterCount() const override;
 
-    uint32_t
-    GetUserRegisterCount () const override;
+  uint32_t GetUserRegisterCount() const override;
 
-    const std::vector<lldb_private::RegisterInfo> *
-    GetDynamicRegisterInfoP() const override;
+  const std::vector<lldb_private::RegisterInfo> *
+  GetDynamicRegisterInfoP() const override;
 
 private:
-    std::vector<lldb_private::RegisterInfo> d_register_infos;
+  std::vector<lldb_private::RegisterInfo> d_register_infos;
 };
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp
index 1b22810..982eefe 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp
@@ -7,8 +7,8 @@
 //
 //===---------------------------------------------------------------------===//
 
-#include <vector>
 #include <stddef.h>
+#include <vector>
 
 // For eh_frame and DWARF Register numbers
 #include "RegisterContextLinux_mips.h"
@@ -29,48 +29,38 @@ using namespace lldb;
 #include "RegisterInfos_mips.h"
 #undef DECLARE_REGISTER_INFOS_MIPS_STRUCT
 
-uint32_t
-GetUserRegisterInfoCount (bool msa_present)
-{
-    if (msa_present)
-        return static_cast<uint32_t> (k_num_user_registers_mips);
-    return static_cast<uint32_t> (k_num_user_registers_mips - k_num_msa_registers_mips);
+uint32_t GetUserRegisterInfoCount(bool msa_present) {
+  if (msa_present)
+    return static_cast<uint32_t>(k_num_user_registers_mips);
+  return static_cast<uint32_t>(k_num_user_registers_mips -
+                               k_num_msa_registers_mips);
 }
 
-RegisterContextLinux_mips::RegisterContextLinux_mips(const ArchSpec &target_arch, bool msa_present) :
-    RegisterInfoInterface(target_arch),
-    m_user_register_count (GetUserRegisterInfoCount (msa_present))
-{
-}
+RegisterContextLinux_mips::RegisterContextLinux_mips(
+    const ArchSpec &target_arch, bool msa_present)
+    : RegisterInfoInterface(target_arch),
+      m_user_register_count(GetUserRegisterInfoCount(msa_present)) {}
 
-size_t
-RegisterContextLinux_mips::GetGPRSize() const
-{
-    return sizeof(GPR_linux_mips);
+size_t RegisterContextLinux_mips::GetGPRSize() const {
+  return sizeof(GPR_linux_mips);
 }
 
-const RegisterInfo *
-RegisterContextLinux_mips::GetRegisterInfo() const
-{
-    switch (m_target_arch.GetMachine())
-    {
-        case llvm::Triple::mips:
-        case llvm::Triple::mipsel:
-            return g_register_infos_mips;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return NULL;
-    }
+const RegisterInfo *RegisterContextLinux_mips::GetRegisterInfo() const {
+  switch (m_target_arch.GetMachine()) {
+  case llvm::Triple::mips:
+  case llvm::Triple::mipsel:
+    return g_register_infos_mips;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return NULL;
+  }
 }
 
-uint32_t
-RegisterContextLinux_mips::GetRegisterCount () const
-{
-    return static_cast<uint32_t> (sizeof (g_register_infos_mips) / sizeof (g_register_infos_mips [0]));
+uint32_t RegisterContextLinux_mips::GetRegisterCount() const {
+  return static_cast<uint32_t>(sizeof(g_register_infos_mips) /
+                               sizeof(g_register_infos_mips[0]));
 }
 
-uint32_t
-RegisterContextLinux_mips::GetUserRegisterCount () const
-{
-    return static_cast<uint32_t> (m_user_register_count);
+uint32_t RegisterContextLinux_mips::GetUserRegisterCount() const {
+  return static_cast<uint32_t>(m_user_register_count);
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.h
index c0bd5ad4..cba4ee6 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.h
@@ -10,29 +10,24 @@
 #ifndef liblldb_RegisterContextLinux_mips_H_
 #define liblldb_RegisterContextLinux_mips_H_
 
-#include "lldb/lldb-private.h"
 #include "RegisterInfoInterface.h"
+#include "lldb/lldb-private.h"
 
-class RegisterContextLinux_mips
-    : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_mips : public lldb_private::RegisterInfoInterface {
 public:
-    RegisterContextLinux_mips(const lldb_private::ArchSpec &target_arch, bool msa_present = true);
+  RegisterContextLinux_mips(const lldb_private::ArchSpec &target_arch,
+                            bool msa_present = true);
 
-    size_t
-    GetGPRSize() const override;
+  size_t GetGPRSize() const override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
-    uint32_t
-    GetRegisterCount () const override;
+  uint32_t GetRegisterCount() const override;
 
-    uint32_t
-    GetUserRegisterCount () const override;
+  uint32_t GetUserRegisterCount() const override;
 
 private:
-    uint32_t m_user_register_count;
+  uint32_t m_user_register_count;
 };
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp
index f2871e3..c40f694 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp
@@ -7,10 +7,10 @@
 //
 //===---------------------------------------------------------------------===//
 
-#if defined (__mips__)
+#if defined(__mips__)
 
-#include <vector>
 #include <stddef.h>
+#include <vector>
 
 // For eh_frame and DWARF Register numbers
 #include "RegisterContextLinux_mips64.h"
@@ -25,7 +25,8 @@ using namespace lldb;
 using namespace lldb_private;
 
 //---------------------------------------------------------------------------
-// Include RegisterInfos_mips64 to declare our g_register_infos_mips64 structure.
+// Include RegisterInfos_mips64 to declare our g_register_infos_mips64
+// structure.
 //---------------------------------------------------------------------------
 #define DECLARE_REGISTER_INFOS_MIPS64_STRUCT
 #define LINUX_MIPS64
@@ -40,91 +41,79 @@ using namespace lldb_private;
 #include "RegisterInfos_mips.h"
 #undef DECLARE_REGISTER_INFOS_MIPS_STRUCT
 
-static const RegisterInfo *
-GetRegisterInfoPtr (const ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::mips64:
-        case llvm::Triple::mips64el:
-            return g_register_infos_mips64;
-        case llvm::Triple::mips:
-        case llvm::Triple::mipsel:
-            return g_register_infos_mips;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return nullptr;
-    }
+static const RegisterInfo *GetRegisterInfoPtr(const ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::mips64:
+  case llvm::Triple::mips64el:
+    return g_register_infos_mips64;
+  case llvm::Triple::mips:
+  case llvm::Triple::mipsel:
+    return g_register_infos_mips;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return nullptr;
+  }
 }
 
-static uint32_t
-GetRegisterInfoCount (const ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::mips64:
-        case llvm::Triple::mips64el:
-            return static_cast<uint32_t> (sizeof (g_register_infos_mips64) / sizeof (g_register_infos_mips64 [0]));
-        case llvm::Triple::mips:
-        case llvm::Triple::mipsel:
-            return static_cast<uint32_t> (sizeof (g_register_infos_mips) / sizeof (g_register_infos_mips [0]));
-        default:
-            assert(false && "Unhandled target architecture.");
-            return 0;
-    }
+static uint32_t GetRegisterInfoCount(const ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::mips64:
+  case llvm::Triple::mips64el:
+    return static_cast<uint32_t>(sizeof(g_register_infos_mips64) /
+                                 sizeof(g_register_infos_mips64[0]));
+  case llvm::Triple::mips:
+  case llvm::Triple::mipsel:
+    return static_cast<uint32_t>(sizeof(g_register_infos_mips) /
+                                 sizeof(g_register_infos_mips[0]));
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
 }
 
-uint32_t
-GetUserRegisterInfoCount (const ArchSpec &target_arch, bool msa_present)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::mips:
-        case llvm::Triple::mipsel:
-            if (msa_present)
-                return static_cast<uint32_t> (k_num_user_registers_mips);
-            return static_cast<uint32_t> (k_num_user_registers_mips - k_num_msa_registers_mips); 
-        case llvm::Triple::mips64el:
-        case llvm::Triple::mips64:
-            if (msa_present)
-                return static_cast<uint32_t> (k_num_user_registers_mips64);
-            return static_cast<uint32_t> (k_num_user_registers_mips64 - k_num_msa_registers_mips64);
-        default:
-            assert(false && "Unhandled target architecture.");
-            return 0;
-    }
+uint32_t GetUserRegisterInfoCount(const ArchSpec &target_arch,
+                                  bool msa_present) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::mips:
+  case llvm::Triple::mipsel:
+    if (msa_present)
+      return static_cast<uint32_t>(k_num_user_registers_mips);
+    return static_cast<uint32_t>(k_num_user_registers_mips -
+                                 k_num_msa_registers_mips);
+  case llvm::Triple::mips64el:
+  case llvm::Triple::mips64:
+    if (msa_present)
+      return static_cast<uint32_t>(k_num_user_registers_mips64);
+    return static_cast<uint32_t>(k_num_user_registers_mips64 -
+                                 k_num_msa_registers_mips64);
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
 }
 
-RegisterContextLinux_mips64::RegisterContextLinux_mips64(const ArchSpec &target_arch, bool msa_present) :
-    lldb_private::RegisterInfoInterface(target_arch),
-    m_register_info_p (GetRegisterInfoPtr (target_arch)),
-    m_register_info_count (GetRegisterInfoCount (target_arch)),
-    m_user_register_count (GetUserRegisterInfoCount (target_arch, msa_present))
-{
-}
+RegisterContextLinux_mips64::RegisterContextLinux_mips64(
+    const ArchSpec &target_arch, bool msa_present)
+    : lldb_private::RegisterInfoInterface(target_arch),
+      m_register_info_p(GetRegisterInfoPtr(target_arch)),
+      m_register_info_count(GetRegisterInfoCount(target_arch)),
+      m_user_register_count(
+          GetUserRegisterInfoCount(target_arch, msa_present)) {}
 
-size_t
-RegisterContextLinux_mips64::GetGPRSize() const
-{
-    return sizeof(GPR_linux_mips);
+size_t RegisterContextLinux_mips64::GetGPRSize() const {
+  return sizeof(GPR_linux_mips);
 }
 
-const RegisterInfo *
-RegisterContextLinux_mips64::GetRegisterInfo() const
-{
-    return m_register_info_p;
+const RegisterInfo *RegisterContextLinux_mips64::GetRegisterInfo() const {
+  return m_register_info_p;
 }
 
-uint32_t
-RegisterContextLinux_mips64::GetRegisterCount () const
-{
-    return m_register_info_count;
+uint32_t RegisterContextLinux_mips64::GetRegisterCount() const {
+  return m_register_info_count;
 }
 
-uint32_t
-RegisterContextLinux_mips64::GetUserRegisterCount () const
-{
-    return m_user_register_count;
+uint32_t RegisterContextLinux_mips64::GetUserRegisterCount() const {
+  return m_user_register_count;
 }
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h
index 843328c..9669b0d 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h
@@ -7,36 +7,31 @@
 //
 //===----------------------------------------------------------------------===//
 
-#if defined (__mips__)
+#if defined(__mips__)
 
 #ifndef liblldb_RegisterContextLinux_mips64_H_
 #define liblldb_RegisterContextLinux_mips64_H_
 
-#include "lldb/lldb-private.h"
 #include "RegisterInfoInterface.h"
+#include "lldb/lldb-private.h"
 
-class RegisterContextLinux_mips64
-    : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_mips64 : public lldb_private::RegisterInfoInterface {
 public:
-    RegisterContextLinux_mips64(const lldb_private::ArchSpec &target_arch, bool msa_present = true);
+  RegisterContextLinux_mips64(const lldb_private::ArchSpec &target_arch,
+                              bool msa_present = true);
 
-    size_t
-    GetGPRSize() const override;
+  size_t GetGPRSize() const override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
-    uint32_t
-    GetRegisterCount () const override;
+  uint32_t GetRegisterCount() const override;
 
-    uint32_t
-    GetUserRegisterCount () const override;
+  uint32_t GetUserRegisterCount() const override;
 
 private:
-    const lldb_private::RegisterInfo *m_register_info_p;
-    uint32_t m_register_info_count;
-    uint32_t m_user_register_count;
+  const lldb_private::RegisterInfo *m_register_info_p;
+  uint32_t m_register_info_count;
+  uint32_t m_user_register_count;
 };
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_s390x.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_s390x.cpp
index 9aef1e9..5a7f5a1 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_s390x.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_s390x.cpp
@@ -7,8 +7,8 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "RegisterContextPOSIX_s390x.h"
 #include "RegisterContextLinux_s390x.h"
+#include "RegisterContextPOSIX_s390x.h"
 
 using namespace lldb_private;
 using namespace lldb;
@@ -20,79 +20,58 @@ using namespace lldb;
 #include "RegisterInfos_s390x.h"
 #undef DECLARE_REGISTER_INFOS_S390X_STRUCT
 
-static const RegisterInfo *
-GetRegisterInfoPtr(const ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::systemz:
-            return g_register_infos_s390x;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return nullptr;
-    }
+static const RegisterInfo *GetRegisterInfoPtr(const ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::systemz:
+    return g_register_infos_s390x;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return nullptr;
+  }
 }
 
-static uint32_t
-GetRegisterInfoCount(const ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::systemz:
-            return k_num_registers_s390x;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return 0;
-    }
+static uint32_t GetRegisterInfoCount(const ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::systemz:
+    return k_num_registers_s390x;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
 }
 
-static uint32_t
-GetUserRegisterInfoCount(const ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::systemz:
-            return k_num_user_registers_s390x + k_num_linux_registers_s390x;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return 0;
-    }
+static uint32_t GetUserRegisterInfoCount(const ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::systemz:
+    return k_num_user_registers_s390x + k_num_linux_registers_s390x;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
 }
 
-RegisterContextLinux_s390x::RegisterContextLinux_s390x(const ArchSpec &target_arch)
+RegisterContextLinux_s390x::RegisterContextLinux_s390x(
+    const ArchSpec &target_arch)
     : lldb_private::RegisterInfoInterface(target_arch),
       m_register_info_p(GetRegisterInfoPtr(target_arch)),
       m_register_info_count(GetRegisterInfoCount(target_arch)),
-      m_user_register_count(GetUserRegisterInfoCount(target_arch))
-{
-}
+      m_user_register_count(GetUserRegisterInfoCount(target_arch)) {}
 
 const std::vector<lldb_private::RegisterInfo> *
-RegisterContextLinux_s390x::GetDynamicRegisterInfoP() const
-{
-    return &d_register_infos;
+RegisterContextLinux_s390x::GetDynamicRegisterInfoP() const {
+  return &d_register_infos;
 }
 
-const RegisterInfo *
-RegisterContextLinux_s390x::GetRegisterInfo() const
-{
-    return m_register_info_p;
+const RegisterInfo *RegisterContextLinux_s390x::GetRegisterInfo() const {
+  return m_register_info_p;
 }
 
-uint32_t
-RegisterContextLinux_s390x::GetRegisterCount() const
-{
-    return m_register_info_count;
+uint32_t RegisterContextLinux_s390x::GetRegisterCount() const {
+  return m_register_info_count;
 }
 
-uint32_t
-RegisterContextLinux_s390x::GetUserRegisterCount() const
-{
-    return m_user_register_count;
+uint32_t RegisterContextLinux_s390x::GetUserRegisterCount() const {
+  return m_user_register_count;
 }
 
-size_t
-RegisterContextLinux_s390x::GetGPRSize() const
-{
-    return 0;
-}
+size_t RegisterContextLinux_s390x::GetGPRSize() const { return 0; }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_s390x.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_s390x.h
index bdc7f34..556cc2e 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_s390x.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_s390x.h
@@ -12,31 +12,26 @@
 
 #include "RegisterInfoInterface.h"
 
-class RegisterContextLinux_s390x : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_s390x : public lldb_private::RegisterInfoInterface {
 public:
-    RegisterContextLinux_s390x(const lldb_private::ArchSpec &target_arch);
+  RegisterContextLinux_s390x(const lldb_private::ArchSpec &target_arch);
 
-    size_t
-    GetGPRSize() const override;
+  size_t GetGPRSize() const override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
-    uint32_t
-    GetRegisterCount() const override;
+  uint32_t GetRegisterCount() const override;
 
-    uint32_t
-    GetUserRegisterCount() const override;
+  uint32_t GetUserRegisterCount() const override;
 
-    const std::vector<lldb_private::RegisterInfo> *
-    GetDynamicRegisterInfoP() const override;
+  const std::vector<lldb_private::RegisterInfo> *
+  GetDynamicRegisterInfoP() const override;
 
 private:
-    const lldb_private::RegisterInfo *m_register_info_p;
-    uint32_t m_register_info_count;
-    uint32_t m_user_register_count;
-    std::vector<lldb_private::RegisterInfo> d_register_infos;
+  const lldb_private::RegisterInfo *m_register_info_p;
+  uint32_t m_register_info_count;
+  uint32_t m_user_register_count;
+  std::vector<lldb_private::RegisterInfo> d_register_infos;
 };
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp
index 78afe72..526b3ec 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp
@@ -7,201 +7,191 @@
 //
 //===---------------------------------------------------------------------===//
 
-#include <vector>
-#include "RegisterContextPOSIX_x86.h"
-#include "RegisterContextLinux_i386.h"
 #include "RegisterContextLinux_x86_64.h"
+#include "RegisterContextLinux_i386.h"
+#include "RegisterContextPOSIX_x86.h"
+#include <vector>
 
 using namespace lldb_private;
 using namespace lldb;
 
-typedef struct _GPR
-{
-    uint64_t r15;
-    uint64_t r14;
-    uint64_t r13;
-    uint64_t r12;
-    uint64_t rbp;
-    uint64_t rbx;
-    uint64_t r11;
-    uint64_t r10;
-    uint64_t r9;
-    uint64_t r8;
-    uint64_t rax;
-    uint64_t rcx;
-    uint64_t rdx;
-    uint64_t rsi;
-    uint64_t rdi;
-    uint64_t orig_rax;
-    uint64_t rip;
-    uint64_t cs;
-    uint64_t rflags;
-    uint64_t rsp;
-    uint64_t ss;
-    uint64_t fs_base;
-    uint64_t gs_base;
-    uint64_t ds;
-    uint64_t es;
-    uint64_t fs;
-    uint64_t gs;
+typedef struct _GPR {
+  uint64_t r15;
+  uint64_t r14;
+  uint64_t r13;
+  uint64_t r12;
+  uint64_t rbp;
+  uint64_t rbx;
+  uint64_t r11;
+  uint64_t r10;
+  uint64_t r9;
+  uint64_t r8;
+  uint64_t rax;
+  uint64_t rcx;
+  uint64_t rdx;
+  uint64_t rsi;
+  uint64_t rdi;
+  uint64_t orig_rax;
+  uint64_t rip;
+  uint64_t cs;
+  uint64_t rflags;
+  uint64_t rsp;
+  uint64_t ss;
+  uint64_t fs_base;
+  uint64_t gs_base;
+  uint64_t ds;
+  uint64_t es;
+  uint64_t fs;
+  uint64_t gs;
 } GPR;
 
 struct DBG {
-    uint64_t dr[8];
+  uint64_t dr[8];
 };
 
-struct UserArea
-{
-    GPR      gpr;           // General purpose registers.
-    int32_t  fpvalid;       // True if FPU is being used.
-    int32_t  pad0;
-    FXSAVE   fpr;           // General purpose floating point registers (see FPR for extended register sets).
-    uint64_t tsize;         // Text segment size.
-    uint64_t dsize;         // Data segment size.
-    uint64_t ssize;         // Stack segment size.
-    uint64_t start_code;    // VM address of text.
-    uint64_t start_stack;   // VM address of stack bottom (top in rsp).
-    int64_t  signal;        // Signal causing core dump.
-    int32_t  reserved;      // Unused.
-    int32_t  pad1;
-    uint64_t ar0;           // Location of GPR's.
-    FXSAVE*  fpstate;       // Location of FPR's.
-    uint64_t magic;         // Identifier for core dumps.
-    char     u_comm[32];    // Command causing core dump.
-    DBG      dbg;           // Debug registers.
-    uint64_t error_code;    // CPU error code.
-    uint64_t fault_address; // Control register CR3.
+struct UserArea {
+  GPR gpr;         // General purpose registers.
+  int32_t fpvalid; // True if FPU is being used.
+  int32_t pad0;
+  FXSAVE fpr; // General purpose floating point registers (see FPR for extended
+              // register sets).
+  uint64_t tsize;       // Text segment size.
+  uint64_t dsize;       // Data segment size.
+  uint64_t ssize;       // Stack segment size.
+  uint64_t start_code;  // VM address of text.
+  uint64_t start_stack; // VM address of stack bottom (top in rsp).
+  int64_t signal;       // Signal causing core dump.
+  int32_t reserved;     // Unused.
+  int32_t pad1;
+  uint64_t ar0;           // Location of GPR's.
+  FXSAVE *fpstate;        // Location of FPR's.
+  uint64_t magic;         // Identifier for core dumps.
+  char u_comm[32];        // Command causing core dump.
+  DBG dbg;                // Debug registers.
+  uint64_t error_code;    // CPU error code.
+  uint64_t fault_address; // Control register CR3.
 };
 
-
-#define DR_OFFSET(reg_index) \
-    (LLVM_EXTENSION offsetof(UserArea, dbg) + \
-     LLVM_EXTENSION offsetof(DBG, dr[reg_index]))
+#define DR_OFFSET(reg_index)                                                   \
+  (LLVM_EXTENSION offsetof(UserArea, dbg) +                                    \
+   LLVM_EXTENSION offsetof(DBG, dr[reg_index]))
 
 //---------------------------------------------------------------------------
-// Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64 structure.
+// Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64
+// structure.
 //---------------------------------------------------------------------------
 #define DECLARE_REGISTER_INFOS_X86_64_STRUCT
 #include "RegisterInfos_x86_64.h"
 #undef DECLARE_REGISTER_INFOS_X86_64_STRUCT
 
-static std::vector<lldb_private::RegisterInfo>&
-GetPrivateRegisterInfoVector ()
-{
-    static std::vector<lldb_private::RegisterInfo> g_register_infos;
-    return g_register_infos;
+static std::vector<lldb_private::RegisterInfo> &GetPrivateRegisterInfoVector() {
+  static std::vector<lldb_private::RegisterInfo> g_register_infos;
+  return g_register_infos;
 }
 
 static const RegisterInfo *
-GetRegisterInfo_i386(const lldb_private::ArchSpec &arch)
-{
-    std::vector<lldb_private::RegisterInfo> &g_register_infos = GetPrivateRegisterInfoVector ();
-
-    // Allocate RegisterInfo only once
-    if (g_register_infos.empty())
-    {
-        // Copy the register information from base class
-        std::unique_ptr<RegisterContextLinux_i386> reg_interface(new RegisterContextLinux_i386 (arch));
-        const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
-        g_register_infos.insert(g_register_infos.end(), &base_info[0], &base_info[k_num_registers_i386]);
-
-        //---------------------------------------------------------------------------
-        // Include RegisterInfos_x86_64 to update the g_register_infos structure
-        //  with x86_64 offsets.
-        //---------------------------------------------------------------------------
-        #define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
-        #include "RegisterInfos_x86_64.h"
-        #undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
-    }
-
-    return &g_register_infos[0];
-}
+GetRegisterInfo_i386(const lldb_private::ArchSpec &arch) {
+  std::vector<lldb_private::RegisterInfo> &g_register_infos =
+      GetPrivateRegisterInfoVector();
+
+  // Allocate RegisterInfo only once
+  if (g_register_infos.empty()) {
+    // Copy the register information from base class
+    std::unique_ptr<RegisterContextLinux_i386> reg_interface(
+        new RegisterContextLinux_i386(arch));
+    const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
+    g_register_infos.insert(g_register_infos.end(), &base_info[0],
+                            &base_info[k_num_registers_i386]);
 
-static const RegisterInfo *
-GetRegisterInfoPtr (const ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::x86:
-            return GetRegisterInfo_i386 (target_arch);
-        case llvm::Triple::x86_64:
-            return g_register_infos_x86_64;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return nullptr;
-    }
+//---------------------------------------------------------------------------
+// Include RegisterInfos_x86_64 to update the g_register_infos structure
+//  with x86_64 offsets.
+//---------------------------------------------------------------------------
+#define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
+#include "RegisterInfos_x86_64.h"
+#undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
+  }
+
+  return &g_register_infos[0];
 }
 
-static uint32_t
-GetRegisterInfoCount (const ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::x86:
-            {
-                assert (!GetPrivateRegisterInfoVector ().empty () && "i386 register info not yet filled.");
-                return static_cast<uint32_t> (GetPrivateRegisterInfoVector ().size ());
-            }
-        case llvm::Triple::x86_64:
-            return static_cast<uint32_t> (sizeof (g_register_infos_x86_64) / sizeof (g_register_infos_x86_64 [0]));
-        default:
-            assert(false && "Unhandled target architecture.");
-            return 0;
-    }
+static const RegisterInfo *GetRegisterInfoPtr(const ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::x86:
+    return GetRegisterInfo_i386(target_arch);
+  case llvm::Triple::x86_64:
+    return g_register_infos_x86_64;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return nullptr;
+  }
 }
 
-static uint32_t
-GetUserRegisterInfoCount (const ArchSpec &target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::x86:
-            return static_cast<uint32_t> (k_num_user_registers_i386);
-        case llvm::Triple::x86_64:
-            return static_cast<uint32_t> (k_num_user_registers_x86_64);
-        default:
-            assert(false && "Unhandled target architecture.");
-            return 0;
-    }
+static uint32_t GetRegisterInfoCount(const ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::x86: {
+    assert(!GetPrivateRegisterInfoVector().empty() &&
+           "i386 register info not yet filled.");
+    return static_cast<uint32_t>(GetPrivateRegisterInfoVector().size());
+  }
+  case llvm::Triple::x86_64:
+    return static_cast<uint32_t>(sizeof(g_register_infos_x86_64) /
+                                 sizeof(g_register_infos_x86_64[0]));
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
 }
 
-RegisterContextLinux_x86_64::RegisterContextLinux_x86_64(const ArchSpec &target_arch) :
-    lldb_private::RegisterInfoInterface(target_arch),
-    m_register_info_p (GetRegisterInfoPtr (target_arch)),
-    m_register_info_count (GetRegisterInfoCount (target_arch)),
-    m_user_register_count (GetUserRegisterInfoCount (target_arch))
-{
-    RegisterInfo orig_ax = { "orig_rax", NULL, sizeof(((GPR*)NULL)->orig_rax), (LLVM_EXTENSION offsetof(GPR, orig_rax)), eEncodingUint, \
-              eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL };
-    d_register_infos.push_back(orig_ax);
+static uint32_t GetUserRegisterInfoCount(const ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::x86:
+    return static_cast<uint32_t>(k_num_user_registers_i386);
+  case llvm::Triple::x86_64:
+    return static_cast<uint32_t>(k_num_user_registers_x86_64);
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
 }
 
-size_t
-RegisterContextLinux_x86_64::GetGPRSize() const
-{
-    return sizeof(GPR);
+RegisterContextLinux_x86_64::RegisterContextLinux_x86_64(
+    const ArchSpec &target_arch)
+    : lldb_private::RegisterInfoInterface(target_arch),
+      m_register_info_p(GetRegisterInfoPtr(target_arch)),
+      m_register_info_count(GetRegisterInfoCount(target_arch)),
+      m_user_register_count(GetUserRegisterInfoCount(target_arch)) {
+  RegisterInfo orig_ax = {"orig_rax",
+                          NULL,
+                          sizeof(((GPR *)NULL)->orig_rax),
+                          (LLVM_EXTENSION offsetof(GPR, orig_rax)),
+                          eEncodingUint,
+                          eFormatHex,
+                          {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+                           LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+                           LLDB_INVALID_REGNUM},
+                          nullptr,
+                          nullptr,
+                          nullptr,
+                          0};
+  d_register_infos.push_back(orig_ax);
 }
 
+size_t RegisterContextLinux_x86_64::GetGPRSize() const { return sizeof(GPR); }
+
 const std::vector<lldb_private::RegisterInfo> *
-RegisterContextLinux_x86_64::GetDynamicRegisterInfoP() const
-{
-    return &d_register_infos;
+RegisterContextLinux_x86_64::GetDynamicRegisterInfoP() const {
+  return &d_register_infos;
 }
 
-const RegisterInfo *
-RegisterContextLinux_x86_64::GetRegisterInfo() const
-{
-    return m_register_info_p;
+const RegisterInfo *RegisterContextLinux_x86_64::GetRegisterInfo() const {
+  return m_register_info_p;
 }
 
-uint32_t
-RegisterContextLinux_x86_64::GetRegisterCount () const
-{
-    return m_register_info_count;
+uint32_t RegisterContextLinux_x86_64::GetRegisterCount() const {
+  return m_register_info_count;
 }
 
-uint32_t
-RegisterContextLinux_x86_64::GetUserRegisterCount () const
-{
-    return m_user_register_count;
+uint32_t RegisterContextLinux_x86_64::GetUserRegisterCount() const {
+  return m_user_register_count;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h
index ed0b7de..99a4cb7 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h
@@ -12,33 +12,26 @@
 
 #include "RegisterInfoInterface.h"
 
-class RegisterContextLinux_x86_64
-    : public lldb_private::RegisterInfoInterface
-{
+class RegisterContextLinux_x86_64 : public lldb_private::RegisterInfoInterface {
 public:
-    RegisterContextLinux_x86_64(const lldb_private::ArchSpec &target_arch);
+  RegisterContextLinux_x86_64(const lldb_private::ArchSpec &target_arch);
 
-    size_t
-    GetGPRSize() const override;
+  size_t GetGPRSize() const override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
-    uint32_t
-    GetRegisterCount () const override;
+  uint32_t GetRegisterCount() const override;
 
-    uint32_t
-    GetUserRegisterCount () const override;
+  uint32_t GetUserRegisterCount() const override;
 
-    const std::vector<lldb_private::RegisterInfo> *
-    GetDynamicRegisterInfoP() const override;
+  const std::vector<lldb_private::RegisterInfo> *
+  GetDynamicRegisterInfoP() const override;
 
 private:
-    const lldb_private::RegisterInfo *m_register_info_p;
-    uint32_t m_register_info_count;
-    uint32_t m_user_register_count;
-    std::vector<lldb_private::RegisterInfo> d_register_infos;
-
+  const lldb_private::RegisterInfo *m_register_info_p;
+  uint32_t m_register_info_count;
+  uint32_t m_user_register_count;
+  std::vector<lldb_private::RegisterInfo> d_register_infos;
 };
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.cpp
index a2ab674..95b106d 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.cpp
@@ -27,181 +27,143 @@ using namespace lldb_private;
 //----------------------------------------------------------------------
 // RegisterContextMacOSXFrameBackchain constructor
 //----------------------------------------------------------------------
-RegisterContextMacOSXFrameBackchain::RegisterContextMacOSXFrameBackchain
-(
-    Thread &thread,
-    uint32_t concrete_frame_idx,
-    const UnwindMacOSXFrameBackchain::Cursor &cursor
-) :
-    RegisterContext (thread, concrete_frame_idx),
-    m_cursor (cursor),
-    m_cursor_is_valid (true)
-{
-}
+RegisterContextMacOSXFrameBackchain::RegisterContextMacOSXFrameBackchain(
+    Thread &thread, uint32_t concrete_frame_idx,
+    const UnwindMacOSXFrameBackchain::Cursor &cursor)
+    : RegisterContext(thread, concrete_frame_idx), m_cursor(cursor),
+      m_cursor_is_valid(true) {}
 
 //----------------------------------------------------------------------
 // Destructor
 //----------------------------------------------------------------------
-RegisterContextMacOSXFrameBackchain::~RegisterContextMacOSXFrameBackchain()
-{
-}
+RegisterContextMacOSXFrameBackchain::~RegisterContextMacOSXFrameBackchain() {}
 
-void
-RegisterContextMacOSXFrameBackchain::InvalidateAllRegisters ()
-{
-    m_cursor_is_valid = false;
+void RegisterContextMacOSXFrameBackchain::InvalidateAllRegisters() {
+  m_cursor_is_valid = false;
 }
 
-size_t
-RegisterContextMacOSXFrameBackchain::GetRegisterCount ()
-{
-    return m_thread.GetRegisterContext()->GetRegisterCount();
+size_t RegisterContextMacOSXFrameBackchain::GetRegisterCount() {
+  return m_thread.GetRegisterContext()->GetRegisterCount();
 }
 
 const RegisterInfo *
-RegisterContextMacOSXFrameBackchain::GetRegisterInfoAtIndex (size_t reg)
-{
-    return m_thread.GetRegisterContext()->GetRegisterInfoAtIndex(reg);
+RegisterContextMacOSXFrameBackchain::GetRegisterInfoAtIndex(size_t reg) {
+  return m_thread.GetRegisterContext()->GetRegisterInfoAtIndex(reg);
 }
 
-size_t
-RegisterContextMacOSXFrameBackchain::GetRegisterSetCount ()
-{
-    return m_thread.GetRegisterContext()->GetRegisterSetCount();
+size_t RegisterContextMacOSXFrameBackchain::GetRegisterSetCount() {
+  return m_thread.GetRegisterContext()->GetRegisterSetCount();
 }
 
-
-
 const RegisterSet *
-RegisterContextMacOSXFrameBackchain::GetRegisterSet (size_t reg_set)
-{
-    return m_thread.GetRegisterContext()->GetRegisterSet (reg_set);
+RegisterContextMacOSXFrameBackchain::GetRegisterSet(size_t reg_set) {
+  return m_thread.GetRegisterContext()->GetRegisterSet(reg_set);
 }
 
+bool RegisterContextMacOSXFrameBackchain::ReadRegister(
+    const RegisterInfo *reg_info, RegisterValue &value) {
+  if (!m_cursor_is_valid)
+    return false;
+
+  uint64_t reg_value = LLDB_INVALID_ADDRESS;
 
+  switch (reg_info->kinds[eRegisterKindGeneric]) {
+  case LLDB_REGNUM_GENERIC_PC:
+    if (m_cursor.pc == LLDB_INVALID_ADDRESS)
+      return false;
+    reg_value = m_cursor.pc;
+    break;
 
-bool
-RegisterContextMacOSXFrameBackchain::ReadRegister (const RegisterInfo *reg_info,
-                                                   RegisterValue &value)
-{
-    if (!m_cursor_is_valid)
-        return false;
-
-    uint64_t reg_value = LLDB_INVALID_ADDRESS;
-    
-    switch (reg_info->kinds[eRegisterKindGeneric])
-    {
-    case LLDB_REGNUM_GENERIC_PC:
-        if (m_cursor.pc == LLDB_INVALID_ADDRESS)
-            return false;
-        reg_value = m_cursor.pc;
-        break;
-    
-    case LLDB_REGNUM_GENERIC_FP:
-        if (m_cursor.fp == LLDB_INVALID_ADDRESS)
-            return false;
-        reg_value = m_cursor.fp;
-        break;
-    
-    default:
-        return false;    
-    }
-    
-    switch (reg_info->encoding)
-    {
-    case eEncodingInvalid:
-    case eEncodingVector:
-        break;
-
-    case eEncodingUint:
-    case eEncodingSint:
-        value.SetUInt(reg_value, reg_info->byte_size);
+  case LLDB_REGNUM_GENERIC_FP:
+    if (m_cursor.fp == LLDB_INVALID_ADDRESS)
+      return false;
+    reg_value = m_cursor.fp;
+    break;
+
+  default:
+    return false;
+  }
+
+  switch (reg_info->encoding) {
+  case eEncodingInvalid:
+  case eEncodingVector:
+    break;
+
+  case eEncodingUint:
+  case eEncodingSint:
+    value.SetUInt(reg_value, reg_info->byte_size);
+    return true;
+
+  case eEncodingIEEE754:
+    switch (reg_info->byte_size) {
+    case sizeof(float):
+      if (sizeof(float) == sizeof(uint32_t)) {
+        value.SetUInt32(reg_value, RegisterValue::eTypeFloat);
+        return true;
+      } else if (sizeof(float) == sizeof(uint64_t)) {
+        value.SetUInt64(reg_value, RegisterValue::eTypeFloat);
         return true;
+      }
+      break;
 
-    case eEncodingIEEE754:
-        switch (reg_info->byte_size)
-        {
-        case sizeof (float):
-            if (sizeof (float) == sizeof(uint32_t))
-            {
-                value.SetUInt32(reg_value, RegisterValue::eTypeFloat);
-                return true;
-            }
-            else if (sizeof (float) == sizeof(uint64_t))
-            {
-                value.SetUInt64(reg_value, RegisterValue::eTypeFloat);
-                return true;
-            }
-            break;
-
-        case sizeof (double):
-            if (sizeof (double) == sizeof(uint32_t))
-            {
-                value.SetUInt32(reg_value, RegisterValue::eTypeDouble);
-                return true;
-            }
-            else if (sizeof (double) == sizeof(uint64_t))
-            {
-                value.SetUInt64(reg_value, RegisterValue::eTypeDouble);
-                return true;
-            }
-            break;
-
-            // TOOD: need a better way to detect when "long double" types are
-            // the same bytes size as "double"
-#if !defined(__arm__) && !defined(__arm64__) && !defined(__aarch64__) && !defined(_MSC_VER) && \
-    !defined(__mips__) && !defined(__powerpc__) && !defined(__ANDROID_NDK__)
-        case sizeof (long double):
-            if (sizeof (long double) == sizeof(uint32_t))
-            {
-                value.SetUInt32(reg_value, RegisterValue::eTypeLongDouble);
-                return true;
-            }
-            else if (sizeof (long double) == sizeof(uint64_t))
-            {
-                value.SetUInt64(reg_value, RegisterValue::eTypeLongDouble);
-                return true;
-            }
-            break;
+    case sizeof(double):
+      if (sizeof(double) == sizeof(uint32_t)) {
+        value.SetUInt32(reg_value, RegisterValue::eTypeDouble);
+        return true;
+      } else if (sizeof(double) == sizeof(uint64_t)) {
+        value.SetUInt64(reg_value, RegisterValue::eTypeDouble);
+        return true;
+      }
+      break;
+
+// TOOD: need a better way to detect when "long double" types are
+// the same bytes size as "double"
+#if !defined(__arm__) && !defined(__arm64__) && !defined(__aarch64__) &&       \
+    !defined(_MSC_VER) && !defined(__mips__) && !defined(__powerpc__) &&       \
+    !defined(__ANDROID__)
+    case sizeof(long double):
+      if (sizeof(long double) == sizeof(uint32_t)) {
+        value.SetUInt32(reg_value, RegisterValue::eTypeLongDouble);
+        return true;
+      } else if (sizeof(long double) == sizeof(uint64_t)) {
+        value.SetUInt64(reg_value, RegisterValue::eTypeLongDouble);
+        return true;
+      }
+      break;
 #endif
-        }
-        break;
     }
-    return false;
+    break;
+  }
+  return false;
 }
 
-bool
-RegisterContextMacOSXFrameBackchain::WriteRegister (const RegisterInfo *reg_info,
-                                                    const RegisterValue &value)
-{
-    // Not supported yet. We could easily add support for this by remembering
-    // the address of each entry (it would need to be part of the cursor)
-    return false;
+bool RegisterContextMacOSXFrameBackchain::WriteRegister(
+    const RegisterInfo *reg_info, const RegisterValue &value) {
+  // Not supported yet. We could easily add support for this by remembering
+  // the address of each entry (it would need to be part of the cursor)
+  return false;
 }
 
-bool
-RegisterContextMacOSXFrameBackchain::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
-    // libunwind frames can't handle this it doesn't always have all register
-    // values. This call should only be called on frame zero anyway so there
-    // shouldn't be any problem
-    return false;
+bool RegisterContextMacOSXFrameBackchain::ReadAllRegisterValues(
+    lldb::DataBufferSP &data_sp) {
+  // libunwind frames can't handle this it doesn't always have all register
+  // values. This call should only be called on frame zero anyway so there
+  // shouldn't be any problem
+  return false;
 }
 
-bool
-RegisterContextMacOSXFrameBackchain::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
-    // Since this class doesn't respond to "ReadAllRegisterValues()", it must
-    // not have been the one that saved all the register values. So we just let
-    // the thread's register context (the register context for frame zero) do
-    // the writing.
-    return m_thread.GetRegisterContext()->WriteAllRegisterValues(data_sp);
+bool RegisterContextMacOSXFrameBackchain::WriteAllRegisterValues(
+    const lldb::DataBufferSP &data_sp) {
+  // Since this class doesn't respond to "ReadAllRegisterValues()", it must
+  // not have been the one that saved all the register values. So we just let
+  // the thread's register context (the register context for frame zero) do
+  // the writing.
+  return m_thread.GetRegisterContext()->WriteAllRegisterValues(data_sp);
 }
 
-
 uint32_t
-RegisterContextMacOSXFrameBackchain::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
-    return m_thread.GetRegisterContext()->ConvertRegisterKindToRegisterNumber (kind, num);
+RegisterContextMacOSXFrameBackchain::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t num) {
+  return m_thread.GetRegisterContext()->ConvertRegisterKindToRegisterNumber(
+      kind, num);
 }
-
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h
index 0ddadbe..4f5816a 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h
@@ -14,57 +14,48 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
 #include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
 
 #include "UnwindMacOSXFrameBackchain.h"
 
-class RegisterContextMacOSXFrameBackchain : public lldb_private::RegisterContext
-{
+class RegisterContextMacOSXFrameBackchain
+    : public lldb_private::RegisterContext {
 public:
-    RegisterContextMacOSXFrameBackchain (lldb_private::Thread &thread,
-                                         uint32_t concrete_frame_idx,
-                                         const UnwindMacOSXFrameBackchain::Cursor &cursor);
+  RegisterContextMacOSXFrameBackchain(
+      lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+      const UnwindMacOSXFrameBackchain::Cursor &cursor);
+
+  ~RegisterContextMacOSXFrameBackchain() override;
+
+  void InvalidateAllRegisters() override;
 
-    ~RegisterContextMacOSXFrameBackchain() override;
+  size_t GetRegisterCount() override;
 
-    void
-    InvalidateAllRegisters() override;
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
 
-    size_t
-    GetRegisterCount() override;
+  size_t GetRegisterSetCount() override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
+  const lldb_private::RegisterSet *GetRegisterSet(size_t reg_set) override;
 
-    size_t
-    GetRegisterSetCount() override;
+  bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+                    lldb_private::RegisterValue &value) override;
 
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t reg_set) override;
+  bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+                     const lldb_private::RegisterValue &value) override;
 
-    bool
-    ReadRegister(const lldb_private::RegisterInfo *reg_info,
-                 lldb_private::RegisterValue &value) override;
+  bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
 
-    bool
-    WriteRegister(const lldb_private::RegisterInfo *reg_info,
-                  const lldb_private::RegisterValue &value) override;
-    
-    bool
-    ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+  bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
 
-    bool
-    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
 
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-    
 private:
-    UnwindMacOSXFrameBackchain::Cursor m_cursor;
-    bool m_cursor_is_valid;
+  UnwindMacOSXFrameBackchain::Cursor m_cursor;
+  bool m_cursor_is_valid;
 
-    DISALLOW_COPY_AND_ASSIGN (RegisterContextMacOSXFrameBackchain);
+  DISALLOW_COPY_AND_ASSIGN(RegisterContextMacOSXFrameBackchain);
 };
 
 #endif // lldb_RegisterContextMacOSXFrameBackchain_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_arm.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_arm.cpp
index 7ceb536..a4cf077 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_arm.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_arm.cpp
@@ -22,66 +22,50 @@
 using namespace lldb;
 using namespace lldb_private;
 
+RegisterContextMach_arm::RegisterContextMach_arm(Thread &thread,
+                                                 uint32_t concrete_frame_idx)
+    : RegisterContextDarwin_arm(thread, concrete_frame_idx) {}
 
-RegisterContextMach_arm::RegisterContextMach_arm(Thread &thread, uint32_t concrete_frame_idx) :
-    RegisterContextDarwin_arm (thread, concrete_frame_idx)
-{
-}
-
-RegisterContextMach_arm::~RegisterContextMach_arm()
-{
-}
+RegisterContextMach_arm::~RegisterContextMach_arm() {}
 
-int
-RegisterContextMach_arm::DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr)
-{
-    mach_msg_type_number_t count = GPRWordCount;
-    return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
+int RegisterContextMach_arm::DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) {
+  mach_msg_type_number_t count = GPRWordCount;
+  return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
 }
 
-int
-RegisterContextMach_arm::DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu)
-{
-    mach_msg_type_number_t count = FPUWordCount;
-    return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
+int RegisterContextMach_arm::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) {
+  mach_msg_type_number_t count = FPUWordCount;
+  return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
 }
 
-int
-RegisterContextMach_arm::DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc)
-{
-    mach_msg_type_number_t count = EXCWordCount;
-    return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
+int RegisterContextMach_arm::DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) {
+  mach_msg_type_number_t count = EXCWordCount;
+  return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
 }
 
-int
-RegisterContextMach_arm::DoReadDBG (lldb::tid_t tid, int flavor, DBG &dbg)
-{
-    mach_msg_type_number_t count = DBGWordCount;
-    return ::thread_get_state(tid, flavor, (thread_state_t)&dbg, &count);
+int RegisterContextMach_arm::DoReadDBG(lldb::tid_t tid, int flavor, DBG &dbg) {
+  mach_msg_type_number_t count = DBGWordCount;
+  return ::thread_get_state(tid, flavor, (thread_state_t)&dbg, &count);
 }
 
-int
-RegisterContextMach_arm::DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr)
-{
-    return ::thread_set_state(tid, flavor, (thread_state_t)&gpr, GPRWordCount);
+int RegisterContextMach_arm::DoWriteGPR(lldb::tid_t tid, int flavor,
+                                        const GPR &gpr) {
+  return ::thread_set_state(tid, flavor, (thread_state_t)&gpr, GPRWordCount);
 }
 
-int
-RegisterContextMach_arm::DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu)
-{
-    return ::thread_set_state(tid, flavor, (thread_state_t)&fpu, FPUWordCount);
+int RegisterContextMach_arm::DoWriteFPU(lldb::tid_t tid, int flavor,
+                                        const FPU &fpu) {
+  return ::thread_set_state(tid, flavor, (thread_state_t)&fpu, FPUWordCount);
 }
 
-int
-RegisterContextMach_arm::DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc)
-{
-    return ::thread_set_state(tid, flavor, (thread_state_t)&exc, EXCWordCount);
+int RegisterContextMach_arm::DoWriteEXC(lldb::tid_t tid, int flavor,
+                                        const EXC &exc) {
+  return ::thread_set_state(tid, flavor, (thread_state_t)&exc, EXCWordCount);
 }
 
-int
-RegisterContextMach_arm::DoWriteDBG (lldb::tid_t tid, int flavor, const DBG &dbg)
-{
-    return ::thread_set_state(tid, flavor, (thread_state_t)&dbg, DBGWordCount);
+int RegisterContextMach_arm::DoWriteDBG(lldb::tid_t tid, int flavor,
+                                        const DBG &dbg) {
+  return ::thread_set_state(tid, flavor, (thread_state_t)&dbg, DBGWordCount);
 }
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_arm.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_arm.h
index e97a4bf..a2cf6bf 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_arm.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_arm.h
@@ -17,40 +17,29 @@
 // Project includes
 #include "RegisterContextDarwin_arm.h"
 
-class RegisterContextMach_arm : public RegisterContextDarwin_arm
-{
+class RegisterContextMach_arm : public RegisterContextDarwin_arm {
 public:
+  RegisterContextMach_arm(lldb_private::Thread &thread,
+                          uint32_t concrete_frame_idx);
 
-    RegisterContextMach_arm(lldb_private::Thread &thread, uint32_t concrete_frame_idx);
-
-    virtual
-    ~RegisterContextMach_arm();
+  virtual ~RegisterContextMach_arm();
 
 protected:
+  virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr);
+
+  int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu);
+
+  int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc);
+
+  int DoReadDBG(lldb::tid_t tid, int flavor, DBG &dbg);
+
+  int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr);
+
+  int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu);
+
+  int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc);
 
-    virtual int
-    DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr);
-    
-    int
-    DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu);
-    
-    int
-    DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc);
-    
-    int
-    DoReadDBG (lldb::tid_t tid, int flavor, DBG &dbg);
-    
-    int
-    DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr);
-    
-    int
-    DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu);
-    
-    int
-    DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc);
-    
-    int
-    DoWriteDBG (lldb::tid_t tid, int flavor, const DBG &dbg);
+  int DoWriteDBG(lldb::tid_t tid, int flavor, const DBG &dbg);
 };
 
-#endif  // liblldb_RegisterContextMach_arm_h_
+#endif // liblldb_RegisterContextMach_arm_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_i386.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_i386.cpp
index 3d6c9a6..959149e 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_i386.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_i386.cpp
@@ -20,53 +20,40 @@
 using namespace lldb;
 using namespace lldb_private;
 
+RegisterContextMach_i386::RegisterContextMach_i386(Thread &thread,
+                                                   uint32_t concrete_frame_idx)
+    : RegisterContextDarwin_i386(thread, concrete_frame_idx) {}
 
-RegisterContextMach_i386::RegisterContextMach_i386(Thread &thread, uint32_t concrete_frame_idx) :
-    RegisterContextDarwin_i386 (thread, concrete_frame_idx)
-{
-}
-
-RegisterContextMach_i386::~RegisterContextMach_i386()
-{
-}
+RegisterContextMach_i386::~RegisterContextMach_i386() {}
 
-int
-RegisterContextMach_i386::DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr)
-{
-    mach_msg_type_number_t count = GPRWordCount;
-    return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
+int RegisterContextMach_i386::DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) {
+  mach_msg_type_number_t count = GPRWordCount;
+  return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
 }
 
-int
-RegisterContextMach_i386::DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu)
-{
-    mach_msg_type_number_t count = FPUWordCount;
-    return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
+int RegisterContextMach_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) {
+  mach_msg_type_number_t count = FPUWordCount;
+  return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
 }
 
-int
-RegisterContextMach_i386::DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc)
-{
-    mach_msg_type_number_t count = EXCWordCount;
-    return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
+int RegisterContextMach_i386::DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) {
+  mach_msg_type_number_t count = EXCWordCount;
+  return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
 }
 
-int
-RegisterContextMach_i386::DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr)
-{
-    return ::thread_set_state(tid, flavor, (thread_state_t)&gpr, GPRWordCount);
+int RegisterContextMach_i386::DoWriteGPR(lldb::tid_t tid, int flavor,
+                                         const GPR &gpr) {
+  return ::thread_set_state(tid, flavor, (thread_state_t)&gpr, GPRWordCount);
 }
 
-int
-RegisterContextMach_i386::DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu)
-{
-    return ::thread_set_state(tid, flavor, (thread_state_t)&fpu, FPUWordCount);
+int RegisterContextMach_i386::DoWriteFPU(lldb::tid_t tid, int flavor,
+                                         const FPU &fpu) {
+  return ::thread_set_state(tid, flavor, (thread_state_t)&fpu, FPUWordCount);
 }
 
-int
-RegisterContextMach_i386::DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc)
-{
-    return ::thread_set_state(tid, flavor, (thread_state_t)&exc, EXCWordCount);
+int RegisterContextMach_i386::DoWriteEXC(lldb::tid_t tid, int flavor,
+                                         const EXC &exc) {
+  return ::thread_set_state(tid, flavor, (thread_state_t)&exc, EXCWordCount);
 }
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_i386.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_i386.h
index ad0f69d..8ac693a 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_i386.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_i386.h
@@ -16,34 +16,25 @@
 // Project includes
 #include "RegisterContextDarwin_i386.h"
 
-class RegisterContextMach_i386 : public RegisterContextDarwin_i386
-{
+class RegisterContextMach_i386 : public RegisterContextDarwin_i386 {
 public:
-    
-    RegisterContextMach_i386(lldb_private::Thread &thread, uint32_t concrete_frame_idx);
-    
-    virtual
-    ~RegisterContextMach_i386();
-    
+  RegisterContextMach_i386(lldb_private::Thread &thread,
+                           uint32_t concrete_frame_idx);
+
+  virtual ~RegisterContextMach_i386();
+
 protected:
-    
-    virtual int
-    DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr);
-    
-    int
-    DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu);
-    
-    int
-    DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc);
-    
-    int
-    DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr);
-    
-    int
-    DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu);
-    
-    int
-    DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc);
+  virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr);
+
+  int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu);
+
+  int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc);
+
+  int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr);
+
+  int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu);
+
+  int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc);
 };
 
-#endif  // liblldb_RegisterContextMach_i386_h_
+#endif // liblldb_RegisterContextMach_i386_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_x86_64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_x86_64.cpp
index f03685e..522b73a 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_x86_64.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_x86_64.cpp
@@ -20,53 +20,43 @@
 using namespace lldb;
 using namespace lldb_private;
 
+RegisterContextMach_x86_64::RegisterContextMach_x86_64(
+    Thread &thread, uint32_t concrete_frame_idx)
+    : RegisterContextDarwin_x86_64(thread, concrete_frame_idx) {}
 
-RegisterContextMach_x86_64::RegisterContextMach_x86_64(Thread &thread, uint32_t concrete_frame_idx) :
-    RegisterContextDarwin_x86_64 (thread, concrete_frame_idx)
-{
-}
-
-RegisterContextMach_x86_64::~RegisterContextMach_x86_64()
-{
-}
+RegisterContextMach_x86_64::~RegisterContextMach_x86_64() {}
 
-int
-RegisterContextMach_x86_64::DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr)
-{
-    mach_msg_type_number_t count = GPRWordCount;
-    return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
+int RegisterContextMach_x86_64::DoReadGPR(lldb::tid_t tid, int flavor,
+                                          GPR &gpr) {
+  mach_msg_type_number_t count = GPRWordCount;
+  return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
 }
 
-int
-RegisterContextMach_x86_64::DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu)
-{
-    mach_msg_type_number_t count = FPUWordCount;
-    return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
+int RegisterContextMach_x86_64::DoReadFPU(lldb::tid_t tid, int flavor,
+                                          FPU &fpu) {
+  mach_msg_type_number_t count = FPUWordCount;
+  return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
 }
 
-int
-RegisterContextMach_x86_64::DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc)
-{
-    mach_msg_type_number_t count = EXCWordCount;
-    return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
+int RegisterContextMach_x86_64::DoReadEXC(lldb::tid_t tid, int flavor,
+                                          EXC &exc) {
+  mach_msg_type_number_t count = EXCWordCount;
+  return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
 }
 
-int
-RegisterContextMach_x86_64::DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr)
-{
-    return ::thread_set_state(tid, flavor, (thread_state_t)&gpr, GPRWordCount);
+int RegisterContextMach_x86_64::DoWriteGPR(lldb::tid_t tid, int flavor,
+                                           const GPR &gpr) {
+  return ::thread_set_state(tid, flavor, (thread_state_t)&gpr, GPRWordCount);
 }
 
-int
-RegisterContextMach_x86_64::DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu)
-{
-    return ::thread_set_state(tid, flavor, (thread_state_t)&fpu, FPUWordCount);
+int RegisterContextMach_x86_64::DoWriteFPU(lldb::tid_t tid, int flavor,
+                                           const FPU &fpu) {
+  return ::thread_set_state(tid, flavor, (thread_state_t)&fpu, FPUWordCount);
 }
 
-int
-RegisterContextMach_x86_64::DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc)
-{
-    return ::thread_set_state(tid, flavor, (thread_state_t)&exc, EXCWordCount);
+int RegisterContextMach_x86_64::DoWriteEXC(lldb::tid_t tid, int flavor,
+                                           const EXC &exc) {
+  return ::thread_set_state(tid, flavor, (thread_state_t)&exc, EXCWordCount);
 }
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_x86_64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_x86_64.h
index 9e6dfa3..cd42504 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_x86_64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMach_x86_64.h
@@ -1,4 +1,5 @@
-//===-- RegisterContextMach_x86_64.h ------------------------------*- C++ -*-===//
+//===-- RegisterContextMach_x86_64.h ------------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -16,34 +17,25 @@
 // Project includes
 #include "RegisterContextDarwin_x86_64.h"
 
-class RegisterContextMach_x86_64 : public RegisterContextDarwin_x86_64
-{
+class RegisterContextMach_x86_64 : public RegisterContextDarwin_x86_64 {
 public:
-    
-    RegisterContextMach_x86_64(lldb_private::Thread &thread, uint32_t concrete_frame_idx);
-    
-    virtual
-    ~RegisterContextMach_x86_64();
-    
+  RegisterContextMach_x86_64(lldb_private::Thread &thread,
+                             uint32_t concrete_frame_idx);
+
+  virtual ~RegisterContextMach_x86_64();
+
 protected:
-    
-    virtual int
-    DoReadGPR (lldb::tid_t tid, int flavor, GPR &gpr);
-    
-    int
-    DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu);
-    
-    int
-    DoReadEXC (lldb::tid_t tid, int flavor, EXC &exc);
-    
-    int
-    DoWriteGPR (lldb::tid_t tid, int flavor, const GPR &gpr);
-    
-    int
-    DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu);
-    
-    int
-    DoWriteEXC (lldb::tid_t tid, int flavor, const EXC &exc);
+  virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr);
+
+  int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu);
+
+  int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc);
+
+  int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr);
+
+  int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu);
+
+  int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc);
 };
 
-#endif  // liblldb_RegisterContextMach_x86_64_h_
+#endif // liblldb_RegisterContextMach_x86_64_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMemory.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMemory.cpp
index 40d00b1..57966e1 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMemory.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMemory.cpp
@@ -26,149 +26,123 @@ using namespace lldb_private;
 //----------------------------------------------------------------------
 // RegisterContextMemory constructor
 //----------------------------------------------------------------------
-RegisterContextMemory::RegisterContextMemory
-(
-    Thread &thread,
-    uint32_t concrete_frame_idx,
-    DynamicRegisterInfo &reg_infos,
-    addr_t reg_data_addr
-) :
-    RegisterContext (thread, concrete_frame_idx),
-    m_reg_infos (reg_infos),
-    m_reg_valid (),
-    m_reg_data (),
-    m_reg_data_addr (reg_data_addr)
-{
-    // Resize our vector of bools to contain one bool for every register.
-    // We will use these boolean values to know when a register value
-    // is valid in m_reg_data.
-    const size_t num_regs = reg_infos.GetNumRegisters();
-    assert (num_regs > 0);
-    m_reg_valid.resize (num_regs);
-
-    // Make a heap based buffer that is big enough to store all registers
-    DataBufferSP reg_data_sp(new DataBufferHeap (reg_infos.GetRegisterDataByteSize(), 0));
-    m_reg_data.SetData (reg_data_sp);
+RegisterContextMemory::RegisterContextMemory(Thread &thread,
+                                             uint32_t concrete_frame_idx,
+                                             DynamicRegisterInfo &reg_infos,
+                                             addr_t reg_data_addr)
+    : RegisterContext(thread, concrete_frame_idx), m_reg_infos(reg_infos),
+      m_reg_valid(), m_reg_data(), m_reg_data_addr(reg_data_addr) {
+  // Resize our vector of bools to contain one bool for every register.
+  // We will use these boolean values to know when a register value
+  // is valid in m_reg_data.
+  const size_t num_regs = reg_infos.GetNumRegisters();
+  assert(num_regs > 0);
+  m_reg_valid.resize(num_regs);
+
+  // Make a heap based buffer that is big enough to store all registers
+  DataBufferSP reg_data_sp(
+      new DataBufferHeap(reg_infos.GetRegisterDataByteSize(), 0));
+  m_reg_data.SetData(reg_data_sp);
 }
 
 //----------------------------------------------------------------------
 // Destructor
 //----------------------------------------------------------------------
-RegisterContextMemory::~RegisterContextMemory()
-{
-}
+RegisterContextMemory::~RegisterContextMemory() {}
 
-void
-RegisterContextMemory::InvalidateAllRegisters ()
-{
-    if (m_reg_data_addr != LLDB_INVALID_ADDRESS)
-        SetAllRegisterValid (false);
+void RegisterContextMemory::InvalidateAllRegisters() {
+  if (m_reg_data_addr != LLDB_INVALID_ADDRESS)
+    SetAllRegisterValid(false);
 }
 
-void
-RegisterContextMemory::SetAllRegisterValid (bool b)
-{
-    std::vector<bool>::iterator pos, end = m_reg_valid.end();
-    for (pos = m_reg_valid.begin(); pos != end; ++pos)
-        *pos = b;
+void RegisterContextMemory::SetAllRegisterValid(bool b) {
+  std::vector<bool>::iterator pos, end = m_reg_valid.end();
+  for (pos = m_reg_valid.begin(); pos != end; ++pos)
+    *pos = b;
 }
 
-size_t
-RegisterContextMemory::GetRegisterCount ()
-{
-    return m_reg_infos.GetNumRegisters ();
+size_t RegisterContextMemory::GetRegisterCount() {
+  return m_reg_infos.GetNumRegisters();
 }
 
-const RegisterInfo *
-RegisterContextMemory::GetRegisterInfoAtIndex (size_t reg)
-{
-    return m_reg_infos.GetRegisterInfoAtIndex (reg);
+const RegisterInfo *RegisterContextMemory::GetRegisterInfoAtIndex(size_t reg) {
+  return m_reg_infos.GetRegisterInfoAtIndex(reg);
 }
 
-size_t
-RegisterContextMemory::GetRegisterSetCount ()
-{
-    return m_reg_infos.GetNumRegisterSets ();
+size_t RegisterContextMemory::GetRegisterSetCount() {
+  return m_reg_infos.GetNumRegisterSets();
 }
 
-const RegisterSet *
-RegisterContextMemory::GetRegisterSet (size_t reg_set)
-{
-    return m_reg_infos.GetRegisterSet (reg_set);
+const RegisterSet *RegisterContextMemory::GetRegisterSet(size_t reg_set) {
+  return m_reg_infos.GetRegisterSet(reg_set);
 }
 
-uint32_t
-RegisterContextMemory::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
-    return m_reg_infos.ConvertRegisterKindToRegisterNumber (kind, num);
+uint32_t RegisterContextMemory::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t num) {
+  return m_reg_infos.ConvertRegisterKindToRegisterNumber(kind, num);
 }
 
-bool
-RegisterContextMemory::ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value)
-{
-    const uint32_t reg_num = reg_info->kinds[eRegisterKindLLDB];
-    if (!m_reg_valid[reg_num])
-    {                         
-        if (!ReadAllRegisterValues(m_reg_data.GetSharedDataBuffer ()))
-            return false;
-    }
-    const bool partial_data_ok = false;
-    return reg_value.SetValueFromData(reg_info, m_reg_data, reg_info->byte_offset, partial_data_ok).Success();
+bool RegisterContextMemory::ReadRegister(const RegisterInfo *reg_info,
+                                         RegisterValue &reg_value) {
+  const uint32_t reg_num = reg_info->kinds[eRegisterKindLLDB];
+  if (!m_reg_valid[reg_num]) {
+    if (!ReadAllRegisterValues(m_reg_data.GetSharedDataBuffer()))
+      return false;
+  }
+  const bool partial_data_ok = false;
+  return reg_value
+      .SetValueFromData(reg_info, m_reg_data, reg_info->byte_offset,
+                        partial_data_ok)
+      .Success();
 }
 
-bool
-RegisterContextMemory::WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value)
-{
-    if (m_reg_data_addr != LLDB_INVALID_ADDRESS)
-    {
-        const uint32_t reg_num = reg_info->kinds[eRegisterKindLLDB];
-        addr_t reg_addr = m_reg_data_addr + reg_info->byte_offset;
-        Error error (WriteRegisterValueToMemory(reg_info, reg_addr, reg_info->byte_size, reg_value));
-        m_reg_valid[reg_num] = false;
-        return error.Success();
-    }
-    return false;
+bool RegisterContextMemory::WriteRegister(const RegisterInfo *reg_info,
+                                          const RegisterValue &reg_value) {
+  if (m_reg_data_addr != LLDB_INVALID_ADDRESS) {
+    const uint32_t reg_num = reg_info->kinds[eRegisterKindLLDB];
+    addr_t reg_addr = m_reg_data_addr + reg_info->byte_offset;
+    Error error(WriteRegisterValueToMemory(reg_info, reg_addr,
+                                           reg_info->byte_size, reg_value));
+    m_reg_valid[reg_num] = false;
+    return error.Success();
+  }
+  return false;
 }
 
-bool
-RegisterContextMemory::ReadAllRegisterValues (DataBufferSP &data_sp)
-{
-    if (m_reg_data_addr != LLDB_INVALID_ADDRESS)
-    {
-        ProcessSP process_sp (CalculateProcess());
-        if (process_sp)
-        {
-            Error error;
-            if (process_sp->ReadMemory(m_reg_data_addr, data_sp->GetBytes(), data_sp->GetByteSize(), error) == data_sp->GetByteSize())
-            {
-                SetAllRegisterValid (true);
-                return true;
-            }
-        }
+bool RegisterContextMemory::ReadAllRegisterValues(DataBufferSP &data_sp) {
+  if (m_reg_data_addr != LLDB_INVALID_ADDRESS) {
+    ProcessSP process_sp(CalculateProcess());
+    if (process_sp) {
+      Error error;
+      if (process_sp->ReadMemory(m_reg_data_addr, data_sp->GetBytes(),
+                                 data_sp->GetByteSize(),
+                                 error) == data_sp->GetByteSize()) {
+        SetAllRegisterValid(true);
+        return true;
+      }
     }
-    return false;
+  }
+  return false;
 }
 
-bool
-RegisterContextMemory::WriteAllRegisterValues (const DataBufferSP &data_sp)
-{
-    if (m_reg_data_addr != LLDB_INVALID_ADDRESS)
-    {
-        ProcessSP process_sp (CalculateProcess());
-        if (process_sp)
-        {
-            Error error;
-            SetAllRegisterValid (false);
-            if (process_sp->WriteMemory(m_reg_data_addr, data_sp->GetBytes(), data_sp->GetByteSize(), error) == data_sp->GetByteSize())
-                return true;
-        }
+bool RegisterContextMemory::WriteAllRegisterValues(
+    const DataBufferSP &data_sp) {
+  if (m_reg_data_addr != LLDB_INVALID_ADDRESS) {
+    ProcessSP process_sp(CalculateProcess());
+    if (process_sp) {
+      Error error;
+      SetAllRegisterValid(false);
+      if (process_sp->WriteMemory(m_reg_data_addr, data_sp->GetBytes(),
+                                  data_sp->GetByteSize(),
+                                  error) == data_sp->GetByteSize())
+        return true;
     }
-    return false;
+  }
+  return false;
 }
 
-void
-RegisterContextMemory::SetAllRegisterData  (const lldb::DataBufferSP &data_sp)
-{
-    m_reg_data.SetData(data_sp);
-    SetAllRegisterValid (true);    
+void RegisterContextMemory::SetAllRegisterData(
+    const lldb::DataBufferSP &data_sp) {
+  m_reg_data.SetData(data_sp);
+  SetAllRegisterValid(true);
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMemory.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMemory.h
index d61aba9..55de041 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMemory.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextMemory.h
@@ -16,76 +16,65 @@
 
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
 #include "lldb/Core/DataExtractor.h"
 #include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
 
 class DynamicRegisterInfo;
 
-class RegisterContextMemory : public lldb_private::RegisterContext
-{
+class RegisterContextMemory : public lldb_private::RegisterContext {
 public:
-    RegisterContextMemory (lldb_private::Thread &thread,
-                            uint32_t concrete_frame_idx,
-                            DynamicRegisterInfo &reg_info,
-                            lldb::addr_t reg_data_addr);
-
-    ~RegisterContextMemory() override;
-
-    void
-    InvalidateAllRegisters() override;
-
-    size_t
-    GetRegisterCount() override;
-
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
-
-    size_t
-    GetRegisterSetCount() override;
-
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t reg_set) override;
-
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
-    //------------------------------------------------------------------
-    // If all of the thread register are in a contiguous buffer in 
-    // memory, then the default ReadRegister/WriteRegister and
-    // ReadAllRegisterValues/WriteAllRegisterValues will work. If thread
-    // registers are not contiguous, clients will want to subclass this
-    // class and modify the read/write functions as needed.
-    //------------------------------------------------------------------
-
-    bool
-    ReadRegister(const lldb_private::RegisterInfo *reg_info,
-                 lldb_private::RegisterValue &reg_value) override;
-    
-    bool
-    WriteRegister(const lldb_private::RegisterInfo *reg_info,
-                  const lldb_private::RegisterValue &reg_value) override;
-    
-    bool
-    ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-    
-    bool
-    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
-
-    void
-    SetAllRegisterData  (const lldb::DataBufferSP &data_sp);
+  RegisterContextMemory(lldb_private::Thread &thread,
+                        uint32_t concrete_frame_idx,
+                        DynamicRegisterInfo &reg_info,
+                        lldb::addr_t reg_data_addr);
+
+  ~RegisterContextMemory() override;
+
+  void InvalidateAllRegisters() override;
+
+  size_t GetRegisterCount() override;
+
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+  size_t GetRegisterSetCount() override;
+
+  const lldb_private::RegisterSet *GetRegisterSet(size_t reg_set) override;
+
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
+
+  //------------------------------------------------------------------
+  // If all of the thread register are in a contiguous buffer in
+  // memory, then the default ReadRegister/WriteRegister and
+  // ReadAllRegisterValues/WriteAllRegisterValues will work. If thread
+  // registers are not contiguous, clients will want to subclass this
+  // class and modify the read/write functions as needed.
+  //------------------------------------------------------------------
+
+  bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+                    lldb_private::RegisterValue &reg_value) override;
+
+  bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+                     const lldb_private::RegisterValue &reg_value) override;
+
+  bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+  bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+  void SetAllRegisterData(const lldb::DataBufferSP &data_sp);
 
 protected:
-    void
-    SetAllRegisterValid (bool b);
+  void SetAllRegisterValid(bool b);
 
-    DynamicRegisterInfo &m_reg_infos;
-    std::vector<bool> m_reg_valid;
-    lldb_private::DataExtractor m_reg_data;
-    lldb::addr_t m_reg_data_addr; // If this is valid, then we have a register context that is stored in memmory
+  DynamicRegisterInfo &m_reg_infos;
+  std::vector<bool> m_reg_valid;
+  lldb_private::DataExtractor m_reg_data;
+  lldb::addr_t m_reg_data_addr; // If this is valid, then we have a register
+                                // context that is stored in memmory
 
 private:
-    DISALLOW_COPY_AND_ASSIGN (RegisterContextMemory);
+  DISALLOW_COPY_AND_ASSIGN(RegisterContextMemory);
 };
 
 #endif // lldb_RegisterContextMemory_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.cpp
index 71ece16..4f64a8c 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.cpp
@@ -1,52 +1,50 @@
-//===-- RegisterContextNetBSD_x86_64.cpp ----------------------*- C++ -*-===//
+//===-- RegisterContextNetBSD_x86_64.cpp ------------------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
-//===---------------------------------------------------------------------===//
+//===----------------------------------------------------------------------===//
 
-#include <cstddef>
-#include <vector>
-
-#include "llvm/Support/Compiler.h"
-
-#include "RegisterContextPOSIX_x86.h"
 #include "RegisterContextNetBSD_x86_64.h"
+#include "RegisterContextPOSIX_x86.h"
+#include "llvm/ADT/Triple.h"
+#include "llvm/Support/Compiler.h"
+#include <cassert>
+#include <cstddef>
 
 using namespace lldb_private;
 using namespace lldb;
 
 // src/sys/arch/amd64/include/frame_regs.h
-typedef struct _GPR
-{
-    uint64_t rdi;     /*  0 */
-    uint64_t rsi;     /*  1 */
-    uint64_t rdx;     /*  2 */
-    uint64_t rcx;     /*  3 */
-    uint64_t r8;      /*  4 */
-    uint64_t r9;      /*  5 */
-    uint64_t r10;     /*  6 */
-    uint64_t r11;     /*  7 */
-    uint64_t r12;     /*  8 */
-    uint64_t r13;     /*  9 */
-    uint64_t r14;     /* 10 */
-    uint64_t r15;     /* 11 */
-    uint64_t rbp;     /* 12 */
-    uint64_t rbx;     /* 13 */
-    uint64_t rax;     /* 14 */
-    uint64_t gs;      /* 15 */
-    uint64_t fs;      /* 16 */
-    uint64_t es;      /* 17 */
-    uint64_t ds;      /* 18 */
-    uint64_t trapno;  /* 19 */
-    uint64_t err;     /* 20 */
-    uint64_t rip;     /* 21 */
-    uint64_t cs;      /* 22 */
-    uint64_t rflags;  /* 23 */
-    uint64_t rsp;     /* 24 */
-    uint64_t ss;      /* 25 */
+typedef struct _GPR {
+  uint64_t rdi;    /*  0 */
+  uint64_t rsi;    /*  1 */
+  uint64_t rdx;    /*  2 */
+  uint64_t rcx;    /*  3 */
+  uint64_t r8;     /*  4 */
+  uint64_t r9;     /*  5 */
+  uint64_t r10;    /*  6 */
+  uint64_t r11;    /*  7 */
+  uint64_t r12;    /*  8 */
+  uint64_t r13;    /*  9 */
+  uint64_t r14;    /* 10 */
+  uint64_t r15;    /* 11 */
+  uint64_t rbp;    /* 12 */
+  uint64_t rbx;    /* 13 */
+  uint64_t rax;    /* 14 */
+  uint64_t gs;     /* 15 */
+  uint64_t fs;     /* 16 */
+  uint64_t es;     /* 17 */
+  uint64_t ds;     /* 18 */
+  uint64_t trapno; /* 19 */
+  uint64_t err;    /* 20 */
+  uint64_t rip;    /* 21 */
+  uint64_t cs;     /* 22 */
+  uint64_t rflags; /* 23 */
+  uint64_t rsp;    /* 24 */
+  uint64_t ss;     /* 25 */
 } GPR;
 
 /*
@@ -65,38 +63,35 @@ typedef struct _GPR
  */
 
 struct UserArea {
-    GPR      gpr;
-    uint64_t mc_tlsbase;
-    FPR      fpr;
+  GPR gpr;
+  uint64_t mc_tlsbase;
+  FPR fpr;
 };
 
-
 //---------------------------------------------------------------------------
 // Cherry-pick parts of RegisterInfos_x86_64.h, without debug registers
 //---------------------------------------------------------------------------
 // Computes the offset of the given GPR in the user data area.
-#define GPR_OFFSET(regname) \
-    (LLVM_EXTENSION offsetof(GPR, regname))
+#define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname))
 
 // Computes the offset of the given FPR in the extended data area.
-#define FPR_OFFSET(regname) \
-    (LLVM_EXTENSION offsetof(UserArea, fpr) + \
-     LLVM_EXTENSION offsetof(FPR, xstate) + \
-     LLVM_EXTENSION offsetof(FXSAVE, regname))
+#define FPR_OFFSET(regname)                                                    \
+  (LLVM_EXTENSION offsetof(UserArea, fpr) +                                    \
+   LLVM_EXTENSION offsetof(FPR, xstate) +                                      \
+   LLVM_EXTENSION offsetof(FXSAVE, regname))
 
 // Computes the offset of the YMM register assembled from register halves.
 // Based on DNBArchImplX86_64.cpp from debugserver
-#define YMM_OFFSET(reg_index) \
-    (LLVM_EXTENSION offsetof(UserArea, fpr) + \
-     LLVM_EXTENSION offsetof(FPR, xstate) + \
-     LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + \
-     (32 * reg_index))
+#define YMM_OFFSET(reg_index)                                                  \
+  (LLVM_EXTENSION offsetof(UserArea, fpr) +                                    \
+   LLVM_EXTENSION offsetof(FPR, xstate) +                                      \
+   LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + (32 * reg_index))
 
 // Number of bytes needed to represent a FPR.
-#define FPR_SIZE(reg) sizeof(((FXSAVE*)NULL)->reg)
+#define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg)
 
 // Number of bytes needed to represent the i'th FP register.
-#define FP_SIZE sizeof(((MMSReg*)NULL)->bytes)
+#define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes)
 
 // Number of bytes needed to represent an XMM register.
 #define XMM_SIZE sizeof(XMMReg)
@@ -107,197 +102,234 @@ struct UserArea {
 // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
 
 // Note that the size and offset will be updated by platform-specific classes.
-#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)    \
-    { #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, \
-      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##reg##_x86_64 }, NULL, NULL }
-
-#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4)    \
-    { #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint,   \
-      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_x86_64 }, NULL, NULL }
-
-#define DEFINE_FP_ST(reg, i)                                       \
-    { #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]),   \
-      eEncodingVector, eFormatVectorOfUInt8,                       \
-      { dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \
-      NULL, NULL }
-
-#define DEFINE_FP_MM(reg, i)                                                \
-    { #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]),   \
-      eEncodingUint, eFormatHex,                                            \
-      { dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_mm##i##_x86_64 }, \
-      NULL, NULL }
-
-#define DEFINE_XMM(reg, i)                                         \
-    { #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]),   \
-      eEncodingVector, eFormatVectorOfUInt8,                       \
-      { dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_x86_64}, \
-      NULL, NULL }
-
-#define DEFINE_YMM(reg, i)                                                          \
-    { #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(i),                         \
-      eEncodingVector, eFormatVectorOfUInt8,                                        \
-      { dwarf_##reg##i##h_x86_64, dwarf_##reg##i##h_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_x86_64 }, \
-      NULL, NULL }
-
-#define DEFINE_GPR_PSEUDO_32(reg32, reg64)          \
-    { #reg32, NULL, 4, GPR_OFFSET(reg64), eEncodingUint,   \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg32##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
-#define DEFINE_GPR_PSEUDO_16(reg16, reg64)          \
-    { #reg16, NULL, 2, GPR_OFFSET(reg64), eEncodingUint,   \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg16##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
-#define DEFINE_GPR_PSEUDO_8H(reg8, reg64)           \
-    { #reg8, NULL, 1, GPR_OFFSET(reg64)+1, eEncodingUint,  \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
-#define DEFINE_GPR_PSEUDO_8L(reg8, reg64)           \
-    { #reg8, NULL, 1, GPR_OFFSET(reg64), eEncodingUint,    \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
-
-static RegisterInfo
-g_register_infos_x86_64[] =
-{
-    // General purpose registers.           EH_Frame,                   DWARF,                Generic,                Process Plugin
-    DEFINE_GPR(rax,    nullptr,     dwarf_rax_x86_64,        dwarf_rax_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rbx,    nullptr,     dwarf_rbx_x86_64,        dwarf_rbx_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rcx,    "arg4",      dwarf_rcx_x86_64,        dwarf_rcx_x86_64,    LLDB_REGNUM_GENERIC_ARG4,  LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rdx,    "arg3",      dwarf_rdx_x86_64,        dwarf_rdx_x86_64,    LLDB_REGNUM_GENERIC_ARG3,  LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rdi,    "arg1",      dwarf_rdi_x86_64,        dwarf_rdi_x86_64,    LLDB_REGNUM_GENERIC_ARG1,  LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rsi,    "arg2",      dwarf_rsi_x86_64,        dwarf_rsi_x86_64,    LLDB_REGNUM_GENERIC_ARG2,  LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rbp,    "fp",        dwarf_rbp_x86_64,        dwarf_rbp_x86_64,    LLDB_REGNUM_GENERIC_FP,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rsp,    "sp",        dwarf_rsp_x86_64,        dwarf_rsp_x86_64,    LLDB_REGNUM_GENERIC_SP,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r8,     "arg5",      dwarf_r8_x86_64,         dwarf_r8_x86_64,     LLDB_REGNUM_GENERIC_ARG5,  LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r9,     "arg6",      dwarf_r9_x86_64,         dwarf_r9_x86_64,     LLDB_REGNUM_GENERIC_ARG6,  LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r10,    nullptr,     dwarf_r10_x86_64,        dwarf_r10_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r11,    nullptr,     dwarf_r11_x86_64,        dwarf_r11_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r12,    nullptr,     dwarf_r12_x86_64,        dwarf_r12_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r13,    nullptr,     dwarf_r13_x86_64,        dwarf_r13_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r14,    nullptr,     dwarf_r14_x86_64,        dwarf_r14_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r15,    nullptr,     dwarf_r15_x86_64,        dwarf_r15_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rip,    "pc",        dwarf_rip_x86_64,        dwarf_rip_x86_64,    LLDB_REGNUM_GENERIC_PC,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rflags, "flags",     dwarf_rflags_x86_64,     dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
-    DEFINE_GPR(cs,     nullptr,     dwarf_cs_x86_64,         dwarf_cs_x86_64,     LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(fs,     nullptr,     dwarf_fs_x86_64,         dwarf_fs_x86_64,     LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(gs,     nullptr,     dwarf_gs_x86_64,         dwarf_gs_x86_64,     LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(ss,     nullptr,     dwarf_ss_x86_64,         dwarf_ss_x86_64,     LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(ds,     nullptr,     dwarf_ds_x86_64,         dwarf_ds_x86_64,     LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(es,     nullptr,     dwarf_es_x86_64,         dwarf_es_x86_64,     LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-
-    DEFINE_GPR_PSEUDO_32(eax, rax),
-    DEFINE_GPR_PSEUDO_32(ebx, rbx),
-    DEFINE_GPR_PSEUDO_32(ecx, rcx),
-    DEFINE_GPR_PSEUDO_32(edx, rdx),
-    DEFINE_GPR_PSEUDO_32(edi, rdi),
-    DEFINE_GPR_PSEUDO_32(esi, rsi),
-    DEFINE_GPR_PSEUDO_32(ebp, rbp),
-    DEFINE_GPR_PSEUDO_32(esp, rsp),
-    DEFINE_GPR_PSEUDO_32(r8d,  r8),
-    DEFINE_GPR_PSEUDO_32(r9d,  r9),
-    DEFINE_GPR_PSEUDO_32(r10d, r10),
-    DEFINE_GPR_PSEUDO_32(r11d, r11),
-    DEFINE_GPR_PSEUDO_32(r12d, r12),
-    DEFINE_GPR_PSEUDO_32(r13d, r13),
-    DEFINE_GPR_PSEUDO_32(r14d, r14),
-    DEFINE_GPR_PSEUDO_32(r15d, r15),
-    DEFINE_GPR_PSEUDO_16(ax,   rax),
-    DEFINE_GPR_PSEUDO_16(bx,   rbx),
-    DEFINE_GPR_PSEUDO_16(cx,   rcx),
-    DEFINE_GPR_PSEUDO_16(dx,   rdx),
-    DEFINE_GPR_PSEUDO_16(di,   rdi),
-    DEFINE_GPR_PSEUDO_16(si,   rsi),
-    DEFINE_GPR_PSEUDO_16(bp,   rbp),
-    DEFINE_GPR_PSEUDO_16(sp,   rsp),
-    DEFINE_GPR_PSEUDO_16(r8w,  r8),
-    DEFINE_GPR_PSEUDO_16(r9w,  r9),
-    DEFINE_GPR_PSEUDO_16(r10w, r10),
-    DEFINE_GPR_PSEUDO_16(r11w, r11),
-    DEFINE_GPR_PSEUDO_16(r12w, r12),
-    DEFINE_GPR_PSEUDO_16(r13w, r13),
-    DEFINE_GPR_PSEUDO_16(r14w, r14),
-    DEFINE_GPR_PSEUDO_16(r15w, r15),
-    DEFINE_GPR_PSEUDO_8H(ah,   rax),
-    DEFINE_GPR_PSEUDO_8H(bh,   rbx),
-    DEFINE_GPR_PSEUDO_8H(ch,   rcx),
-    DEFINE_GPR_PSEUDO_8H(dh,   rdx),
-    DEFINE_GPR_PSEUDO_8L(al,   rax),
-    DEFINE_GPR_PSEUDO_8L(bl,   rbx),
-    DEFINE_GPR_PSEUDO_8L(cl,   rcx),
-    DEFINE_GPR_PSEUDO_8L(dl,   rdx),
-    DEFINE_GPR_PSEUDO_8L(dil,  rdi),
-    DEFINE_GPR_PSEUDO_8L(sil,  rsi),
-    DEFINE_GPR_PSEUDO_8L(bpl,  rbp),
-    DEFINE_GPR_PSEUDO_8L(spl,  rsp),
-    DEFINE_GPR_PSEUDO_8L(r8l,  r8),
-    DEFINE_GPR_PSEUDO_8L(r9l,  r9),
-    DEFINE_GPR_PSEUDO_8L(r10l, r10),
-    DEFINE_GPR_PSEUDO_8L(r11l, r11),
-    DEFINE_GPR_PSEUDO_8L(r12l, r12),
-    DEFINE_GPR_PSEUDO_8L(r13l, r13),
-    DEFINE_GPR_PSEUDO_8L(r14l, r14),
-    DEFINE_GPR_PSEUDO_8L(r15l, r15),
-
-    // i387 Floating point registers. EH_frame,                                  DWARF,               Generic,          Process Plugin
-    DEFINE_FPR(fctrl,     fctrl,              dwarf_fctrl_x86_64,     dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fstat,     fstat,              dwarf_fstat_x86_64,     dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(ftag,      ftag,           LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fop,       fop,            LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fiseg,     ptr.i386_.fiseg, LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fioff,     ptr.i386_.fioff, LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(foseg,     ptr.i386_.foseg, LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fooff,     ptr.i386_.fooff, LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(mxcsr,     mxcsr,              dwarf_mxcsr_x86_64,     dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(mxcsrmask, mxcsrmask,      LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)                       \
+  {                                                                            \
+    #reg, alt, sizeof(((GPR *)nullptr)->reg),                                  \
+                      GPR_OFFSET(reg), eEncodingUint, eFormatHex,              \
+                                 {kind1, kind2, kind3, kind4,                  \
+                                  lldb_##reg##_x86_64 },                       \
+                                  nullptr, nullptr, nullptr, 0                 \
+  }
+
+#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4)                      \
+  {                                                                            \
+    #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
+                                           {kind1, kind2, kind3, kind4,        \
+                                            lldb_##name##_x86_64 },            \
+                                            nullptr, nullptr, nullptr, 0       \
+  }
+
+#define DEFINE_FP_ST(reg, i)                                                   \
+  {                                                                            \
+    #reg #i, nullptr, FP_SIZE,                                                 \
+        LLVM_EXTENSION FPR_OFFSET(                                             \
+            stmm[i]), eEncodingVector, eFormatVectorOfUInt8,                   \
+            {dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM,  \
+             LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 },                       \
+             nullptr, nullptr, nullptr, 0                                      \
+  }
+
+#define DEFINE_FP_MM(reg, i)                                                   \
+  {                                                                            \
+    #reg #i, nullptr, sizeof(uint64_t),                                        \
+                          LLVM_EXTENSION FPR_OFFSET(                           \
+                              stmm[i]), eEncodingUint, eFormatHex,             \
+                              {dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64,     \
+                               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,       \
+                               lldb_mm##i##_x86_64 },                          \
+                               nullptr, nullptr, nullptr, 0                    \
+  }
+
+#define DEFINE_XMM(reg, i)                                                     \
+  {                                                                            \
+    #reg #i, nullptr, XMM_SIZE,                                                \
+        LLVM_EXTENSION FPR_OFFSET(                                             \
+            reg[i]), eEncodingVector, eFormatVectorOfUInt8,                    \
+            {dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64,                 \
+             LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                         \
+             lldb_##reg##i##_x86_64 },                                         \
+             nullptr, nullptr, nullptr, 0                                      \
+  }
+
+#define DEFINE_YMM(reg, i)                                                     \
+  {                                                                            \
+    #reg #i, nullptr, YMM_SIZE,                                                \
+        LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8,   \
+                                  {dwarf_##reg##i##h_x86_64,                   \
+                                   dwarf_##reg##i##h_x86_64,                   \
+                                   LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,   \
+                                   lldb_##reg##i##_x86_64 },                   \
+                                   nullptr, nullptr, nullptr, 0                \
+  }
+
+#define DEFINE_GPR_PSEUDO_32(reg32, reg64)                                     \
+  {                                                                            \
+    #reg32, nullptr, 4,                                                        \
+        GPR_OFFSET(reg64), eEncodingUint, eFormatHex,                          \
+                   {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    lldb_##reg32##_x86_64 },                                   \
+                    RegisterContextPOSIX_x86::g_contained_##reg64,             \
+                    RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
+  }
+
+#define DEFINE_GPR_PSEUDO_16(reg16, reg64)                                     \
+  {                                                                            \
+    #reg16, nullptr, 2,                                                        \
+        GPR_OFFSET(reg64), eEncodingUint, eFormatHex,                          \
+                   {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    lldb_##reg16##_x86_64 },                                   \
+                    RegisterContextPOSIX_x86::g_contained_##reg64,             \
+                    RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
+  }
+
+#define DEFINE_GPR_PSEUDO_8H(reg8, reg64)                                      \
+  {                                                                            \
+    #reg8, nullptr, 1, GPR_OFFSET(reg64) + 1, eEncodingUint, eFormatHex,       \
+                               {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,      \
+                                LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,      \
+                                lldb_##reg8##_x86_64 },                        \
+                                RegisterContextPOSIX_x86::g_contained_##reg64, \
+                                RegisterContextPOSIX_x86::g_invalidate_##reg64,\
+                                nullptr, 0                                     \
+  }
+
+#define DEFINE_GPR_PSEUDO_8L(reg8, reg64)                                      \
+  {                                                                            \
+    #reg8, nullptr, 1, GPR_OFFSET(reg64), eEncodingUint, eFormatHex,           \
+                               {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,      \
+                                LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,      \
+                                lldb_##reg8##_x86_64 },                        \
+                                RegisterContextPOSIX_x86::g_contained_##reg64, \
+                                RegisterContextPOSIX_x86::g_invalidate_##reg64,\
+                                nullptr, 0                                     \
+  }
+
+static RegisterInfo g_register_infos_x86_64[] = {
+    // General purpose registers.           EH_Frame,                   DWARF,
+    // Generic,                Process Plugin
+    DEFINE_GPR(rax, nullptr, dwarf_rax_x86_64, dwarf_rax_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rbx, nullptr, dwarf_rbx_x86_64, dwarf_rbx_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rcx, "arg4", dwarf_rcx_x86_64, dwarf_rcx_x86_64,
+               LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rdx, "arg3", dwarf_rdx_x86_64, dwarf_rdx_x86_64,
+               LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rdi, "arg1", dwarf_rdi_x86_64, dwarf_rdi_x86_64,
+               LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rsi, "arg2", dwarf_rsi_x86_64, dwarf_rsi_x86_64,
+               LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rbp, "fp", dwarf_rbp_x86_64, dwarf_rbp_x86_64,
+               LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rsp, "sp", dwarf_rsp_x86_64, dwarf_rsp_x86_64,
+               LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r8, "arg5", dwarf_r8_x86_64, dwarf_r8_x86_64,
+               LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r9, "arg6", dwarf_r9_x86_64, dwarf_r9_x86_64,
+               LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r10, nullptr, dwarf_r10_x86_64, dwarf_r10_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r11, nullptr, dwarf_r11_x86_64, dwarf_r11_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r12, nullptr, dwarf_r12_x86_64, dwarf_r12_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r13, nullptr, dwarf_r13_x86_64, dwarf_r13_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r14, nullptr, dwarf_r14_x86_64, dwarf_r14_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r15, nullptr, dwarf_r15_x86_64, dwarf_r15_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rip, "pc", dwarf_rip_x86_64, dwarf_rip_x86_64,
+               LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rflags, "flags", dwarf_rflags_x86_64, dwarf_rflags_x86_64,
+               LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(cs, nullptr, dwarf_cs_x86_64, dwarf_cs_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(fs, nullptr, dwarf_fs_x86_64, dwarf_fs_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(gs, nullptr, dwarf_gs_x86_64, dwarf_gs_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(ss, nullptr, dwarf_ss_x86_64, dwarf_ss_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(ds, nullptr, dwarf_ds_x86_64, dwarf_ds_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(es, nullptr, dwarf_es_x86_64, dwarf_es_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+
+    DEFINE_GPR_PSEUDO_32(eax, rax), DEFINE_GPR_PSEUDO_32(ebx, rbx),
+    DEFINE_GPR_PSEUDO_32(ecx, rcx), DEFINE_GPR_PSEUDO_32(edx, rdx),
+    DEFINE_GPR_PSEUDO_32(edi, rdi), DEFINE_GPR_PSEUDO_32(esi, rsi),
+    DEFINE_GPR_PSEUDO_32(ebp, rbp), DEFINE_GPR_PSEUDO_32(esp, rsp),
+    DEFINE_GPR_PSEUDO_32(r8d, r8), DEFINE_GPR_PSEUDO_32(r9d, r9),
+    DEFINE_GPR_PSEUDO_32(r10d, r10), DEFINE_GPR_PSEUDO_32(r11d, r11),
+    DEFINE_GPR_PSEUDO_32(r12d, r12), DEFINE_GPR_PSEUDO_32(r13d, r13),
+    DEFINE_GPR_PSEUDO_32(r14d, r14), DEFINE_GPR_PSEUDO_32(r15d, r15),
+    DEFINE_GPR_PSEUDO_16(ax, rax), DEFINE_GPR_PSEUDO_16(bx, rbx),
+    DEFINE_GPR_PSEUDO_16(cx, rcx), DEFINE_GPR_PSEUDO_16(dx, rdx),
+    DEFINE_GPR_PSEUDO_16(di, rdi), DEFINE_GPR_PSEUDO_16(si, rsi),
+    DEFINE_GPR_PSEUDO_16(bp, rbp), DEFINE_GPR_PSEUDO_16(sp, rsp),
+    DEFINE_GPR_PSEUDO_16(r8w, r8), DEFINE_GPR_PSEUDO_16(r9w, r9),
+    DEFINE_GPR_PSEUDO_16(r10w, r10), DEFINE_GPR_PSEUDO_16(r11w, r11),
+    DEFINE_GPR_PSEUDO_16(r12w, r12), DEFINE_GPR_PSEUDO_16(r13w, r13),
+    DEFINE_GPR_PSEUDO_16(r14w, r14), DEFINE_GPR_PSEUDO_16(r15w, r15),
+    DEFINE_GPR_PSEUDO_8H(ah, rax), DEFINE_GPR_PSEUDO_8H(bh, rbx),
+    DEFINE_GPR_PSEUDO_8H(ch, rcx), DEFINE_GPR_PSEUDO_8H(dh, rdx),
+    DEFINE_GPR_PSEUDO_8L(al, rax), DEFINE_GPR_PSEUDO_8L(bl, rbx),
+    DEFINE_GPR_PSEUDO_8L(cl, rcx), DEFINE_GPR_PSEUDO_8L(dl, rdx),
+    DEFINE_GPR_PSEUDO_8L(dil, rdi), DEFINE_GPR_PSEUDO_8L(sil, rsi),
+    DEFINE_GPR_PSEUDO_8L(bpl, rbp), DEFINE_GPR_PSEUDO_8L(spl, rsp),
+    DEFINE_GPR_PSEUDO_8L(r8l, r8), DEFINE_GPR_PSEUDO_8L(r9l, r9),
+    DEFINE_GPR_PSEUDO_8L(r10l, r10), DEFINE_GPR_PSEUDO_8L(r11l, r11),
+    DEFINE_GPR_PSEUDO_8L(r12l, r12), DEFINE_GPR_PSEUDO_8L(r13l, r13),
+    DEFINE_GPR_PSEUDO_8L(r14l, r14), DEFINE_GPR_PSEUDO_8L(r15l, r15),
+
+    // i387 Floating point registers. EH_frame,
+    // DWARF,               Generic,          Process Plugin
+    DEFINE_FPR(fctrl, fctrl, dwarf_fctrl_x86_64, dwarf_fctrl_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fstat, fstat, dwarf_fstat_x86_64, dwarf_fstat_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(mxcsr, mxcsr, dwarf_mxcsr_x86_64, dwarf_mxcsr_x86_64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
 
     // FP registers.
-    DEFINE_FP_ST(st, 0),
-    DEFINE_FP_ST(st, 1),
-    DEFINE_FP_ST(st, 2),
-    DEFINE_FP_ST(st, 3),
-    DEFINE_FP_ST(st, 4),
-    DEFINE_FP_ST(st, 5),
-    DEFINE_FP_ST(st, 6),
-    DEFINE_FP_ST(st, 7),
-    DEFINE_FP_MM(mm, 0),
-    DEFINE_FP_MM(mm, 1),
-    DEFINE_FP_MM(mm, 2),
-    DEFINE_FP_MM(mm, 3),
-    DEFINE_FP_MM(mm, 4),
-    DEFINE_FP_MM(mm, 5),
-    DEFINE_FP_MM(mm, 6),
+    DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2),
+    DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5),
+    DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7), DEFINE_FP_MM(mm, 0),
+    DEFINE_FP_MM(mm, 1), DEFINE_FP_MM(mm, 2), DEFINE_FP_MM(mm, 3),
+    DEFINE_FP_MM(mm, 4), DEFINE_FP_MM(mm, 5), DEFINE_FP_MM(mm, 6),
     DEFINE_FP_MM(mm, 7),
 
     // XMM registers
-    DEFINE_XMM(xmm, 0),
-    DEFINE_XMM(xmm, 1),
-    DEFINE_XMM(xmm, 2),
-    DEFINE_XMM(xmm, 3),
-    DEFINE_XMM(xmm, 4),
-    DEFINE_XMM(xmm, 5),
-    DEFINE_XMM(xmm, 6),
-    DEFINE_XMM(xmm, 7),
-    DEFINE_XMM(xmm, 8),
-    DEFINE_XMM(xmm, 9),
-    DEFINE_XMM(xmm, 10),
-    DEFINE_XMM(xmm, 11),
-    DEFINE_XMM(xmm, 12),
-    DEFINE_XMM(xmm, 13),
-    DEFINE_XMM(xmm, 14),
+    DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2),
+    DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5),
+    DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7), DEFINE_XMM(xmm, 8),
+    DEFINE_XMM(xmm, 9), DEFINE_XMM(xmm, 10), DEFINE_XMM(xmm, 11),
+    DEFINE_XMM(xmm, 12), DEFINE_XMM(xmm, 13), DEFINE_XMM(xmm, 14),
     DEFINE_XMM(xmm, 15),
 
     // Copy of YMM registers assembled from xmm and ymmh
-    DEFINE_YMM(ymm, 0),
-    DEFINE_YMM(ymm, 1),
-    DEFINE_YMM(ymm, 2),
-    DEFINE_YMM(ymm, 3),
-    DEFINE_YMM(ymm, 4),
-    DEFINE_YMM(ymm, 5),
-    DEFINE_YMM(ymm, 6),
-    DEFINE_YMM(ymm, 7),
-    DEFINE_YMM(ymm, 8),
-    DEFINE_YMM(ymm, 9),
-    DEFINE_YMM(ymm, 10),
-    DEFINE_YMM(ymm, 11),
-    DEFINE_YMM(ymm, 12),
-    DEFINE_YMM(ymm, 13),
-    DEFINE_YMM(ymm, 14),
+    DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2),
+    DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5),
+    DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7), DEFINE_YMM(ymm, 8),
+    DEFINE_YMM(ymm, 9), DEFINE_YMM(ymm, 10), DEFINE_YMM(ymm, 11),
+    DEFINE_YMM(ymm, 12), DEFINE_YMM(ymm, 13), DEFINE_YMM(ymm, 14),
     DEFINE_YMM(ymm, 15),
 };
 
@@ -306,52 +338,40 @@ g_register_infos_x86_64[] =
 //---------------------------------------------------------------------------
 
 static const RegisterInfo *
-PrivateGetRegisterInfoPtr (const lldb_private::ArchSpec& target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::x86_64:
-            return g_register_infos_x86_64;
-        default:
-            assert(false && "Unhandled target architecture.");
-            return nullptr;
-    }
+PrivateGetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::x86_64:
+    return g_register_infos_x86_64;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return nullptr;
+  }
 }
 
 static uint32_t
-PrivateGetRegisterCount (const lldb_private::ArchSpec& target_arch)
-{
-    switch (target_arch.GetMachine())
-    {
-        case llvm::Triple::x86_64:
-            return static_cast<uint32_t> (sizeof (g_register_infos_x86_64) / sizeof (g_register_infos_x86_64 [0]));
-        default:
-            assert(false && "Unhandled target architecture.");
-            return 0;
-    }
+PrivateGetRegisterCount(const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::x86_64:
+    return static_cast<uint32_t>(sizeof(g_register_infos_x86_64) /
+                                 sizeof(g_register_infos_x86_64[0]));
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
 }
 
-RegisterContextNetBSD_x86_64::RegisterContextNetBSD_x86_64(const ArchSpec &target_arch) :
-    lldb_private::RegisterInfoInterface(target_arch),
-    m_register_info_p (PrivateGetRegisterInfoPtr (target_arch)),
-    m_register_count (PrivateGetRegisterCount (target_arch))
-{
-}
+RegisterContextNetBSD_x86_64::RegisterContextNetBSD_x86_64(
+    const ArchSpec &target_arch)
+    : lldb_private::RegisterInfoInterface(target_arch),
+      m_register_info_p(PrivateGetRegisterInfoPtr(target_arch)),
+      m_register_count(PrivateGetRegisterCount(target_arch)) {}
 
-size_t
-RegisterContextNetBSD_x86_64::GetGPRSize() const
-{
-    return sizeof(GPR);
-}
+size_t RegisterContextNetBSD_x86_64::GetGPRSize() const { return sizeof(GPR); }
 
-const RegisterInfo *
-RegisterContextNetBSD_x86_64::GetRegisterInfo() const
-{
-    return m_register_info_p;
+const RegisterInfo *RegisterContextNetBSD_x86_64::GetRegisterInfo() const {
+  return m_register_info_p;
 }
 
-uint32_t
-RegisterContextNetBSD_x86_64::GetRegisterCount () const
-{
-    return m_register_count;
+uint32_t RegisterContextNetBSD_x86_64::GetRegisterCount() const {
+  return m_register_count;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.h
index c267278..6b19981 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextNetBSD_x86_64.h
@@ -12,24 +12,20 @@
 
 #include "RegisterInfoInterface.h"
 
-class RegisterContextNetBSD_x86_64:
-    public lldb_private::RegisterInfoInterface
-{
+class RegisterContextNetBSD_x86_64
+    : public lldb_private::RegisterInfoInterface {
 public:
-    RegisterContextNetBSD_x86_64(const lldb_private::ArchSpec &target_arch);
+  RegisterContextNetBSD_x86_64(const lldb_private::ArchSpec &target_arch);
 
-    size_t
-    GetGPRSize() const override;
+  size_t GetGPRSize() const override;
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfo() const override;
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
-    uint32_t
-    GetRegisterCount () const override;
+  uint32_t GetRegisterCount() const override;
 
 private:
-    const lldb_private::RegisterInfo *m_register_info_p;
-    const uint32_t m_register_count;
+  const lldb_private::RegisterInfo *m_register_info_p;
+  const uint32_t m_register_count;
 };
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp
index 029a0e73..15d155e 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp
@@ -15,321 +15,204 @@
 #include "lldb/Core/DataExtractor.h"
 #include "lldb/Core/RegisterValue.h"
 #include "lldb/Core/Scalar.h"
+#include "lldb/Host/Endian.h"
 #include "lldb/Target/Target.h"
 #include "lldb/Target/Thread.h"
-#include "lldb/Host/Endian.h"
 #include "llvm/Support/Compiler.h"
 
-#include "RegisterContextPOSIX_arm.h"
 #include "Plugins/Process/elf-core/ProcessElfCore.h"
+#include "RegisterContextPOSIX_arm.h"
 
 using namespace lldb;
 using namespace lldb_private;
 
 // arm general purpose registers.
-const uint32_t g_gpr_regnums_arm[] =
-{
-    gpr_r0_arm,
-    gpr_r1_arm,
-    gpr_r2_arm,
-    gpr_r3_arm,
-    gpr_r4_arm,
-    gpr_r5_arm,
-    gpr_r6_arm,
-    gpr_r7_arm,
-    gpr_r8_arm,
-    gpr_r9_arm,
-    gpr_r10_arm,
-    gpr_r11_arm,
-    gpr_r12_arm,
-    gpr_sp_arm,
-    gpr_lr_arm,
-    gpr_pc_arm,
-    gpr_cpsr_arm,
+const uint32_t g_gpr_regnums_arm[] = {
+    gpr_r0_arm,         gpr_r1_arm,   gpr_r2_arm,  gpr_r3_arm, gpr_r4_arm,
+    gpr_r5_arm,         gpr_r6_arm,   gpr_r7_arm,  gpr_r8_arm, gpr_r9_arm,
+    gpr_r10_arm,        gpr_r11_arm,  gpr_r12_arm, gpr_sp_arm, gpr_lr_arm,
+    gpr_pc_arm,         gpr_cpsr_arm,
     LLDB_INVALID_REGNUM // register sets need to end with this flag
 
 };
-static_assert(((sizeof g_gpr_regnums_arm / sizeof g_gpr_regnums_arm[0]) - 1) == k_num_gpr_registers_arm, \
+static_assert(((sizeof g_gpr_regnums_arm / sizeof g_gpr_regnums_arm[0]) - 1) ==
+                  k_num_gpr_registers_arm,
               "g_gpr_regnums_arm has wrong number of register infos");
 
 // arm floating point registers.
-static const uint32_t g_fpu_regnums_arm[] =
-{
-    fpu_s0_arm,
-    fpu_s1_arm,
-    fpu_s2_arm,
-    fpu_s3_arm,
-    fpu_s4_arm,
-    fpu_s5_arm,
-    fpu_s6_arm,
-    fpu_s7_arm,
-    fpu_s8_arm,
-    fpu_s9_arm,
-    fpu_s10_arm,
-    fpu_s11_arm,
-    fpu_s12_arm,
-    fpu_s13_arm,
-    fpu_s14_arm,
-    fpu_s15_arm,
-    fpu_s16_arm,
-    fpu_s17_arm,
-    fpu_s18_arm,
-    fpu_s19_arm,
-    fpu_s20_arm,
-    fpu_s21_arm,
-    fpu_s22_arm,
-    fpu_s23_arm,
-    fpu_s24_arm,
-    fpu_s25_arm,
-    fpu_s26_arm,
-    fpu_s27_arm,
-    fpu_s28_arm,
-    fpu_s29_arm,
-    fpu_s30_arm,
-    fpu_s31_arm,
-    fpu_fpscr_arm,
-    fpu_d0_arm,
-    fpu_d1_arm,
-    fpu_d2_arm,
-    fpu_d3_arm,
-    fpu_d4_arm,
-    fpu_d5_arm,
-    fpu_d6_arm,
-    fpu_d7_arm,
-    fpu_d8_arm,
-    fpu_d9_arm,
-    fpu_d10_arm,
-    fpu_d11_arm,
-    fpu_d12_arm,
-    fpu_d13_arm,
-    fpu_d14_arm,
-    fpu_d15_arm,
-    fpu_d16_arm,
-    fpu_d17_arm,
-    fpu_d18_arm,
-    fpu_d19_arm,
-    fpu_d20_arm,
-    fpu_d21_arm,
-    fpu_d22_arm,
-    fpu_d23_arm,
-    fpu_d24_arm,
-    fpu_d25_arm,
-    fpu_d26_arm,
-    fpu_d27_arm,
-    fpu_d28_arm,
-    fpu_d29_arm,
-    fpu_d30_arm,
-    fpu_d31_arm,
-    fpu_q0_arm,
-    fpu_q1_arm,
-    fpu_q2_arm,
-    fpu_q3_arm,
-    fpu_q4_arm,
-    fpu_q5_arm,
-    fpu_q6_arm,
-    fpu_q7_arm,
-    fpu_q8_arm,
-    fpu_q9_arm,
-    fpu_q10_arm,
-    fpu_q11_arm,
-    fpu_q12_arm,
-    fpu_q13_arm,
-    fpu_q14_arm,
+static const uint32_t g_fpu_regnums_arm[] = {
+    fpu_s0_arm,         fpu_s1_arm,  fpu_s2_arm,    fpu_s3_arm,  fpu_s4_arm,
+    fpu_s5_arm,         fpu_s6_arm,  fpu_s7_arm,    fpu_s8_arm,  fpu_s9_arm,
+    fpu_s10_arm,        fpu_s11_arm, fpu_s12_arm,   fpu_s13_arm, fpu_s14_arm,
+    fpu_s15_arm,        fpu_s16_arm, fpu_s17_arm,   fpu_s18_arm, fpu_s19_arm,
+    fpu_s20_arm,        fpu_s21_arm, fpu_s22_arm,   fpu_s23_arm, fpu_s24_arm,
+    fpu_s25_arm,        fpu_s26_arm, fpu_s27_arm,   fpu_s28_arm, fpu_s29_arm,
+    fpu_s30_arm,        fpu_s31_arm, fpu_fpscr_arm, fpu_d0_arm,  fpu_d1_arm,
+    fpu_d2_arm,         fpu_d3_arm,  fpu_d4_arm,    fpu_d5_arm,  fpu_d6_arm,
+    fpu_d7_arm,         fpu_d8_arm,  fpu_d9_arm,    fpu_d10_arm, fpu_d11_arm,
+    fpu_d12_arm,        fpu_d13_arm, fpu_d14_arm,   fpu_d15_arm, fpu_d16_arm,
+    fpu_d17_arm,        fpu_d18_arm, fpu_d19_arm,   fpu_d20_arm, fpu_d21_arm,
+    fpu_d22_arm,        fpu_d23_arm, fpu_d24_arm,   fpu_d25_arm, fpu_d26_arm,
+    fpu_d27_arm,        fpu_d28_arm, fpu_d29_arm,   fpu_d30_arm, fpu_d31_arm,
+    fpu_q0_arm,         fpu_q1_arm,  fpu_q2_arm,    fpu_q3_arm,  fpu_q4_arm,
+    fpu_q5_arm,         fpu_q6_arm,  fpu_q7_arm,    fpu_q8_arm,  fpu_q9_arm,
+    fpu_q10_arm,        fpu_q11_arm, fpu_q12_arm,   fpu_q13_arm, fpu_q14_arm,
     fpu_q15_arm,
     LLDB_INVALID_REGNUM // register sets need to end with this flag
 
 };
-static_assert(((sizeof g_fpu_regnums_arm / sizeof g_fpu_regnums_arm[0]) - 1) == k_num_fpr_registers_arm, \
+static_assert(((sizeof g_fpu_regnums_arm / sizeof g_fpu_regnums_arm[0]) - 1) ==
+                  k_num_fpr_registers_arm,
               "g_fpu_regnums_arm has wrong number of register infos");
 
 // Number of register sets provided by this context.
-enum
-{
-    k_num_register_sets = 2
-};
+enum { k_num_register_sets = 2 };
 
 // Register sets for arm.
-static const lldb_private::RegisterSet
-g_reg_sets_arm[k_num_register_sets] =
-{
-    { "General Purpose Registers",  "gpr", k_num_gpr_registers_arm, g_gpr_regnums_arm },
-    { "Floating Point Registers",   "fpu", k_num_fpr_registers_arm, g_fpu_regnums_arm }
-};
+static const lldb_private::RegisterSet g_reg_sets_arm[k_num_register_sets] = {
+    {"General Purpose Registers", "gpr", k_num_gpr_registers_arm,
+     g_gpr_regnums_arm},
+    {"Floating Point Registers", "fpu", k_num_fpr_registers_arm,
+     g_fpu_regnums_arm}};
 
-bool RegisterContextPOSIX_arm::IsGPR(unsigned reg)
-{
-    return reg <= m_reg_info.last_gpr;   // GPR's come first.
+bool RegisterContextPOSIX_arm::IsGPR(unsigned reg) {
+  return reg <= m_reg_info.last_gpr; // GPR's come first.
 }
 
-bool RegisterContextPOSIX_arm::IsFPR(unsigned reg)
-{
-    return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
+bool RegisterContextPOSIX_arm::IsFPR(unsigned reg) {
+  return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
 }
 
-RegisterContextPOSIX_arm::RegisterContextPOSIX_arm(lldb_private::Thread &thread,
-                                                       uint32_t concrete_frame_idx,
-                                                       lldb_private::RegisterInfoInterface *register_info)
-    : lldb_private::RegisterContext(thread, concrete_frame_idx)
-{
-    m_register_info_ap.reset(register_info);
-
-    switch (register_info->m_target_arch.GetMachine())
-    {
-        case llvm::Triple::arm:
-            m_reg_info.num_registers     = k_num_registers_arm;
-            m_reg_info.num_gpr_registers = k_num_gpr_registers_arm;
-            m_reg_info.num_fpr_registers = k_num_fpr_registers_arm;
-            m_reg_info.last_gpr          = k_last_gpr_arm;
-            m_reg_info.first_fpr         = k_first_fpr_arm;
-            m_reg_info.last_fpr          = k_last_fpr_arm;
-            m_reg_info.first_fpr_v       = fpu_s0_arm;
-            m_reg_info.last_fpr_v        = fpu_s31_arm;
-            m_reg_info.gpr_flags         = gpr_cpsr_arm;
-            break;
-        default:
-            assert(false && "Unhandled target architecture.");
-            break;
-    }
+RegisterContextPOSIX_arm::RegisterContextPOSIX_arm(
+    lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+    lldb_private::RegisterInfoInterface *register_info)
+    : lldb_private::RegisterContext(thread, concrete_frame_idx) {
+  m_register_info_ap.reset(register_info);
 
-    ::memset(&m_fpr, 0, sizeof m_fpr);
+  switch (register_info->m_target_arch.GetMachine()) {
+  case llvm::Triple::arm:
+    m_reg_info.num_registers = k_num_registers_arm;
+    m_reg_info.num_gpr_registers = k_num_gpr_registers_arm;
+    m_reg_info.num_fpr_registers = k_num_fpr_registers_arm;
+    m_reg_info.last_gpr = k_last_gpr_arm;
+    m_reg_info.first_fpr = k_first_fpr_arm;
+    m_reg_info.last_fpr = k_last_fpr_arm;
+    m_reg_info.first_fpr_v = fpu_s0_arm;
+    m_reg_info.last_fpr_v = fpu_s31_arm;
+    m_reg_info.gpr_flags = gpr_cpsr_arm;
+    break;
+  default:
+    assert(false && "Unhandled target architecture.");
+    break;
+  }
 
-    // elf-core yet to support ReadFPR()
-    lldb::ProcessSP base = CalculateProcess();
-    if (base.get()->GetPluginName() ==  ProcessElfCore::GetPluginNameStatic())
-        return;
-}
+  ::memset(&m_fpr, 0, sizeof m_fpr);
 
-RegisterContextPOSIX_arm::~RegisterContextPOSIX_arm()
-{
+  // elf-core yet to support ReadFPR()
+  lldb::ProcessSP base = CalculateProcess();
+  if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
+    return;
 }
 
-void
-RegisterContextPOSIX_arm::Invalidate()
-{
-}
+RegisterContextPOSIX_arm::~RegisterContextPOSIX_arm() {}
 
-void
-RegisterContextPOSIX_arm::InvalidateAllRegisters()
-{
-}
+void RegisterContextPOSIX_arm::Invalidate() {}
+
+void RegisterContextPOSIX_arm::InvalidateAllRegisters() {}
 
-unsigned
-RegisterContextPOSIX_arm::GetRegisterOffset(unsigned reg)
-{
-    assert(reg < m_reg_info.num_registers && "Invalid register number.");
-    return GetRegisterInfo()[reg].byte_offset;
+unsigned RegisterContextPOSIX_arm::GetRegisterOffset(unsigned reg) {
+  assert(reg < m_reg_info.num_registers && "Invalid register number.");
+  return GetRegisterInfo()[reg].byte_offset;
 }
 
-unsigned
-RegisterContextPOSIX_arm::GetRegisterSize(unsigned reg)
-{
-    assert(reg < m_reg_info.num_registers && "Invalid register number.");
-    return GetRegisterInfo()[reg].byte_size;
+unsigned RegisterContextPOSIX_arm::GetRegisterSize(unsigned reg) {
+  assert(reg < m_reg_info.num_registers && "Invalid register number.");
+  return GetRegisterInfo()[reg].byte_size;
 }
 
-size_t
-RegisterContextPOSIX_arm::GetRegisterCount()
-{
-    size_t num_registers = m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
-    return num_registers;
+size_t RegisterContextPOSIX_arm::GetRegisterCount() {
+  size_t num_registers =
+      m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
+  return num_registers;
 }
 
-size_t
-RegisterContextPOSIX_arm::GetGPRSize()
-{
-    return m_register_info_ap->GetGPRSize ();
+size_t RegisterContextPOSIX_arm::GetGPRSize() {
+  return m_register_info_ap->GetGPRSize();
 }
 
-const lldb_private::RegisterInfo *
-RegisterContextPOSIX_arm::GetRegisterInfo()
-{
-    // Commonly, this method is overridden and g_register_infos is copied and specialized.
-    // So, use GetRegisterInfo() rather than g_register_infos in this scope.
-    return m_register_info_ap->GetRegisterInfo ();
+const lldb_private::RegisterInfo *RegisterContextPOSIX_arm::GetRegisterInfo() {
+  // Commonly, this method is overridden and g_register_infos is copied and
+  // specialized.
+  // So, use GetRegisterInfo() rather than g_register_infos in this scope.
+  return m_register_info_ap->GetRegisterInfo();
 }
 
 const lldb_private::RegisterInfo *
-RegisterContextPOSIX_arm::GetRegisterInfoAtIndex(size_t reg)
-{
-    if (reg < m_reg_info.num_registers)
-        return &GetRegisterInfo()[reg];
-    else
-        return NULL;
+RegisterContextPOSIX_arm::GetRegisterInfoAtIndex(size_t reg) {
+  if (reg < m_reg_info.num_registers)
+    return &GetRegisterInfo()[reg];
+  else
+    return NULL;
 }
 
-size_t
-RegisterContextPOSIX_arm::GetRegisterSetCount()
-{
-    size_t sets = 0;
-    for (size_t set = 0; set < k_num_register_sets; ++set)
-    {
-        if (IsRegisterSetAvailable(set))
-            ++sets;
-    }
+size_t RegisterContextPOSIX_arm::GetRegisterSetCount() {
+  size_t sets = 0;
+  for (size_t set = 0; set < k_num_register_sets; ++set) {
+    if (IsRegisterSetAvailable(set))
+      ++sets;
+  }
 
-    return sets;
+  return sets;
 }
 
 const lldb_private::RegisterSet *
-RegisterContextPOSIX_arm::GetRegisterSet(size_t set)
-{
-    if (IsRegisterSetAvailable(set))
-    {
-        switch (m_register_info_ap->m_target_arch.GetMachine())
-        {
-            case llvm::Triple::arm:
-                return &g_reg_sets_arm[set];
-            default:
-                assert(false && "Unhandled target architecture.");
-                return NULL;
-        }
+RegisterContextPOSIX_arm::GetRegisterSet(size_t set) {
+  if (IsRegisterSetAvailable(set)) {
+    switch (m_register_info_ap->m_target_arch.GetMachine()) {
+    case llvm::Triple::arm:
+      return &g_reg_sets_arm[set];
+    default:
+      assert(false && "Unhandled target architecture.");
+      return NULL;
     }
-    return NULL;
+  }
+  return NULL;
 }
 
-const char *
-RegisterContextPOSIX_arm::GetRegisterName(unsigned reg)
-{
-    assert(reg < m_reg_info.num_registers && "Invalid register offset.");
-    return GetRegisterInfo()[reg].name;
+const char *RegisterContextPOSIX_arm::GetRegisterName(unsigned reg) {
+  assert(reg < m_reg_info.num_registers && "Invalid register offset.");
+  return GetRegisterInfo()[reg].name;
 }
 
-lldb::ByteOrder
-RegisterContextPOSIX_arm::GetByteOrder()
-{
-    // Get the target process whose privileged thread was used for the register read.
-    lldb::ByteOrder byte_order = lldb::eByteOrderInvalid;
-    lldb_private::Process *process = CalculateProcess().get();
+lldb::ByteOrder RegisterContextPOSIX_arm::GetByteOrder() {
+  // Get the target process whose privileged thread was used for the register
+  // read.
+  lldb::ByteOrder byte_order = lldb::eByteOrderInvalid;
+  lldb_private::Process *process = CalculateProcess().get();
 
-    if (process)
-        byte_order = process->GetByteOrder();
-    return byte_order;
+  if (process)
+    byte_order = process->GetByteOrder();
+  return byte_order;
 }
 
-bool
-RegisterContextPOSIX_arm::IsRegisterSetAvailable(size_t set_index)
-{
-    return set_index < k_num_register_sets;
+bool RegisterContextPOSIX_arm::IsRegisterSetAvailable(size_t set_index) {
+  return set_index < k_num_register_sets;
 }
 
-
 // Used when parsing DWARF and EH frame information and any other
-// object file sections that contain register numbers in them. 
-uint32_t
-RegisterContextPOSIX_arm::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
-                                                                uint32_t num)
-{
-    const uint32_t num_regs = GetRegisterCount();
-
-    assert (kind < lldb::kNumRegisterKinds);
-    for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
-    {
-        const lldb_private::RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx);
-
-        if (reg_info->kinds[kind] == num)
-            return reg_idx;
-    }
+// object file sections that contain register numbers in them.
+uint32_t RegisterContextPOSIX_arm::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t num) {
+  const uint32_t num_regs = GetRegisterCount();
 
-    return LLDB_INVALID_REGNUM;
-}
+  assert(kind < lldb::kNumRegisterKinds);
+  for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
+    const lldb_private::RegisterInfo *reg_info =
+        GetRegisterInfoAtIndex(reg_idx);
 
+    if (reg_info->kinds[kind] == num)
+      return reg_idx;
+  }
+
+  return LLDB_INVALID_REGNUM;
+}
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h
index fbbcb94..817649e 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h
@@ -14,112 +14,98 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
-#include "lldb/Core/Log.h"
-#include "lldb/Target/RegisterContext.h"
 #include "RegisterInfoInterface.h"
 #include "lldb-arm-register-enums.h"
+#include "lldb/Core/Log.h"
+#include "lldb/Target/RegisterContext.h"
 
 class ProcessMonitor;
 
-class RegisterContextPOSIX_arm
-  : public lldb_private::RegisterContext
-{
+class RegisterContextPOSIX_arm : public lldb_private::RegisterContext {
 public:
-    RegisterContextPOSIX_arm (lldb_private::Thread &thread,
-                            uint32_t concrete_frame_idx,
-                            lldb_private::RegisterInfoInterface *register_info);
+  RegisterContextPOSIX_arm(lldb_private::Thread &thread,
+                           uint32_t concrete_frame_idx,
+                           lldb_private::RegisterInfoInterface *register_info);
 
-    ~RegisterContextPOSIX_arm() override;
+  ~RegisterContextPOSIX_arm() override;
 
-    void
-    Invalidate();
+  void Invalidate();
 
-    void
-    InvalidateAllRegisters() override;
+  void InvalidateAllRegisters() override;
 
-    size_t
-    GetRegisterCount() override;
+  size_t GetRegisterCount() override;
 
-    virtual size_t
-    GetGPRSize();
+  virtual size_t GetGPRSize();
 
-    virtual unsigned
-    GetRegisterSize(unsigned reg);
+  virtual unsigned GetRegisterSize(unsigned reg);
 
-    virtual unsigned
-    GetRegisterOffset(unsigned reg);
+  virtual unsigned GetRegisterOffset(unsigned reg);
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
 
-    size_t
-    GetRegisterSetCount() override;
+  size_t GetRegisterSetCount() override;
 
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t set) override;
+  const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
 
-    const char *
-    GetRegisterName(unsigned reg);
+  const char *GetRegisterName(unsigned reg);
 
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
 
 protected:
-    struct RegInfo
-    {
-        uint32_t num_registers;
-        uint32_t num_gpr_registers;
-        uint32_t num_fpr_registers;
-
-        uint32_t last_gpr;
-        uint32_t first_fpr;
-        uint32_t last_fpr;
-
-        uint32_t first_fpr_v;
-        uint32_t last_fpr_v;
-
-        uint32_t gpr_flags;
-    };
-
-    struct QReg
-    {
-        uint8_t bytes[16];
-    };
-
-    struct FPU
-    {
-        union {
-            uint32_t s[32];
-            uint64_t d[32];
-            QReg     q[16];  // the 128-bit NEON registers
-            } floats;
-        uint32_t fpscr;
-    };
-
-    uint32_t m_gpr_arm[lldb_private::k_num_gpr_registers_arm];           // 32-bit general purpose registers.
-    RegInfo  m_reg_info;
-    struct RegisterContextPOSIX_arm::FPU m_fpr;                            // floating-point registers including extended register sets.
-    std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
-
-    // Determines if an extended register set is supported on the processor running the inferior process.
-    virtual bool
-    IsRegisterSetAvailable(size_t set_index);
-
-    virtual const lldb_private::RegisterInfo *
-    GetRegisterInfo();
-
-    bool
-    IsGPR(unsigned reg);
-
-    bool
-    IsFPR(unsigned reg);
-
-    lldb::ByteOrder GetByteOrder();
-
-    virtual bool ReadGPR() = 0;
-    virtual bool ReadFPR() = 0;
-    virtual bool WriteGPR() = 0;
-    virtual bool WriteFPR() = 0;
+  struct RegInfo {
+    uint32_t num_registers;
+    uint32_t num_gpr_registers;
+    uint32_t num_fpr_registers;
+
+    uint32_t last_gpr;
+    uint32_t first_fpr;
+    uint32_t last_fpr;
+
+    uint32_t first_fpr_v;
+    uint32_t last_fpr_v;
+
+    uint32_t gpr_flags;
+  };
+
+  struct QReg {
+    uint8_t bytes[16];
+  };
+
+  struct FPU {
+    union {
+      uint32_t s[32];
+      uint64_t d[32];
+      QReg q[16]; // the 128-bit NEON registers
+    } floats;
+    uint32_t fpscr;
+  };
+
+  uint32_t m_gpr_arm[lldb_private::k_num_gpr_registers_arm]; // 32-bit general
+                                                             // purpose
+                                                             // registers.
+  RegInfo m_reg_info;
+  struct RegisterContextPOSIX_arm::FPU
+      m_fpr; // floating-point registers including extended register sets.
+  std::unique_ptr<lldb_private::RegisterInfoInterface>
+      m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
+
+  // Determines if an extended register set is supported on the processor
+  // running the inferior process.
+  virtual bool IsRegisterSetAvailable(size_t set_index);
+
+  virtual const lldb_private::RegisterInfo *GetRegisterInfo();
+
+  bool IsGPR(unsigned reg);
+
+  bool IsFPR(unsigned reg);
+
+  lldb::ByteOrder GetByteOrder();
+
+  virtual bool ReadGPR() = 0;
+  virtual bool ReadFPR() = 0;
+  virtual bool WriteGPR() = 0;
+  virtual bool WriteFPR() = 0;
 };
 
 #endif // liblldb_RegisterContextPOSIX_arm_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
index 96508ea..17c9dc3 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
@@ -15,288 +15,224 @@
 #include "lldb/Core/DataExtractor.h"
 #include "lldb/Core/RegisterValue.h"
 #include "lldb/Core/Scalar.h"
+#include "lldb/Host/Endian.h"
 #include "lldb/Target/Target.h"
 #include "lldb/Target/Thread.h"
-#include "lldb/Host/Endian.h"
 #include "llvm/Support/Compiler.h"
 
-#include "RegisterContextPOSIX_arm64.h"
 #include "Plugins/Process/elf-core/ProcessElfCore.h"
+#include "RegisterContextPOSIX_arm64.h"
 
 using namespace lldb;
 using namespace lldb_private;
 
 // ARM64 general purpose registers.
-const uint32_t g_gpr_regnums_arm64[] =
-{
-    gpr_x0_arm64,
-    gpr_x1_arm64,
-    gpr_x2_arm64,
-    gpr_x3_arm64,
-    gpr_x4_arm64,
-    gpr_x5_arm64,
-    gpr_x6_arm64,
-    gpr_x7_arm64,
-    gpr_x8_arm64,
-    gpr_x9_arm64,
-    gpr_x10_arm64,
-    gpr_x11_arm64,
-    gpr_x12_arm64,
-    gpr_x13_arm64,
-    gpr_x14_arm64,
-    gpr_x15_arm64,
-    gpr_x16_arm64,
-    gpr_x17_arm64,
-    gpr_x18_arm64,
-    gpr_x19_arm64,
-    gpr_x20_arm64,
-    gpr_x21_arm64,
-    gpr_x22_arm64,
-    gpr_x23_arm64,
-    gpr_x24_arm64,
-    gpr_x25_arm64,
-    gpr_x26_arm64,
-    gpr_x27_arm64,
-    gpr_x28_arm64,
-    gpr_fp_arm64,
-    gpr_lr_arm64,
-    gpr_sp_arm64,
-    gpr_pc_arm64,
-    gpr_cpsr_arm64,
+const uint32_t g_gpr_regnums_arm64[] = {
+    gpr_x0_arm64,       gpr_x1_arm64,   gpr_x2_arm64,  gpr_x3_arm64,
+    gpr_x4_arm64,       gpr_x5_arm64,   gpr_x6_arm64,  gpr_x7_arm64,
+    gpr_x8_arm64,       gpr_x9_arm64,   gpr_x10_arm64, gpr_x11_arm64,
+    gpr_x12_arm64,      gpr_x13_arm64,  gpr_x14_arm64, gpr_x15_arm64,
+    gpr_x16_arm64,      gpr_x17_arm64,  gpr_x18_arm64, gpr_x19_arm64,
+    gpr_x20_arm64,      gpr_x21_arm64,  gpr_x22_arm64, gpr_x23_arm64,
+    gpr_x24_arm64,      gpr_x25_arm64,  gpr_x26_arm64, gpr_x27_arm64,
+    gpr_x28_arm64,      gpr_fp_arm64,   gpr_lr_arm64,  gpr_sp_arm64,
+    gpr_pc_arm64,       gpr_cpsr_arm64, gpr_w0_arm64,  gpr_w1_arm64,
+    gpr_w2_arm64,       gpr_w3_arm64,   gpr_w4_arm64,  gpr_w5_arm64,
+    gpr_w6_arm64,       gpr_w7_arm64,   gpr_w8_arm64,  gpr_w9_arm64,
+    gpr_w10_arm64,      gpr_w11_arm64,  gpr_w12_arm64, gpr_w13_arm64,
+    gpr_w14_arm64,      gpr_w15_arm64,  gpr_w16_arm64, gpr_w17_arm64,
+    gpr_w18_arm64,      gpr_w19_arm64,  gpr_w20_arm64, gpr_w21_arm64,
+    gpr_w22_arm64,      gpr_w23_arm64,  gpr_w24_arm64, gpr_w25_arm64,
+    gpr_w26_arm64,      gpr_w27_arm64,  gpr_w28_arm64,
     LLDB_INVALID_REGNUM // register sets need to end with this flag
 };
-static_assert(((sizeof g_gpr_regnums_arm64 / sizeof g_gpr_regnums_arm64[0]) - 1) == k_num_gpr_registers_arm64, \
+static_assert(((sizeof g_gpr_regnums_arm64 / sizeof g_gpr_regnums_arm64[0]) -
+               1) == k_num_gpr_registers_arm64,
               "g_gpr_regnums_arm64 has wrong number of register infos");
 
 // ARM64 floating point registers.
-static const uint32_t g_fpu_regnums_arm64[] =
-{
-    fpu_v0_arm64,
-    fpu_v1_arm64,
-    fpu_v2_arm64,
-    fpu_v3_arm64,
-    fpu_v4_arm64,
-    fpu_v5_arm64,
-    fpu_v6_arm64,
-    fpu_v7_arm64,
-    fpu_v8_arm64,
-    fpu_v9_arm64,
-    fpu_v10_arm64,
-    fpu_v11_arm64,
-    fpu_v12_arm64,
-    fpu_v13_arm64,
-    fpu_v14_arm64,
-    fpu_v15_arm64,
-    fpu_v16_arm64,
-    fpu_v17_arm64,
-    fpu_v18_arm64,
-    fpu_v19_arm64,
-    fpu_v20_arm64,
-    fpu_v21_arm64,
-    fpu_v22_arm64,
-    fpu_v23_arm64,
-    fpu_v24_arm64,
-    fpu_v25_arm64,
-    fpu_v26_arm64,
-    fpu_v27_arm64,
-    fpu_v28_arm64,
-    fpu_v29_arm64,
-    fpu_v30_arm64,
-    fpu_v31_arm64,
-    fpu_fpsr_arm64,
-    fpu_fpcr_arm64,
+static const uint32_t g_fpu_regnums_arm64[] = {
+    fpu_v0_arm64,       fpu_v1_arm64,   fpu_v2_arm64,  fpu_v3_arm64,
+    fpu_v4_arm64,       fpu_v5_arm64,   fpu_v6_arm64,  fpu_v7_arm64,
+    fpu_v8_arm64,       fpu_v9_arm64,   fpu_v10_arm64, fpu_v11_arm64,
+    fpu_v12_arm64,      fpu_v13_arm64,  fpu_v14_arm64, fpu_v15_arm64,
+    fpu_v16_arm64,      fpu_v17_arm64,  fpu_v18_arm64, fpu_v19_arm64,
+    fpu_v20_arm64,      fpu_v21_arm64,  fpu_v22_arm64, fpu_v23_arm64,
+    fpu_v24_arm64,      fpu_v25_arm64,  fpu_v26_arm64, fpu_v27_arm64,
+    fpu_v28_arm64,      fpu_v29_arm64,  fpu_v30_arm64, fpu_v31_arm64,
+    fpu_s0_arm64,       fpu_s1_arm64,   fpu_s2_arm64,  fpu_s3_arm64,
+    fpu_s4_arm64,       fpu_s5_arm64,   fpu_s6_arm64,  fpu_s7_arm64,
+    fpu_s8_arm64,       fpu_s9_arm64,   fpu_s10_arm64, fpu_s11_arm64,
+    fpu_s12_arm64,      fpu_s13_arm64,  fpu_s14_arm64, fpu_s15_arm64,
+    fpu_s16_arm64,      fpu_s17_arm64,  fpu_s18_arm64, fpu_s19_arm64,
+    fpu_s20_arm64,      fpu_s21_arm64,  fpu_s22_arm64, fpu_s23_arm64,
+    fpu_s24_arm64,      fpu_s25_arm64,  fpu_s26_arm64, fpu_s27_arm64,
+    fpu_s28_arm64,      fpu_s29_arm64,  fpu_s30_arm64, fpu_s31_arm64,
+
+    fpu_d0_arm64,       fpu_d1_arm64,   fpu_d2_arm64,  fpu_d3_arm64,
+    fpu_d4_arm64,       fpu_d5_arm64,   fpu_d6_arm64,  fpu_d7_arm64,
+    fpu_d8_arm64,       fpu_d9_arm64,   fpu_d10_arm64, fpu_d11_arm64,
+    fpu_d12_arm64,      fpu_d13_arm64,  fpu_d14_arm64, fpu_d15_arm64,
+    fpu_d16_arm64,      fpu_d17_arm64,  fpu_d18_arm64, fpu_d19_arm64,
+    fpu_d20_arm64,      fpu_d21_arm64,  fpu_d22_arm64, fpu_d23_arm64,
+    fpu_d24_arm64,      fpu_d25_arm64,  fpu_d26_arm64, fpu_d27_arm64,
+    fpu_d28_arm64,      fpu_d29_arm64,  fpu_d30_arm64, fpu_d31_arm64,
+    fpu_fpsr_arm64,     fpu_fpcr_arm64,
     LLDB_INVALID_REGNUM // register sets need to end with this flag
 };
-static_assert(((sizeof g_fpu_regnums_arm64 / sizeof g_fpu_regnums_arm64[0]) - 1) == k_num_fpr_registers_arm64, \
+static_assert(((sizeof g_fpu_regnums_arm64 / sizeof g_fpu_regnums_arm64[0]) -
+               1) == k_num_fpr_registers_arm64,
               "g_fpu_regnums_arm64 has wrong number of register infos");
 
 // Number of register sets provided by this context.
-enum
-{
-    k_num_register_sets = 2
-};
+enum { k_num_register_sets = 2 };
 
 // Register sets for ARM64.
-static const lldb_private::RegisterSet
-g_reg_sets_arm64[k_num_register_sets] =
-{
-    { "General Purpose Registers",  "gpr", k_num_gpr_registers_arm64, g_gpr_regnums_arm64 },
-    { "Floating Point Registers",   "fpu", k_num_fpr_registers_arm64, g_fpu_regnums_arm64 }
-};
+static const lldb_private::RegisterSet g_reg_sets_arm64[k_num_register_sets] = {
+    {"General Purpose Registers", "gpr", k_num_gpr_registers_arm64,
+     g_gpr_regnums_arm64},
+    {"Floating Point Registers", "fpu", k_num_fpr_registers_arm64,
+     g_fpu_regnums_arm64}};
 
-bool RegisterContextPOSIX_arm64::IsGPR(unsigned reg)
-{
-    return reg <= m_reg_info.last_gpr;   // GPR's come first.
+bool RegisterContextPOSIX_arm64::IsGPR(unsigned reg) {
+  return reg <= m_reg_info.last_gpr; // GPR's come first.
 }
 
-bool RegisterContextPOSIX_arm64::IsFPR(unsigned reg)
-{
-    return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
+bool RegisterContextPOSIX_arm64::IsFPR(unsigned reg) {
+  return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
 }
 
-RegisterContextPOSIX_arm64::RegisterContextPOSIX_arm64(lldb_private::Thread &thread,
-                                                       uint32_t concrete_frame_idx,
-                                                       lldb_private::RegisterInfoInterface *register_info)
-    : lldb_private::RegisterContext(thread, concrete_frame_idx)
-{
-    m_register_info_ap.reset(register_info);
-
-    switch (register_info->m_target_arch.GetMachine())
-    {
-        case llvm::Triple::aarch64:
-            m_reg_info.num_registers     = k_num_registers_arm64;
-            m_reg_info.num_gpr_registers = k_num_gpr_registers_arm64;
-            m_reg_info.num_fpr_registers = k_num_fpr_registers_arm64;
-            m_reg_info.last_gpr          = k_last_gpr_arm64;
-            m_reg_info.first_fpr         = k_first_fpr_arm64;
-            m_reg_info.last_fpr          = k_last_fpr_arm64;
-            m_reg_info.first_fpr_v       = fpu_v0_arm64;
-            m_reg_info.last_fpr_v        = fpu_v31_arm64;
-            m_reg_info.gpr_flags         = gpr_cpsr_arm64;
-            break;
-        default:
-            assert(false && "Unhandled target architecture.");
-            break;
-    }
+RegisterContextPOSIX_arm64::RegisterContextPOSIX_arm64(
+    lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+    lldb_private::RegisterInfoInterface *register_info)
+    : lldb_private::RegisterContext(thread, concrete_frame_idx) {
+  m_register_info_ap.reset(register_info);
 
-    ::memset(&m_fpr, 0, sizeof m_fpr);
+  switch (register_info->m_target_arch.GetMachine()) {
+  case llvm::Triple::aarch64:
+    m_reg_info.num_registers = k_num_registers_arm64;
+    m_reg_info.num_gpr_registers = k_num_gpr_registers_arm64;
+    m_reg_info.num_fpr_registers = k_num_fpr_registers_arm64;
+    m_reg_info.last_gpr = k_last_gpr_arm64;
+    m_reg_info.first_fpr = k_first_fpr_arm64;
+    m_reg_info.last_fpr = k_last_fpr_arm64;
+    m_reg_info.first_fpr_v = fpu_v0_arm64;
+    m_reg_info.last_fpr_v = fpu_v31_arm64;
+    m_reg_info.gpr_flags = gpr_cpsr_arm64;
+    break;
+  default:
+    assert(false && "Unhandled target architecture.");
+    break;
+  }
 
-    // elf-core yet to support ReadFPR()
-    lldb::ProcessSP base = CalculateProcess();
-    if (base.get()->GetPluginName() ==  ProcessElfCore::GetPluginNameStatic())
-        return;
-}
+  ::memset(&m_fpr, 0, sizeof m_fpr);
 
-RegisterContextPOSIX_arm64::~RegisterContextPOSIX_arm64()
-{
+  // elf-core yet to support ReadFPR()
+  lldb::ProcessSP base = CalculateProcess();
+  if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
+    return;
 }
 
-void
-RegisterContextPOSIX_arm64::Invalidate()
-{
-}
+RegisterContextPOSIX_arm64::~RegisterContextPOSIX_arm64() {}
 
-void
-RegisterContextPOSIX_arm64::InvalidateAllRegisters()
-{
-}
+void RegisterContextPOSIX_arm64::Invalidate() {}
 
-unsigned
-RegisterContextPOSIX_arm64::GetRegisterOffset(unsigned reg)
-{
-    assert(reg < m_reg_info.num_registers && "Invalid register number.");
-    return GetRegisterInfo()[reg].byte_offset;
+void RegisterContextPOSIX_arm64::InvalidateAllRegisters() {}
+
+unsigned RegisterContextPOSIX_arm64::GetRegisterOffset(unsigned reg) {
+  assert(reg < m_reg_info.num_registers && "Invalid register number.");
+  return GetRegisterInfo()[reg].byte_offset;
 }
 
-unsigned
-RegisterContextPOSIX_arm64::GetRegisterSize(unsigned reg)
-{
-    assert(reg < m_reg_info.num_registers && "Invalid register number.");
-    return GetRegisterInfo()[reg].byte_size;
+unsigned RegisterContextPOSIX_arm64::GetRegisterSize(unsigned reg) {
+  assert(reg < m_reg_info.num_registers && "Invalid register number.");
+  return GetRegisterInfo()[reg].byte_size;
 }
 
-size_t
-RegisterContextPOSIX_arm64::GetRegisterCount()
-{
-    size_t num_registers = m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
-    return num_registers;
+size_t RegisterContextPOSIX_arm64::GetRegisterCount() {
+  size_t num_registers =
+      m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
+  return num_registers;
 }
 
-size_t
-RegisterContextPOSIX_arm64::GetGPRSize()
-{
-    return m_register_info_ap->GetGPRSize ();
+size_t RegisterContextPOSIX_arm64::GetGPRSize() {
+  return m_register_info_ap->GetGPRSize();
 }
 
 const lldb_private::RegisterInfo *
-RegisterContextPOSIX_arm64::GetRegisterInfo()
-{
-    // Commonly, this method is overridden and g_register_infos is copied and specialized.
-    // So, use GetRegisterInfo() rather than g_register_infos in this scope.
-    return m_register_info_ap->GetRegisterInfo ();
+RegisterContextPOSIX_arm64::GetRegisterInfo() {
+  // Commonly, this method is overridden and g_register_infos is copied and
+  // specialized.
+  // So, use GetRegisterInfo() rather than g_register_infos in this scope.
+  return m_register_info_ap->GetRegisterInfo();
 }
 
 const lldb_private::RegisterInfo *
-RegisterContextPOSIX_arm64::GetRegisterInfoAtIndex(size_t reg)
-{
-    if (reg < m_reg_info.num_registers)
-        return &GetRegisterInfo()[reg];
-    else
-        return NULL;
+RegisterContextPOSIX_arm64::GetRegisterInfoAtIndex(size_t reg) {
+  if (reg < m_reg_info.num_registers)
+    return &GetRegisterInfo()[reg];
+  else
+    return NULL;
 }
 
-size_t
-RegisterContextPOSIX_arm64::GetRegisterSetCount()
-{
-    size_t sets = 0;
-    for (size_t set = 0; set < k_num_register_sets; ++set)
-    {
-        if (IsRegisterSetAvailable(set))
-            ++sets;
-    }
+size_t RegisterContextPOSIX_arm64::GetRegisterSetCount() {
+  size_t sets = 0;
+  for (size_t set = 0; set < k_num_register_sets; ++set) {
+    if (IsRegisterSetAvailable(set))
+      ++sets;
+  }
 
-    return sets;
+  return sets;
 }
 
 const lldb_private::RegisterSet *
-RegisterContextPOSIX_arm64::GetRegisterSet(size_t set)
-{
-    if (IsRegisterSetAvailable(set))
-    {
-        switch (m_register_info_ap->m_target_arch.GetMachine())
-        {
-            case llvm::Triple::aarch64:
-                return &g_reg_sets_arm64[set];
-            default:
-                assert(false && "Unhandled target architecture.");
-                return NULL;
-        }
+RegisterContextPOSIX_arm64::GetRegisterSet(size_t set) {
+  if (IsRegisterSetAvailable(set)) {
+    switch (m_register_info_ap->m_target_arch.GetMachine()) {
+    case llvm::Triple::aarch64:
+      return &g_reg_sets_arm64[set];
+    default:
+      assert(false && "Unhandled target architecture.");
+      return NULL;
     }
-    return NULL;
+  }
+  return NULL;
 }
 
-const char *
-RegisterContextPOSIX_arm64::GetRegisterName(unsigned reg)
-{
-    assert(reg < m_reg_info.num_registers && "Invalid register offset.");
-    return GetRegisterInfo()[reg].name;
+const char *RegisterContextPOSIX_arm64::GetRegisterName(unsigned reg) {
+  assert(reg < m_reg_info.num_registers && "Invalid register offset.");
+  return GetRegisterInfo()[reg].name;
 }
 
-lldb::ByteOrder
-RegisterContextPOSIX_arm64::GetByteOrder()
-{
-    // Get the target process whose privileged thread was used for the register read.
-    lldb::ByteOrder byte_order = lldb::eByteOrderInvalid;
-    lldb_private::Process *process = CalculateProcess().get();
+lldb::ByteOrder RegisterContextPOSIX_arm64::GetByteOrder() {
+  // Get the target process whose privileged thread was used for the register
+  // read.
+  lldb::ByteOrder byte_order = lldb::eByteOrderInvalid;
+  lldb_private::Process *process = CalculateProcess().get();
 
-    if (process)
-        byte_order = process->GetByteOrder();
-    return byte_order;
+  if (process)
+    byte_order = process->GetByteOrder();
+  return byte_order;
 }
 
-bool
-RegisterContextPOSIX_arm64::IsRegisterSetAvailable(size_t set_index)
-{
-    return set_index < k_num_register_sets;
+bool RegisterContextPOSIX_arm64::IsRegisterSetAvailable(size_t set_index) {
+  return set_index < k_num_register_sets;
 }
 
-
 // Used when parsing DWARF and EH frame information and any other
-// object file sections that contain register numbers in them. 
-uint32_t
-RegisterContextPOSIX_arm64::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
-                                                                uint32_t num)
-{
-    const uint32_t num_regs = GetRegisterCount();
-
-    assert (kind < lldb::kNumRegisterKinds);
-    for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
-    {
-        const lldb_private::RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx);
-
-        if (reg_info->kinds[kind] == num)
-            return reg_idx;
-    }
+// object file sections that contain register numbers in them.
+uint32_t RegisterContextPOSIX_arm64::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t num) {
+  const uint32_t num_regs = GetRegisterCount();
+
+  assert(kind < lldb::kNumRegisterKinds);
+  for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
+    const lldb_private::RegisterInfo *reg_info =
+        GetRegisterInfoAtIndex(reg_idx);
+
+    if (reg_info->kinds[kind] == num)
+      return reg_idx;
+  }
 
-    return LLDB_INVALID_REGNUM;
+  return LLDB_INVALID_REGNUM;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
index 225d4f2..923e786 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
@@ -14,111 +14,98 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
-#include "lldb/Core/Log.h"
-#include "lldb/Target/RegisterContext.h"
 #include "RegisterInfoInterface.h"
 #include "lldb-arm64-register-enums.h"
+#include "lldb/Core/Log.h"
+#include "lldb/Target/RegisterContext.h"
 
 class ProcessMonitor;
 
-class RegisterContextPOSIX_arm64
-  : public lldb_private::RegisterContext
-{
+class RegisterContextPOSIX_arm64 : public lldb_private::RegisterContext {
 public:
-    RegisterContextPOSIX_arm64 (lldb_private::Thread &thread,
-                            uint32_t concrete_frame_idx,
-                            lldb_private::RegisterInfoInterface *register_info);
+  RegisterContextPOSIX_arm64(
+      lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+      lldb_private::RegisterInfoInterface *register_info);
 
-    ~RegisterContextPOSIX_arm64() override;
+  ~RegisterContextPOSIX_arm64() override;
 
-    void
-    Invalidate();
+  void Invalidate();
 
-    void
-    InvalidateAllRegisters() override;
+  void InvalidateAllRegisters() override;
 
-    size_t
-    GetRegisterCount() override;
+  size_t GetRegisterCount() override;
 
-    virtual size_t
-    GetGPRSize();
+  virtual size_t GetGPRSize();
 
-    virtual unsigned
-    GetRegisterSize(unsigned reg);
+  virtual unsigned GetRegisterSize(unsigned reg);
 
-    virtual unsigned
-    GetRegisterOffset(unsigned reg);
+  virtual unsigned GetRegisterOffset(unsigned reg);
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
 
-    size_t
-    GetRegisterSetCount() override;
+  size_t GetRegisterSetCount() override;
 
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t set) override;
+  const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
 
-    const char *
-    GetRegisterName(unsigned reg);
+  const char *GetRegisterName(unsigned reg);
 
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
 
 protected:
-    struct RegInfo
-    {
-        uint32_t num_registers;
-        uint32_t num_gpr_registers;
-        uint32_t num_fpr_registers;
-
-        uint32_t last_gpr;
-        uint32_t first_fpr;
-        uint32_t last_fpr;
-
-        uint32_t first_fpr_v;
-        uint32_t last_fpr_v;
-
-        uint32_t gpr_flags;
-    };
-
-    // based on RegisterContextDarwin_arm64.h
-    struct VReg
-    {
-        uint8_t bytes[16];
-    };
-
-    // based on RegisterContextDarwin_arm64.h
-    struct FPU
-    {
-        VReg        v[32];
-        uint32_t    fpsr;
-        uint32_t    fpcr;
-    };
-
-    uint64_t m_gpr_arm64[lldb_private::k_num_gpr_registers_arm64];           // 64-bit general purpose registers.
-    RegInfo  m_reg_info;
-    struct RegisterContextPOSIX_arm64::FPU m_fpr;                            // floating-point registers including extended register sets.
-    std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
-
-    // Determines if an extended register set is supported on the processor running the inferior process.
-    virtual bool
-    IsRegisterSetAvailable(size_t set_index);
-
-    virtual const lldb_private::RegisterInfo *
-    GetRegisterInfo();
-
-    bool
-    IsGPR(unsigned reg);
-
-    bool
-    IsFPR(unsigned reg);
-
-    lldb::ByteOrder GetByteOrder();
-
-    virtual bool ReadGPR() = 0;
-    virtual bool ReadFPR() = 0;
-    virtual bool WriteGPR() = 0;
-    virtual bool WriteFPR() = 0;
+  struct RegInfo {
+    uint32_t num_registers;
+    uint32_t num_gpr_registers;
+    uint32_t num_fpr_registers;
+
+    uint32_t last_gpr;
+    uint32_t first_fpr;
+    uint32_t last_fpr;
+
+    uint32_t first_fpr_v;
+    uint32_t last_fpr_v;
+
+    uint32_t gpr_flags;
+  };
+
+  // based on RegisterContextDarwin_arm64.h
+  struct VReg {
+    uint8_t bytes[16];
+  };
+
+  // based on RegisterContextDarwin_arm64.h
+  struct FPU {
+    VReg v[32];
+    uint32_t fpsr;
+    uint32_t fpcr;
+  };
+
+  uint64_t m_gpr_arm64[lldb_private::k_num_gpr_registers_arm64]; // 64-bit
+                                                                 // general
+                                                                 // purpose
+                                                                 // registers.
+  RegInfo m_reg_info;
+  struct RegisterContextPOSIX_arm64::FPU
+      m_fpr; // floating-point registers including extended register sets.
+  std::unique_ptr<lldb_private::RegisterInfoInterface>
+      m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
+
+  // Determines if an extended register set is supported on the processor
+  // running the inferior process.
+  virtual bool IsRegisterSetAvailable(size_t set_index);
+
+  virtual const lldb_private::RegisterInfo *GetRegisterInfo();
+
+  bool IsGPR(unsigned reg);
+
+  bool IsFPR(unsigned reg);
+
+  lldb::ByteOrder GetByteOrder();
+
+  virtual bool ReadGPR() = 0;
+  virtual bool ReadFPR() = 0;
+  virtual bool WriteGPR() = 0;
+  virtual bool WriteFPR() = 0;
 };
 
 #endif // liblldb_RegisterContextPOSIX_arm64_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp
index cefedae..8c67fb8 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp
@@ -15,223 +15,150 @@
 #include "lldb/Core/DataExtractor.h"
 #include "lldb/Core/RegisterValue.h"
 #include "lldb/Core/Scalar.h"
+#include "lldb/Host/Endian.h"
 #include "lldb/Target/Target.h"
 #include "lldb/Target/Thread.h"
-#include "lldb/Host/Endian.h"
 #include "llvm/Support/Compiler.h"
 
-#include "RegisterContextPOSIX_mips64.h"
 #include "Plugins/Process/elf-core/ProcessElfCore.h"
+#include "RegisterContextPOSIX_mips64.h"
 
 using namespace lldb_private;
 using namespace lldb;
 
-static const
-uint32_t g_gpr_regnums[] =
-{
-    gpr_zero_mips64,
-    gpr_r1_mips64,
-    gpr_r2_mips64,
-    gpr_r3_mips64,
-    gpr_r4_mips64,
-    gpr_r5_mips64,
-    gpr_r6_mips64,
-    gpr_r7_mips64,
-    gpr_r8_mips64,
-    gpr_r9_mips64,
-    gpr_r10_mips64,
-    gpr_r11_mips64,
-    gpr_r12_mips64,
-    gpr_r13_mips64,
-    gpr_r14_mips64,
-    gpr_r15_mips64,
-    gpr_r16_mips64,
-    gpr_r17_mips64,
-    gpr_r18_mips64,
-    gpr_r19_mips64,
-    gpr_r20_mips64,
-    gpr_r21_mips64,
-    gpr_r22_mips64,
-    gpr_r23_mips64,
-    gpr_r24_mips64,
-    gpr_r25_mips64,
-    gpr_r26_mips64,
-    gpr_r27_mips64,
-    gpr_gp_mips64,
-    gpr_sp_mips64,
-    gpr_r30_mips64,
-    gpr_ra_mips64,
-    gpr_sr_mips64,
-    gpr_mullo_mips64,
-    gpr_mulhi_mips64,
-    gpr_badvaddr_mips64,
-    gpr_cause_mips64,
-    gpr_pc_mips64,
-    gpr_ic_mips64,
-    gpr_dummy_mips64
-};
+static const uint32_t g_gpr_regnums[] = {
+    gpr_zero_mips64,  gpr_r1_mips64,    gpr_r2_mips64,    gpr_r3_mips64,
+    gpr_r4_mips64,    gpr_r5_mips64,    gpr_r6_mips64,    gpr_r7_mips64,
+    gpr_r8_mips64,    gpr_r9_mips64,    gpr_r10_mips64,   gpr_r11_mips64,
+    gpr_r12_mips64,   gpr_r13_mips64,   gpr_r14_mips64,   gpr_r15_mips64,
+    gpr_r16_mips64,   gpr_r17_mips64,   gpr_r18_mips64,   gpr_r19_mips64,
+    gpr_r20_mips64,   gpr_r21_mips64,   gpr_r22_mips64,   gpr_r23_mips64,
+    gpr_r24_mips64,   gpr_r25_mips64,   gpr_r26_mips64,   gpr_r27_mips64,
+    gpr_gp_mips64,    gpr_sp_mips64,    gpr_r30_mips64,   gpr_ra_mips64,
+    gpr_sr_mips64,    gpr_mullo_mips64, gpr_mulhi_mips64, gpr_badvaddr_mips64,
+    gpr_cause_mips64, gpr_pc_mips64,    gpr_ic_mips64,    gpr_dummy_mips64};
 
 // Number of register sets provided by this context.
-enum
-{
-    k_num_register_sets = 1
-};
+enum { k_num_register_sets = 1 };
 
-static const RegisterSet
-g_reg_sets_mips64[k_num_register_sets] =
-{
-    { "General Purpose Registers",  "gpr", k_num_gpr_registers_mips64, g_gpr_regnums },
+static const RegisterSet g_reg_sets_mips64[k_num_register_sets] = {
+    {"General Purpose Registers", "gpr", k_num_gpr_registers_mips64,
+     g_gpr_regnums},
 };
 
-bool RegisterContextPOSIX_mips64::IsGPR(unsigned reg)
-{
-    return reg <= k_num_gpr_registers_mips64;   // GPR's come first.
+bool RegisterContextPOSIX_mips64::IsGPR(unsigned reg) {
+  return reg <= k_num_gpr_registers_mips64; // GPR's come first.
 }
 
-bool
-RegisterContextPOSIX_mips64::IsFPR(unsigned reg)
-{
-    // XXX
-    return false;
+bool RegisterContextPOSIX_mips64::IsFPR(unsigned reg) {
+  // XXX
+  return false;
 }
 
-RegisterContextPOSIX_mips64::RegisterContextPOSIX_mips64(Thread &thread,
-                                               uint32_t concrete_frame_idx,
-                                               RegisterInfoInterface *register_info)
-    : RegisterContext(thread, concrete_frame_idx)
-{
-    m_register_info_ap.reset(register_info);
-
-    // elf-core yet to support ReadFPR()
-    ProcessSP base = CalculateProcess();
-    if (base.get()->GetPluginName() ==  ProcessElfCore::GetPluginNameStatic())
-        return;
-}
+RegisterContextPOSIX_mips64::RegisterContextPOSIX_mips64(
+    Thread &thread, uint32_t concrete_frame_idx,
+    RegisterInfoInterface *register_info)
+    : RegisterContext(thread, concrete_frame_idx) {
+  m_register_info_ap.reset(register_info);
 
-RegisterContextPOSIX_mips64::~RegisterContextPOSIX_mips64()
-{
+  // elf-core yet to support ReadFPR()
+  ProcessSP base = CalculateProcess();
+  if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
+    return;
 }
 
-void
-RegisterContextPOSIX_mips64::Invalidate()
-{
-}
+RegisterContextPOSIX_mips64::~RegisterContextPOSIX_mips64() {}
 
-void
-RegisterContextPOSIX_mips64::InvalidateAllRegisters()
-{
-}
+void RegisterContextPOSIX_mips64::Invalidate() {}
 
-unsigned
-RegisterContextPOSIX_mips64::GetRegisterOffset(unsigned reg)
-{
-    assert(reg < k_num_registers_mips64 && "Invalid register number.");
-    return GetRegisterInfo()[reg].byte_offset;
+void RegisterContextPOSIX_mips64::InvalidateAllRegisters() {}
+
+unsigned RegisterContextPOSIX_mips64::GetRegisterOffset(unsigned reg) {
+  assert(reg < k_num_registers_mips64 && "Invalid register number.");
+  return GetRegisterInfo()[reg].byte_offset;
 }
 
-unsigned
-RegisterContextPOSIX_mips64::GetRegisterSize(unsigned reg)
-{
-    assert(reg < k_num_registers_mips64 && "Invalid register number.");
-    return GetRegisterInfo()[reg].byte_size;
+unsigned RegisterContextPOSIX_mips64::GetRegisterSize(unsigned reg) {
+  assert(reg < k_num_registers_mips64 && "Invalid register number.");
+  return GetRegisterInfo()[reg].byte_size;
 }
 
-size_t
-RegisterContextPOSIX_mips64::GetRegisterCount()
-{
-    size_t num_registers = k_num_registers_mips64;
-    return num_registers;
+size_t RegisterContextPOSIX_mips64::GetRegisterCount() {
+  size_t num_registers = k_num_registers_mips64;
+  return num_registers;
 }
 
-size_t
-RegisterContextPOSIX_mips64::GetGPRSize()
-{
-    return m_register_info_ap->GetGPRSize();
+size_t RegisterContextPOSIX_mips64::GetGPRSize() {
+  return m_register_info_ap->GetGPRSize();
 }
 
-const RegisterInfo *
-RegisterContextPOSIX_mips64::GetRegisterInfo()
-{
-    // Commonly, this method is overridden and g_register_infos is copied and specialized.
-    // So, use GetRegisterInfo() rather than g_register_infos in this scope.
-    return m_register_info_ap->GetRegisterInfo ();
+const RegisterInfo *RegisterContextPOSIX_mips64::GetRegisterInfo() {
+  // Commonly, this method is overridden and g_register_infos is copied and
+  // specialized.
+  // So, use GetRegisterInfo() rather than g_register_infos in this scope.
+  return m_register_info_ap->GetRegisterInfo();
 }
 
 const RegisterInfo *
-RegisterContextPOSIX_mips64::GetRegisterInfoAtIndex(size_t reg)
-{
-    if (reg < k_num_registers_mips64)
-        return &GetRegisterInfo()[reg];
-    else
-        return NULL;
+RegisterContextPOSIX_mips64::GetRegisterInfoAtIndex(size_t reg) {
+  if (reg < k_num_registers_mips64)
+    return &GetRegisterInfo()[reg];
+  else
+    return NULL;
 }
 
-size_t
-RegisterContextPOSIX_mips64::GetRegisterSetCount()
-{
-    size_t sets = 0;
-    for (size_t set = 0; set < k_num_register_sets; ++set)
-    {
-        if (IsRegisterSetAvailable(set))
-            ++sets;
-    }
-
-    return sets;
+size_t RegisterContextPOSIX_mips64::GetRegisterSetCount() {
+  size_t sets = 0;
+  for (size_t set = 0; set < k_num_register_sets; ++set) {
+    if (IsRegisterSetAvailable(set))
+      ++sets;
+  }
+
+  return sets;
 }
 
-const RegisterSet *
-RegisterContextPOSIX_mips64::GetRegisterSet(size_t set)
-{
-    if (IsRegisterSetAvailable(set))
-        return &g_reg_sets_mips64[set];
-    else
-        return NULL;
+const RegisterSet *RegisterContextPOSIX_mips64::GetRegisterSet(size_t set) {
+  if (IsRegisterSetAvailable(set))
+    return &g_reg_sets_mips64[set];
+  else
+    return NULL;
 }
 
-const char *
-RegisterContextPOSIX_mips64::GetRegisterName(unsigned reg)
-{
-    assert(reg < k_num_registers_mips64 && "Invalid register offset.");
-    return GetRegisterInfo()[reg].name;
+const char *RegisterContextPOSIX_mips64::GetRegisterName(unsigned reg) {
+  assert(reg < k_num_registers_mips64 && "Invalid register offset.");
+  return GetRegisterInfo()[reg].name;
 }
 
-lldb::ByteOrder
-RegisterContextPOSIX_mips64::GetByteOrder()
-{
-    // Get the target process whose privileged thread was used for the register read.
-    lldb::ByteOrder byte_order = eByteOrderInvalid;
-    Process *process = CalculateProcess().get();
+lldb::ByteOrder RegisterContextPOSIX_mips64::GetByteOrder() {
+  // Get the target process whose privileged thread was used for the register
+  // read.
+  lldb::ByteOrder byte_order = eByteOrderInvalid;
+  Process *process = CalculateProcess().get();
 
-    if (process)
-        byte_order = process->GetByteOrder();
-    return byte_order;
+  if (process)
+    byte_order = process->GetByteOrder();
+  return byte_order;
 }
 
-bool
-RegisterContextPOSIX_mips64::IsRegisterSetAvailable(size_t set_index)
-{
-    size_t num_sets = k_num_register_sets;
+bool RegisterContextPOSIX_mips64::IsRegisterSetAvailable(size_t set_index) {
+  size_t num_sets = k_num_register_sets;
 
-    return (set_index < num_sets);
+  return (set_index < num_sets);
 }
 
 // Used when parsing DWARF and EH frame information and any other
 // object file sections that contain register numbers in them.
-uint32_t
-RegisterContextPOSIX_mips64::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
-                                                                 uint32_t num)
-{
-    const uint32_t num_regs = GetRegisterCount();
-
-    assert (kind < kNumRegisterKinds);
-    for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
-    {
-        const RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx);
-
-        if (reg_info->kinds[kind] == num)
-            return reg_idx;
-    }
-
-    return LLDB_INVALID_REGNUM;
-}
+uint32_t RegisterContextPOSIX_mips64::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t num) {
+  const uint32_t num_regs = GetRegisterCount();
+
+  assert(kind < kNumRegisterKinds);
+  for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
+    const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg_idx);
 
+    if (reg_info->kinds[kind] == num)
+      return reg_idx;
+  }
+
+  return LLDB_INVALID_REGNUM;
+}
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h
index 07552d8..90ff9d6 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h
@@ -14,82 +14,69 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
-#include "lldb/Core/Log.h"
-#include "lldb/Target/RegisterContext.h"
-#include "RegisterInfoInterface.h"
 #include "RegisterContext_mips.h"
+#include "RegisterInfoInterface.h"
 #include "lldb-mips-freebsd-register-enums.h"
+#include "lldb/Core/Log.h"
+#include "lldb/Target/RegisterContext.h"
 
 using namespace lldb_private;
 
 class ProcessMonitor;
 
-class RegisterContextPOSIX_mips64
-  : public lldb_private::RegisterContext
-{
+class RegisterContextPOSIX_mips64 : public lldb_private::RegisterContext {
 public:
-    RegisterContextPOSIX_mips64 (lldb_private::Thread &thread,
-                            uint32_t concrete_frame_idx,
-                            lldb_private::RegisterInfoInterface *register_info);
+  RegisterContextPOSIX_mips64(
+      lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+      lldb_private::RegisterInfoInterface *register_info);
 
-    ~RegisterContextPOSIX_mips64() override;
+  ~RegisterContextPOSIX_mips64() override;
 
-    void
-    Invalidate();
+  void Invalidate();
 
-    void
-    InvalidateAllRegisters() override;
+  void InvalidateAllRegisters() override;
 
-    size_t
-    GetRegisterCount() override;
+  size_t GetRegisterCount() override;
 
-    virtual size_t
-    GetGPRSize();
+  virtual size_t GetGPRSize();
 
-    virtual unsigned
-    GetRegisterSize(unsigned reg);
+  virtual unsigned GetRegisterSize(unsigned reg);
 
-    virtual unsigned
-    GetRegisterOffset(unsigned reg);
+  virtual unsigned GetRegisterOffset(unsigned reg);
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
 
-    size_t
-    GetRegisterSetCount() override;
+  size_t GetRegisterSetCount() override;
 
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t set) override;
+  const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
 
-    const char *
-    GetRegisterName(unsigned reg);
+  const char *GetRegisterName(unsigned reg);
 
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
 
 protected:
-    uint64_t m_gpr_mips64[k_num_gpr_registers_mips64];         // general purpose registers.
-    std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
+  uint64_t
+      m_gpr_mips64[k_num_gpr_registers_mips64]; // general purpose registers.
+  std::unique_ptr<lldb_private::RegisterInfoInterface>
+      m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
 
-    // Determines if an extended register set is supported on the processor running the inferior process.
-    virtual bool
-    IsRegisterSetAvailable(size_t set_index);
+  // Determines if an extended register set is supported on the processor
+  // running the inferior process.
+  virtual bool IsRegisterSetAvailable(size_t set_index);
 
-    virtual const lldb_private::RegisterInfo *
-    GetRegisterInfo();
+  virtual const lldb_private::RegisterInfo *GetRegisterInfo();
 
-    bool
-    IsGPR(unsigned reg);
+  bool IsGPR(unsigned reg);
 
-    bool
-    IsFPR(unsigned reg);
+  bool IsFPR(unsigned reg);
 
-    lldb::ByteOrder GetByteOrder();
+  lldb::ByteOrder GetByteOrder();
 
-    virtual bool ReadGPR() = 0;
-    virtual bool ReadFPR() = 0;
-    virtual bool WriteGPR() = 0;
-    virtual bool WriteFPR() = 0;
+  virtual bool ReadGPR() = 0;
+  virtual bool ReadFPR() = 0;
+  virtual bool WriteGPR() = 0;
+  virtual bool WriteFPR() = 0;
 };
 
 #endif // liblldb_RegisterContextPOSIX_mips64_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.cpp
index e353e81..6a9838a 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.cpp
@@ -1,4 +1,5 @@
-//===-- RegisterContextPOSIX_powerpc.cpp -------------------------*- C++ -*-===//
+//===-- RegisterContextPOSIX_powerpc.cpp -------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -15,305 +16,184 @@
 #include "lldb/Core/DataExtractor.h"
 #include "lldb/Core/RegisterValue.h"
 #include "lldb/Core/Scalar.h"
+#include "lldb/Host/Endian.h"
 #include "lldb/Target/Target.h"
 #include "lldb/Target/Thread.h"
-#include "lldb/Host/Endian.h"
 #include "llvm/Support/Compiler.h"
 
-#include "RegisterContextPOSIX_powerpc.h"
 #include "Plugins/Process/elf-core/ProcessElfCore.h"
+#include "RegisterContextPOSIX_powerpc.h"
 
 using namespace lldb_private;
 using namespace lldb;
 
-static const
-uint32_t g_gpr_regnums[] =
-{
-    gpr_r0_powerpc,
-    gpr_r1_powerpc,
-    gpr_r2_powerpc,
-    gpr_r3_powerpc,
-    gpr_r4_powerpc,
-    gpr_r5_powerpc,
-    gpr_r6_powerpc,
-    gpr_r7_powerpc,
-    gpr_r8_powerpc,
-    gpr_r9_powerpc,
-    gpr_r10_powerpc,
-    gpr_r11_powerpc,
-    gpr_r12_powerpc,
-    gpr_r13_powerpc,
-    gpr_r14_powerpc,
-    gpr_r15_powerpc,
-    gpr_r16_powerpc,
-    gpr_r17_powerpc,
-    gpr_r18_powerpc,
-    gpr_r19_powerpc,
-    gpr_r20_powerpc,
-    gpr_r21_powerpc,
-    gpr_r22_powerpc,
-    gpr_r23_powerpc,
-    gpr_r24_powerpc,
-    gpr_r25_powerpc,
-    gpr_r26_powerpc,
-    gpr_r27_powerpc,
-    gpr_r28_powerpc,
-    gpr_r29_powerpc,
-    gpr_r30_powerpc,
-    gpr_r31_powerpc,
-    gpr_lr_powerpc,
-    gpr_cr_powerpc,
-    gpr_xer_powerpc,
-    gpr_ctr_powerpc,
+static const uint32_t g_gpr_regnums[] = {
+    gpr_r0_powerpc,  gpr_r1_powerpc,  gpr_r2_powerpc,  gpr_r3_powerpc,
+    gpr_r4_powerpc,  gpr_r5_powerpc,  gpr_r6_powerpc,  gpr_r7_powerpc,
+    gpr_r8_powerpc,  gpr_r9_powerpc,  gpr_r10_powerpc, gpr_r11_powerpc,
+    gpr_r12_powerpc, gpr_r13_powerpc, gpr_r14_powerpc, gpr_r15_powerpc,
+    gpr_r16_powerpc, gpr_r17_powerpc, gpr_r18_powerpc, gpr_r19_powerpc,
+    gpr_r20_powerpc, gpr_r21_powerpc, gpr_r22_powerpc, gpr_r23_powerpc,
+    gpr_r24_powerpc, gpr_r25_powerpc, gpr_r26_powerpc, gpr_r27_powerpc,
+    gpr_r28_powerpc, gpr_r29_powerpc, gpr_r30_powerpc, gpr_r31_powerpc,
+    gpr_lr_powerpc,  gpr_cr_powerpc,  gpr_xer_powerpc, gpr_ctr_powerpc,
     gpr_pc_powerpc,
 };
 
-static const
-uint32_t g_fpr_regnums[] =
-{
-    fpr_f0_powerpc,
-    fpr_f1_powerpc,
-    fpr_f2_powerpc,
-    fpr_f3_powerpc,
-    fpr_f4_powerpc,
-    fpr_f5_powerpc,
-    fpr_f6_powerpc,
-    fpr_f7_powerpc,
-    fpr_f8_powerpc,
-    fpr_f9_powerpc,
-    fpr_f10_powerpc,
-    fpr_f11_powerpc,
-    fpr_f12_powerpc,
-    fpr_f13_powerpc,
-    fpr_f14_powerpc,
-    fpr_f15_powerpc,
-    fpr_f16_powerpc,
-    fpr_f17_powerpc,
-    fpr_f18_powerpc,
-    fpr_f19_powerpc,
-    fpr_f20_powerpc,
-    fpr_f21_powerpc,
-    fpr_f22_powerpc,
-    fpr_f23_powerpc,
-    fpr_f24_powerpc,
-    fpr_f25_powerpc,
-    fpr_f26_powerpc,
-    fpr_f27_powerpc,
-    fpr_f28_powerpc,
-    fpr_f29_powerpc,
-    fpr_f30_powerpc,
-    fpr_f31_powerpc,
+static const uint32_t g_fpr_regnums[] = {
+    fpr_f0_powerpc,    fpr_f1_powerpc,  fpr_f2_powerpc,  fpr_f3_powerpc,
+    fpr_f4_powerpc,    fpr_f5_powerpc,  fpr_f6_powerpc,  fpr_f7_powerpc,
+    fpr_f8_powerpc,    fpr_f9_powerpc,  fpr_f10_powerpc, fpr_f11_powerpc,
+    fpr_f12_powerpc,   fpr_f13_powerpc, fpr_f14_powerpc, fpr_f15_powerpc,
+    fpr_f16_powerpc,   fpr_f17_powerpc, fpr_f18_powerpc, fpr_f19_powerpc,
+    fpr_f20_powerpc,   fpr_f21_powerpc, fpr_f22_powerpc, fpr_f23_powerpc,
+    fpr_f24_powerpc,   fpr_f25_powerpc, fpr_f26_powerpc, fpr_f27_powerpc,
+    fpr_f28_powerpc,   fpr_f29_powerpc, fpr_f30_powerpc, fpr_f31_powerpc,
     fpr_fpscr_powerpc,
 };
 
-static const
-uint32_t g_vmx_regnums[] =
-{
-    vmx_v0_powerpc,
-    vmx_v1_powerpc,
-    vmx_v2_powerpc,
-    vmx_v3_powerpc,
-    vmx_v4_powerpc,
-    vmx_v5_powerpc,
-    vmx_v6_powerpc,
-    vmx_v7_powerpc,
-    vmx_v8_powerpc,
-    vmx_v9_powerpc,
-    vmx_v10_powerpc,
-    vmx_v11_powerpc,
-    vmx_v12_powerpc,
-    vmx_v13_powerpc,
-    vmx_v14_powerpc,
-    vmx_v15_powerpc,
-    vmx_v16_powerpc,
-    vmx_v17_powerpc,
-    vmx_v18_powerpc,
-    vmx_v19_powerpc,
-    vmx_v20_powerpc,
-    vmx_v21_powerpc,
-    vmx_v22_powerpc,
-    vmx_v23_powerpc,
-    vmx_v24_powerpc,
-    vmx_v25_powerpc,
-    vmx_v26_powerpc,
-    vmx_v27_powerpc,
-    vmx_v28_powerpc,
-    vmx_v29_powerpc,
-    vmx_v30_powerpc,
-    vmx_v31_powerpc,
-    vmx_vrsave_powerpc,
-    vmx_vscr_powerpc,
+static const uint32_t g_vmx_regnums[] = {
+    vmx_v0_powerpc,     vmx_v1_powerpc,   vmx_v2_powerpc,  vmx_v3_powerpc,
+    vmx_v4_powerpc,     vmx_v5_powerpc,   vmx_v6_powerpc,  vmx_v7_powerpc,
+    vmx_v8_powerpc,     vmx_v9_powerpc,   vmx_v10_powerpc, vmx_v11_powerpc,
+    vmx_v12_powerpc,    vmx_v13_powerpc,  vmx_v14_powerpc, vmx_v15_powerpc,
+    vmx_v16_powerpc,    vmx_v17_powerpc,  vmx_v18_powerpc, vmx_v19_powerpc,
+    vmx_v20_powerpc,    vmx_v21_powerpc,  vmx_v22_powerpc, vmx_v23_powerpc,
+    vmx_v24_powerpc,    vmx_v25_powerpc,  vmx_v26_powerpc, vmx_v27_powerpc,
+    vmx_v28_powerpc,    vmx_v29_powerpc,  vmx_v30_powerpc, vmx_v31_powerpc,
+    vmx_vrsave_powerpc, vmx_vscr_powerpc,
 };
 
 // Number of register sets provided by this context.
-enum
-{
-    k_num_register_sets = 3
+enum { k_num_register_sets = 3 };
+
+static const RegisterSet g_reg_sets_powerpc[k_num_register_sets] = {
+    {"General Purpose Registers", "gpr", k_num_gpr_registers_powerpc,
+     g_gpr_regnums},
+    {"Floating Point Registers", "fpr", k_num_fpr_registers_powerpc,
+     g_fpr_regnums},
+    {"Altivec/VMX Registers", "vmx", k_num_vmx_registers_powerpc,
+     g_vmx_regnums},
 };
 
-static const RegisterSet
-g_reg_sets_powerpc[k_num_register_sets] =
-{
-    { "General Purpose Registers",  "gpr", k_num_gpr_registers_powerpc, g_gpr_regnums },
-    { "Floating Point Registers",  "fpr", k_num_fpr_registers_powerpc, g_fpr_regnums },
-    { "Altivec/VMX Registers",  "vmx", k_num_vmx_registers_powerpc, g_vmx_regnums },
-};
-
-static_assert(k_first_gpr_powerpc == 0, "GPRs must index starting at 0, or fix IsGPR()");
-bool RegisterContextPOSIX_powerpc::IsGPR(unsigned reg)
-{
-    return (reg <= k_last_gpr_powerpc);   // GPR's come first.
+static_assert(k_first_gpr_powerpc == 0,
+              "GPRs must index starting at 0, or fix IsGPR()");
+bool RegisterContextPOSIX_powerpc::IsGPR(unsigned reg) {
+  return (reg <= k_last_gpr_powerpc); // GPR's come first.
 }
 
-bool
-RegisterContextPOSIX_powerpc::IsFPR(unsigned reg)
-{
-    return (reg >= k_first_fpr) && (reg <= k_last_fpr);
+bool RegisterContextPOSIX_powerpc::IsFPR(unsigned reg) {
+  return (reg >= k_first_fpr) && (reg <= k_last_fpr);
 }
 
-bool
-RegisterContextPOSIX_powerpc::IsVMX(unsigned reg)
-{
-    return (reg >= k_first_vmx) && (reg <= k_last_vmx);
+bool RegisterContextPOSIX_powerpc::IsVMX(unsigned reg) {
+  return (reg >= k_first_vmx) && (reg <= k_last_vmx);
 }
 
-RegisterContextPOSIX_powerpc::RegisterContextPOSIX_powerpc(Thread &thread,
-                                               uint32_t concrete_frame_idx,
-                                               RegisterInfoInterface *register_info)
-    : RegisterContext(thread, concrete_frame_idx)
-{
-    m_register_info_ap.reset(register_info);
-
-    // elf-core yet to support ReadFPR()
-    ProcessSP base = CalculateProcess();
-    if (base.get()->GetPluginName() ==  ProcessElfCore::GetPluginNameStatic())
-        return;
-}
+RegisterContextPOSIX_powerpc::RegisterContextPOSIX_powerpc(
+    Thread &thread, uint32_t concrete_frame_idx,
+    RegisterInfoInterface *register_info)
+    : RegisterContext(thread, concrete_frame_idx) {
+  m_register_info_ap.reset(register_info);
 
-RegisterContextPOSIX_powerpc::~RegisterContextPOSIX_powerpc()
-{
+  // elf-core yet to support ReadFPR()
+  ProcessSP base = CalculateProcess();
+  if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
+    return;
 }
 
-void
-RegisterContextPOSIX_powerpc::Invalidate()
-{
-}
+RegisterContextPOSIX_powerpc::~RegisterContextPOSIX_powerpc() {}
 
-void
-RegisterContextPOSIX_powerpc::InvalidateAllRegisters()
-{
-}
+void RegisterContextPOSIX_powerpc::Invalidate() {}
 
-unsigned
-RegisterContextPOSIX_powerpc::GetRegisterOffset(unsigned reg)
-{
-    assert(reg < k_num_registers_powerpc && "Invalid register number.");
-    return GetRegisterInfo()[reg].byte_offset;
+void RegisterContextPOSIX_powerpc::InvalidateAllRegisters() {}
+
+unsigned RegisterContextPOSIX_powerpc::GetRegisterOffset(unsigned reg) {
+  assert(reg < k_num_registers_powerpc && "Invalid register number.");
+  return GetRegisterInfo()[reg].byte_offset;
 }
 
-unsigned
-RegisterContextPOSIX_powerpc::GetRegisterSize(unsigned reg)
-{
-    assert(reg < k_num_registers_powerpc && "Invalid register number.");
-    return GetRegisterInfo()[reg].byte_size;
+unsigned RegisterContextPOSIX_powerpc::GetRegisterSize(unsigned reg) {
+  assert(reg < k_num_registers_powerpc && "Invalid register number.");
+  return GetRegisterInfo()[reg].byte_size;
 }
 
-size_t
-RegisterContextPOSIX_powerpc::GetRegisterCount()
-{
-    size_t num_registers = k_num_registers_powerpc;
-    return num_registers;
+size_t RegisterContextPOSIX_powerpc::GetRegisterCount() {
+  size_t num_registers = k_num_registers_powerpc;
+  return num_registers;
 }
 
-size_t
-RegisterContextPOSIX_powerpc::GetGPRSize()
-{
-    return m_register_info_ap->GetGPRSize();
+size_t RegisterContextPOSIX_powerpc::GetGPRSize() {
+  return m_register_info_ap->GetGPRSize();
 }
 
-const RegisterInfo *
-RegisterContextPOSIX_powerpc::GetRegisterInfo()
-{
-    // Commonly, this method is overridden and g_register_infos is copied and specialized.
-    // So, use GetRegisterInfo() rather than g_register_infos in this scope.
-    return m_register_info_ap->GetRegisterInfo ();
+const RegisterInfo *RegisterContextPOSIX_powerpc::GetRegisterInfo() {
+  // Commonly, this method is overridden and g_register_infos is copied and
+  // specialized.
+  // So, use GetRegisterInfo() rather than g_register_infos in this scope.
+  return m_register_info_ap->GetRegisterInfo();
 }
 
 const RegisterInfo *
-RegisterContextPOSIX_powerpc::GetRegisterInfoAtIndex(size_t reg)
-{
-    if (reg < k_num_registers_powerpc)
-        return &GetRegisterInfo()[reg];
-    else
-        return NULL;
+RegisterContextPOSIX_powerpc::GetRegisterInfoAtIndex(size_t reg) {
+  if (reg < k_num_registers_powerpc)
+    return &GetRegisterInfo()[reg];
+  else
+    return NULL;
 }
 
-size_t
-RegisterContextPOSIX_powerpc::GetRegisterSetCount()
-{
-    size_t sets = 0;
-    for (size_t set = 0; set < k_num_register_sets; ++set)
-    {
-        if (IsRegisterSetAvailable(set))
-            ++sets;
-    }
-
-    return sets;
+size_t RegisterContextPOSIX_powerpc::GetRegisterSetCount() {
+  size_t sets = 0;
+  for (size_t set = 0; set < k_num_register_sets; ++set) {
+    if (IsRegisterSetAvailable(set))
+      ++sets;
+  }
+
+  return sets;
 }
 
-const RegisterSet *
-RegisterContextPOSIX_powerpc::GetRegisterSet(size_t set)
-{
-    if (IsRegisterSetAvailable(set))
-        return &g_reg_sets_powerpc[set];
-    else
-        return NULL;
+const RegisterSet *RegisterContextPOSIX_powerpc::GetRegisterSet(size_t set) {
+  if (IsRegisterSetAvailable(set))
+    return &g_reg_sets_powerpc[set];
+  else
+    return NULL;
 }
 
-const char *
-RegisterContextPOSIX_powerpc::GetRegisterName(unsigned reg)
-{
-    assert(reg < k_num_registers_powerpc && "Invalid register offset.");
-    return GetRegisterInfo()[reg].name;
+const char *RegisterContextPOSIX_powerpc::GetRegisterName(unsigned reg) {
+  assert(reg < k_num_registers_powerpc && "Invalid register offset.");
+  return GetRegisterInfo()[reg].name;
 }
 
-lldb::ByteOrder
-RegisterContextPOSIX_powerpc::GetByteOrder()
-{
-    // Get the target process whose privileged thread was used for the register read.
-    lldb::ByteOrder byte_order = eByteOrderInvalid;
-    Process *process = CalculateProcess().get();
+lldb::ByteOrder RegisterContextPOSIX_powerpc::GetByteOrder() {
+  // Get the target process whose privileged thread was used for the register
+  // read.
+  lldb::ByteOrder byte_order = eByteOrderInvalid;
+  Process *process = CalculateProcess().get();
 
-    if (process)
-        byte_order = process->GetByteOrder();
-    return byte_order;
+  if (process)
+    byte_order = process->GetByteOrder();
+  return byte_order;
 }
 
-bool
-RegisterContextPOSIX_powerpc::IsRegisterSetAvailable(size_t set_index)
-{
-    size_t num_sets = k_num_register_sets;
+bool RegisterContextPOSIX_powerpc::IsRegisterSetAvailable(size_t set_index) {
+  size_t num_sets = k_num_register_sets;
 
-    return (set_index < num_sets);
+  return (set_index < num_sets);
 }
 
 // Used when parsing DWARF and EH frame information and any other
 // object file sections that contain register numbers in them.
-uint32_t
-RegisterContextPOSIX_powerpc::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
-                                                                 uint32_t num)
-{
-    const uint32_t num_regs = GetRegisterCount();
-
-    assert (kind < kNumRegisterKinds);
-    for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
-    {
-        const RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx);
-
-        if (reg_info->kinds[kind] == num)
-            return reg_idx;
-    }
-
-    return LLDB_INVALID_REGNUM;
-}
+uint32_t RegisterContextPOSIX_powerpc::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t num) {
+  const uint32_t num_regs = GetRegisterCount();
+
+  assert(kind < kNumRegisterKinds);
+  for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
+    const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg_idx);
 
+    if (reg_info->kinds[kind] == num)
+      return reg_idx;
+  }
+
+  return LLDB_INVALID_REGNUM;
+}
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h
index 4168e46..79bb01f 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h
@@ -14,210 +14,196 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
+#include "RegisterContext_powerpc.h"
+#include "RegisterInfoInterface.h"
 #include "lldb/Core/Log.h"
 #include "lldb/Target/RegisterContext.h"
-#include "RegisterInfoInterface.h"
-#include "RegisterContext_powerpc.h"
 
 class ProcessMonitor;
 
 // ---------------------------------------------------------------------------
 // Internal codes for all powerpc registers.
 // ---------------------------------------------------------------------------
-enum
-{
-    k_first_gpr_powerpc,
-    gpr_r0_powerpc = k_first_gpr_powerpc,
-    gpr_r1_powerpc,
-    gpr_r2_powerpc,
-    gpr_r3_powerpc,
-    gpr_r4_powerpc,
-    gpr_r5_powerpc,
-    gpr_r6_powerpc,
-    gpr_r7_powerpc,
-    gpr_r8_powerpc,
-    gpr_r9_powerpc,
-    gpr_r10_powerpc,
-    gpr_r11_powerpc,
-    gpr_r12_powerpc,
-    gpr_r13_powerpc,
-    gpr_r14_powerpc,
-    gpr_r15_powerpc,
-    gpr_r16_powerpc,
-    gpr_r17_powerpc,
-    gpr_r18_powerpc,
-    gpr_r19_powerpc,
-    gpr_r20_powerpc,
-    gpr_r21_powerpc,
-    gpr_r22_powerpc,
-    gpr_r23_powerpc,
-    gpr_r24_powerpc,
-    gpr_r25_powerpc,
-    gpr_r26_powerpc,
-    gpr_r27_powerpc,
-    gpr_r28_powerpc,
-    gpr_r29_powerpc,
-    gpr_r30_powerpc,
-    gpr_r31_powerpc,
-    gpr_lr_powerpc,
-    gpr_cr_powerpc,
-    gpr_xer_powerpc,
-    gpr_ctr_powerpc,
-    gpr_pc_powerpc,
-    k_last_gpr_powerpc = gpr_pc_powerpc,
-
-    k_first_fpr,
-    fpr_f0_powerpc = k_first_fpr,
-    fpr_f1_powerpc,
-    fpr_f2_powerpc,
-    fpr_f3_powerpc,
-    fpr_f4_powerpc,
-    fpr_f5_powerpc,
-    fpr_f6_powerpc,
-    fpr_f7_powerpc,
-    fpr_f8_powerpc,
-    fpr_f9_powerpc,
-    fpr_f10_powerpc,
-    fpr_f11_powerpc,
-    fpr_f12_powerpc,
-    fpr_f13_powerpc,
-    fpr_f14_powerpc,
-    fpr_f15_powerpc,
-    fpr_f16_powerpc,
-    fpr_f17_powerpc,
-    fpr_f18_powerpc,
-    fpr_f19_powerpc,
-    fpr_f20_powerpc,
-    fpr_f21_powerpc,
-    fpr_f22_powerpc,
-    fpr_f23_powerpc,
-    fpr_f24_powerpc,
-    fpr_f25_powerpc,
-    fpr_f26_powerpc,
-    fpr_f27_powerpc,
-    fpr_f28_powerpc,
-    fpr_f29_powerpc,
-    fpr_f30_powerpc,
-    fpr_f31_powerpc,
-    fpr_fpscr_powerpc,
-    k_last_fpr = fpr_fpscr_powerpc,
-
-    k_first_vmx,
-    vmx_v0_powerpc = k_first_vmx,
-    vmx_v1_powerpc,
-    vmx_v2_powerpc,
-    vmx_v3_powerpc,
-    vmx_v4_powerpc,
-    vmx_v5_powerpc,
-    vmx_v6_powerpc,
-    vmx_v7_powerpc,
-    vmx_v8_powerpc,
-    vmx_v9_powerpc,
-    vmx_v10_powerpc,
-    vmx_v11_powerpc,
-    vmx_v12_powerpc,
-    vmx_v13_powerpc,
-    vmx_v14_powerpc,
-    vmx_v15_powerpc,
-    vmx_v16_powerpc,
-    vmx_v17_powerpc,
-    vmx_v18_powerpc,
-    vmx_v19_powerpc,
-    vmx_v20_powerpc,
-    vmx_v21_powerpc,
-    vmx_v22_powerpc,
-    vmx_v23_powerpc,
-    vmx_v24_powerpc,
-    vmx_v25_powerpc,
-    vmx_v26_powerpc,
-    vmx_v27_powerpc,
-    vmx_v28_powerpc,
-    vmx_v29_powerpc,
-    vmx_v30_powerpc,
-    vmx_v31_powerpc,
-    vmx_vrsave_powerpc,
-    vmx_vscr_powerpc,
-    k_last_vmx = vmx_vscr_powerpc,
-
-    k_num_registers_powerpc,
-    k_num_gpr_registers_powerpc = k_last_gpr_powerpc - k_first_gpr_powerpc + 1,
-    k_num_fpr_registers_powerpc = k_last_fpr - k_first_fpr + 1,
-    k_num_vmx_registers_powerpc = k_last_vmx - k_first_vmx + 1,
+enum {
+  k_first_gpr_powerpc,
+  gpr_r0_powerpc = k_first_gpr_powerpc,
+  gpr_r1_powerpc,
+  gpr_r2_powerpc,
+  gpr_r3_powerpc,
+  gpr_r4_powerpc,
+  gpr_r5_powerpc,
+  gpr_r6_powerpc,
+  gpr_r7_powerpc,
+  gpr_r8_powerpc,
+  gpr_r9_powerpc,
+  gpr_r10_powerpc,
+  gpr_r11_powerpc,
+  gpr_r12_powerpc,
+  gpr_r13_powerpc,
+  gpr_r14_powerpc,
+  gpr_r15_powerpc,
+  gpr_r16_powerpc,
+  gpr_r17_powerpc,
+  gpr_r18_powerpc,
+  gpr_r19_powerpc,
+  gpr_r20_powerpc,
+  gpr_r21_powerpc,
+  gpr_r22_powerpc,
+  gpr_r23_powerpc,
+  gpr_r24_powerpc,
+  gpr_r25_powerpc,
+  gpr_r26_powerpc,
+  gpr_r27_powerpc,
+  gpr_r28_powerpc,
+  gpr_r29_powerpc,
+  gpr_r30_powerpc,
+  gpr_r31_powerpc,
+  gpr_lr_powerpc,
+  gpr_cr_powerpc,
+  gpr_xer_powerpc,
+  gpr_ctr_powerpc,
+  gpr_pc_powerpc,
+  k_last_gpr_powerpc = gpr_pc_powerpc,
+
+  k_first_fpr,
+  fpr_f0_powerpc = k_first_fpr,
+  fpr_f1_powerpc,
+  fpr_f2_powerpc,
+  fpr_f3_powerpc,
+  fpr_f4_powerpc,
+  fpr_f5_powerpc,
+  fpr_f6_powerpc,
+  fpr_f7_powerpc,
+  fpr_f8_powerpc,
+  fpr_f9_powerpc,
+  fpr_f10_powerpc,
+  fpr_f11_powerpc,
+  fpr_f12_powerpc,
+  fpr_f13_powerpc,
+  fpr_f14_powerpc,
+  fpr_f15_powerpc,
+  fpr_f16_powerpc,
+  fpr_f17_powerpc,
+  fpr_f18_powerpc,
+  fpr_f19_powerpc,
+  fpr_f20_powerpc,
+  fpr_f21_powerpc,
+  fpr_f22_powerpc,
+  fpr_f23_powerpc,
+  fpr_f24_powerpc,
+  fpr_f25_powerpc,
+  fpr_f26_powerpc,
+  fpr_f27_powerpc,
+  fpr_f28_powerpc,
+  fpr_f29_powerpc,
+  fpr_f30_powerpc,
+  fpr_f31_powerpc,
+  fpr_fpscr_powerpc,
+  k_last_fpr = fpr_fpscr_powerpc,
+
+  k_first_vmx,
+  vmx_v0_powerpc = k_first_vmx,
+  vmx_v1_powerpc,
+  vmx_v2_powerpc,
+  vmx_v3_powerpc,
+  vmx_v4_powerpc,
+  vmx_v5_powerpc,
+  vmx_v6_powerpc,
+  vmx_v7_powerpc,
+  vmx_v8_powerpc,
+  vmx_v9_powerpc,
+  vmx_v10_powerpc,
+  vmx_v11_powerpc,
+  vmx_v12_powerpc,
+  vmx_v13_powerpc,
+  vmx_v14_powerpc,
+  vmx_v15_powerpc,
+  vmx_v16_powerpc,
+  vmx_v17_powerpc,
+  vmx_v18_powerpc,
+  vmx_v19_powerpc,
+  vmx_v20_powerpc,
+  vmx_v21_powerpc,
+  vmx_v22_powerpc,
+  vmx_v23_powerpc,
+  vmx_v24_powerpc,
+  vmx_v25_powerpc,
+  vmx_v26_powerpc,
+  vmx_v27_powerpc,
+  vmx_v28_powerpc,
+  vmx_v29_powerpc,
+  vmx_v30_powerpc,
+  vmx_v31_powerpc,
+  vmx_vrsave_powerpc,
+  vmx_vscr_powerpc,
+  k_last_vmx = vmx_vscr_powerpc,
+
+  k_num_registers_powerpc,
+  k_num_gpr_registers_powerpc = k_last_gpr_powerpc - k_first_gpr_powerpc + 1,
+  k_num_fpr_registers_powerpc = k_last_fpr - k_first_fpr + 1,
+  k_num_vmx_registers_powerpc = k_last_vmx - k_first_vmx + 1,
 };
 
-class RegisterContextPOSIX_powerpc
-  : public lldb_private::RegisterContext
-{
+class RegisterContextPOSIX_powerpc : public lldb_private::RegisterContext {
 public:
-    RegisterContextPOSIX_powerpc (lldb_private::Thread &thread,
-                            uint32_t concrete_frame_idx,
-                            lldb_private::RegisterInfoInterface *register_info);
+  RegisterContextPOSIX_powerpc(
+      lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+      lldb_private::RegisterInfoInterface *register_info);
 
-    ~RegisterContextPOSIX_powerpc() override;
+  ~RegisterContextPOSIX_powerpc() override;
 
-    void
-    Invalidate();
+  void Invalidate();
 
-    void
-    InvalidateAllRegisters() override;
+  void InvalidateAllRegisters() override;
 
-    size_t
-    GetRegisterCount() override;
+  size_t GetRegisterCount() override;
 
-    virtual size_t
-    GetGPRSize();
+  virtual size_t GetGPRSize();
 
-    virtual unsigned
-    GetRegisterSize(unsigned reg);
+  virtual unsigned GetRegisterSize(unsigned reg);
 
-    virtual unsigned
-    GetRegisterOffset(unsigned reg);
+  virtual unsigned GetRegisterOffset(unsigned reg);
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
 
-    size_t
-    GetRegisterSetCount() override;
+  size_t GetRegisterSetCount() override;
 
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t set) override;
+  const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
 
-    const char *
-    GetRegisterName(unsigned reg);
+  const char *GetRegisterName(unsigned reg);
 
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
 
 protected:
-    uint64_t m_gpr_powerpc[k_num_gpr_registers_powerpc];         // general purpose registers.
-    uint64_t m_fpr_powerpc[k_num_fpr_registers_powerpc];         // floating point registers.
-    uint32_t m_vmx_powerpc[k_num_vmx_registers_powerpc][4];
-    std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
+  uint64_t
+      m_gpr_powerpc[k_num_gpr_registers_powerpc]; // general purpose registers.
+  uint64_t
+      m_fpr_powerpc[k_num_fpr_registers_powerpc]; // floating point registers.
+  uint32_t m_vmx_powerpc[k_num_vmx_registers_powerpc][4];
+  std::unique_ptr<lldb_private::RegisterInfoInterface>
+      m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
 
-    // Determines if an extended register set is supported on the processor running the inferior process.
-    virtual bool
-    IsRegisterSetAvailable(size_t set_index);
+  // Determines if an extended register set is supported on the processor
+  // running the inferior process.
+  virtual bool IsRegisterSetAvailable(size_t set_index);
 
-    virtual const lldb_private::RegisterInfo *
-    GetRegisterInfo();
+  virtual const lldb_private::RegisterInfo *GetRegisterInfo();
 
-    bool
-    IsGPR(unsigned reg);
+  bool IsGPR(unsigned reg);
 
-    bool
-    IsFPR(unsigned reg);
+  bool IsFPR(unsigned reg);
 
-    bool
-    IsVMX(unsigned reg);
+  bool IsVMX(unsigned reg);
 
-    lldb::ByteOrder GetByteOrder();
+  lldb::ByteOrder GetByteOrder();
 
-    virtual bool ReadGPR() = 0;
-    virtual bool ReadFPR() = 0;
-    virtual bool ReadVMX() = 0;
-    virtual bool WriteGPR() = 0;
-    virtual bool WriteFPR() = 0;
-    virtual bool WriteVMX() = 0;
+  virtual bool ReadGPR() = 0;
+  virtual bool ReadFPR() = 0;
+  virtual bool ReadVMX() = 0;
+  virtual bool WriteGPR() = 0;
+  virtual bool WriteFPR() = 0;
+  virtual bool WriteVMX() = 0;
 };
 
 #endif // liblldb_RegisterContextPOSIX_powerpc_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.cpp
index 960be50..e4dbe33 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.cpp
@@ -1,4 +1,4 @@
-//===-- RegisterContextPOSIX_x86.cpp ----------------------------*- C++ -*-===//
+//===-- RegisterContextPOSIX_s390x.cpp --------------------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -21,245 +21,172 @@
 #include "lldb/Target/Thread.h"
 #include "llvm/Support/Compiler.h"
 
-#include "RegisterContext_s390x.h"
 #include "RegisterContextPOSIX_s390x.h"
+#include "RegisterContext_s390x.h"
 
 using namespace lldb_private;
 using namespace lldb;
 
 // s390x 64-bit general purpose registers.
-static const uint32_t g_gpr_regnums_s390x[] =
-{
-    lldb_r0_s390x,
-    lldb_r1_s390x,
-    lldb_r2_s390x,
-    lldb_r3_s390x,
-    lldb_r4_s390x,
-    lldb_r5_s390x,
-    lldb_r6_s390x,
-    lldb_r7_s390x,
-    lldb_r8_s390x,
-    lldb_r9_s390x,
-    lldb_r10_s390x,
-    lldb_r11_s390x,
-    lldb_r12_s390x,
-    lldb_r13_s390x,
-    lldb_r14_s390x,
-    lldb_r15_s390x,
-    lldb_acr0_s390x,
-    lldb_acr1_s390x,
-    lldb_acr2_s390x,
-    lldb_acr3_s390x,
-    lldb_acr4_s390x,
-    lldb_acr5_s390x,
-    lldb_acr6_s390x,
-    lldb_acr7_s390x,
-    lldb_acr8_s390x,
-    lldb_acr9_s390x,
-    lldb_acr10_s390x,
-    lldb_acr11_s390x,
-    lldb_acr12_s390x,
-    lldb_acr13_s390x,
-    lldb_acr14_s390x,
-    lldb_acr15_s390x,
-    lldb_pswm_s390x,
-    lldb_pswa_s390x,
+static const uint32_t g_gpr_regnums_s390x[] = {
+    lldb_r0_s390x,      lldb_r1_s390x,    lldb_r2_s390x,    lldb_r3_s390x,
+    lldb_r4_s390x,      lldb_r5_s390x,    lldb_r6_s390x,    lldb_r7_s390x,
+    lldb_r8_s390x,      lldb_r9_s390x,    lldb_r10_s390x,   lldb_r11_s390x,
+    lldb_r12_s390x,     lldb_r13_s390x,   lldb_r14_s390x,   lldb_r15_s390x,
+    lldb_acr0_s390x,    lldb_acr1_s390x,  lldb_acr2_s390x,  lldb_acr3_s390x,
+    lldb_acr4_s390x,    lldb_acr5_s390x,  lldb_acr6_s390x,  lldb_acr7_s390x,
+    lldb_acr8_s390x,    lldb_acr9_s390x,  lldb_acr10_s390x, lldb_acr11_s390x,
+    lldb_acr12_s390x,   lldb_acr13_s390x, lldb_acr14_s390x, lldb_acr15_s390x,
+    lldb_pswm_s390x,    lldb_pswa_s390x,
     LLDB_INVALID_REGNUM // register sets need to end with this flag
 };
-static_assert((sizeof(g_gpr_regnums_s390x) / sizeof(g_gpr_regnums_s390x[0])) - 1 == k_num_gpr_registers_s390x,
+static_assert((sizeof(g_gpr_regnums_s390x) / sizeof(g_gpr_regnums_s390x[0])) -
+                      1 ==
+                  k_num_gpr_registers_s390x,
               "g_gpr_regnums_s390x has wrong number of register infos");
 
 // s390x 64-bit floating point registers.
-static const uint32_t g_fpu_regnums_s390x[] =
-{
-    lldb_f0_s390x,
-    lldb_f1_s390x,
-    lldb_f2_s390x,
-    lldb_f3_s390x,
-    lldb_f4_s390x,
-    lldb_f5_s390x,
-    lldb_f6_s390x,
-    lldb_f7_s390x,
-    lldb_f8_s390x,
-    lldb_f9_s390x,
-    lldb_f10_s390x,
-    lldb_f11_s390x,
-    lldb_f12_s390x,
-    lldb_f13_s390x,
-    lldb_f14_s390x,
-    lldb_f15_s390x,
+static const uint32_t g_fpu_regnums_s390x[] = {
+    lldb_f0_s390x,      lldb_f1_s390x,  lldb_f2_s390x,  lldb_f3_s390x,
+    lldb_f4_s390x,      lldb_f5_s390x,  lldb_f6_s390x,  lldb_f7_s390x,
+    lldb_f8_s390x,      lldb_f9_s390x,  lldb_f10_s390x, lldb_f11_s390x,
+    lldb_f12_s390x,     lldb_f13_s390x, lldb_f14_s390x, lldb_f15_s390x,
     lldb_fpc_s390x,
     LLDB_INVALID_REGNUM // register sets need to end with this flag
 };
-static_assert((sizeof(g_fpu_regnums_s390x) / sizeof(g_fpu_regnums_s390x[0])) - 1 == k_num_fpr_registers_s390x,
+static_assert((sizeof(g_fpu_regnums_s390x) / sizeof(g_fpu_regnums_s390x[0])) -
+                      1 ==
+                  k_num_fpr_registers_s390x,
               "g_fpu_regnums_s390x has wrong number of register infos");
 
 // Number of register sets provided by this context.
-enum
-{
-    k_num_register_sets = 2
-};
+enum { k_num_register_sets = 2 };
 
 // Register sets for s390x 64-bit.
-static const RegisterSet g_reg_sets_s390x[k_num_register_sets] =
-{
-    { "General Purpose Registers", "gpr", k_num_gpr_registers_s390x, g_gpr_regnums_s390x },
-    { "Floating Point Registers", "fpr", k_num_fpr_registers_s390x, g_fpu_regnums_s390x },
+static const RegisterSet g_reg_sets_s390x[k_num_register_sets] = {
+    {"General Purpose Registers", "gpr", k_num_gpr_registers_s390x,
+     g_gpr_regnums_s390x},
+    {"Floating Point Registers", "fpr", k_num_fpr_registers_s390x,
+     g_fpu_regnums_s390x},
 };
 
-bool
-RegisterContextPOSIX_s390x::IsGPR(unsigned reg)
-{
-    return reg <= m_reg_info.last_gpr; // GPRs come first.
+bool RegisterContextPOSIX_s390x::IsGPR(unsigned reg) {
+  return reg <= m_reg_info.last_gpr; // GPRs come first.
 }
 
-bool
-RegisterContextPOSIX_s390x::IsFPR(unsigned reg)
-{
-    return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
+bool RegisterContextPOSIX_s390x::IsFPR(unsigned reg) {
+  return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
 }
 
-RegisterContextPOSIX_s390x::RegisterContextPOSIX_s390x(Thread &thread, uint32_t concrete_frame_idx,
-                                                       RegisterInfoInterface *register_info)
-    : RegisterContext(thread, concrete_frame_idx)
-{
-    m_register_info_ap.reset(register_info);
+RegisterContextPOSIX_s390x::RegisterContextPOSIX_s390x(
+    Thread &thread, uint32_t concrete_frame_idx,
+    RegisterInfoInterface *register_info)
+    : RegisterContext(thread, concrete_frame_idx) {
+  m_register_info_ap.reset(register_info);
 
-    switch (register_info->m_target_arch.GetMachine())
-    {
-        case llvm::Triple::systemz:
-            m_reg_info.num_registers = k_num_registers_s390x;
-            m_reg_info.num_gpr_registers = k_num_gpr_registers_s390x;
-            m_reg_info.num_fpr_registers = k_num_fpr_registers_s390x;
-            m_reg_info.last_gpr = k_last_gpr_s390x;
-            m_reg_info.first_fpr = k_first_fpr_s390x;
-            m_reg_info.last_fpr = k_last_fpr_s390x;
-            break;
-        default:
-            assert(false && "Unhandled target architecture.");
-            break;
-    }
+  switch (register_info->m_target_arch.GetMachine()) {
+  case llvm::Triple::systemz:
+    m_reg_info.num_registers = k_num_registers_s390x;
+    m_reg_info.num_gpr_registers = k_num_gpr_registers_s390x;
+    m_reg_info.num_fpr_registers = k_num_fpr_registers_s390x;
+    m_reg_info.last_gpr = k_last_gpr_s390x;
+    m_reg_info.first_fpr = k_first_fpr_s390x;
+    m_reg_info.last_fpr = k_last_fpr_s390x;
+    break;
+  default:
+    assert(false && "Unhandled target architecture.");
+    break;
+  }
 }
 
-RegisterContextPOSIX_s390x::~RegisterContextPOSIX_s390x()
-{
-}
+RegisterContextPOSIX_s390x::~RegisterContextPOSIX_s390x() {}
 
-void
-RegisterContextPOSIX_s390x::Invalidate()
-{
-}
+void RegisterContextPOSIX_s390x::Invalidate() {}
 
-void
-RegisterContextPOSIX_s390x::InvalidateAllRegisters()
-{
-}
+void RegisterContextPOSIX_s390x::InvalidateAllRegisters() {}
 
-const RegisterInfo *
-RegisterContextPOSIX_s390x::GetRegisterInfo()
-{
-    return m_register_info_ap->GetRegisterInfo();
+const RegisterInfo *RegisterContextPOSIX_s390x::GetRegisterInfo() {
+  return m_register_info_ap->GetRegisterInfo();
 }
 
 const RegisterInfo *
-RegisterContextPOSIX_s390x::GetRegisterInfoAtIndex(size_t reg)
-{
-    if (reg < m_reg_info.num_registers)
-        return &GetRegisterInfo()[reg];
-    else
-        return NULL;
+RegisterContextPOSIX_s390x::GetRegisterInfoAtIndex(size_t reg) {
+  if (reg < m_reg_info.num_registers)
+    return &GetRegisterInfo()[reg];
+  else
+    return NULL;
 }
 
-size_t
-RegisterContextPOSIX_s390x::GetRegisterCount()
-{
-    return m_reg_info.num_registers;
+size_t RegisterContextPOSIX_s390x::GetRegisterCount() {
+  return m_reg_info.num_registers;
 }
 
-unsigned
-RegisterContextPOSIX_s390x::GetRegisterOffset(unsigned reg)
-{
-    assert(reg < m_reg_info.num_registers && "Invalid register number.");
-    return GetRegisterInfo()[reg].byte_offset;
+unsigned RegisterContextPOSIX_s390x::GetRegisterOffset(unsigned reg) {
+  assert(reg < m_reg_info.num_registers && "Invalid register number.");
+  return GetRegisterInfo()[reg].byte_offset;
 }
 
-unsigned
-RegisterContextPOSIX_s390x::GetRegisterSize(unsigned reg)
-{
-    assert(reg < m_reg_info.num_registers && "Invalid register number.");
-    return GetRegisterInfo()[reg].byte_size;
+unsigned RegisterContextPOSIX_s390x::GetRegisterSize(unsigned reg) {
+  assert(reg < m_reg_info.num_registers && "Invalid register number.");
+  return GetRegisterInfo()[reg].byte_size;
 }
 
-const char *
-RegisterContextPOSIX_s390x::GetRegisterName(unsigned reg)
-{
-    assert(reg < m_reg_info.num_registers && "Invalid register offset.");
-    return GetRegisterInfo()[reg].name;
+const char *RegisterContextPOSIX_s390x::GetRegisterName(unsigned reg) {
+  assert(reg < m_reg_info.num_registers && "Invalid register offset.");
+  return GetRegisterInfo()[reg].name;
 }
 
-bool
-RegisterContextPOSIX_s390x::IsRegisterSetAvailable(size_t set_index)
-{
-    return set_index < k_num_register_sets;
+bool RegisterContextPOSIX_s390x::IsRegisterSetAvailable(size_t set_index) {
+  return set_index < k_num_register_sets;
 }
 
-size_t
-RegisterContextPOSIX_s390x::GetRegisterSetCount()
-{
-    size_t sets = 0;
-    for (size_t set = 0; set < k_num_register_sets; ++set)
-    {
-        if (IsRegisterSetAvailable(set))
-            ++sets;
-    }
+size_t RegisterContextPOSIX_s390x::GetRegisterSetCount() {
+  size_t sets = 0;
+  for (size_t set = 0; set < k_num_register_sets; ++set) {
+    if (IsRegisterSetAvailable(set))
+      ++sets;
+  }
 
-    return sets;
+  return sets;
 }
 
-const RegisterSet *
-RegisterContextPOSIX_s390x::GetRegisterSet(size_t set)
-{
-    if (IsRegisterSetAvailable(set))
-    {
-        switch (m_register_info_ap->m_target_arch.GetMachine())
-        {
-            case llvm::Triple::systemz:
-                return &g_reg_sets_s390x[set];
-            default:
-                assert(false && "Unhandled target architecture.");
-                return NULL;
-        }
+const RegisterSet *RegisterContextPOSIX_s390x::GetRegisterSet(size_t set) {
+  if (IsRegisterSetAvailable(set)) {
+    switch (m_register_info_ap->m_target_arch.GetMachine()) {
+    case llvm::Triple::systemz:
+      return &g_reg_sets_s390x[set];
+    default:
+      assert(false && "Unhandled target architecture.");
+      return NULL;
     }
-    return NULL;
+  }
+  return NULL;
 }
 
-lldb::ByteOrder
-RegisterContextPOSIX_s390x::GetByteOrder()
-{
-    // Get the target process whose privileged thread was used for the register read.
-    lldb::ByteOrder byte_order = eByteOrderInvalid;
-    Process *process = CalculateProcess().get();
+lldb::ByteOrder RegisterContextPOSIX_s390x::GetByteOrder() {
+  // Get the target process whose privileged thread was used for the register
+  // read.
+  lldb::ByteOrder byte_order = eByteOrderInvalid;
+  Process *process = CalculateProcess().get();
 
-    if (process)
-        byte_order = process->GetByteOrder();
-    return byte_order;
+  if (process)
+    byte_order = process->GetByteOrder();
+  return byte_order;
 }
 
 // Used when parsing DWARF and EH frame information and any other
 // object file sections that contain register numbers in them.
-uint32_t
-RegisterContextPOSIX_s390x::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num)
-{
-    const uint32_t num_regs = GetRegisterCount();
+uint32_t RegisterContextPOSIX_s390x::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t num) {
+  const uint32_t num_regs = GetRegisterCount();
 
-    assert(kind < kNumRegisterKinds);
-    for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
-    {
-        const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg_idx);
+  assert(kind < kNumRegisterKinds);
+  for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
+    const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg_idx);
 
-        if (reg_info->kinds[kind] == num)
-            return reg_idx;
-    }
+    if (reg_info->kinds[kind] == num)
+      return reg_idx;
+  }
 
-    return LLDB_INVALID_REGNUM;
+  return LLDB_INVALID_REGNUM;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.h
index 4904b28..1ffc45c 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.h
@@ -14,90 +14,71 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
-#include "lldb/Core/Log.h"
-#include "lldb/Target/RegisterContext.h"
-#include "RegisterInfoInterface.h"
 #include "RegisterContext_s390x.h"
+#include "RegisterInfoInterface.h"
 #include "lldb-s390x-register-enums.h"
+#include "lldb/Core/Log.h"
+#include "lldb/Target/RegisterContext.h"
 
 class ProcessMonitor;
 
-class RegisterContextPOSIX_s390x : public lldb_private::RegisterContext
-{
+class RegisterContextPOSIX_s390x : public lldb_private::RegisterContext {
 public:
-    RegisterContextPOSIX_s390x(lldb_private::Thread &thread, uint32_t concrete_frame_idx,
-                               lldb_private::RegisterInfoInterface *register_info);
+  RegisterContextPOSIX_s390x(
+      lldb_private::Thread &thread, uint32_t concrete_frame_idx,
+      lldb_private::RegisterInfoInterface *register_info);
 
-    ~RegisterContextPOSIX_s390x() override;
+  ~RegisterContextPOSIX_s390x() override;
 
-    void
-    Invalidate();
+  void Invalidate();
 
-    void
-    InvalidateAllRegisters() override;
+  void InvalidateAllRegisters() override;
 
-    size_t
-    GetRegisterCount() override;
+  size_t GetRegisterCount() override;
 
-    virtual unsigned
-    GetRegisterSize(unsigned reg);
+  virtual unsigned GetRegisterSize(unsigned reg);
 
-    virtual unsigned
-    GetRegisterOffset(unsigned reg);
+  virtual unsigned GetRegisterOffset(unsigned reg);
 
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
 
-    size_t
-    GetRegisterSetCount() override;
+  size_t GetRegisterSetCount() override;
 
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t set) override;
+  const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
 
-    const char *
-    GetRegisterName(unsigned reg);
+  const char *GetRegisterName(unsigned reg);
 
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
 
 protected:
-    struct RegInfo
-    {
-        uint32_t num_registers;
-        uint32_t num_gpr_registers;
-        uint32_t num_fpr_registers;
-
-        uint32_t last_gpr;
-        uint32_t first_fpr;
-        uint32_t last_fpr;
-    };
-
-    RegInfo m_reg_info;
-    std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap;
-
-    virtual bool
-    IsRegisterSetAvailable(size_t set_index);
-
-    virtual const lldb_private::RegisterInfo *
-    GetRegisterInfo();
-
-    bool
-    IsGPR(unsigned reg);
-
-    bool
-    IsFPR(unsigned reg);
-
-    lldb::ByteOrder
-    GetByteOrder();
-
-    virtual bool
-    ReadGPR() = 0;
-    virtual bool
-    ReadFPR() = 0;
-    virtual bool
-    WriteGPR() = 0;
-    virtual bool
-    WriteFPR() = 0;
+  struct RegInfo {
+    uint32_t num_registers;
+    uint32_t num_gpr_registers;
+    uint32_t num_fpr_registers;
+
+    uint32_t last_gpr;
+    uint32_t first_fpr;
+    uint32_t last_fpr;
+  };
+
+  RegInfo m_reg_info;
+  std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap;
+
+  virtual bool IsRegisterSetAvailable(size_t set_index);
+
+  virtual const lldb_private::RegisterInfo *GetRegisterInfo();
+
+  bool IsGPR(unsigned reg);
+
+  bool IsFPR(unsigned reg);
+
+  lldb::ByteOrder GetByteOrder();
+
+  virtual bool ReadGPR() = 0;
+  virtual bool ReadFPR() = 0;
+  virtual bool WriteGPR() = 0;
+  virtual bool WriteFPR() = 0;
 };
 
 #endif // liblldb_RegisterContextPOSIX_s390x_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp
index 77b6385..99525b6 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp
@@ -15,187 +15,94 @@
 #include "lldb/Core/DataExtractor.h"
 #include "lldb/Core/RegisterValue.h"
 #include "lldb/Core/Scalar.h"
+#include "lldb/Host/Endian.h"
 #include "lldb/Target/Target.h"
 #include "lldb/Target/Thread.h"
-#include "lldb/Host/Endian.h"
+#include "lldb/Target/Process.h"
 #include "llvm/Support/Compiler.h"
 
-#include "RegisterContext_x86.h"
 #include "RegisterContextPOSIX_x86.h"
-#include "Plugins/Process/elf-core/ProcessElfCore.h"
+#include "RegisterContext_x86.h"
 
 using namespace lldb_private;
 using namespace lldb;
 
-const uint32_t
-g_gpr_regnums_i386[] =
-{
-    lldb_eax_i386,
-    lldb_ebx_i386,
-    lldb_ecx_i386,
-    lldb_edx_i386,
-    lldb_edi_i386,
-    lldb_esi_i386,
-    lldb_ebp_i386,
-    lldb_esp_i386,
-    lldb_eip_i386,
-    lldb_eflags_i386,
-    lldb_cs_i386,
-    lldb_fs_i386,
-    lldb_gs_i386,
-    lldb_ss_i386,
-    lldb_ds_i386,
-    lldb_es_i386,
-    lldb_ax_i386,
-    lldb_bx_i386,
-    lldb_cx_i386,
-    lldb_dx_i386,
-    lldb_di_i386,
-    lldb_si_i386,
-    lldb_bp_i386,
-    lldb_sp_i386,
-    lldb_ah_i386,
-    lldb_bh_i386,
-    lldb_ch_i386,
-    lldb_dh_i386,
-    lldb_al_i386,
-    lldb_bl_i386,
-    lldb_cl_i386,
-    lldb_dl_i386,
-    LLDB_INVALID_REGNUM, // Register sets must be terminated with LLDB_INVALID_REGNUM.
+const uint32_t g_gpr_regnums_i386[] = {
+    lldb_eax_i386,       lldb_ebx_i386,    lldb_ecx_i386, lldb_edx_i386,
+    lldb_edi_i386,       lldb_esi_i386,    lldb_ebp_i386, lldb_esp_i386,
+    lldb_eip_i386,       lldb_eflags_i386, lldb_cs_i386,  lldb_fs_i386,
+    lldb_gs_i386,        lldb_ss_i386,     lldb_ds_i386,  lldb_es_i386,
+    lldb_ax_i386,        lldb_bx_i386,     lldb_cx_i386,  lldb_dx_i386,
+    lldb_di_i386,        lldb_si_i386,     lldb_bp_i386,  lldb_sp_i386,
+    lldb_ah_i386,        lldb_bh_i386,     lldb_ch_i386,  lldb_dh_i386,
+    lldb_al_i386,        lldb_bl_i386,     lldb_cl_i386,  lldb_dl_i386,
+    LLDB_INVALID_REGNUM, // Register sets must be terminated with
+                         // LLDB_INVALID_REGNUM.
 };
-static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) - 1 == k_num_gpr_registers_i386,
-    "g_gpr_regnums_i386 has wrong number of register infos");
-
-const uint32_t
-g_lldb_regnums_i386[] =
-{
-    lldb_fctrl_i386,
-    lldb_fstat_i386,
-    lldb_ftag_i386,
-    lldb_fop_i386,
-    lldb_fiseg_i386,
-    lldb_fioff_i386,
-    lldb_foseg_i386,
-    lldb_fooff_i386,
-    lldb_mxcsr_i386,
-    lldb_mxcsrmask_i386,
-    lldb_st0_i386,
-    lldb_st1_i386,
-    lldb_st2_i386,
-    lldb_st3_i386,
-    lldb_st4_i386,
-    lldb_st5_i386,
-    lldb_st6_i386,
-    lldb_st7_i386,
-    lldb_mm0_i386,
-    lldb_mm1_i386,
-    lldb_mm2_i386,
-    lldb_mm3_i386,
-    lldb_mm4_i386,
-    lldb_mm5_i386,
-    lldb_mm6_i386,
-    lldb_mm7_i386,
-    lldb_xmm0_i386,
-    lldb_xmm1_i386,
-    lldb_xmm2_i386,
-    lldb_xmm3_i386,
-    lldb_xmm4_i386,
-    lldb_xmm5_i386,
-    lldb_xmm6_i386,
-    lldb_xmm7_i386,
-    LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
+static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) -
+                      1 ==
+                  k_num_gpr_registers_i386,
+              "g_gpr_regnums_i386 has wrong number of register infos");
+
+const uint32_t g_lldb_regnums_i386[] = {
+    lldb_fctrl_i386,    lldb_fstat_i386,     lldb_ftag_i386,  lldb_fop_i386,
+    lldb_fiseg_i386,    lldb_fioff_i386,     lldb_foseg_i386, lldb_fooff_i386,
+    lldb_mxcsr_i386,    lldb_mxcsrmask_i386, lldb_st0_i386,   lldb_st1_i386,
+    lldb_st2_i386,      lldb_st3_i386,       lldb_st4_i386,   lldb_st5_i386,
+    lldb_st6_i386,      lldb_st7_i386,       lldb_mm0_i386,   lldb_mm1_i386,
+    lldb_mm2_i386,      lldb_mm3_i386,       lldb_mm4_i386,   lldb_mm5_i386,
+    lldb_mm6_i386,      lldb_mm7_i386,       lldb_xmm0_i386,  lldb_xmm1_i386,
+    lldb_xmm2_i386,     lldb_xmm3_i386,      lldb_xmm4_i386,  lldb_xmm5_i386,
+    lldb_xmm6_i386,     lldb_xmm7_i386,
+    LLDB_INVALID_REGNUM // Register sets must be terminated with
+                        // LLDB_INVALID_REGNUM.
 };
-static_assert((sizeof(g_lldb_regnums_i386) / sizeof(g_lldb_regnums_i386[0])) - 1 == k_num_fpr_registers_i386,
-    "g_lldb_regnums_i386 has wrong number of register infos");
-
-const uint32_t
-g_avx_regnums_i386[] =
-{
-    lldb_ymm0_i386,
-    lldb_ymm1_i386,
-    lldb_ymm2_i386,
-    lldb_ymm3_i386,
-    lldb_ymm4_i386,
-    lldb_ymm5_i386,
-    lldb_ymm6_i386,
-    lldb_ymm7_i386,
-    LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
+static_assert((sizeof(g_lldb_regnums_i386) / sizeof(g_lldb_regnums_i386[0])) -
+                      1 ==
+                  k_num_fpr_registers_i386,
+              "g_lldb_regnums_i386 has wrong number of register infos");
+
+const uint32_t g_avx_regnums_i386[] = {
+    lldb_ymm0_i386,     lldb_ymm1_i386, lldb_ymm2_i386, lldb_ymm3_i386,
+    lldb_ymm4_i386,     lldb_ymm5_i386, lldb_ymm6_i386, lldb_ymm7_i386,
+    LLDB_INVALID_REGNUM // Register sets must be terminated with
+                        // LLDB_INVALID_REGNUM.
 };
-static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) - 1 == k_num_avx_registers_i386,
-    " g_avx_regnums_i386 has wrong number of register infos");
-
-static const
-uint32_t g_gpr_regnums_x86_64[] =
-{
-    lldb_rax_x86_64,
-    lldb_rbx_x86_64,
-    lldb_rcx_x86_64,
-    lldb_rdx_x86_64,
-    lldb_rdi_x86_64,
-    lldb_rsi_x86_64,
-    lldb_rbp_x86_64,
-    lldb_rsp_x86_64,
-    lldb_r8_x86_64,
-    lldb_r9_x86_64,
-    lldb_r10_x86_64,
-    lldb_r11_x86_64,
-    lldb_r12_x86_64,
-    lldb_r13_x86_64,
-    lldb_r14_x86_64,
-    lldb_r15_x86_64,
-    lldb_rip_x86_64,
-    lldb_rflags_x86_64,
-    lldb_cs_x86_64,
-    lldb_fs_x86_64,
-    lldb_gs_x86_64,
-    lldb_ss_x86_64,
-    lldb_ds_x86_64,
-    lldb_es_x86_64,
-    lldb_eax_x86_64,
-    lldb_ebx_x86_64,
-    lldb_ecx_x86_64,
-    lldb_edx_x86_64,
-    lldb_edi_x86_64,
-    lldb_esi_x86_64,
-    lldb_ebp_x86_64,
-    lldb_esp_x86_64,
-    lldb_r8d_x86_64,    // Low 32 bits or r8
-    lldb_r9d_x86_64,    // Low 32 bits or r9
-    lldb_r10d_x86_64,   // Low 32 bits or r10
-    lldb_r11d_x86_64,   // Low 32 bits or r11
-    lldb_r12d_x86_64,   // Low 32 bits or r12
-    lldb_r13d_x86_64,   // Low 32 bits or r13
-    lldb_r14d_x86_64,   // Low 32 bits or r14
-    lldb_r15d_x86_64,   // Low 32 bits or r15
-    lldb_ax_x86_64,
-    lldb_bx_x86_64,
-    lldb_cx_x86_64,
-    lldb_dx_x86_64,
-    lldb_di_x86_64,
-    lldb_si_x86_64,
-    lldb_bp_x86_64,
-    lldb_sp_x86_64,
-    lldb_r8w_x86_64,    // Low 16 bits or r8
-    lldb_r9w_x86_64,    // Low 16 bits or r9
-    lldb_r10w_x86_64,   // Low 16 bits or r10
-    lldb_r11w_x86_64,   // Low 16 bits or r11
-    lldb_r12w_x86_64,   // Low 16 bits or r12
-    lldb_r13w_x86_64,   // Low 16 bits or r13
-    lldb_r14w_x86_64,   // Low 16 bits or r14
-    lldb_r15w_x86_64,   // Low 16 bits or r15
-    lldb_ah_x86_64,
-    lldb_bh_x86_64,
-    lldb_ch_x86_64,
-    lldb_dh_x86_64,
-    lldb_al_x86_64,
-    lldb_bl_x86_64,
-    lldb_cl_x86_64,
-    lldb_dl_x86_64,
-    lldb_dil_x86_64,
-    lldb_sil_x86_64,
-    lldb_bpl_x86_64,
-    lldb_spl_x86_64,
+static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) -
+                      1 ==
+                  k_num_avx_registers_i386,
+              " g_avx_regnums_i386 has wrong number of register infos");
+
+static const uint32_t g_gpr_regnums_x86_64[] = {
+    lldb_rax_x86_64,    lldb_rbx_x86_64,    lldb_rcx_x86_64, lldb_rdx_x86_64,
+    lldb_rdi_x86_64,    lldb_rsi_x86_64,    lldb_rbp_x86_64, lldb_rsp_x86_64,
+    lldb_r8_x86_64,     lldb_r9_x86_64,     lldb_r10_x86_64, lldb_r11_x86_64,
+    lldb_r12_x86_64,    lldb_r13_x86_64,    lldb_r14_x86_64, lldb_r15_x86_64,
+    lldb_rip_x86_64,    lldb_rflags_x86_64, lldb_cs_x86_64,  lldb_fs_x86_64,
+    lldb_gs_x86_64,     lldb_ss_x86_64,     lldb_ds_x86_64,  lldb_es_x86_64,
+    lldb_eax_x86_64,    lldb_ebx_x86_64,    lldb_ecx_x86_64, lldb_edx_x86_64,
+    lldb_edi_x86_64,    lldb_esi_x86_64,    lldb_ebp_x86_64, lldb_esp_x86_64,
+    lldb_r8d_x86_64,  // Low 32 bits or r8
+    lldb_r9d_x86_64,  // Low 32 bits or r9
+    lldb_r10d_x86_64, // Low 32 bits or r10
+    lldb_r11d_x86_64, // Low 32 bits or r11
+    lldb_r12d_x86_64, // Low 32 bits or r12
+    lldb_r13d_x86_64, // Low 32 bits or r13
+    lldb_r14d_x86_64, // Low 32 bits or r14
+    lldb_r15d_x86_64, // Low 32 bits or r15
+    lldb_ax_x86_64,     lldb_bx_x86_64,     lldb_cx_x86_64,  lldb_dx_x86_64,
+    lldb_di_x86_64,     lldb_si_x86_64,     lldb_bp_x86_64,  lldb_sp_x86_64,
+    lldb_r8w_x86_64,  // Low 16 bits or r8
+    lldb_r9w_x86_64,  // Low 16 bits or r9
+    lldb_r10w_x86_64, // Low 16 bits or r10
+    lldb_r11w_x86_64, // Low 16 bits or r11
+    lldb_r12w_x86_64, // Low 16 bits or r12
+    lldb_r13w_x86_64, // Low 16 bits or r13
+    lldb_r14w_x86_64, // Low 16 bits or r14
+    lldb_r15w_x86_64, // Low 16 bits or r15
+    lldb_ah_x86_64,     lldb_bh_x86_64,     lldb_ch_x86_64,  lldb_dh_x86_64,
+    lldb_al_x86_64,     lldb_bl_x86_64,     lldb_cl_x86_64,  lldb_dl_x86_64,
+    lldb_dil_x86_64,    lldb_sil_x86_64,    lldb_bpl_x86_64, lldb_spl_x86_64,
     lldb_r8l_x86_64,    // Low 8 bits or r8
     lldb_r9l_x86_64,    // Low 8 bits or r9
     lldb_r10l_x86_64,   // Low 8 bits or r10
@@ -204,464 +111,445 @@ uint32_t g_gpr_regnums_x86_64[] =
     lldb_r13l_x86_64,   // Low 8 bits or r13
     lldb_r14l_x86_64,   // Low 8 bits or r14
     lldb_r15l_x86_64,   // Low 8 bits or r15
-    LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
+    LLDB_INVALID_REGNUM // Register sets must be terminated with
+                        // LLDB_INVALID_REGNUM.
 };
-static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) - 1 == k_num_gpr_registers_x86_64,
-    "g_gpr_regnums_x86_64 has wrong number of register infos");
-
-static const uint32_t
-g_lldb_regnums_x86_64[] =
-{
-    lldb_fctrl_x86_64,
-    lldb_fstat_x86_64,
-    lldb_ftag_x86_64,
-    lldb_fop_x86_64,
-    lldb_fiseg_x86_64,
-    lldb_fioff_x86_64,
-    lldb_foseg_x86_64,
-    lldb_fooff_x86_64,
-    lldb_mxcsr_x86_64,
-    lldb_mxcsrmask_x86_64,
-    lldb_st0_x86_64,
-    lldb_st1_x86_64,
-    lldb_st2_x86_64,
-    lldb_st3_x86_64,
-    lldb_st4_x86_64,
-    lldb_st5_x86_64,
-    lldb_st6_x86_64,
-    lldb_st7_x86_64,
-    lldb_mm0_x86_64,
-    lldb_mm1_x86_64,
-    lldb_mm2_x86_64,
-    lldb_mm3_x86_64,
-    lldb_mm4_x86_64,
-    lldb_mm5_x86_64,
-    lldb_mm6_x86_64,
-    lldb_mm7_x86_64,
-    lldb_xmm0_x86_64,
-    lldb_xmm1_x86_64,
-    lldb_xmm2_x86_64,
-    lldb_xmm3_x86_64,
-    lldb_xmm4_x86_64,
-    lldb_xmm5_x86_64,
-    lldb_xmm6_x86_64,
-    lldb_xmm7_x86_64,
-    lldb_xmm8_x86_64,
-    lldb_xmm9_x86_64,
-    lldb_xmm10_x86_64,
-    lldb_xmm11_x86_64,
-    lldb_xmm12_x86_64,
-    lldb_xmm13_x86_64,
-    lldb_xmm14_x86_64,
-    lldb_xmm15_x86_64,
-    LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
+static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) -
+                      1 ==
+                  k_num_gpr_registers_x86_64,
+              "g_gpr_regnums_x86_64 has wrong number of register infos");
+
+static const uint32_t g_lldb_regnums_x86_64[] = {
+    lldb_fctrl_x86_64,     lldb_fstat_x86_64, lldb_ftag_x86_64,
+    lldb_fop_x86_64,       lldb_fiseg_x86_64, lldb_fioff_x86_64,
+    lldb_foseg_x86_64,     lldb_fooff_x86_64, lldb_mxcsr_x86_64,
+    lldb_mxcsrmask_x86_64, lldb_st0_x86_64,   lldb_st1_x86_64,
+    lldb_st2_x86_64,       lldb_st3_x86_64,   lldb_st4_x86_64,
+    lldb_st5_x86_64,       lldb_st6_x86_64,   lldb_st7_x86_64,
+    lldb_mm0_x86_64,       lldb_mm1_x86_64,   lldb_mm2_x86_64,
+    lldb_mm3_x86_64,       lldb_mm4_x86_64,   lldb_mm5_x86_64,
+    lldb_mm6_x86_64,       lldb_mm7_x86_64,   lldb_xmm0_x86_64,
+    lldb_xmm1_x86_64,      lldb_xmm2_x86_64,  lldb_xmm3_x86_64,
+    lldb_xmm4_x86_64,      lldb_xmm5_x86_64,  lldb_xmm6_x86_64,
+    lldb_xmm7_x86_64,      lldb_xmm8_x86_64,  lldb_xmm9_x86_64,
+    lldb_xmm10_x86_64,     lldb_xmm11_x86_64, lldb_xmm12_x86_64,
+    lldb_xmm13_x86_64,     lldb_xmm14_x86_64, lldb_xmm15_x86_64,
+    LLDB_INVALID_REGNUM // Register sets must be terminated with
+                        // LLDB_INVALID_REGNUM.
 };
-static_assert((sizeof(g_lldb_regnums_x86_64) / sizeof(g_lldb_regnums_x86_64[0])) - 1 == k_num_fpr_registers_x86_64,
-    "g_lldb_regnums_x86_64 has wrong number of register infos");
-
-static const uint32_t
-g_avx_regnums_x86_64[] =
-{
-    lldb_ymm0_x86_64,
-    lldb_ymm1_x86_64,
-    lldb_ymm2_x86_64,
-    lldb_ymm3_x86_64,
-    lldb_ymm4_x86_64,
-    lldb_ymm5_x86_64,
-    lldb_ymm6_x86_64,
-    lldb_ymm7_x86_64,
-    lldb_ymm8_x86_64,
-    lldb_ymm9_x86_64,
-    lldb_ymm10_x86_64,
-    lldb_ymm11_x86_64,
-    lldb_ymm12_x86_64,
-    lldb_ymm13_x86_64,
-    lldb_ymm14_x86_64,
-    lldb_ymm15_x86_64,
-    LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
+static_assert((sizeof(g_lldb_regnums_x86_64) /
+               sizeof(g_lldb_regnums_x86_64[0])) -
+                      1 ==
+                  k_num_fpr_registers_x86_64,
+              "g_lldb_regnums_x86_64 has wrong number of register infos");
+
+static const uint32_t g_avx_regnums_x86_64[] = {
+    lldb_ymm0_x86_64,   lldb_ymm1_x86_64,  lldb_ymm2_x86_64,  lldb_ymm3_x86_64,
+    lldb_ymm4_x86_64,   lldb_ymm5_x86_64,  lldb_ymm6_x86_64,  lldb_ymm7_x86_64,
+    lldb_ymm8_x86_64,   lldb_ymm9_x86_64,  lldb_ymm10_x86_64, lldb_ymm11_x86_64,
+    lldb_ymm12_x86_64,  lldb_ymm13_x86_64, lldb_ymm14_x86_64, lldb_ymm15_x86_64,
+    LLDB_INVALID_REGNUM // Register sets must be terminated with
+                        // LLDB_INVALID_REGNUM.
 };
-static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) - 1 == k_num_avx_registers_x86_64,
-    "g_avx_regnums_x86_64 has wrong number of register infos");
-
-uint32_t RegisterContextPOSIX_x86::g_contained_eax[] = { lldb_eax_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_ebx[] = { lldb_ebx_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_ecx[] = { lldb_ecx_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_edx[] = { lldb_edx_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_edi[] = { lldb_edi_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_esi[] = { lldb_esi_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_ebp[] = { lldb_ebp_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_esp[] = { lldb_esp_i386, LLDB_INVALID_REGNUM };
-
-uint32_t RegisterContextPOSIX_x86::g_invalidate_eax[] = { lldb_eax_i386, lldb_ax_i386, lldb_ah_i386,  lldb_al_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_ebx[] = { lldb_ebx_i386, lldb_bx_i386, lldb_bh_i386,  lldb_bl_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_ecx[] = { lldb_ecx_i386, lldb_cx_i386, lldb_ch_i386,  lldb_cl_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_edx[] = { lldb_edx_i386, lldb_dx_i386, lldb_dh_i386,  lldb_dl_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_edi[] = { lldb_edi_i386, lldb_di_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_esi[] = { lldb_esi_i386, lldb_si_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_ebp[] = { lldb_ebp_i386, lldb_bp_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_esp[] = { lldb_esp_i386, lldb_sp_i386, LLDB_INVALID_REGNUM };
-
-uint32_t RegisterContextPOSIX_x86::g_contained_rax[] = { lldb_rax_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rbx[] = { lldb_rbx_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rcx[] = { lldb_rcx_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rdx[] = { lldb_rdx_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rdi[] = { lldb_rdi_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rsi[] = { lldb_rsi_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rbp[] = { lldb_rbp_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rsp[] = { lldb_rsp_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r8[]  = { lldb_r8_x86_64,  LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r9[]  = { lldb_r9_x86_64,  LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r10[] = { lldb_r10_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r11[] = { lldb_r11_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r12[] = { lldb_r12_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r13[] = { lldb_r13_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r14[] = { lldb_r14_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r15[] = { lldb_r15_x86_64, LLDB_INVALID_REGNUM };
-
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rax[] = { lldb_rax_x86_64, lldb_eax_x86_64,  lldb_ax_x86_64,   lldb_ah_x86_64,   lldb_al_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rbx[] = { lldb_rbx_x86_64, lldb_ebx_x86_64,  lldb_bx_x86_64,   lldb_bh_x86_64,   lldb_bl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rcx[] = { lldb_rcx_x86_64, lldb_ecx_x86_64,  lldb_cx_x86_64,   lldb_ch_x86_64,   lldb_cl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rdx[] = { lldb_rdx_x86_64, lldb_edx_x86_64,  lldb_dx_x86_64,   lldb_dh_x86_64,   lldb_dl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rdi[] = { lldb_rdi_x86_64, lldb_edi_x86_64,  lldb_di_x86_64,   lldb_dil_x86_64,  LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rsi[] = { lldb_rsi_x86_64, lldb_esi_x86_64,  lldb_si_x86_64,   lldb_sil_x86_64,  LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rbp[] = { lldb_rbp_x86_64, lldb_ebp_x86_64,  lldb_bp_x86_64,   lldb_bpl_x86_64,  LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rsp[] = { lldb_rsp_x86_64, lldb_esp_x86_64,  lldb_sp_x86_64,   lldb_spl_x86_64,  LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r8[]  = { lldb_r8_x86_64,  lldb_r8d_x86_64,  lldb_r8w_x86_64,  lldb_r8l_x86_64,  LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r9[]  = { lldb_r9_x86_64,  lldb_r9d_x86_64,  lldb_r9w_x86_64,  lldb_r9l_x86_64,  LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r10[] = { lldb_r10_x86_64, lldb_r10d_x86_64, lldb_r10w_x86_64, lldb_r10l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r11[] = { lldb_r11_x86_64, lldb_r11d_x86_64, lldb_r11w_x86_64, lldb_r11l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r12[] = { lldb_r12_x86_64, lldb_r12d_x86_64, lldb_r12w_x86_64, lldb_r12l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r13[] = { lldb_r13_x86_64, lldb_r13d_x86_64, lldb_r13w_x86_64, lldb_r13l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r14[] = { lldb_r14_x86_64, lldb_r14d_x86_64, lldb_r14w_x86_64, lldb_r14l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r15[] = { lldb_r15_x86_64, lldb_r15d_x86_64, lldb_r15w_x86_64, lldb_r15l_x86_64, LLDB_INVALID_REGNUM };
+static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) -
+                      1 ==
+                  k_num_avx_registers_x86_64,
+              "g_avx_regnums_x86_64 has wrong number of register infos");
+
+uint32_t RegisterContextPOSIX_x86::g_contained_eax[] = {lldb_eax_i386,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_ebx[] = {lldb_ebx_i386,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_ecx[] = {lldb_ecx_i386,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_edx[] = {lldb_edx_i386,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_edi[] = {lldb_edi_i386,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_esi[] = {lldb_esi_i386,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_ebp[] = {lldb_ebp_i386,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_esp[] = {lldb_esp_i386,
+                                                        LLDB_INVALID_REGNUM};
+
+uint32_t RegisterContextPOSIX_x86::g_invalidate_eax[] = {
+    lldb_eax_i386, lldb_ax_i386, lldb_ah_i386, lldb_al_i386,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_ebx[] = {
+    lldb_ebx_i386, lldb_bx_i386, lldb_bh_i386, lldb_bl_i386,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_ecx[] = {
+    lldb_ecx_i386, lldb_cx_i386, lldb_ch_i386, lldb_cl_i386,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_edx[] = {
+    lldb_edx_i386, lldb_dx_i386, lldb_dh_i386, lldb_dl_i386,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_edi[] = {
+    lldb_edi_i386, lldb_di_i386, LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_esi[] = {
+    lldb_esi_i386, lldb_si_i386, LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_ebp[] = {
+    lldb_ebp_i386, lldb_bp_i386, LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_esp[] = {
+    lldb_esp_i386, lldb_sp_i386, LLDB_INVALID_REGNUM};
+
+uint32_t RegisterContextPOSIX_x86::g_contained_rax[] = {lldb_rax_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rbx[] = {lldb_rbx_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rcx[] = {lldb_rcx_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rdx[] = {lldb_rdx_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rdi[] = {lldb_rdi_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rsi[] = {lldb_rsi_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rbp[] = {lldb_rbp_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_rsp[] = {lldb_rsp_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r8[] = {lldb_r8_x86_64,
+                                                       LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r9[] = {lldb_r9_x86_64,
+                                                       LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r10[] = {lldb_r10_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r11[] = {lldb_r11_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r12[] = {lldb_r12_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r13[] = {lldb_r13_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r14[] = {lldb_r14_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_contained_r15[] = {lldb_r15_x86_64,
+                                                        LLDB_INVALID_REGNUM};
+
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rax[] = {
+    lldb_rax_x86_64, lldb_eax_x86_64, lldb_ax_x86_64,
+    lldb_ah_x86_64,  lldb_al_x86_64,  LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rbx[] = {
+    lldb_rbx_x86_64, lldb_ebx_x86_64, lldb_bx_x86_64,
+    lldb_bh_x86_64,  lldb_bl_x86_64,  LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rcx[] = {
+    lldb_rcx_x86_64, lldb_ecx_x86_64, lldb_cx_x86_64,
+    lldb_ch_x86_64,  lldb_cl_x86_64,  LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rdx[] = {
+    lldb_rdx_x86_64, lldb_edx_x86_64, lldb_dx_x86_64,
+    lldb_dh_x86_64,  lldb_dl_x86_64,  LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rdi[] = {
+    lldb_rdi_x86_64, lldb_edi_x86_64, lldb_di_x86_64, lldb_dil_x86_64,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rsi[] = {
+    lldb_rsi_x86_64, lldb_esi_x86_64, lldb_si_x86_64, lldb_sil_x86_64,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rbp[] = {
+    lldb_rbp_x86_64, lldb_ebp_x86_64, lldb_bp_x86_64, lldb_bpl_x86_64,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rsp[] = {
+    lldb_rsp_x86_64, lldb_esp_x86_64, lldb_sp_x86_64, lldb_spl_x86_64,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r8[] = {
+    lldb_r8_x86_64, lldb_r8d_x86_64, lldb_r8w_x86_64, lldb_r8l_x86_64,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r9[] = {
+    lldb_r9_x86_64, lldb_r9d_x86_64, lldb_r9w_x86_64, lldb_r9l_x86_64,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r10[] = {
+    lldb_r10_x86_64, lldb_r10d_x86_64, lldb_r10w_x86_64, lldb_r10l_x86_64,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r11[] = {
+    lldb_r11_x86_64, lldb_r11d_x86_64, lldb_r11w_x86_64, lldb_r11l_x86_64,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r12[] = {
+    lldb_r12_x86_64, lldb_r12d_x86_64, lldb_r12w_x86_64, lldb_r12l_x86_64,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r13[] = {
+    lldb_r13_x86_64, lldb_r13d_x86_64, lldb_r13w_x86_64, lldb_r13l_x86_64,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r14[] = {
+    lldb_r14_x86_64, lldb_r14d_x86_64, lldb_r14w_x86_64, lldb_r14l_x86_64,
+    LLDB_INVALID_REGNUM};
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r15[] = {
+    lldb_r15_x86_64, lldb_r15d_x86_64, lldb_r15w_x86_64, lldb_r15l_x86_64,
+    LLDB_INVALID_REGNUM};
 
 // Number of register sets provided by this context.
-enum
-{
-    k_num_extended_register_sets = 1,
-    k_num_register_sets = 3
-};
-
-static const RegisterSet
-g_reg_sets_i386[k_num_register_sets] =
-{
-    { "General Purpose Registers",  "gpr", k_num_gpr_registers_i386, g_gpr_regnums_i386 },
-    { "Floating Point Registers",   "fpu", k_num_fpr_registers_i386, g_lldb_regnums_i386 },
-    { "Advanced Vector Extensions", "avx", k_num_avx_registers_i386, g_avx_regnums_i386 }
-};
-
-static const RegisterSet
-g_reg_sets_x86_64[k_num_register_sets] =
-{
-    { "General Purpose Registers",  "gpr", k_num_gpr_registers_x86_64, g_gpr_regnums_x86_64 },
-    { "Floating Point Registers",   "fpu", k_num_fpr_registers_x86_64, g_lldb_regnums_x86_64 },
-    { "Advanced Vector Extensions", "avx", k_num_avx_registers_x86_64, g_avx_regnums_x86_64 }
-};
-
-bool RegisterContextPOSIX_x86::IsGPR(unsigned reg)
-{
-    return reg <= m_reg_info.last_gpr;   // GPR's come first.
+enum { k_num_extended_register_sets = 1, k_num_register_sets = 3 };
+
+static const RegisterSet g_reg_sets_i386[k_num_register_sets] = {
+    {"General Purpose Registers", "gpr", k_num_gpr_registers_i386,
+     g_gpr_regnums_i386},
+    {"Floating Point Registers", "fpu", k_num_fpr_registers_i386,
+     g_lldb_regnums_i386},
+    {"Advanced Vector Extensions", "avx", k_num_avx_registers_i386,
+     g_avx_regnums_i386}};
+
+static const RegisterSet g_reg_sets_x86_64[k_num_register_sets] = {
+    {"General Purpose Registers", "gpr", k_num_gpr_registers_x86_64,
+     g_gpr_regnums_x86_64},
+    {"Floating Point Registers", "fpu", k_num_fpr_registers_x86_64,
+     g_lldb_regnums_x86_64},
+    {"Advanced Vector Extensions", "avx", k_num_avx_registers_x86_64,
+     g_avx_regnums_x86_64}};
+
+bool RegisterContextPOSIX_x86::IsGPR(unsigned reg) {
+  return reg <= m_reg_info.last_gpr; // GPR's come first.
 }
 
-bool RegisterContextPOSIX_x86::IsFPR(unsigned reg)
-{
-    return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
+bool RegisterContextPOSIX_x86::IsFPR(unsigned reg) {
+  return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
 }
 
-bool RegisterContextPOSIX_x86::IsAVX(unsigned reg)
-{
-    return (m_reg_info.first_ymm <= reg && reg <= m_reg_info.last_ymm);
+bool RegisterContextPOSIX_x86::IsAVX(unsigned reg) {
+  return (m_reg_info.first_ymm <= reg && reg <= m_reg_info.last_ymm);
 }
 
-bool RegisterContextPOSIX_x86::IsFPR(unsigned reg, FPRType fpr_type)
-{
-    bool generic_fpr = IsFPR(reg);
+bool RegisterContextPOSIX_x86::IsFPR(unsigned reg, FPRType fpr_type) {
+  bool generic_fpr = IsFPR(reg);
 
-    if (fpr_type == eXSAVE)
-        return generic_fpr || IsAVX(reg);
-    return generic_fpr;
+  if (fpr_type == eXSAVE)
+    return generic_fpr || IsAVX(reg);
+  return generic_fpr;
 }
 
-RegisterContextPOSIX_x86::RegisterContextPOSIX_x86(Thread &thread,
-                                                   uint32_t concrete_frame_idx,
-                                                   RegisterInfoInterface *register_info)
-    : RegisterContext(thread, concrete_frame_idx)
-{
-    m_register_info_ap.reset(register_info);
-
-    switch (register_info->m_target_arch.GetMachine())
-    {
-        case llvm::Triple::x86:
-            m_reg_info.num_registers        = k_num_registers_i386;
-            m_reg_info.num_gpr_registers    = k_num_gpr_registers_i386;
-            m_reg_info.num_fpr_registers    = k_num_fpr_registers_i386;
-            m_reg_info.num_avx_registers    = k_num_avx_registers_i386;
-            m_reg_info.last_gpr             = k_last_gpr_i386;
-            m_reg_info.first_fpr            = k_first_fpr_i386;
-            m_reg_info.last_fpr             = k_last_fpr_i386;
-            m_reg_info.first_st             = lldb_st0_i386;
-            m_reg_info.last_st              = lldb_st7_i386;
-            m_reg_info.first_mm             = lldb_mm0_i386;
-            m_reg_info.last_mm              = lldb_mm7_i386;
-            m_reg_info.first_xmm            = lldb_xmm0_i386;
-            m_reg_info.last_xmm             = lldb_xmm7_i386;
-            m_reg_info.first_ymm            = lldb_ymm0_i386;
-            m_reg_info.last_ymm             = lldb_ymm7_i386;
-            m_reg_info.first_dr             = lldb_dr0_i386;
-            m_reg_info.gpr_flags            = lldb_eflags_i386;
-            break;
-        case llvm::Triple::x86_64:
-            m_reg_info.num_registers        = k_num_registers_x86_64;
-            m_reg_info.num_gpr_registers    = k_num_gpr_registers_x86_64;
-            m_reg_info.num_fpr_registers    = k_num_fpr_registers_x86_64;
-            m_reg_info.num_avx_registers    = k_num_avx_registers_x86_64;
-            m_reg_info.last_gpr             = k_last_gpr_x86_64;
-            m_reg_info.first_fpr            = k_first_fpr_x86_64;
-            m_reg_info.last_fpr             = k_last_fpr_x86_64;
-            m_reg_info.first_st             = lldb_st0_x86_64;
-            m_reg_info.last_st              = lldb_st7_x86_64;
-            m_reg_info.first_mm             = lldb_mm0_x86_64;
-            m_reg_info.last_mm              = lldb_mm7_x86_64;
-            m_reg_info.first_xmm            = lldb_xmm0_x86_64;
-            m_reg_info.last_xmm             = lldb_xmm15_x86_64;
-            m_reg_info.first_ymm            = lldb_ymm0_x86_64;
-            m_reg_info.last_ymm             = lldb_ymm15_x86_64;
-            m_reg_info.first_dr             = lldb_dr0_x86_64;
-            m_reg_info.gpr_flags            = lldb_rflags_x86_64;
-            break;
-        default:
-            assert(false && "Unhandled target architecture.");
-            break;
-    }
-
-    // Initialize m_iovec to point to the buffer and buffer size
-    // using the conventions of Berkeley style UIO structures, as required
-    // by PTRACE extensions.
-    m_iovec.iov_base = &m_fpr.xstate.xsave;
-    m_iovec.iov_len = sizeof(m_fpr.xstate.xsave);
+RegisterContextPOSIX_x86::RegisterContextPOSIX_x86(
+    Thread &thread, uint32_t concrete_frame_idx,
+    RegisterInfoInterface *register_info)
+    : RegisterContext(thread, concrete_frame_idx) {
+  m_register_info_ap.reset(register_info);
+
+  switch (register_info->m_target_arch.GetMachine()) {
+  case llvm::Triple::x86:
+    m_reg_info.num_registers = k_num_registers_i386;
+    m_reg_info.num_gpr_registers = k_num_gpr_registers_i386;
+    m_reg_info.num_fpr_registers = k_num_fpr_registers_i386;
+    m_reg_info.num_avx_registers = k_num_avx_registers_i386;
+    m_reg_info.last_gpr = k_last_gpr_i386;
+    m_reg_info.first_fpr = k_first_fpr_i386;
+    m_reg_info.last_fpr = k_last_fpr_i386;
+    m_reg_info.first_st = lldb_st0_i386;
+    m_reg_info.last_st = lldb_st7_i386;
+    m_reg_info.first_mm = lldb_mm0_i386;
+    m_reg_info.last_mm = lldb_mm7_i386;
+    m_reg_info.first_xmm = lldb_xmm0_i386;
+    m_reg_info.last_xmm = lldb_xmm7_i386;
+    m_reg_info.first_ymm = lldb_ymm0_i386;
+    m_reg_info.last_ymm = lldb_ymm7_i386;
+    m_reg_info.first_dr = lldb_dr0_i386;
+    m_reg_info.gpr_flags = lldb_eflags_i386;
+    break;
+  case llvm::Triple::x86_64:
+    m_reg_info.num_registers = k_num_registers_x86_64;
+    m_reg_info.num_gpr_registers = k_num_gpr_registers_x86_64;
+    m_reg_info.num_fpr_registers = k_num_fpr_registers_x86_64;
+    m_reg_info.num_avx_registers = k_num_avx_registers_x86_64;
+    m_reg_info.last_gpr = k_last_gpr_x86_64;
+    m_reg_info.first_fpr = k_first_fpr_x86_64;
+    m_reg_info.last_fpr = k_last_fpr_x86_64;
+    m_reg_info.first_st = lldb_st0_x86_64;
+    m_reg_info.last_st = lldb_st7_x86_64;
+    m_reg_info.first_mm = lldb_mm0_x86_64;
+    m_reg_info.last_mm = lldb_mm7_x86_64;
+    m_reg_info.first_xmm = lldb_xmm0_x86_64;
+    m_reg_info.last_xmm = lldb_xmm15_x86_64;
+    m_reg_info.first_ymm = lldb_ymm0_x86_64;
+    m_reg_info.last_ymm = lldb_ymm15_x86_64;
+    m_reg_info.first_dr = lldb_dr0_x86_64;
+    m_reg_info.gpr_flags = lldb_rflags_x86_64;
+    break;
+  default:
+    assert(false && "Unhandled target architecture.");
+    break;
+  }
+
+  // Initialize m_iovec to point to the buffer and buffer size
+  // using the conventions of Berkeley style UIO structures, as required
+  // by PTRACE extensions.
+  m_iovec.iov_base = &m_fpr.xstate.xsave;
+  m_iovec.iov_len = sizeof(m_fpr.xstate.xsave);
+
+  ::memset(&m_fpr, 0, sizeof(FPR));
+
+  m_fpr_type = eNotValid;
+}
 
-    ::memset(&m_fpr, 0, sizeof(FPR));
+RegisterContextPOSIX_x86::~RegisterContextPOSIX_x86() {}
 
-    // elf-core yet to support ReadFPR()
-    ProcessSP base = CalculateProcess();
-    if (base.get()->GetPluginName() ==  ProcessElfCore::GetPluginNameStatic())
-        return;
-    
-    m_fpr_type = eNotValid;
+RegisterContextPOSIX_x86::FPRType RegisterContextPOSIX_x86::GetFPRType() {
+  if (m_fpr_type == eNotValid) {
+    // TODO: Use assembly to call cpuid on the inferior and query ebx or ecx
+    m_fpr_type = eXSAVE; // extended floating-point registers, if available
+    if (false == ReadFPR())
+      m_fpr_type = eFXSAVE; // assume generic floating-point registers
+  }
+  return m_fpr_type;
 }
 
-RegisterContextPOSIX_x86::~RegisterContextPOSIX_x86()
-{
-}
+void RegisterContextPOSIX_x86::Invalidate() {}
 
-RegisterContextPOSIX_x86::FPRType RegisterContextPOSIX_x86::GetFPRType()
-{
-    if (m_fpr_type == eNotValid)
-    {
-        // TODO: Use assembly to call cpuid on the inferior and query ebx or ecx
-        m_fpr_type = eXSAVE; // extended floating-point registers, if available
-        if (false == ReadFPR())
-            m_fpr_type = eFXSAVE; // assume generic floating-point registers
-    }
-    return m_fpr_type;
-}
+void RegisterContextPOSIX_x86::InvalidateAllRegisters() {}
 
-void
-RegisterContextPOSIX_x86::Invalidate()
-{
+unsigned RegisterContextPOSIX_x86::GetRegisterOffset(unsigned reg) {
+  assert(reg < m_reg_info.num_registers && "Invalid register number.");
+  return GetRegisterInfo()[reg].byte_offset;
 }
 
-void
-RegisterContextPOSIX_x86::InvalidateAllRegisters()
-{
+unsigned RegisterContextPOSIX_x86::GetRegisterSize(unsigned reg) {
+  assert(reg < m_reg_info.num_registers && "Invalid register number.");
+  return GetRegisterInfo()[reg].byte_size;
 }
 
-unsigned
-RegisterContextPOSIX_x86::GetRegisterOffset(unsigned reg)
-{
-    assert(reg < m_reg_info.num_registers && "Invalid register number.");
-    return GetRegisterInfo()[reg].byte_offset;
+size_t RegisterContextPOSIX_x86::GetRegisterCount() {
+  size_t num_registers =
+      m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
+  if (GetFPRType() == eXSAVE)
+    return num_registers + m_reg_info.num_avx_registers;
+  return num_registers;
 }
 
-unsigned
-RegisterContextPOSIX_x86::GetRegisterSize(unsigned reg)
-{
-    assert(reg < m_reg_info.num_registers && "Invalid register number.");
-    return GetRegisterInfo()[reg].byte_size;
+size_t RegisterContextPOSIX_x86::GetGPRSize() {
+  return m_register_info_ap->GetGPRSize();
 }
 
-size_t
-RegisterContextPOSIX_x86::GetRegisterCount()
-{
-    size_t num_registers = m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
-    if (GetFPRType() == eXSAVE)
-      return num_registers + m_reg_info.num_avx_registers;
-    return num_registers;
+size_t RegisterContextPOSIX_x86::GetFXSAVEOffset() {
+  return GetRegisterInfo()[m_reg_info.first_fpr].byte_offset;
 }
 
-size_t
-RegisterContextPOSIX_x86::GetGPRSize()
-{
-    return m_register_info_ap->GetGPRSize ();
+const RegisterInfo *RegisterContextPOSIX_x86::GetRegisterInfo() {
+  // Commonly, this method is overridden and g_register_infos is copied and
+  // specialized.
+  // So, use GetRegisterInfo() rather than g_register_infos in this scope.
+  return m_register_info_ap->GetRegisterInfo();
 }
 
 const RegisterInfo *
-RegisterContextPOSIX_x86::GetRegisterInfo()
-{
-    // Commonly, this method is overridden and g_register_infos is copied and specialized.
-    // So, use GetRegisterInfo() rather than g_register_infos in this scope.
-    return m_register_info_ap->GetRegisterInfo ();
-}
-
-const RegisterInfo *
-RegisterContextPOSIX_x86::GetRegisterInfoAtIndex(size_t reg)
-{
-    if (reg < m_reg_info.num_registers)
-        return &GetRegisterInfo()[reg];
-    else
-        return NULL;
+RegisterContextPOSIX_x86::GetRegisterInfoAtIndex(size_t reg) {
+  if (reg < m_reg_info.num_registers)
+    return &GetRegisterInfo()[reg];
+  else
+    return NULL;
 }
 
-size_t
-RegisterContextPOSIX_x86::GetRegisterSetCount()
-{
-    size_t sets = 0;
-    for (size_t set = 0; set < k_num_register_sets; ++set)
-    {
-        if (IsRegisterSetAvailable(set))
-            ++sets;
-    }
+size_t RegisterContextPOSIX_x86::GetRegisterSetCount() {
+  size_t sets = 0;
+  for (size_t set = 0; set < k_num_register_sets; ++set) {
+    if (IsRegisterSetAvailable(set))
+      ++sets;
+  }
 
-    return sets;
+  return sets;
 }
 
-const RegisterSet *
-RegisterContextPOSIX_x86::GetRegisterSet(size_t set)
-{
-    if (IsRegisterSetAvailable(set))
-    {
-        switch (m_register_info_ap->m_target_arch.GetMachine())
-        {
-            case llvm::Triple::x86:
-                return &g_reg_sets_i386[set];
-            case llvm::Triple::x86_64:
-                return &g_reg_sets_x86_64[set];
-            default:
-                assert(false && "Unhandled target architecture.");
-                return NULL;
-        }
+const RegisterSet *RegisterContextPOSIX_x86::GetRegisterSet(size_t set) {
+  if (IsRegisterSetAvailable(set)) {
+    switch (m_register_info_ap->m_target_arch.GetMachine()) {
+    case llvm::Triple::x86:
+      return &g_reg_sets_i386[set];
+    case llvm::Triple::x86_64:
+      return &g_reg_sets_x86_64[set];
+    default:
+      assert(false && "Unhandled target architecture.");
+      return NULL;
     }
-    return NULL;
+  }
+  return NULL;
 }
 
-const char *
-RegisterContextPOSIX_x86::GetRegisterName(unsigned reg)
-{
-    assert(reg < m_reg_info.num_registers && "Invalid register offset.");
-    return GetRegisterInfo()[reg].name;
+const char *RegisterContextPOSIX_x86::GetRegisterName(unsigned reg) {
+  assert(reg < m_reg_info.num_registers && "Invalid register offset.");
+  return GetRegisterInfo()[reg].name;
 }
 
-lldb::ByteOrder
-RegisterContextPOSIX_x86::GetByteOrder()
-{
-    // Get the target process whose privileged thread was used for the register read.
-    lldb::ByteOrder byte_order = eByteOrderInvalid;
-    Process *process = CalculateProcess().get();
+lldb::ByteOrder RegisterContextPOSIX_x86::GetByteOrder() {
+  // Get the target process whose privileged thread was used for the register
+  // read.
+  lldb::ByteOrder byte_order = eByteOrderInvalid;
+  Process *process = CalculateProcess().get();
 
-    if (process)
-        byte_order = process->GetByteOrder();
-    return byte_order;
+  if (process)
+    byte_order = process->GetByteOrder();
+  return byte_order;
 }
 
 // Parse ymm registers and into xmm.bytes and ymmh.bytes.
-bool RegisterContextPOSIX_x86::CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order)
-{
-    if (!IsAVX(reg))
-        return false;
-
-    if (byte_order == eByteOrderLittle)
-    {
-        ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
-                 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
-                 sizeof(XMMReg));
-        ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
-                 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
-                 sizeof(YMMHReg));
-        return true;
-    }
-
-    if (byte_order == eByteOrderBig)
-    {
-        ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
-                 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
-                 sizeof(XMMReg));
-        ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
-                 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
-                 sizeof(YMMHReg));
-        return true;
-    }
-    return false; // unsupported or invalid byte order
+bool RegisterContextPOSIX_x86::CopyYMMtoXSTATE(uint32_t reg,
+                                               lldb::ByteOrder byte_order) {
+  if (!IsAVX(reg))
+    return false;
+
+  if (byte_order == eByteOrderLittle) {
+    ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+             m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(XMMReg));
+    ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+             m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
+             sizeof(YMMHReg));
+    return true;
+  }
+
+  if (byte_order == eByteOrderBig) {
+    ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+             m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
+             sizeof(XMMReg));
+    ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+             m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(YMMHReg));
+    return true;
+  }
+  return false; // unsupported or invalid byte order
 }
 
 // Concatenate xmm.bytes with ymmh.bytes
-bool RegisterContextPOSIX_x86::CopyXSTATEtoYMM(uint32_t reg, lldb::ByteOrder byte_order)
-{
-    if (!IsAVX(reg))
-        return false;
-
-    if (byte_order == eByteOrderLittle)
-    {
-        ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
-                 m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
-                 sizeof(XMMReg));
-        ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
-                 m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
-                 sizeof(YMMHReg));
-        return true;
-    }
-
-    if (byte_order == eByteOrderBig)
-    {
-        ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
-                 m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
-                 sizeof(XMMReg));
-        ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
-                 m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
-                 sizeof(YMMHReg));
-        return true;
-    }
-    return false; // unsupported or invalid byte order
+bool RegisterContextPOSIX_x86::CopyXSTATEtoYMM(uint32_t reg,
+                                               lldb::ByteOrder byte_order) {
+  if (!IsAVX(reg))
+    return false;
+
+  if (byte_order == eByteOrderLittle) {
+    ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
+             m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+             sizeof(XMMReg));
+    ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
+             m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+             sizeof(YMMHReg));
+    return true;
+  }
+
+  if (byte_order == eByteOrderBig) {
+    ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
+             m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+             sizeof(XMMReg));
+    ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
+             m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+             sizeof(YMMHReg));
+    return true;
+  }
+  return false; // unsupported or invalid byte order
 }
 
-bool
-RegisterContextPOSIX_x86::IsRegisterSetAvailable(size_t set_index)
-{
-    // Note: Extended register sets are assumed to be at the end of g_reg_sets...
-    size_t num_sets = k_num_register_sets - k_num_extended_register_sets;
+bool RegisterContextPOSIX_x86::IsRegisterSetAvailable(size_t set_index) {
+  // Note: Extended register sets are assumed to be at the end of g_reg_sets...
+  size_t num_sets = k_num_register_sets - k_num_extended_register_sets;
 
-    if (GetFPRType() == eXSAVE) // ...and to start with AVX registers.
-        ++num_sets;
-    return (set_index < num_sets);
+  if (GetFPRType() == eXSAVE) // ...and to start with AVX registers.
+    ++num_sets;
+  return (set_index < num_sets);
 }
 
-
 // Used when parsing DWARF and EH frame information and any other
-// object file sections that contain register numbers in them. 
-uint32_t
-RegisterContextPOSIX_x86::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
-                                                              uint32_t num)
-{
-    const uint32_t num_regs = GetRegisterCount();
-
-    assert (kind < kNumRegisterKinds);
-    for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
-    {
-        const RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx);
-
-        if (reg_info->kinds[kind] == num)
-            return reg_idx;
-    }
+// object file sections that contain register numbers in them.
+uint32_t RegisterContextPOSIX_x86::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t num) {
+  const uint32_t num_regs = GetRegisterCount();
 
-    return LLDB_INVALID_REGNUM;
-}
+  assert(kind < kNumRegisterKinds);
+  for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
+    const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg_idx);
 
+    if (reg_info->kinds[kind] == num)
+      return reg_idx;
+  }
+
+  return LLDB_INVALID_REGNUM;
+}
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h
index b470825..c5afe08 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h
@@ -14,181 +14,170 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
-#include "lldb/Core/Log.h"
-#include "lldb/Target/RegisterContext.h"
-#include "RegisterInfoInterface.h"
 #include "RegisterContext_x86.h"
+#include "RegisterInfoInterface.h"
 #include "lldb-x86-register-enums.h"
+#include "lldb/Core/Log.h"
+#include "lldb/Target/RegisterContext.h"
 
 class ProcessMonitor;
 
-class RegisterContextPOSIX_x86
-  : public lldb_private::RegisterContext
-{
+class RegisterContextPOSIX_x86 : public lldb_private::RegisterContext {
 public:
-    RegisterContextPOSIX_x86 (lldb_private::Thread &thread,
-                            uint32_t concrete_frame_idx,
-                            lldb_private::RegisterInfoInterface *register_info);
-
-    ~RegisterContextPOSIX_x86() override;
-
-    void
-    Invalidate();
-
-    void
-    InvalidateAllRegisters() override;
-
-    size_t
-    GetRegisterCount() override;
-
-    virtual size_t
-    GetGPRSize();
-
-    virtual unsigned
-    GetRegisterSize(unsigned reg);
-
-    virtual unsigned
-    GetRegisterOffset(unsigned reg);
-
-    const lldb_private::RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
-
-    size_t
-    GetRegisterSetCount() override;
-
-    const lldb_private::RegisterSet *
-    GetRegisterSet(size_t set) override;
-
-    const char *
-    GetRegisterName(unsigned reg);
-
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-
-    //---------------------------------------------------------------------------
-    // Note: prefer kernel definitions over user-land
-    //---------------------------------------------------------------------------
-    enum FPRType
-    {
-        eNotValid = 0,
-        eFSAVE,  // TODO
-        eFXSAVE,
-        eSOFT,   // TODO
-        eXSAVE
-    };
-
-    static uint32_t g_contained_eax[];
-    static uint32_t g_contained_ebx[];
-    static uint32_t g_contained_ecx[];
-    static uint32_t g_contained_edx[];
-    static uint32_t g_contained_edi[];
-    static uint32_t g_contained_esi[];
-    static uint32_t g_contained_ebp[];
-    static uint32_t g_contained_esp[];
-
-    static uint32_t g_invalidate_eax[];
-    static uint32_t g_invalidate_ebx[];
-    static uint32_t g_invalidate_ecx[];
-    static uint32_t g_invalidate_edx[];
-    static uint32_t g_invalidate_edi[];
-    static uint32_t g_invalidate_esi[];
-    static uint32_t g_invalidate_ebp[];
-    static uint32_t g_invalidate_esp[];
-
-    static uint32_t g_contained_rax[];
-    static uint32_t g_contained_rbx[];
-    static uint32_t g_contained_rcx[];
-    static uint32_t g_contained_rdx[];
-    static uint32_t g_contained_rdi[];
-    static uint32_t g_contained_rsi[];
-    static uint32_t g_contained_rbp[];
-    static uint32_t g_contained_rsp[];
-    static uint32_t g_contained_r8[];
-    static uint32_t g_contained_r9[];
-    static uint32_t g_contained_r10[];
-    static uint32_t g_contained_r11[];
-    static uint32_t g_contained_r12[];
-    static uint32_t g_contained_r13[];
-    static uint32_t g_contained_r14[];
-    static uint32_t g_contained_r15[];
-
-    static uint32_t g_invalidate_rax[];
-    static uint32_t g_invalidate_rbx[];
-    static uint32_t g_invalidate_rcx[];
-    static uint32_t g_invalidate_rdx[];
-    static uint32_t g_invalidate_rdi[];
-    static uint32_t g_invalidate_rsi[];
-    static uint32_t g_invalidate_rbp[];
-    static uint32_t g_invalidate_rsp[];
-    static uint32_t g_invalidate_r8[];
-    static uint32_t g_invalidate_r9[];
-    static uint32_t g_invalidate_r10[];
-    static uint32_t g_invalidate_r11[];
-    static uint32_t g_invalidate_r12[];
-    static uint32_t g_invalidate_r13[];
-    static uint32_t g_invalidate_r14[];
-    static uint32_t g_invalidate_r15[];
+  RegisterContextPOSIX_x86(lldb_private::Thread &thread,
+                           uint32_t concrete_frame_idx,
+                           lldb_private::RegisterInfoInterface *register_info);
+
+  ~RegisterContextPOSIX_x86() override;
+
+  void Invalidate();
+
+  void InvalidateAllRegisters() override;
+
+  size_t GetRegisterCount() override;
+
+  virtual size_t GetGPRSize();
+
+  virtual size_t GetFXSAVEOffset();
+
+  virtual unsigned GetRegisterSize(unsigned reg);
+
+  virtual unsigned GetRegisterOffset(unsigned reg);
+
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+  size_t GetRegisterSetCount() override;
+
+  const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+  const char *GetRegisterName(unsigned reg);
+
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
+
+  //---------------------------------------------------------------------------
+  // Note: prefer kernel definitions over user-land
+  //---------------------------------------------------------------------------
+  enum FPRType {
+    eNotValid = 0,
+    eFSAVE, // TODO
+    eFXSAVE,
+    eSOFT, // TODO
+    eXSAVE
+  };
+
+  static uint32_t g_contained_eax[];
+  static uint32_t g_contained_ebx[];
+  static uint32_t g_contained_ecx[];
+  static uint32_t g_contained_edx[];
+  static uint32_t g_contained_edi[];
+  static uint32_t g_contained_esi[];
+  static uint32_t g_contained_ebp[];
+  static uint32_t g_contained_esp[];
+
+  static uint32_t g_invalidate_eax[];
+  static uint32_t g_invalidate_ebx[];
+  static uint32_t g_invalidate_ecx[];
+  static uint32_t g_invalidate_edx[];
+  static uint32_t g_invalidate_edi[];
+  static uint32_t g_invalidate_esi[];
+  static uint32_t g_invalidate_ebp[];
+  static uint32_t g_invalidate_esp[];
+
+  static uint32_t g_contained_rax[];
+  static uint32_t g_contained_rbx[];
+  static uint32_t g_contained_rcx[];
+  static uint32_t g_contained_rdx[];
+  static uint32_t g_contained_rdi[];
+  static uint32_t g_contained_rsi[];
+  static uint32_t g_contained_rbp[];
+  static uint32_t g_contained_rsp[];
+  static uint32_t g_contained_r8[];
+  static uint32_t g_contained_r9[];
+  static uint32_t g_contained_r10[];
+  static uint32_t g_contained_r11[];
+  static uint32_t g_contained_r12[];
+  static uint32_t g_contained_r13[];
+  static uint32_t g_contained_r14[];
+  static uint32_t g_contained_r15[];
+
+  static uint32_t g_invalidate_rax[];
+  static uint32_t g_invalidate_rbx[];
+  static uint32_t g_invalidate_rcx[];
+  static uint32_t g_invalidate_rdx[];
+  static uint32_t g_invalidate_rdi[];
+  static uint32_t g_invalidate_rsi[];
+  static uint32_t g_invalidate_rbp[];
+  static uint32_t g_invalidate_rsp[];
+  static uint32_t g_invalidate_r8[];
+  static uint32_t g_invalidate_r9[];
+  static uint32_t g_invalidate_r10[];
+  static uint32_t g_invalidate_r11[];
+  static uint32_t g_invalidate_r12[];
+  static uint32_t g_invalidate_r13[];
+  static uint32_t g_invalidate_r14[];
+  static uint32_t g_invalidate_r15[];
 
 protected:
-    struct RegInfo
-    {
-        uint32_t num_registers;
-        uint32_t num_gpr_registers;
-        uint32_t num_fpr_registers;
-        uint32_t num_avx_registers;
-
-        uint32_t last_gpr;
-        uint32_t first_fpr;
-        uint32_t last_fpr;
-
-        uint32_t first_st;
-        uint32_t last_st;
-        uint32_t first_mm;
-        uint32_t last_mm;
-        uint32_t first_xmm;
-        uint32_t last_xmm;
-        uint32_t first_ymm;
-        uint32_t last_ymm;
-
-        uint32_t first_dr;
-        uint32_t gpr_flags;
-    };
-
-    uint64_t m_gpr_x86_64[lldb_private::k_num_gpr_registers_x86_64];   // 64-bit general purpose registers.
-    RegInfo  m_reg_info;
-    FPRType  m_fpr_type;                                       // determines the type of data stored by union FPR, if any.
-    FPR      m_fpr;                                            // floating-point registers including extended register sets.
-    IOVEC    m_iovec;                                          // wrapper for xsave.
-    YMM      m_ymm_set;                                        // copy of ymmh and xmm register halves.
-    std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
-
-    // Determines if an extended register set is supported on the processor running the inferior process.
-    virtual bool
-    IsRegisterSetAvailable(size_t set_index);
-
-    virtual const lldb_private::RegisterInfo *
-    GetRegisterInfo();
-
-    bool
-    IsGPR(unsigned reg);
-
-    bool
-    IsFPR(unsigned reg);
-
-    bool
-    IsAVX(unsigned reg);
-
-    lldb::ByteOrder GetByteOrder();
-
-    bool CopyXSTATEtoYMM(uint32_t reg, lldb::ByteOrder byte_order);
-    bool CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order);
-    bool IsFPR(unsigned reg, FPRType fpr_type);
-    FPRType GetFPRType();
-
-    virtual bool ReadGPR() = 0;
-    virtual bool ReadFPR() = 0;
-    virtual bool WriteGPR() = 0;
-    virtual bool WriteFPR() = 0;
+  struct RegInfo {
+    uint32_t num_registers;
+    uint32_t num_gpr_registers;
+    uint32_t num_fpr_registers;
+    uint32_t num_avx_registers;
+
+    uint32_t last_gpr;
+    uint32_t first_fpr;
+    uint32_t last_fpr;
+
+    uint32_t first_st;
+    uint32_t last_st;
+    uint32_t first_mm;
+    uint32_t last_mm;
+    uint32_t first_xmm;
+    uint32_t last_xmm;
+    uint32_t first_ymm;
+    uint32_t last_ymm;
+
+    uint32_t first_dr;
+    uint32_t gpr_flags;
+  };
+
+  uint64_t m_gpr_x86_64[lldb_private::k_num_gpr_registers_x86_64]; // 64-bit
+                                                                   // general
+                                                                   // purpose
+                                                                   // registers.
+  RegInfo m_reg_info;
+  FPRType
+      m_fpr_type; // determines the type of data stored by union FPR, if any.
+  FPR m_fpr;      // floating-point registers including extended register sets.
+  IOVEC m_iovec;  // wrapper for xsave.
+  YMM m_ymm_set;  // copy of ymmh and xmm register halves.
+  std::unique_ptr<lldb_private::RegisterInfoInterface>
+      m_register_info_ap; // Register Info Interface (FreeBSD or Linux)
+
+  // Determines if an extended register set is supported on the processor
+  // running the inferior process.
+  virtual bool IsRegisterSetAvailable(size_t set_index);
+
+  virtual const lldb_private::RegisterInfo *GetRegisterInfo();
+
+  bool IsGPR(unsigned reg);
+
+  bool IsFPR(unsigned reg);
+
+  bool IsAVX(unsigned reg);
+
+  lldb::ByteOrder GetByteOrder();
+
+  bool CopyXSTATEtoYMM(uint32_t reg, lldb::ByteOrder byte_order);
+  bool CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order);
+  bool IsFPR(unsigned reg, FPRType fpr_type);
+  FPRType GetFPRType();
+
+  virtual bool ReadGPR() = 0;
+  virtual bool ReadFPR() = 0;
+  virtual bool WriteGPR() = 0;
+  virtual bool WriteFPR() = 0;
 };
 
 #endif // liblldb_RegisterContextPOSIX_x86_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextThreadMemory.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextThreadMemory.cpp
index 200ef4d..2b5cb00 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextThreadMemory.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextThreadMemory.cpp
@@ -7,255 +7,213 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "lldb/lldb-private.h"
 #include "lldb/Core/Error.h"
 #include "lldb/Target/OperatingSystem.h"
 #include "lldb/Target/Process.h"
 #include "lldb/Target/Thread.h"
+#include "lldb/lldb-private.h"
 
 #include "RegisterContextThreadMemory.h"
 
 using namespace lldb;
 using namespace lldb_private;
 
-RegisterContextThreadMemory::RegisterContextThreadMemory (Thread &thread,
-                                                          lldb::addr_t register_data_addr) :
-    RegisterContext (thread, 0),
-    m_thread_wp (thread.shared_from_this()),
-    m_reg_ctx_sp (),
-    m_register_data_addr (register_data_addr),
-    m_stop_id(0)
-{
-}
+RegisterContextThreadMemory::RegisterContextThreadMemory(
+    Thread &thread, lldb::addr_t register_data_addr)
+    : RegisterContext(thread, 0), m_thread_wp(thread.shared_from_this()),
+      m_reg_ctx_sp(), m_register_data_addr(register_data_addr), m_stop_id(0) {}
 
-RegisterContextThreadMemory::~RegisterContextThreadMemory()
-{
-}
+RegisterContextThreadMemory::~RegisterContextThreadMemory() {}
 
-void
-RegisterContextThreadMemory::UpdateRegisterContext ()
-{
-    ThreadSP thread_sp (m_thread_wp.lock());
-    if (thread_sp)
-    {
-        ProcessSP process_sp (thread_sp->GetProcess());
+void RegisterContextThreadMemory::UpdateRegisterContext() {
+  ThreadSP thread_sp(m_thread_wp.lock());
+  if (thread_sp) {
+    ProcessSP process_sp(thread_sp->GetProcess());
 
-        if (process_sp)
-        {
-            const uint32_t stop_id = process_sp->GetModID().GetStopID();
-            if (m_stop_id != stop_id)
-            {
-                m_stop_id = stop_id;
-                m_reg_ctx_sp.reset();
-            }
-            if (!m_reg_ctx_sp)
-            {
-                ThreadSP backing_thread_sp (thread_sp->GetBackingThread());
-                if (backing_thread_sp)
-                {
-                    m_reg_ctx_sp = backing_thread_sp->GetRegisterContext();
-                }
-                else
-                {
-                    OperatingSystem *os = process_sp->GetOperatingSystem ();
-                    if (os->IsOperatingSystemPluginThread (thread_sp))
-                        m_reg_ctx_sp = os->CreateRegisterContextForThread (thread_sp.get(), m_register_data_addr);
-                }                
-            }
-        }
-        else
-        {
-            m_reg_ctx_sp.reset();
-        }
-    }
-    else
-    {
+    if (process_sp) {
+      const uint32_t stop_id = process_sp->GetModID().GetStopID();
+      if (m_stop_id != stop_id) {
+        m_stop_id = stop_id;
         m_reg_ctx_sp.reset();
+      }
+      if (!m_reg_ctx_sp) {
+        ThreadSP backing_thread_sp(thread_sp->GetBackingThread());
+        if (backing_thread_sp) {
+          m_reg_ctx_sp = backing_thread_sp->GetRegisterContext();
+        } else {
+          OperatingSystem *os = process_sp->GetOperatingSystem();
+          if (os->IsOperatingSystemPluginThread(thread_sp))
+            m_reg_ctx_sp = os->CreateRegisterContextForThread(
+                thread_sp.get(), m_register_data_addr);
+        }
+      }
+    } else {
+      m_reg_ctx_sp.reset();
     }
+  } else {
+    m_reg_ctx_sp.reset();
+  }
 }
 
 //------------------------------------------------------------------
 // Subclasses must override these functions
 //------------------------------------------------------------------
-void
-RegisterContextThreadMemory::InvalidateAllRegisters ()
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        m_reg_ctx_sp->InvalidateAllRegisters();
+void RegisterContextThreadMemory::InvalidateAllRegisters() {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    m_reg_ctx_sp->InvalidateAllRegisters();
 }
 
-size_t
-RegisterContextThreadMemory::GetRegisterCount ()
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->GetRegisterCount();
-    return 0;
+size_t RegisterContextThreadMemory::GetRegisterCount() {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->GetRegisterCount();
+  return 0;
 }
 
 const RegisterInfo *
-RegisterContextThreadMemory::GetRegisterInfoAtIndex (size_t reg)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->GetRegisterInfoAtIndex(reg);
-    return NULL;
-}
-
-size_t
-RegisterContextThreadMemory::GetRegisterSetCount ()
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->GetRegisterSetCount();
-    return 0;
-}
-
-const RegisterSet *
-RegisterContextThreadMemory::GetRegisterSet (size_t reg_set)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->GetRegisterSet(reg_set);
-    return NULL;
-}
-
-bool
-RegisterContextThreadMemory::ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->ReadRegister(reg_info, reg_value);
-    return false;
-}
-
-bool
-RegisterContextThreadMemory::WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->WriteRegister (reg_info, reg_value);
-    return false;
-}
-
-bool
-RegisterContextThreadMemory::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->ReadAllRegisterValues(data_sp);
-    return false;
-}
-
-bool
-RegisterContextThreadMemory::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->WriteAllRegisterValues (data_sp);
-    return false;
-}
-
-bool
-RegisterContextThreadMemory::CopyFromRegisterContext (lldb::RegisterContextSP reg_ctx_sp)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->CopyFromRegisterContext(reg_ctx_sp);
-    return false;
-}
-
-uint32_t
-RegisterContextThreadMemory::ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->ConvertRegisterKindToRegisterNumber(kind, num);
-    return false;
-}
-
-uint32_t
-RegisterContextThreadMemory::NumSupportedHardwareBreakpoints ()
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->NumSupportedHardwareBreakpoints();
-    return false;
-}
-
-uint32_t
-RegisterContextThreadMemory::SetHardwareBreakpoint (lldb::addr_t addr, size_t size)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->SetHardwareBreakpoint(addr, size);
-    return 0;
-}
-
-bool
-RegisterContextThreadMemory::ClearHardwareBreakpoint (uint32_t hw_idx)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->ClearHardwareBreakpoint (hw_idx);
-    return false;
-}
-
-uint32_t
-RegisterContextThreadMemory::NumSupportedHardwareWatchpoints ()
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->NumSupportedHardwareWatchpoints();
-    return 0;
+RegisterContextThreadMemory::GetRegisterInfoAtIndex(size_t reg) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->GetRegisterInfoAtIndex(reg);
+  return NULL;
 }
 
-uint32_t
-RegisterContextThreadMemory::SetHardwareWatchpoint (lldb::addr_t addr, size_t size, bool read, bool write)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->SetHardwareWatchpoint(addr, size, read, write);
-    return 0;
+size_t RegisterContextThreadMemory::GetRegisterSetCount() {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->GetRegisterSetCount();
+  return 0;
 }
 
-bool
-RegisterContextThreadMemory::ClearHardwareWatchpoint (uint32_t hw_index)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->ClearHardwareWatchpoint(hw_index);
-    return false;
+const RegisterSet *RegisterContextThreadMemory::GetRegisterSet(size_t reg_set) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->GetRegisterSet(reg_set);
+  return NULL;
 }
 
-bool
-RegisterContextThreadMemory::HardwareSingleStep (bool enable)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->HardwareSingleStep(enable);
-    return false;
+bool RegisterContextThreadMemory::ReadRegister(const RegisterInfo *reg_info,
+                                               RegisterValue &reg_value) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->ReadRegister(reg_info, reg_value);
+  return false;
 }
 
-Error
-RegisterContextThreadMemory::ReadRegisterValueFromMemory (const lldb_private::RegisterInfo *reg_info, lldb::addr_t src_addr, uint32_t src_len, RegisterValue &reg_value)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->ReadRegisterValueFromMemory (reg_info, src_addr, src_len, reg_value);
-    Error error;
-    error.SetErrorString("invalid register context");
-    return error;
+bool RegisterContextThreadMemory::WriteRegister(
+    const RegisterInfo *reg_info, const RegisterValue &reg_value) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->WriteRegister(reg_info, reg_value);
+  return false;
 }
 
-Error
-RegisterContextThreadMemory::WriteRegisterValueToMemory (const lldb_private::RegisterInfo *reg_info, lldb::addr_t dst_addr, uint32_t dst_len, const RegisterValue &reg_value)
-{
-    UpdateRegisterContext ();
-    if (m_reg_ctx_sp)
-        return m_reg_ctx_sp->WriteRegisterValueToMemory (reg_info, dst_addr, dst_len, reg_value);
-    Error error;
-    error.SetErrorString("invalid register context");
-    return error;
+bool RegisterContextThreadMemory::ReadAllRegisterValues(
+    lldb::DataBufferSP &data_sp) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->ReadAllRegisterValues(data_sp);
+  return false;
+}
+
+bool RegisterContextThreadMemory::WriteAllRegisterValues(
+    const lldb::DataBufferSP &data_sp) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->WriteAllRegisterValues(data_sp);
+  return false;
+}
+
+bool RegisterContextThreadMemory::CopyFromRegisterContext(
+    lldb::RegisterContextSP reg_ctx_sp) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->CopyFromRegisterContext(reg_ctx_sp);
+  return false;
+}
+
+uint32_t RegisterContextThreadMemory::ConvertRegisterKindToRegisterNumber(
+    lldb::RegisterKind kind, uint32_t num) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->ConvertRegisterKindToRegisterNumber(kind, num);
+  return false;
+}
+
+uint32_t RegisterContextThreadMemory::NumSupportedHardwareBreakpoints() {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->NumSupportedHardwareBreakpoints();
+  return false;
+}
+
+uint32_t RegisterContextThreadMemory::SetHardwareBreakpoint(lldb::addr_t addr,
+                                                            size_t size) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->SetHardwareBreakpoint(addr, size);
+  return 0;
+}
+
+bool RegisterContextThreadMemory::ClearHardwareBreakpoint(uint32_t hw_idx) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->ClearHardwareBreakpoint(hw_idx);
+  return false;
+}
+
+uint32_t RegisterContextThreadMemory::NumSupportedHardwareWatchpoints() {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->NumSupportedHardwareWatchpoints();
+  return 0;
+}
+
+uint32_t RegisterContextThreadMemory::SetHardwareWatchpoint(lldb::addr_t addr,
+                                                            size_t size,
+                                                            bool read,
+                                                            bool write) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->SetHardwareWatchpoint(addr, size, read, write);
+  return 0;
+}
+
+bool RegisterContextThreadMemory::ClearHardwareWatchpoint(uint32_t hw_index) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->ClearHardwareWatchpoint(hw_index);
+  return false;
+}
+
+bool RegisterContextThreadMemory::HardwareSingleStep(bool enable) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->HardwareSingleStep(enable);
+  return false;
+}
+
+Error RegisterContextThreadMemory::ReadRegisterValueFromMemory(
+    const lldb_private::RegisterInfo *reg_info, lldb::addr_t src_addr,
+    uint32_t src_len, RegisterValue &reg_value) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->ReadRegisterValueFromMemory(reg_info, src_addr,
+                                                     src_len, reg_value);
+  Error error;
+  error.SetErrorString("invalid register context");
+  return error;
+}
+
+Error RegisterContextThreadMemory::WriteRegisterValueToMemory(
+    const lldb_private::RegisterInfo *reg_info, lldb::addr_t dst_addr,
+    uint32_t dst_len, const RegisterValue &reg_value) {
+  UpdateRegisterContext();
+  if (m_reg_ctx_sp)
+    return m_reg_ctx_sp->WriteRegisterValueToMemory(reg_info, dst_addr, dst_len,
+                                                    reg_value);
+  Error error;
+  error.SetErrorString("invalid register context");
+  return error;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextThreadMemory.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextThreadMemory.h
index b4680de..7e0a2a9 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextThreadMemory.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextThreadMemory.h
@@ -16,103 +16,88 @@
 
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
-#include "lldb/Target/RegisterContext.h"
 #include "lldb/Symbol/SymbolContext.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
 
 namespace lldb_private {
-    
-class RegisterContextThreadMemory : public lldb_private::RegisterContext
-{
+
+class RegisterContextThreadMemory : public lldb_private::RegisterContext {
 public:
-    RegisterContextThreadMemory (Thread &thread,
-                                 lldb::addr_t register_data_addr);
-    
-    ~RegisterContextThreadMemory() override;
-
-    void
-    InvalidateAllRegisters() override;
-    
-    size_t
-    GetRegisterCount() override;
-    
-    const RegisterInfo *
-    GetRegisterInfoAtIndex(size_t reg) override;
-    
-    size_t
-    GetRegisterSetCount() override;
-    
-    const RegisterSet *
-    GetRegisterSet(size_t reg_set) override;
-    
-    bool
-    ReadRegister(const RegisterInfo *reg_info, RegisterValue &reg_value) override;
-    
-    bool
-    WriteRegister(const RegisterInfo *reg_info, const RegisterValue &reg_value) override;
-    
-    // These two functions are used to implement "push" and "pop" of register states.  They are used primarily
-    // for expression evaluation, where we need to push a new state (storing the old one in data_sp) and then
-    // restoring the original state by passing the data_sp we got from ReadAllRegisters to WriteAllRegisterValues.
-    // ReadAllRegisters will do what is necessary to return a coherent set of register values for this thread, which
-    // may mean e.g. interrupting a thread that is sitting in a kernel trap.  That is a somewhat disruptive operation,
-    // so these API's should only be used when this behavior is needed.
-    
-    bool
-    ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
-    
-    bool
-    WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
-    
-    bool
-    CopyFromRegisterContext (lldb::RegisterContextSP context);
-    
-    uint32_t
-    ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override;
-    
-    uint32_t
-    NumSupportedHardwareBreakpoints() override;
-    
-    uint32_t
-    SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
-    
-    bool
-    ClearHardwareBreakpoint(uint32_t hw_idx) override;
-    
-    uint32_t
-    NumSupportedHardwareWatchpoints() override;
-    
-    uint32_t
-    SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read, bool write) override;
-    
-    bool
-    ClearHardwareWatchpoint(uint32_t hw_index) override;
-    
-    bool
-    HardwareSingleStep(bool enable) override;
-    
-    Error
-    ReadRegisterValueFromMemory(const lldb_private::RegisterInfo *reg_info,
-                                lldb::addr_t src_addr,
-                                uint32_t src_len,
-                                RegisterValue &reg_value) override;
-    
-    Error
-    WriteRegisterValueToMemory(const lldb_private::RegisterInfo *reg_info,
-                               lldb::addr_t dst_addr, uint32_t dst_len,
-                               const RegisterValue &reg_value) override;
+  RegisterContextThreadMemory(Thread &thread, lldb::addr_t register_data_addr);
+
+  ~RegisterContextThreadMemory() override;
+
+  void InvalidateAllRegisters() override;
+
+  size_t GetRegisterCount() override;
+
+  const RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+  size_t GetRegisterSetCount() override;
+
+  const RegisterSet *GetRegisterSet(size_t reg_set) override;
+
+  bool ReadRegister(const RegisterInfo *reg_info,
+                    RegisterValue &reg_value) override;
+
+  bool WriteRegister(const RegisterInfo *reg_info,
+                     const RegisterValue &reg_value) override;
+
+  // These two functions are used to implement "push" and "pop" of register
+  // states.  They are used primarily
+  // for expression evaluation, where we need to push a new state (storing the
+  // old one in data_sp) and then
+  // restoring the original state by passing the data_sp we got from
+  // ReadAllRegisters to WriteAllRegisterValues.
+  // ReadAllRegisters will do what is necessary to return a coherent set of
+  // register values for this thread, which
+  // may mean e.g. interrupting a thread that is sitting in a kernel trap.  That
+  // is a somewhat disruptive operation,
+  // so these API's should only be used when this behavior is needed.
+
+  bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
+
+  bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+  bool CopyFromRegisterContext(lldb::RegisterContextSP context);
+
+  uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
+                                               uint32_t num) override;
+
+  uint32_t NumSupportedHardwareBreakpoints() override;
+
+  uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
+
+  bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
+
+  uint32_t NumSupportedHardwareWatchpoints() override;
+
+  uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read,
+                                 bool write) override;
+
+  bool ClearHardwareWatchpoint(uint32_t hw_index) override;
+
+  bool HardwareSingleStep(bool enable) override;
+
+  Error ReadRegisterValueFromMemory(const lldb_private::RegisterInfo *reg_info,
+                                    lldb::addr_t src_addr, uint32_t src_len,
+                                    RegisterValue &reg_value) override;
+
+  Error WriteRegisterValueToMemory(const lldb_private::RegisterInfo *reg_info,
+                                   lldb::addr_t dst_addr, uint32_t dst_len,
+                                   const RegisterValue &reg_value) override;
 
 protected:
-    void
-    UpdateRegisterContext ();
-    
-    lldb::ThreadWP m_thread_wp;
-    lldb::RegisterContextSP m_reg_ctx_sp;
-    lldb::addr_t m_register_data_addr;
-    uint32_t m_stop_id;
+  void UpdateRegisterContext();
+
+  lldb::ThreadWP m_thread_wp;
+  lldb::RegisterContextSP m_reg_ctx_sp;
+  lldb::addr_t m_register_data_addr;
+  uint32_t m_stop_id;
 
 private:
-    DISALLOW_COPY_AND_ASSIGN (RegisterContextThreadMemory);
+  DISALLOW_COPY_AND_ASSIGN(RegisterContextThreadMemory);
 };
 
 } // namespace lldb_private
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_mips.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_mips.h
index 3603227..565747c 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_mips.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_mips.h
@@ -10,375 +10,371 @@
 #ifndef liblldb_RegisterContext_mips64_H_
 #define liblldb_RegisterContext_mips64_H_
 
-// eh_frame and DWARF Register numbers (eRegisterKindEHFrame & eRegisterKindDWARF)
+#include <cstddef>
+#include <cstdint>
 
-enum
-{
-    // GP Registers
-    dwarf_zero_mips = 0,
-    dwarf_r1_mips,
-    dwarf_r2_mips,
-    dwarf_r3_mips,
-    dwarf_r4_mips,
-    dwarf_r5_mips,
-    dwarf_r6_mips,
-    dwarf_r7_mips,
-    dwarf_r8_mips,
-    dwarf_r9_mips,
-    dwarf_r10_mips,
-    dwarf_r11_mips,
-    dwarf_r12_mips,
-    dwarf_r13_mips,
-    dwarf_r14_mips,
-    dwarf_r15_mips,
-    dwarf_r16_mips,
-    dwarf_r17_mips,
-    dwarf_r18_mips,
-    dwarf_r19_mips,
-    dwarf_r20_mips,
-    dwarf_r21_mips,
-    dwarf_r22_mips,
-    dwarf_r23_mips,
-    dwarf_r24_mips,
-    dwarf_r25_mips,
-    dwarf_r26_mips,
-    dwarf_r27_mips,
-    dwarf_gp_mips,
-    dwarf_sp_mips,
-    dwarf_r30_mips,
-    dwarf_ra_mips,
-    dwarf_sr_mips,
-    dwarf_lo_mips,
-    dwarf_hi_mips,
-    dwarf_bad_mips,
-    dwarf_cause_mips,
-    dwarf_pc_mips,
-    dwarf_f0_mips,
-    dwarf_f1_mips,
-    dwarf_f2_mips,
-    dwarf_f3_mips,
-    dwarf_f4_mips,
-    dwarf_f5_mips,
-    dwarf_f6_mips,
-    dwarf_f7_mips,
-    dwarf_f8_mips,
-    dwarf_f9_mips,
-    dwarf_f10_mips,
-    dwarf_f11_mips,
-    dwarf_f12_mips,
-    dwarf_f13_mips,
-    dwarf_f14_mips,
-    dwarf_f15_mips,
-    dwarf_f16_mips,
-    dwarf_f17_mips,
-    dwarf_f18_mips,
-    dwarf_f19_mips,
-    dwarf_f20_mips,
-    dwarf_f21_mips,
-    dwarf_f22_mips,
-    dwarf_f23_mips,
-    dwarf_f24_mips,
-    dwarf_f25_mips,
-    dwarf_f26_mips,
-    dwarf_f27_mips,
-    dwarf_f28_mips,
-    dwarf_f29_mips,
-    dwarf_f30_mips,
-    dwarf_f31_mips,
-    dwarf_fcsr_mips,
-    dwarf_fir_mips,
-    dwarf_w0_mips,
-    dwarf_w1_mips,
-    dwarf_w2_mips,
-    dwarf_w3_mips,
-    dwarf_w4_mips,
-    dwarf_w5_mips,
-    dwarf_w6_mips,
-    dwarf_w7_mips,
-    dwarf_w8_mips,
-    dwarf_w9_mips,
-    dwarf_w10_mips,
-    dwarf_w11_mips,
-    dwarf_w12_mips,
-    dwarf_w13_mips,
-    dwarf_w14_mips,
-    dwarf_w15_mips,
-    dwarf_w16_mips,
-    dwarf_w17_mips,
-    dwarf_w18_mips,
-    dwarf_w19_mips,
-    dwarf_w20_mips,
-    dwarf_w21_mips,
-    dwarf_w22_mips,
-    dwarf_w23_mips,
-    dwarf_w24_mips,
-    dwarf_w25_mips,
-    dwarf_w26_mips,
-    dwarf_w27_mips,
-    dwarf_w28_mips,
-    dwarf_w29_mips,
-    dwarf_w30_mips,
-    dwarf_w31_mips,
-    dwarf_mcsr_mips,
-    dwarf_mir_mips,
-    dwarf_config5_mips,
-    dwarf_ic_mips,
-    dwarf_dummy_mips
+// eh_frame and DWARF Register numbers (eRegisterKindEHFrame &
+// eRegisterKindDWARF)
+
+enum {
+  // GP Registers
+  dwarf_zero_mips = 0,
+  dwarf_r1_mips,
+  dwarf_r2_mips,
+  dwarf_r3_mips,
+  dwarf_r4_mips,
+  dwarf_r5_mips,
+  dwarf_r6_mips,
+  dwarf_r7_mips,
+  dwarf_r8_mips,
+  dwarf_r9_mips,
+  dwarf_r10_mips,
+  dwarf_r11_mips,
+  dwarf_r12_mips,
+  dwarf_r13_mips,
+  dwarf_r14_mips,
+  dwarf_r15_mips,
+  dwarf_r16_mips,
+  dwarf_r17_mips,
+  dwarf_r18_mips,
+  dwarf_r19_mips,
+  dwarf_r20_mips,
+  dwarf_r21_mips,
+  dwarf_r22_mips,
+  dwarf_r23_mips,
+  dwarf_r24_mips,
+  dwarf_r25_mips,
+  dwarf_r26_mips,
+  dwarf_r27_mips,
+  dwarf_gp_mips,
+  dwarf_sp_mips,
+  dwarf_r30_mips,
+  dwarf_ra_mips,
+  dwarf_sr_mips,
+  dwarf_lo_mips,
+  dwarf_hi_mips,
+  dwarf_bad_mips,
+  dwarf_cause_mips,
+  dwarf_pc_mips,
+  dwarf_f0_mips,
+  dwarf_f1_mips,
+  dwarf_f2_mips,
+  dwarf_f3_mips,
+  dwarf_f4_mips,
+  dwarf_f5_mips,
+  dwarf_f6_mips,
+  dwarf_f7_mips,
+  dwarf_f8_mips,
+  dwarf_f9_mips,
+  dwarf_f10_mips,
+  dwarf_f11_mips,
+  dwarf_f12_mips,
+  dwarf_f13_mips,
+  dwarf_f14_mips,
+  dwarf_f15_mips,
+  dwarf_f16_mips,
+  dwarf_f17_mips,
+  dwarf_f18_mips,
+  dwarf_f19_mips,
+  dwarf_f20_mips,
+  dwarf_f21_mips,
+  dwarf_f22_mips,
+  dwarf_f23_mips,
+  dwarf_f24_mips,
+  dwarf_f25_mips,
+  dwarf_f26_mips,
+  dwarf_f27_mips,
+  dwarf_f28_mips,
+  dwarf_f29_mips,
+  dwarf_f30_mips,
+  dwarf_f31_mips,
+  dwarf_fcsr_mips,
+  dwarf_fir_mips,
+  dwarf_w0_mips,
+  dwarf_w1_mips,
+  dwarf_w2_mips,
+  dwarf_w3_mips,
+  dwarf_w4_mips,
+  dwarf_w5_mips,
+  dwarf_w6_mips,
+  dwarf_w7_mips,
+  dwarf_w8_mips,
+  dwarf_w9_mips,
+  dwarf_w10_mips,
+  dwarf_w11_mips,
+  dwarf_w12_mips,
+  dwarf_w13_mips,
+  dwarf_w14_mips,
+  dwarf_w15_mips,
+  dwarf_w16_mips,
+  dwarf_w17_mips,
+  dwarf_w18_mips,
+  dwarf_w19_mips,
+  dwarf_w20_mips,
+  dwarf_w21_mips,
+  dwarf_w22_mips,
+  dwarf_w23_mips,
+  dwarf_w24_mips,
+  dwarf_w25_mips,
+  dwarf_w26_mips,
+  dwarf_w27_mips,
+  dwarf_w28_mips,
+  dwarf_w29_mips,
+  dwarf_w30_mips,
+  dwarf_w31_mips,
+  dwarf_mcsr_mips,
+  dwarf_mir_mips,
+  dwarf_config5_mips,
+  dwarf_ic_mips,
+  dwarf_dummy_mips
 };
 
-enum
-{
-    dwarf_zero_mips64 = 0,
-    dwarf_r1_mips64,
-    dwarf_r2_mips64,
-    dwarf_r3_mips64,
-    dwarf_r4_mips64,
-    dwarf_r5_mips64,
-    dwarf_r6_mips64,
-    dwarf_r7_mips64,
-    dwarf_r8_mips64,
-    dwarf_r9_mips64,
-    dwarf_r10_mips64,
-    dwarf_r11_mips64,
-    dwarf_r12_mips64,
-    dwarf_r13_mips64,
-    dwarf_r14_mips64,
-    dwarf_r15_mips64,
-    dwarf_r16_mips64,
-    dwarf_r17_mips64,
-    dwarf_r18_mips64,
-    dwarf_r19_mips64,
-    dwarf_r20_mips64,
-    dwarf_r21_mips64,
-    dwarf_r22_mips64,
-    dwarf_r23_mips64,
-    dwarf_r24_mips64,
-    dwarf_r25_mips64,
-    dwarf_r26_mips64,
-    dwarf_r27_mips64,
-    dwarf_gp_mips64,
-    dwarf_sp_mips64,
-    dwarf_r30_mips64,
-    dwarf_ra_mips64,
-    dwarf_sr_mips64,
-    dwarf_lo_mips64,
-    dwarf_hi_mips64,
-    dwarf_bad_mips64,
-    dwarf_cause_mips64,
-    dwarf_pc_mips64,
-    dwarf_f0_mips64,
-    dwarf_f1_mips64,
-    dwarf_f2_mips64,
-    dwarf_f3_mips64,
-    dwarf_f4_mips64,
-    dwarf_f5_mips64,
-    dwarf_f6_mips64,
-    dwarf_f7_mips64,
-    dwarf_f8_mips64,
-    dwarf_f9_mips64,
-    dwarf_f10_mips64,
-    dwarf_f11_mips64,
-    dwarf_f12_mips64,
-    dwarf_f13_mips64,
-    dwarf_f14_mips64,
-    dwarf_f15_mips64,
-    dwarf_f16_mips64,
-    dwarf_f17_mips64,
-    dwarf_f18_mips64,
-    dwarf_f19_mips64,
-    dwarf_f20_mips64,
-    dwarf_f21_mips64,
-    dwarf_f22_mips64,
-    dwarf_f23_mips64,
-    dwarf_f24_mips64,
-    dwarf_f25_mips64,
-    dwarf_f26_mips64,
-    dwarf_f27_mips64,
-    dwarf_f28_mips64,
-    dwarf_f29_mips64,
-    dwarf_f30_mips64,
-    dwarf_f31_mips64,
-    dwarf_fcsr_mips64,
-    dwarf_fir_mips64,
-    dwarf_ic_mips64,
-    dwarf_dummy_mips64,
-    dwarf_w0_mips64,
-    dwarf_w1_mips64,
-    dwarf_w2_mips64,
-    dwarf_w3_mips64,
-    dwarf_w4_mips64,
-    dwarf_w5_mips64,
-    dwarf_w6_mips64,
-    dwarf_w7_mips64,
-    dwarf_w8_mips64,
-    dwarf_w9_mips64,
-    dwarf_w10_mips64,
-    dwarf_w11_mips64,
-    dwarf_w12_mips64,
-    dwarf_w13_mips64,
-    dwarf_w14_mips64,
-    dwarf_w15_mips64,
-    dwarf_w16_mips64,
-    dwarf_w17_mips64,
-    dwarf_w18_mips64,
-    dwarf_w19_mips64,
-    dwarf_w20_mips64,
-    dwarf_w21_mips64,
-    dwarf_w22_mips64,
-    dwarf_w23_mips64,
-    dwarf_w24_mips64,
-    dwarf_w25_mips64,
-    dwarf_w26_mips64,
-    dwarf_w27_mips64,
-    dwarf_w28_mips64,
-    dwarf_w29_mips64,
-    dwarf_w30_mips64,
-    dwarf_w31_mips64,
-    dwarf_mcsr_mips64,
-    dwarf_mir_mips64,
-    dwarf_config5_mips64,
+enum {
+  dwarf_zero_mips64 = 0,
+  dwarf_r1_mips64,
+  dwarf_r2_mips64,
+  dwarf_r3_mips64,
+  dwarf_r4_mips64,
+  dwarf_r5_mips64,
+  dwarf_r6_mips64,
+  dwarf_r7_mips64,
+  dwarf_r8_mips64,
+  dwarf_r9_mips64,
+  dwarf_r10_mips64,
+  dwarf_r11_mips64,
+  dwarf_r12_mips64,
+  dwarf_r13_mips64,
+  dwarf_r14_mips64,
+  dwarf_r15_mips64,
+  dwarf_r16_mips64,
+  dwarf_r17_mips64,
+  dwarf_r18_mips64,
+  dwarf_r19_mips64,
+  dwarf_r20_mips64,
+  dwarf_r21_mips64,
+  dwarf_r22_mips64,
+  dwarf_r23_mips64,
+  dwarf_r24_mips64,
+  dwarf_r25_mips64,
+  dwarf_r26_mips64,
+  dwarf_r27_mips64,
+  dwarf_gp_mips64,
+  dwarf_sp_mips64,
+  dwarf_r30_mips64,
+  dwarf_ra_mips64,
+  dwarf_sr_mips64,
+  dwarf_lo_mips64,
+  dwarf_hi_mips64,
+  dwarf_bad_mips64,
+  dwarf_cause_mips64,
+  dwarf_pc_mips64,
+  dwarf_f0_mips64,
+  dwarf_f1_mips64,
+  dwarf_f2_mips64,
+  dwarf_f3_mips64,
+  dwarf_f4_mips64,
+  dwarf_f5_mips64,
+  dwarf_f6_mips64,
+  dwarf_f7_mips64,
+  dwarf_f8_mips64,
+  dwarf_f9_mips64,
+  dwarf_f10_mips64,
+  dwarf_f11_mips64,
+  dwarf_f12_mips64,
+  dwarf_f13_mips64,
+  dwarf_f14_mips64,
+  dwarf_f15_mips64,
+  dwarf_f16_mips64,
+  dwarf_f17_mips64,
+  dwarf_f18_mips64,
+  dwarf_f19_mips64,
+  dwarf_f20_mips64,
+  dwarf_f21_mips64,
+  dwarf_f22_mips64,
+  dwarf_f23_mips64,
+  dwarf_f24_mips64,
+  dwarf_f25_mips64,
+  dwarf_f26_mips64,
+  dwarf_f27_mips64,
+  dwarf_f28_mips64,
+  dwarf_f29_mips64,
+  dwarf_f30_mips64,
+  dwarf_f31_mips64,
+  dwarf_fcsr_mips64,
+  dwarf_fir_mips64,
+  dwarf_ic_mips64,
+  dwarf_dummy_mips64,
+  dwarf_w0_mips64,
+  dwarf_w1_mips64,
+  dwarf_w2_mips64,
+  dwarf_w3_mips64,
+  dwarf_w4_mips64,
+  dwarf_w5_mips64,
+  dwarf_w6_mips64,
+  dwarf_w7_mips64,
+  dwarf_w8_mips64,
+  dwarf_w9_mips64,
+  dwarf_w10_mips64,
+  dwarf_w11_mips64,
+  dwarf_w12_mips64,
+  dwarf_w13_mips64,
+  dwarf_w14_mips64,
+  dwarf_w15_mips64,
+  dwarf_w16_mips64,
+  dwarf_w17_mips64,
+  dwarf_w18_mips64,
+  dwarf_w19_mips64,
+  dwarf_w20_mips64,
+  dwarf_w21_mips64,
+  dwarf_w22_mips64,
+  dwarf_w23_mips64,
+  dwarf_w24_mips64,
+  dwarf_w25_mips64,
+  dwarf_w26_mips64,
+  dwarf_w27_mips64,
+  dwarf_w28_mips64,
+  dwarf_w29_mips64,
+  dwarf_w30_mips64,
+  dwarf_w31_mips64,
+  dwarf_mcsr_mips64,
+  dwarf_mir_mips64,
+  dwarf_config5_mips64,
 };
 
-struct IOVEC_mips
-{
-    void    *iov_base;
-    size_t   iov_len;
+struct IOVEC_mips {
+  void *iov_base;
+  size_t iov_len;
 };
 
 // GP registers
-struct GPR_linux_mips
-{
-    uint64_t zero;
-    uint64_t r1;
-    uint64_t r2;
-    uint64_t r3;
-    uint64_t r4;
-    uint64_t r5;
-    uint64_t r6;
-    uint64_t r7;
-    uint64_t r8;
-    uint64_t r9;
-    uint64_t r10;
-    uint64_t r11;
-    uint64_t r12;
-    uint64_t r13;
-    uint64_t r14;
-    uint64_t r15;
-    uint64_t r16;
-    uint64_t r17;
-    uint64_t r18;
-    uint64_t r19;
-    uint64_t r20;
-    uint64_t r21;
-    uint64_t r22;
-    uint64_t r23;
-    uint64_t r24;
-    uint64_t r25;
-    uint64_t r26;
-    uint64_t r27;
-    uint64_t gp;
-    uint64_t sp;
-    uint64_t r30;
-    uint64_t ra;
-    uint64_t mullo;
-    uint64_t mulhi;
-    uint64_t pc;
-    uint64_t badvaddr;
-    uint64_t sr;
-    uint64_t cause;
-    uint64_t config5;
+struct GPR_linux_mips {
+  uint64_t zero;
+  uint64_t r1;
+  uint64_t r2;
+  uint64_t r3;
+  uint64_t r4;
+  uint64_t r5;
+  uint64_t r6;
+  uint64_t r7;
+  uint64_t r8;
+  uint64_t r9;
+  uint64_t r10;
+  uint64_t r11;
+  uint64_t r12;
+  uint64_t r13;
+  uint64_t r14;
+  uint64_t r15;
+  uint64_t r16;
+  uint64_t r17;
+  uint64_t r18;
+  uint64_t r19;
+  uint64_t r20;
+  uint64_t r21;
+  uint64_t r22;
+  uint64_t r23;
+  uint64_t r24;
+  uint64_t r25;
+  uint64_t r26;
+  uint64_t r27;
+  uint64_t gp;
+  uint64_t sp;
+  uint64_t r30;
+  uint64_t ra;
+  uint64_t mullo;
+  uint64_t mulhi;
+  uint64_t pc;
+  uint64_t badvaddr;
+  uint64_t sr;
+  uint64_t cause;
+  uint64_t config5;
 };
 
-struct FPR_linux_mips
-{
-     uint64_t f0;
-     uint64_t f1;
-     uint64_t f2;
-     uint64_t f3;
-     uint64_t f4;
-     uint64_t f5;
-     uint64_t f6;
-     uint64_t f7;
-     uint64_t f8;
-     uint64_t f9;
-     uint64_t f10;
-     uint64_t f11;
-     uint64_t f12;
-     uint64_t f13;
-     uint64_t f14;
-     uint64_t f15;
-     uint64_t f16;
-     uint64_t f17;
-     uint64_t f18;
-     uint64_t f19;
-     uint64_t f20;
-     uint64_t f21;
-     uint64_t f22;
-     uint64_t f23;
-     uint64_t f24;
-     uint64_t f25;
-     uint64_t f26;
-     uint64_t f27;
-     uint64_t f28;
-     uint64_t f29;
-     uint64_t f30;
-     uint64_t f31;
-     uint32_t fcsr;
-     uint32_t fir;
-     uint32_t config5;
+struct FPR_linux_mips {
+  uint64_t f0;
+  uint64_t f1;
+  uint64_t f2;
+  uint64_t f3;
+  uint64_t f4;
+  uint64_t f5;
+  uint64_t f6;
+  uint64_t f7;
+  uint64_t f8;
+  uint64_t f9;
+  uint64_t f10;
+  uint64_t f11;
+  uint64_t f12;
+  uint64_t f13;
+  uint64_t f14;
+  uint64_t f15;
+  uint64_t f16;
+  uint64_t f17;
+  uint64_t f18;
+  uint64_t f19;
+  uint64_t f20;
+  uint64_t f21;
+  uint64_t f22;
+  uint64_t f23;
+  uint64_t f24;
+  uint64_t f25;
+  uint64_t f26;
+  uint64_t f27;
+  uint64_t f28;
+  uint64_t f29;
+  uint64_t f30;
+  uint64_t f31;
+  uint32_t fcsr;
+  uint32_t fir;
+  uint32_t config5;
 };
 
-struct MSAReg
-{
-    uint8_t byte[16];
+struct MSAReg {
+  uint8_t byte[16];
 };
 
-struct MSA_linux_mips
-{
-    MSAReg  w0;
-    MSAReg  w1;
-    MSAReg  w2;
-    MSAReg  w3;
-    MSAReg  w4;
-    MSAReg  w5;
-    MSAReg  w6;
-    MSAReg  w7;
-    MSAReg  w8;
-    MSAReg  w9;
-    MSAReg  w10;
-    MSAReg  w11;
-    MSAReg  w12;
-    MSAReg  w13;
-    MSAReg  w14;
-    MSAReg  w15;
-    MSAReg  w16;
-    MSAReg  w17;
-    MSAReg  w18;
-    MSAReg  w19;
-    MSAReg  w20;
-    MSAReg  w21;
-    MSAReg  w22;
-    MSAReg  w23;
-    MSAReg  w24;
-    MSAReg  w25;
-    MSAReg  w26;
-    MSAReg  w27;
-    MSAReg  w28;
-    MSAReg  w29;
-    MSAReg  w30;
-    MSAReg  w31;
-    uint32_t fcsr;      /* FPU control status register */
-    uint32_t fir;       /* FPU implementaion revision */
-    uint32_t mcsr;      /* MSA control status register */
-    uint32_t mir;       /* MSA implementation revision */
-    uint32_t config5;   /* Config5 register */
+struct MSA_linux_mips {
+  MSAReg w0;
+  MSAReg w1;
+  MSAReg w2;
+  MSAReg w3;
+  MSAReg w4;
+  MSAReg w5;
+  MSAReg w6;
+  MSAReg w7;
+  MSAReg w8;
+  MSAReg w9;
+  MSAReg w10;
+  MSAReg w11;
+  MSAReg w12;
+  MSAReg w13;
+  MSAReg w14;
+  MSAReg w15;
+  MSAReg w16;
+  MSAReg w17;
+  MSAReg w18;
+  MSAReg w19;
+  MSAReg w20;
+  MSAReg w21;
+  MSAReg w22;
+  MSAReg w23;
+  MSAReg w24;
+  MSAReg w25;
+  MSAReg w26;
+  MSAReg w27;
+  MSAReg w28;
+  MSAReg w29;
+  MSAReg w30;
+  MSAReg w31;
+  uint32_t fcsr;    /* FPU control status register */
+  uint32_t fir;     /* FPU implementaion revision */
+  uint32_t mcsr;    /* MSA control status register */
+  uint32_t mir;     /* MSA implementation revision */
+  uint32_t config5; /* Config5 register */
 };
 
-struct UserArea
-{
-    GPR_linux_mips gpr; // General purpose registers.
-    FPR_linux_mips fpr; // Floating point registers.
-    MSA_linux_mips msa; // MSA registers.
+struct UserArea {
+  GPR_linux_mips gpr; // General purpose registers.
+  FPR_linux_mips fpr; // Floating point registers.
+  MSA_linux_mips msa; // MSA registers.
 };
 
 #endif // liblldb_RegisterContext_mips64_H_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_powerpc.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_powerpc.h
index 2e3053c..7324295 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_powerpc.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_powerpc.h
@@ -1,4 +1,5 @@
-//===-- RegisterContext_powerpc.h --------------------------------*- C++ -*-===//
+//===-- RegisterContext_powerpc.h --------------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -10,114 +11,114 @@
 #ifndef liblldb_RegisterContext_powerpc_H_
 #define liblldb_RegisterContext_powerpc_H_
 
-// eh_frame and DWARF Register numbers (eRegisterKindEHFrame & eRegisterKindDWARF)
-enum
-{
-    dwarf_r0_powerpc = 0,
-    dwarf_r1_powerpc,
-    dwarf_r2_powerpc,
-    dwarf_r3_powerpc,
-    dwarf_r4_powerpc,
-    dwarf_r5_powerpc,
-    dwarf_r6_powerpc,
-    dwarf_r7_powerpc,
-    dwarf_r8_powerpc,
-    dwarf_r9_powerpc,
-    dwarf_r10_powerpc,
-    dwarf_r11_powerpc,
-    dwarf_r12_powerpc,
-    dwarf_r13_powerpc,
-    dwarf_r14_powerpc,
-    dwarf_r15_powerpc,
-    dwarf_r16_powerpc,
-    dwarf_r17_powerpc,
-    dwarf_r18_powerpc,
-    dwarf_r19_powerpc,
-    dwarf_r20_powerpc,
-    dwarf_r21_powerpc,
-    dwarf_r22_powerpc,
-    dwarf_r23_powerpc,
-    dwarf_r24_powerpc,
-    dwarf_r25_powerpc,
-    dwarf_r26_powerpc,
-    dwarf_r27_powerpc,
-    dwarf_r28_powerpc,
-    dwarf_r29_powerpc,
-    dwarf_r30_powerpc,
-    dwarf_r31_powerpc,
-    dwarf_f0_powerpc,
-    dwarf_f1_powerpc,
-    dwarf_f2_powerpc,
-    dwarf_f3_powerpc,
-    dwarf_f4_powerpc,
-    dwarf_f5_powerpc,
-    dwarf_f6_powerpc,
-    dwarf_f7_powerpc,
-    dwarf_f8_powerpc,
-    dwarf_f9_powerpc,
-    dwarf_f10_powerpc,
-    dwarf_f11_powerpc,
-    dwarf_f12_powerpc,
-    dwarf_f13_powerpc,
-    dwarf_f14_powerpc,
-    dwarf_f15_powerpc,
-    dwarf_f16_powerpc,
-    dwarf_f17_powerpc,
-    dwarf_f18_powerpc,
-    dwarf_f19_powerpc,
-    dwarf_f20_powerpc,
-    dwarf_f21_powerpc,
-    dwarf_f22_powerpc,
-    dwarf_f23_powerpc,
-    dwarf_f24_powerpc,
-    dwarf_f25_powerpc,
-    dwarf_f26_powerpc,
-    dwarf_f27_powerpc,
-    dwarf_f28_powerpc,
-    dwarf_f29_powerpc,
-    dwarf_f30_powerpc,
-    dwarf_f31_powerpc,
-    dwarf_cr_powerpc,
-    dwarf_fpscr_powerpc,
-    dwarf_msr_powerpc,
-    dwarf_vscr_powerpc,
-    dwarf_xer_powerpc = 101,
-    dwarf_lr_powerpc = 108,
-    dwarf_ctr_powerpc,
-    dwarf_pc_powerpc,
-    dwarf_vrsave_powerpc = 356,
-    dwarf_v0_powerpc = 1124,
-    dwarf_v1_powerpc,
-    dwarf_v2_powerpc,
-    dwarf_v3_powerpc,
-    dwarf_v4_powerpc,
-    dwarf_v5_powerpc,
-    dwarf_v6_powerpc,
-    dwarf_v7_powerpc,
-    dwarf_v8_powerpc,
-    dwarf_v9_powerpc,
-    dwarf_v10_powerpc,
-    dwarf_v11_powerpc,
-    dwarf_v12_powerpc,
-    dwarf_v13_powerpc,
-    dwarf_v14_powerpc,
-    dwarf_v15_powerpc,
-    dwarf_v16_powerpc,
-    dwarf_v17_powerpc,
-    dwarf_v18_powerpc,
-    dwarf_v19_powerpc,
-    dwarf_v20_powerpc,
-    dwarf_v21_powerpc,
-    dwarf_v22_powerpc,
-    dwarf_v23_powerpc,
-    dwarf_v24_powerpc,
-    dwarf_v25_powerpc,
-    dwarf_v26_powerpc,
-    dwarf_v27_powerpc,
-    dwarf_v28_powerpc,
-    dwarf_v29_powerpc,
-    dwarf_v30_powerpc,
-    dwarf_v31_powerpc,
+// eh_frame and DWARF Register numbers (eRegisterKindEHFrame &
+// eRegisterKindDWARF)
+enum {
+  dwarf_r0_powerpc = 0,
+  dwarf_r1_powerpc,
+  dwarf_r2_powerpc,
+  dwarf_r3_powerpc,
+  dwarf_r4_powerpc,
+  dwarf_r5_powerpc,
+  dwarf_r6_powerpc,
+  dwarf_r7_powerpc,
+  dwarf_r8_powerpc,
+  dwarf_r9_powerpc,
+  dwarf_r10_powerpc,
+  dwarf_r11_powerpc,
+  dwarf_r12_powerpc,
+  dwarf_r13_powerpc,
+  dwarf_r14_powerpc,
+  dwarf_r15_powerpc,
+  dwarf_r16_powerpc,
+  dwarf_r17_powerpc,
+  dwarf_r18_powerpc,
+  dwarf_r19_powerpc,
+  dwarf_r20_powerpc,
+  dwarf_r21_powerpc,
+  dwarf_r22_powerpc,
+  dwarf_r23_powerpc,
+  dwarf_r24_powerpc,
+  dwarf_r25_powerpc,
+  dwarf_r26_powerpc,
+  dwarf_r27_powerpc,
+  dwarf_r28_powerpc,
+  dwarf_r29_powerpc,
+  dwarf_r30_powerpc,
+  dwarf_r31_powerpc,
+  dwarf_f0_powerpc,
+  dwarf_f1_powerpc,
+  dwarf_f2_powerpc,
+  dwarf_f3_powerpc,
+  dwarf_f4_powerpc,
+  dwarf_f5_powerpc,
+  dwarf_f6_powerpc,
+  dwarf_f7_powerpc,
+  dwarf_f8_powerpc,
+  dwarf_f9_powerpc,
+  dwarf_f10_powerpc,
+  dwarf_f11_powerpc,
+  dwarf_f12_powerpc,
+  dwarf_f13_powerpc,
+  dwarf_f14_powerpc,
+  dwarf_f15_powerpc,
+  dwarf_f16_powerpc,
+  dwarf_f17_powerpc,
+  dwarf_f18_powerpc,
+  dwarf_f19_powerpc,
+  dwarf_f20_powerpc,
+  dwarf_f21_powerpc,
+  dwarf_f22_powerpc,
+  dwarf_f23_powerpc,
+  dwarf_f24_powerpc,
+  dwarf_f25_powerpc,
+  dwarf_f26_powerpc,
+  dwarf_f27_powerpc,
+  dwarf_f28_powerpc,
+  dwarf_f29_powerpc,
+  dwarf_f30_powerpc,
+  dwarf_f31_powerpc,
+  dwarf_cr_powerpc,
+  dwarf_fpscr_powerpc,
+  dwarf_msr_powerpc,
+  dwarf_vscr_powerpc,
+  dwarf_xer_powerpc = 101,
+  dwarf_lr_powerpc = 108,
+  dwarf_ctr_powerpc,
+  dwarf_pc_powerpc,
+  dwarf_vrsave_powerpc = 356,
+  dwarf_v0_powerpc = 1124,
+  dwarf_v1_powerpc,
+  dwarf_v2_powerpc,
+  dwarf_v3_powerpc,
+  dwarf_v4_powerpc,
+  dwarf_v5_powerpc,
+  dwarf_v6_powerpc,
+  dwarf_v7_powerpc,
+  dwarf_v8_powerpc,
+  dwarf_v9_powerpc,
+  dwarf_v10_powerpc,
+  dwarf_v11_powerpc,
+  dwarf_v12_powerpc,
+  dwarf_v13_powerpc,
+  dwarf_v14_powerpc,
+  dwarf_v15_powerpc,
+  dwarf_v16_powerpc,
+  dwarf_v17_powerpc,
+  dwarf_v18_powerpc,
+  dwarf_v19_powerpc,
+  dwarf_v20_powerpc,
+  dwarf_v21_powerpc,
+  dwarf_v22_powerpc,
+  dwarf_v23_powerpc,
+  dwarf_v24_powerpc,
+  dwarf_v25_powerpc,
+  dwarf_v26_powerpc,
+  dwarf_v27_powerpc,
+  dwarf_v28_powerpc,
+  dwarf_v29_powerpc,
+  dwarf_v30_powerpc,
+  dwarf_v31_powerpc,
 };
 
 #endif // liblldb_RegisterContext_powerpc_H_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_s390x.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_s390x.h
index 9777c77..90803dc 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_s390x.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_s390x.h
@@ -14,80 +14,80 @@
 // SystemZ ehframe, dwarf regnums
 //---------------------------------------------------------------------------
 
-// EHFrame and DWARF Register numbers (eRegisterKindEHFrame & eRegisterKindDWARF)
-enum
-{
-    // General Purpose Registers
-    dwarf_r0_s390x = 0,
-    dwarf_r1_s390x,
-    dwarf_r2_s390x,
-    dwarf_r3_s390x,
-    dwarf_r4_s390x,
-    dwarf_r5_s390x,
-    dwarf_r6_s390x,
-    dwarf_r7_s390x,
-    dwarf_r8_s390x,
-    dwarf_r9_s390x,
-    dwarf_r10_s390x,
-    dwarf_r11_s390x,
-    dwarf_r12_s390x,
-    dwarf_r13_s390x,
-    dwarf_r14_s390x,
-    dwarf_r15_s390x,
-    // Floating Point Registers / Vector Registers 0-15
-    dwarf_f0_s390x = 16,
-    dwarf_f2_s390x,
-    dwarf_f4_s390x,
-    dwarf_f6_s390x,
-    dwarf_f1_s390x,
-    dwarf_f3_s390x,
-    dwarf_f5_s390x,
-    dwarf_f7_s390x,
-    dwarf_f8_s390x,
-    dwarf_f10_s390x,
-    dwarf_f12_s390x,
-    dwarf_f14_s390x,
-    dwarf_f9_s390x,
-    dwarf_f11_s390x,
-    dwarf_f13_s390x,
-    dwarf_f15_s390x,
-    // Access Registers
-    dwarf_acr0_s390x = 48,
-    dwarf_acr1_s390x,
-    dwarf_acr2_s390x,
-    dwarf_acr3_s390x,
-    dwarf_acr4_s390x,
-    dwarf_acr5_s390x,
-    dwarf_acr6_s390x,
-    dwarf_acr7_s390x,
-    dwarf_acr8_s390x,
-    dwarf_acr9_s390x,
-    dwarf_acr10_s390x,
-    dwarf_acr11_s390x,
-    dwarf_acr12_s390x,
-    dwarf_acr13_s390x,
-    dwarf_acr14_s390x,
-    dwarf_acr15_s390x,
-    // Program Status Word
-    dwarf_pswm_s390x = 64,
-    dwarf_pswa_s390x,
-    // Vector Registers 16-31
-    dwarf_v16_s390x = 68,
-    dwarf_v18_s390x,
-    dwarf_v20_s390x,
-    dwarf_v22_s390x,
-    dwarf_v17_s390x,
-    dwarf_v19_s390x,
-    dwarf_v21_s390x,
-    dwarf_v23_s390x,
-    dwarf_v24_s390x,
-    dwarf_v26_s390x,
-    dwarf_v28_s390x,
-    dwarf_v30_s390x,
-    dwarf_v25_s390x,
-    dwarf_v27_s390x,
-    dwarf_v29_s390x,
-    dwarf_v31_s390x,
+// EHFrame and DWARF Register numbers (eRegisterKindEHFrame &
+// eRegisterKindDWARF)
+enum {
+  // General Purpose Registers
+  dwarf_r0_s390x = 0,
+  dwarf_r1_s390x,
+  dwarf_r2_s390x,
+  dwarf_r3_s390x,
+  dwarf_r4_s390x,
+  dwarf_r5_s390x,
+  dwarf_r6_s390x,
+  dwarf_r7_s390x,
+  dwarf_r8_s390x,
+  dwarf_r9_s390x,
+  dwarf_r10_s390x,
+  dwarf_r11_s390x,
+  dwarf_r12_s390x,
+  dwarf_r13_s390x,
+  dwarf_r14_s390x,
+  dwarf_r15_s390x,
+  // Floating Point Registers / Vector Registers 0-15
+  dwarf_f0_s390x = 16,
+  dwarf_f2_s390x,
+  dwarf_f4_s390x,
+  dwarf_f6_s390x,
+  dwarf_f1_s390x,
+  dwarf_f3_s390x,
+  dwarf_f5_s390x,
+  dwarf_f7_s390x,
+  dwarf_f8_s390x,
+  dwarf_f10_s390x,
+  dwarf_f12_s390x,
+  dwarf_f14_s390x,
+  dwarf_f9_s390x,
+  dwarf_f11_s390x,
+  dwarf_f13_s390x,
+  dwarf_f15_s390x,
+  // Access Registers
+  dwarf_acr0_s390x = 48,
+  dwarf_acr1_s390x,
+  dwarf_acr2_s390x,
+  dwarf_acr3_s390x,
+  dwarf_acr4_s390x,
+  dwarf_acr5_s390x,
+  dwarf_acr6_s390x,
+  dwarf_acr7_s390x,
+  dwarf_acr8_s390x,
+  dwarf_acr9_s390x,
+  dwarf_acr10_s390x,
+  dwarf_acr11_s390x,
+  dwarf_acr12_s390x,
+  dwarf_acr13_s390x,
+  dwarf_acr14_s390x,
+  dwarf_acr15_s390x,
+  // Program Status Word
+  dwarf_pswm_s390x = 64,
+  dwarf_pswa_s390x,
+  // Vector Registers 16-31
+  dwarf_v16_s390x = 68,
+  dwarf_v18_s390x,
+  dwarf_v20_s390x,
+  dwarf_v22_s390x,
+  dwarf_v17_s390x,
+  dwarf_v19_s390x,
+  dwarf_v21_s390x,
+  dwarf_v23_s390x,
+  dwarf_v24_s390x,
+  dwarf_v26_s390x,
+  dwarf_v28_s390x,
+  dwarf_v30_s390x,
+  dwarf_v25_s390x,
+  dwarf_v27_s390x,
+  dwarf_v29_s390x,
+  dwarf_v31_s390x,
 };
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_x86.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_x86.h
index 252f125..ab2ca2b 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_x86.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_x86.h
@@ -10,319 +10,350 @@
 #ifndef liblldb_RegisterContext_x86_H_
 #define liblldb_RegisterContext_x86_H_
 
+#include <cstddef>
+#include <cstdint>
+
+#include "llvm/Support/Compiler.h"
+
 //---------------------------------------------------------------------------
 // i386 ehframe, dwarf regnums
 //---------------------------------------------------------------------------
 
-// Register numbers seen in eh_frame (eRegisterKindEHFrame) on i386 systems (non-Darwin)
+// Register numbers seen in eh_frame (eRegisterKindEHFrame) on i386 systems
+// (non-Darwin)
 //
-enum
-{
-    ehframe_eax_i386 = 0,
-    ehframe_ecx_i386,
-    ehframe_edx_i386,
-    ehframe_ebx_i386,
+enum {
+  ehframe_eax_i386 = 0,
+  ehframe_ecx_i386,
+  ehframe_edx_i386,
+  ehframe_ebx_i386,
 
-    // on Darwin esp & ebp are reversed in the eh_frame section for i386 (versus dwarf's reg numbering).
-    // To be specific:
-    //    i386+darwin eh_frame:        4 is ebp, 5 is esp
-    //    i386+everyone else eh_frame: 4 is esp, 5 is ebp
-    //    i386 dwarf:                  4 is esp, 5 is ebp
-    // lldb will get the darwin-specific eh_frame reg numberings from debugserver, or the ABI, so we
-    // only encode the generally correct 4 == esp, 5 == ebp numbers in this generic header.
+  // on Darwin esp & ebp are reversed in the eh_frame section for i386 (versus
+  // dwarf's reg numbering).
+  // To be specific:
+  //    i386+darwin eh_frame:        4 is ebp, 5 is esp
+  //    i386+everyone else eh_frame: 4 is esp, 5 is ebp
+  //    i386 dwarf:                  4 is esp, 5 is ebp
+  // lldb will get the darwin-specific eh_frame reg numberings from debugserver,
+  // or the ABI, so we
+  // only encode the generally correct 4 == esp, 5 == ebp numbers in this
+  // generic header.
 
-    ehframe_esp_i386,
-    ehframe_ebp_i386,  
-    ehframe_esi_i386,
-    ehframe_edi_i386,
-    ehframe_eip_i386,
-    ehframe_eflags_i386,
-    ehframe_st0_i386 = 12,
-    ehframe_st1_i386,
-    ehframe_st2_i386,
-    ehframe_st3_i386,
-    ehframe_st4_i386,
-    ehframe_st5_i386,
-    ehframe_st6_i386,
-    ehframe_st7_i386,
-    ehframe_xmm0_i386 = 21,
-    ehframe_xmm1_i386,
-    ehframe_xmm2_i386,
-    ehframe_xmm3_i386,
-    ehframe_xmm4_i386,
-    ehframe_xmm5_i386,
-    ehframe_xmm6_i386,
-    ehframe_xmm7_i386,
-    ehframe_mm0_i386 = 29,
-    ehframe_mm1_i386,
-    ehframe_mm2_i386,
-    ehframe_mm3_i386,
-    ehframe_mm4_i386,
-    ehframe_mm5_i386,
-    ehframe_mm6_i386,
-    ehframe_mm7_i386,
+  ehframe_esp_i386,
+  ehframe_ebp_i386,
+  ehframe_esi_i386,
+  ehframe_edi_i386,
+  ehframe_eip_i386,
+  ehframe_eflags_i386,
+  ehframe_st0_i386 = 12,
+  ehframe_st1_i386,
+  ehframe_st2_i386,
+  ehframe_st3_i386,
+  ehframe_st4_i386,
+  ehframe_st5_i386,
+  ehframe_st6_i386,
+  ehframe_st7_i386,
+  ehframe_xmm0_i386 = 21,
+  ehframe_xmm1_i386,
+  ehframe_xmm2_i386,
+  ehframe_xmm3_i386,
+  ehframe_xmm4_i386,
+  ehframe_xmm5_i386,
+  ehframe_xmm6_i386,
+  ehframe_xmm7_i386,
+  ehframe_mm0_i386 = 29,
+  ehframe_mm1_i386,
+  ehframe_mm2_i386,
+  ehframe_mm3_i386,
+  ehframe_mm4_i386,
+  ehframe_mm5_i386,
+  ehframe_mm6_i386,
+  ehframe_mm7_i386,
 };
 
 // DWARF register numbers (eRegisterKindDWARF)
 // Intel's x86 or IA-32
-enum
-{
-    // General Purpose Registers.
-    dwarf_eax_i386 = 0,
-    dwarf_ecx_i386,
-    dwarf_edx_i386,
-    dwarf_ebx_i386,
-    dwarf_esp_i386,
-    dwarf_ebp_i386,
-    dwarf_esi_i386,
-    dwarf_edi_i386,
-    dwarf_eip_i386,
-    dwarf_eflags_i386,
-    // Floating Point Registers
-    dwarf_st0_i386 = 11,
-    dwarf_st1_i386,
-    dwarf_st2_i386,
-    dwarf_st3_i386,
-    dwarf_st4_i386,
-    dwarf_st5_i386,
-    dwarf_st6_i386,
-    dwarf_st7_i386,
-    // SSE Registers
-    dwarf_xmm0_i386 = 21,
-    dwarf_xmm1_i386,
-    dwarf_xmm2_i386,
-    dwarf_xmm3_i386,
-    dwarf_xmm4_i386,
-    dwarf_xmm5_i386,
-    dwarf_xmm6_i386,
-    dwarf_xmm7_i386,
-    // MMX Registers
-    dwarf_mm0_i386 = 29,
-    dwarf_mm1_i386,
-    dwarf_mm2_i386,
-    dwarf_mm3_i386,
-    dwarf_mm4_i386,
-    dwarf_mm5_i386,
-    dwarf_mm6_i386,
-    dwarf_mm7_i386,
-    dwarf_fctrl_i386 = 37, // x87 control word
-    dwarf_fstat_i386 = 38, // x87 status word
-    dwarf_mxcsr_i386 = 39,
-    dwarf_es_i386 = 40,
-    dwarf_cs_i386 = 41,
-    dwarf_ss_i386 = 42,
-    dwarf_ds_i386 = 43,
-    dwarf_fs_i386 = 44,
-    dwarf_gs_i386 = 45
+enum {
+  // General Purpose Registers.
+  dwarf_eax_i386 = 0,
+  dwarf_ecx_i386,
+  dwarf_edx_i386,
+  dwarf_ebx_i386,
+  dwarf_esp_i386,
+  dwarf_ebp_i386,
+  dwarf_esi_i386,
+  dwarf_edi_i386,
+  dwarf_eip_i386,
+  dwarf_eflags_i386,
+  // Floating Point Registers
+  dwarf_st0_i386 = 11,
+  dwarf_st1_i386,
+  dwarf_st2_i386,
+  dwarf_st3_i386,
+  dwarf_st4_i386,
+  dwarf_st5_i386,
+  dwarf_st6_i386,
+  dwarf_st7_i386,
+  // SSE Registers
+  dwarf_xmm0_i386 = 21,
+  dwarf_xmm1_i386,
+  dwarf_xmm2_i386,
+  dwarf_xmm3_i386,
+  dwarf_xmm4_i386,
+  dwarf_xmm5_i386,
+  dwarf_xmm6_i386,
+  dwarf_xmm7_i386,
+  // MMX Registers
+  dwarf_mm0_i386 = 29,
+  dwarf_mm1_i386,
+  dwarf_mm2_i386,
+  dwarf_mm3_i386,
+  dwarf_mm4_i386,
+  dwarf_mm5_i386,
+  dwarf_mm6_i386,
+  dwarf_mm7_i386,
+  dwarf_fctrl_i386 = 37, // x87 control word
+  dwarf_fstat_i386 = 38, // x87 status word
+  dwarf_mxcsr_i386 = 39,
+  dwarf_es_i386 = 40,
+  dwarf_cs_i386 = 41,
+  dwarf_ss_i386 = 42,
+  dwarf_ds_i386 = 43,
+  dwarf_fs_i386 = 44,
+  dwarf_gs_i386 = 45,
 
-    // I believe the ymm registers use the dwarf_xmm%_i386 register numbers and
-    //  then differentiate based on size of the register.
+  // I believe the ymm registers use the dwarf_xmm%_i386 register numbers and
+  //  then differentiate based on size of the register.
+  dwarf_bnd0_i386 = 101,
+  dwarf_bnd1_i386,
+  dwarf_bnd2_i386,
+  dwarf_bnd3_i386,
 };
 
 //---------------------------------------------------------------------------
 // AMD x86_64, AMD64, Intel EM64T, or Intel 64 ehframe, dwarf regnums
 //---------------------------------------------------------------------------
 
-// EHFrame and DWARF Register numbers (eRegisterKindEHFrame & eRegisterKindDWARF)
+// EHFrame and DWARF Register numbers (eRegisterKindEHFrame &
+// eRegisterKindDWARF)
 //  This is the spec I used (as opposed to x86-64-abi-0.99.pdf):
 //  http://software.intel.com/sites/default/files/article/402129/mpx-linux64-abi.pdf
-enum
-{
-    // GP Registers
-    dwarf_rax_x86_64 = 0,
-    dwarf_rdx_x86_64,
-    dwarf_rcx_x86_64,
-    dwarf_rbx_x86_64,
-    dwarf_rsi_x86_64,
-    dwarf_rdi_x86_64,
-    dwarf_rbp_x86_64,
-    dwarf_rsp_x86_64,
-    // Extended GP Registers
-    dwarf_r8_x86_64 = 8,
-    dwarf_r9_x86_64,
-    dwarf_r10_x86_64,
-    dwarf_r11_x86_64,
-    dwarf_r12_x86_64,
-    dwarf_r13_x86_64,
-    dwarf_r14_x86_64,
-    dwarf_r15_x86_64,
-    // Return Address (RA) mapped to RIP
-    dwarf_rip_x86_64 = 16,
-    // SSE Vector Registers
-    dwarf_xmm0_x86_64 = 17,
-    dwarf_xmm1_x86_64,
-    dwarf_xmm2_x86_64,
-    dwarf_xmm3_x86_64,
-    dwarf_xmm4_x86_64,
-    dwarf_xmm5_x86_64,
-    dwarf_xmm6_x86_64,
-    dwarf_xmm7_x86_64,
-    dwarf_xmm8_x86_64,
-    dwarf_xmm9_x86_64,
-    dwarf_xmm10_x86_64,
-    dwarf_xmm11_x86_64,
-    dwarf_xmm12_x86_64,
-    dwarf_xmm13_x86_64,
-    dwarf_xmm14_x86_64,
-    dwarf_xmm15_x86_64,
-    // Floating Point Registers
-    dwarf_st0_x86_64 = 33,
-    dwarf_st1_x86_64,
-    dwarf_st2_x86_64,
-    dwarf_st3_x86_64,
-    dwarf_st4_x86_64,
-    dwarf_st5_x86_64,
-    dwarf_st6_x86_64,
-    dwarf_st7_x86_64,
-    // MMX Registers
-    dwarf_mm0_x86_64 = 41,
-    dwarf_mm1_x86_64,
-    dwarf_mm2_x86_64,
-    dwarf_mm3_x86_64,
-    dwarf_mm4_x86_64,
-    dwarf_mm5_x86_64,
-    dwarf_mm6_x86_64,
-    dwarf_mm7_x86_64,
-    // Control and Status Flags Register
-    dwarf_rflags_x86_64 = 49,
-    //  selector registers
-    dwarf_es_x86_64 = 50,
-    dwarf_cs_x86_64,
-    dwarf_ss_x86_64,
-    dwarf_ds_x86_64,
-    dwarf_fs_x86_64,
-    dwarf_gs_x86_64,
-    // Floating point control registers
-    dwarf_mxcsr_x86_64 = 64, // Media Control and Status
-    dwarf_fctrl_x86_64,      // x87 control word
-    dwarf_fstat_x86_64,      // x87 status word
-    // Upper Vector Registers    
-    dwarf_ymm0h_x86_64 = 67,
-    dwarf_ymm1h_x86_64,
-    dwarf_ymm2h_x86_64,
-    dwarf_ymm3h_x86_64,
-    dwarf_ymm4h_x86_64,
-    dwarf_ymm5h_x86_64,
-    dwarf_ymm6h_x86_64,
-    dwarf_ymm7h_x86_64,
-    dwarf_ymm8h_x86_64,
-    dwarf_ymm9h_x86_64,
-    dwarf_ymm10h_x86_64,
-    dwarf_ymm11h_x86_64,
-    dwarf_ymm12h_x86_64,
-    dwarf_ymm13h_x86_64,
-    dwarf_ymm14h_x86_64,
-    dwarf_ymm15h_x86_64,
-    // AVX2 Vector Mask Registers
-    // dwarf_k0_x86_64 = 118,
-    // dwarf_k1_x86_64,
-    // dwarf_k2_x86_64,
-    // dwarf_k3_x86_64,
-    // dwarf_k4_x86_64,
-    // dwarf_k5_x86_64,
-    // dwarf_k6_x86_64,
-    // dwarf_k7_x86_64,
+enum {
+  // GP Registers
+  dwarf_rax_x86_64 = 0,
+  dwarf_rdx_x86_64,
+  dwarf_rcx_x86_64,
+  dwarf_rbx_x86_64,
+  dwarf_rsi_x86_64,
+  dwarf_rdi_x86_64,
+  dwarf_rbp_x86_64,
+  dwarf_rsp_x86_64,
+  // Extended GP Registers
+  dwarf_r8_x86_64 = 8,
+  dwarf_r9_x86_64,
+  dwarf_r10_x86_64,
+  dwarf_r11_x86_64,
+  dwarf_r12_x86_64,
+  dwarf_r13_x86_64,
+  dwarf_r14_x86_64,
+  dwarf_r15_x86_64,
+  // Return Address (RA) mapped to RIP
+  dwarf_rip_x86_64 = 16,
+  // SSE Vector Registers
+  dwarf_xmm0_x86_64 = 17,
+  dwarf_xmm1_x86_64,
+  dwarf_xmm2_x86_64,
+  dwarf_xmm3_x86_64,
+  dwarf_xmm4_x86_64,
+  dwarf_xmm5_x86_64,
+  dwarf_xmm6_x86_64,
+  dwarf_xmm7_x86_64,
+  dwarf_xmm8_x86_64,
+  dwarf_xmm9_x86_64,
+  dwarf_xmm10_x86_64,
+  dwarf_xmm11_x86_64,
+  dwarf_xmm12_x86_64,
+  dwarf_xmm13_x86_64,
+  dwarf_xmm14_x86_64,
+  dwarf_xmm15_x86_64,
+  // Floating Point Registers
+  dwarf_st0_x86_64 = 33,
+  dwarf_st1_x86_64,
+  dwarf_st2_x86_64,
+  dwarf_st3_x86_64,
+  dwarf_st4_x86_64,
+  dwarf_st5_x86_64,
+  dwarf_st6_x86_64,
+  dwarf_st7_x86_64,
+  // MMX Registers
+  dwarf_mm0_x86_64 = 41,
+  dwarf_mm1_x86_64,
+  dwarf_mm2_x86_64,
+  dwarf_mm3_x86_64,
+  dwarf_mm4_x86_64,
+  dwarf_mm5_x86_64,
+  dwarf_mm6_x86_64,
+  dwarf_mm7_x86_64,
+  // Control and Status Flags Register
+  dwarf_rflags_x86_64 = 49,
+  //  selector registers
+  dwarf_es_x86_64 = 50,
+  dwarf_cs_x86_64,
+  dwarf_ss_x86_64,
+  dwarf_ds_x86_64,
+  dwarf_fs_x86_64,
+  dwarf_gs_x86_64,
+  // Floating point control registers
+  dwarf_mxcsr_x86_64 = 64, // Media Control and Status
+  dwarf_fctrl_x86_64,      // x87 control word
+  dwarf_fstat_x86_64,      // x87 status word
+  // Upper Vector Registers
+  dwarf_ymm0h_x86_64 = 67,
+  dwarf_ymm1h_x86_64,
+  dwarf_ymm2h_x86_64,
+  dwarf_ymm3h_x86_64,
+  dwarf_ymm4h_x86_64,
+  dwarf_ymm5h_x86_64,
+  dwarf_ymm6h_x86_64,
+  dwarf_ymm7h_x86_64,
+  dwarf_ymm8h_x86_64,
+  dwarf_ymm9h_x86_64,
+  dwarf_ymm10h_x86_64,
+  dwarf_ymm11h_x86_64,
+  dwarf_ymm12h_x86_64,
+  dwarf_ymm13h_x86_64,
+  dwarf_ymm14h_x86_64,
+  dwarf_ymm15h_x86_64,
+  // MPX registers
+  dwarf_bnd0_x86_64 = 126,
+  dwarf_bnd1_x86_64,
+  dwarf_bnd2_x86_64,
+  dwarf_bnd3_x86_64,
+  // AVX2 Vector Mask Registers
+  // dwarf_k0_x86_64 = 118,
+  // dwarf_k1_x86_64,
+  // dwarf_k2_x86_64,
+  // dwarf_k3_x86_64,
+  // dwarf_k4_x86_64,
+  // dwarf_k5_x86_64,
+  // dwarf_k6_x86_64,
+  // dwarf_k7_x86_64,
 };
 
 //---------------------------------------------------------------------------
 // Generic floating-point registers
 //---------------------------------------------------------------------------
 
-struct MMSReg
-{
-    uint8_t bytes[10];
-    uint8_t pad[6];
+struct MMSReg {
+  uint8_t bytes[10];
+  uint8_t pad[6];
 };
 
-struct XMMReg
-{
-    uint8_t bytes[16];      // 128-bits for each XMM register
+struct XMMReg {
+  uint8_t bytes[16]; // 128-bits for each XMM register
 };
 
 // i387_fxsave_struct
-struct FXSAVE
-{
-    uint16_t fctrl;         // FPU Control Word (fcw)
-    uint16_t fstat;         // FPU Status Word (fsw)
-    uint8_t ftag;           // FPU Tag Word (ftw)
-    uint8_t reserved_1;     // Reserved
-    uint16_t fop;           // Last Instruction Opcode (fop)
-    union
-    {
-        struct
-        {
-            uint64_t fip;   // Instruction Pointer
-            uint64_t fdp;   // Data Pointer
-        } x86_64;
-        struct
-        {
-            uint32_t fioff;   // FPU IP Offset (fip)
-            uint32_t fiseg;   // FPU IP Selector (fcs)
-            uint32_t fooff;   // FPU Operand Pointer Offset (foo)
-            uint32_t foseg;   // FPU Operand Pointer Selector (fos)
-        } i386_;// Added _ in the end to avoid error with gcc defining i386 in some cases
-    } ptr;
-    uint32_t mxcsr;         // MXCSR Register State
-    uint32_t mxcsrmask;     // MXCSR Mask 
-    MMSReg   stmm[8];       // 8*16 bytes for each FP-reg = 128 bytes
-    XMMReg   xmm[16];       // 16*16 bytes for each XMM-reg = 256 bytes
-    uint32_t padding[24];
+struct FXSAVE {
+  uint16_t fctrl;     // FPU Control Word (fcw)
+  uint16_t fstat;     // FPU Status Word (fsw)
+  uint8_t ftag;       // FPU Tag Word (ftw)
+  uint8_t reserved_1; // Reserved
+  uint16_t fop;       // Last Instruction Opcode (fop)
+  union {
+    struct {
+      uint64_t fip; // Instruction Pointer
+      uint64_t fdp; // Data Pointer
+    } x86_64;
+    struct {
+      uint32_t fioff; // FPU IP Offset (fip)
+      uint32_t fiseg; // FPU IP Selector (fcs)
+      uint32_t fooff; // FPU Operand Pointer Offset (foo)
+      uint32_t foseg; // FPU Operand Pointer Selector (fos)
+    } i386_; // Added _ in the end to avoid error with gcc defining i386 in some
+             // cases
+  } ptr;
+  uint32_t mxcsr;     // MXCSR Register State
+  uint32_t mxcsrmask; // MXCSR Mask
+  MMSReg stmm[8];     // 8*16 bytes for each FP-reg = 128 bytes
+  XMMReg xmm[16];     // 16*16 bytes for each XMM-reg = 256 bytes
+  uint8_t padding1[48];
+  uint64_t xcr0;
+  uint8_t padding2[40];
 };
 
 //---------------------------------------------------------------------------
 // Extended floating-point registers
 //---------------------------------------------------------------------------
 
-struct YMMHReg
-{
-    uint8_t  bytes[16];     // 16 * 8 bits for the high bytes of each YMM register
+struct YMMHReg {
+  uint8_t bytes[16]; // 16 * 8 bits for the high bytes of each YMM register
+};
+
+struct YMMReg {
+  uint8_t bytes[32]; // 16 * 16 bits for each YMM register
+};
+
+struct YMM {
+  YMMReg ymm[16]; // assembled from ymmh and xmm registers
 };
 
-struct YMMReg
-{
-    uint8_t  bytes[32];     // 16 * 16 bits for each YMM register
+struct MPXReg {
+  uint8_t bytes[16]; // MPX 128 bit bound registers
 };
 
-struct YMM
-{
-    YMMReg   ymm[16];       // assembled from ymmh and xmm registers
+struct MPXCsr {
+  uint8_t bytes[8]; // MPX 64 bit bndcfgu and bndstatus registers (collectively
+                    // BNDCSR state)
 };
 
-struct XSAVE_HDR
-{
-    uint64_t  xstate_bv;    // OS enabled xstate mask to determine the extended states supported by the processor
-    uint64_t  reserved1[2];
-    uint64_t  reserved2[5];
-} __attribute__((packed));
+struct MPX {
+  MPXReg mpxr[4];
+  MPXCsr mpxc[2];
+};
 
-// x86 extensions to FXSAVE (i.e. for AVX processors) 
-struct XSAVE 
-{
-    FXSAVE    i387;         // floating point registers typical in i387_fxsave_struct
-    XSAVE_HDR header;       // The xsave_hdr_struct can be used to determine if the following extensions are usable
-    YMMHReg   ymmh[16];     // High 16 bytes of each of 16 YMM registers (the low bytes are in FXSAVE.xmm for compatibility with SSE)
-    // Slot any extensions to the register file here
-} __attribute__((packed, aligned (64)));
+LLVM_PACKED_START
+struct XSAVE_HDR {
+  uint64_t xstate_bv; // OS enabled xstate mask to determine the extended states
+                      // supported by the processor
+  uint64_t xcomp_bv;  // Mask to indicate the format of the XSAVE area and of
+                      // the XRSTOR instruction
+  uint64_t reserved1[1];
+  uint64_t reserved2[5];
+};
+LLVM_PACKED_END
+
+// x86 extensions to FXSAVE (i.e. for AVX and MPX processors)
+LLVM_PACKED_START
+struct LLVM_ALIGNAS(64) XSAVE {
+  FXSAVE i387;      // floating point registers typical in i387_fxsave_struct
+  XSAVE_HDR header; // The xsave_hdr_struct can be used to determine if the
+                    // following extensions are usable
+  YMMHReg ymmh[16]; // High 16 bytes of each of 16 YMM registers (the low bytes
+                    // are in FXSAVE.xmm for compatibility with SSE)
+  uint64_t reserved3[16];
+  MPXReg mpxr[4];   // MPX BNDREG state, containing 128-bit bound registers
+  MPXCsr mpxc[2];   // MPX BNDCSR state, containing 64-bit BNDCFGU and
+                    // BNDSTATUS registers
+};
+LLVM_PACKED_END
 
 // Floating-point registers
-struct FPR
-{
-    // Thread state for the floating-point unit of the processor read by ptrace.
-    union XSTATE
-    {
-        FXSAVE   fxsave;    // Generic floating-point registers.
-        XSAVE    xsave;     // x86 extended processor state.
-    } xstate;
+struct FPR {
+  // Thread state for the floating-point unit of the processor read by ptrace.
+  union XSTATE {
+    FXSAVE fxsave; // Generic floating-point registers.
+    XSAVE xsave;   // x86 extended processor state.
+  } xstate;
 };
 
 //---------------------------------------------------------------------------
 // ptrace PTRACE_GETREGSET, PTRACE_SETREGSET structure
 //---------------------------------------------------------------------------
 
-struct IOVEC
-{
-    void    *iov_base;      // pointer to XSAVE
-    size_t   iov_len;       // sizeof(XSAVE)
+struct IOVEC {
+  void *iov_base; // pointer to XSAVE
+  size_t iov_len; // sizeof(XSAVE)
 };
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfoInterface.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfoInterface.h
index 801885d..12db366 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfoInterface.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfoInterface.h
@@ -14,69 +14,60 @@
 
 #include "lldb/Core/ArchSpec.h"
 
-namespace lldb_private
-{
+namespace lldb_private {
 
-    ///------------------------------------------------------------------------------
-    /// @class RegisterInfoInterface
-    ///
-    /// @brief RegisterInfo interface to patch RegisterInfo structure for archs.
-    ///------------------------------------------------------------------------------
-    class RegisterInfoInterface
-    {
-    public:
-        RegisterInfoInterface(const lldb_private::ArchSpec& target_arch) : m_target_arch(target_arch) {}
-        virtual ~RegisterInfoInterface () {}
+///------------------------------------------------------------------------------
+/// @class RegisterInfoInterface
+///
+/// @brief RegisterInfo interface to patch RegisterInfo structure for archs.
+///------------------------------------------------------------------------------
+class RegisterInfoInterface {
+public:
+  RegisterInfoInterface(const lldb_private::ArchSpec &target_arch)
+      : m_target_arch(target_arch) {}
+  virtual ~RegisterInfoInterface() {}
 
-        virtual size_t
-        GetGPRSize () const = 0;
+  virtual size_t GetGPRSize() const = 0;
 
-        virtual const lldb_private::RegisterInfo *
-        GetRegisterInfo () const = 0;
+  virtual const lldb_private::RegisterInfo *GetRegisterInfo() const = 0;
 
-        // Returns the number of registers including the user registers and the
-        // lldb internal registers also
-        virtual uint32_t
-        GetRegisterCount () const = 0;
+  // Returns the number of registers including the user registers and the
+  // lldb internal registers also
+  virtual uint32_t GetRegisterCount() const = 0;
 
-        // Returns the number of the user registers (excluding the registers
-        // kept for lldb internal use only). Subclasses should override it if
-        // they belongs to an architecture with lldb internal registers.
-        virtual uint32_t
-        GetUserRegisterCount () const
-        {
-            return GetRegisterCount();
-        }
+  // Returns the number of the user registers (excluding the registers
+  // kept for lldb internal use only). Subclasses should override it if
+  // they belongs to an architecture with lldb internal registers.
+  virtual uint32_t GetUserRegisterCount() const { return GetRegisterCount(); }
 
-        const lldb_private::ArchSpec&
-        GetTargetArchitecture() const
-            { return m_target_arch; }
+  const lldb_private::ArchSpec &GetTargetArchitecture() const {
+    return m_target_arch;
+  }
 
-        virtual const lldb_private::RegisterInfo *
-        GetDynamicRegisterInfo(const char *reg_name) const
-        {
-            const std::vector <lldb_private::RegisterInfo> * d_register_infos = GetDynamicRegisterInfoP();
-            if(d_register_infos != nullptr)
-            {
-                std::vector <lldb_private::RegisterInfo> ::const_iterator pos = d_register_infos->begin();
-                for(; pos < d_register_infos->end() ; pos++)
-                {
-                    if(::strcmp(reg_name, pos->name) == 0)
-                        return(d_register_infos->data() + (pos - d_register_infos->begin()) );
-                }
-            }
-            return nullptr;
-        }
+  virtual const lldb_private::RegisterInfo *
+  GetDynamicRegisterInfo(const char *reg_name) const {
+    const std::vector<lldb_private::RegisterInfo> *d_register_infos =
+        GetDynamicRegisterInfoP();
+    if (d_register_infos != nullptr) {
+      std::vector<lldb_private::RegisterInfo>::const_iterator pos =
+          d_register_infos->begin();
+      for (; pos < d_register_infos->end(); pos++) {
+        if (::strcmp(reg_name, pos->name) == 0)
+          return (d_register_infos->data() + (pos - d_register_infos->begin()));
+      }
+    }
+    return nullptr;
+  }
 
-        virtual const std::vector<lldb_private::RegisterInfo> *
-        GetDynamicRegisterInfoP() const
-        { return nullptr; }
-
-    public:
-        // FIXME make private.
-        lldb_private::ArchSpec m_target_arch;
-    };
+  virtual const std::vector<lldb_private::RegisterInfo> *
+  GetDynamicRegisterInfoP() const {
+    return nullptr;
+  }
 
+public:
+  // FIXME make private.
+  lldb_private::ArchSpec m_target_arch;
+};
 }
 
 #endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
new file mode 100644
index 0000000..1b145e0
--- /dev/null
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
@@ -0,0 +1,99 @@
+//===-- RegisterInfoPOSIX_arm64.cpp ----------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===---------------------------------------------------------------------===//
+
+#include <cassert>
+#include <stddef.h>
+#include <vector>
+
+#include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
+
+#include "RegisterInfoPOSIX_arm64.h"
+
+// Based on RegisterContextDarwin_arm64.cpp
+#define GPR_OFFSET(idx) ((idx)*8)
+#define GPR_OFFSET_NAME(reg)                                                   \
+  (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::GPR, reg))
+
+#define FPU_OFFSET(idx) ((idx)*16 + sizeof(RegisterInfoPOSIX_arm64::GPR))
+#define FPU_OFFSET_NAME(reg)                                                   \
+  (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::FPU, reg) +                \
+   sizeof(RegisterInfoPOSIX_arm64::GPR))
+
+#define EXC_OFFSET_NAME(reg)                                                   \
+  (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::EXC, reg) +                \
+   sizeof(RegisterInfoPOSIX_arm64::GPR) +                                      \
+   sizeof(RegisterInfoPOSIX_arm64::FPU))
+#define DBG_OFFSET_NAME(reg)                                                   \
+  (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::DBG, reg) +                \
+   sizeof(RegisterInfoPOSIX_arm64::GPR) +                                      \
+   sizeof(RegisterInfoPOSIX_arm64::FPU) +                                      \
+   sizeof(RegisterInfoPOSIX_arm64::EXC))
+
+#define DEFINE_DBG(reg, i)                                                     \
+  #reg, NULL,                                                                  \
+      sizeof(((RegisterInfoPOSIX_arm64::DBG *) NULL)->reg[i]),                 \
+              DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex,  \
+                              {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,       \
+                               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,       \
+                               dbg_##reg##i },                                 \
+                               NULL, NULL, NULL, 0
+#define REG_CONTEXT_SIZE                                                       \
+  (sizeof(RegisterInfoPOSIX_arm64::GPR) +                                      \
+   sizeof(RegisterInfoPOSIX_arm64::FPU) +                                      \
+   sizeof(RegisterInfoPOSIX_arm64::EXC))
+
+//-----------------------------------------------------------------------------
+// Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
+//-----------------------------------------------------------------------------
+#define DECLARE_REGISTER_INFOS_ARM64_STRUCT
+#include "RegisterInfos_arm64.h"
+#undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
+
+static const lldb_private::RegisterInfo *
+GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::aarch64:
+    return g_register_infos_arm64_le;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return NULL;
+  }
+}
+
+static uint32_t
+GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::aarch64:
+    return static_cast<uint32_t>(sizeof(g_register_infos_arm64_le) /
+                                 sizeof(g_register_infos_arm64_le[0]));
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
+}
+
+RegisterInfoPOSIX_arm64::RegisterInfoPOSIX_arm64(
+    const lldb_private::ArchSpec &target_arch)
+    : lldb_private::RegisterInfoInterface(target_arch),
+      m_register_info_p(GetRegisterInfoPtr(target_arch)),
+      m_register_info_count(GetRegisterInfoCount(target_arch)) {}
+
+size_t RegisterInfoPOSIX_arm64::GetGPRSize() const {
+  return sizeof(struct RegisterInfoPOSIX_arm64::GPR);
+}
+
+const lldb_private::RegisterInfo *
+RegisterInfoPOSIX_arm64::GetRegisterInfo() const {
+  return m_register_info_p;
+}
+
+uint32_t RegisterInfoPOSIX_arm64::GetRegisterCount() const {
+  return m_register_info_count;
+}
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
new file mode 100644
index 0000000..af77076
--- /dev/null
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
@@ -0,0 +1,70 @@
+//===-- RegisterInfoPOSIX_arm64.h -------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef liblldb_RegisterContextLinux_arm64_H_
+#define liblldb_RegisterContextLinux_arm64_H_
+
+#include "RegisterInfoInterface.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
+
+class RegisterInfoPOSIX_arm64 : public lldb_private::RegisterInfoInterface {
+public:
+  // based on RegisterContextDarwin_arm64.h
+  struct GPR {
+    uint64_t x[29]; // x0-x28
+    uint64_t fp;    // x29
+    uint64_t lr;    // x30
+    uint64_t sp;    // x31
+    uint64_t pc;    // pc
+    uint32_t cpsr;  // cpsr
+  };
+
+  // based on RegisterContextDarwin_arm64.h
+  struct VReg {
+    uint8_t bytes[16];
+  };
+
+  // based on RegisterContextDarwin_arm64.h
+  struct FPU {
+    VReg v[32];
+    uint32_t fpsr;
+    uint32_t fpcr;
+  };
+
+  // based on RegisterContextDarwin_arm64.h
+  struct EXC {
+    uint64_t far;       // Virtual Fault Address
+    uint32_t esr;       // Exception syndrome
+    uint32_t exception; // number of arm exception token
+  };
+
+  // based on RegisterContextDarwin_arm64.h
+  struct DBG {
+    uint64_t bvr[16];
+    uint64_t bcr[16];
+    uint64_t wvr[16];
+    uint64_t wcr[16];
+    uint64_t mdscr_el1;
+  };
+
+  RegisterInfoPOSIX_arm64(const lldb_private::ArchSpec &target_arch);
+
+  size_t GetGPRSize() const override;
+
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
+
+  uint32_t GetRegisterCount() const override;
+
+private:
+  const lldb_private::RegisterInfo *m_register_info_p;
+  uint32_t m_register_info_count;
+};
+
+#endif
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_arm.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_arm.h
index e3c7473..74d3226 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_arm.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_arm.h
@@ -15,12 +15,12 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
 #include "lldb/lldb-defines.h"
 #include "lldb/lldb-enumerations.h"
+#include "lldb/lldb-private.h"
 
-#include "Utility/ARM_ehframe_Registers.h"
 #include "Utility/ARM_DWARF_Registers.h"
+#include "Utility/ARM_ehframe_Registers.h"
 
 using namespace lldb;
 using namespace lldb_private;
@@ -45,461 +45,1580 @@ using namespace lldb_private;
 #error DEFINE_DBG must be defined before including this header file
 #endif
 
-enum
-{
-    gpr_r0 = 0,
-    gpr_r1,
-    gpr_r2,
-    gpr_r3,
-    gpr_r4,
-    gpr_r5,
-    gpr_r6,
-    gpr_r7,
-    gpr_r8,
-    gpr_r9,
-    gpr_r10,
-    gpr_r11,
-    gpr_r12,
-    gpr_r13, gpr_sp = gpr_r13,
-    gpr_r14, gpr_lr = gpr_r14,
-    gpr_r15, gpr_pc = gpr_r15,
-    gpr_cpsr,
-
-    fpu_s0,
-    fpu_s1,
-    fpu_s2,
-    fpu_s3,
-    fpu_s4,
-    fpu_s5,
-    fpu_s6,
-    fpu_s7,
-    fpu_s8,
-    fpu_s9,
-    fpu_s10,
-    fpu_s11,
-    fpu_s12,
-    fpu_s13,
-    fpu_s14,
-    fpu_s15,
-    fpu_s16,
-    fpu_s17,
-    fpu_s18,
-    fpu_s19,
-    fpu_s20,
-    fpu_s21,
-    fpu_s22,
-    fpu_s23,
-    fpu_s24,
-    fpu_s25,
-    fpu_s26,
-    fpu_s27,
-    fpu_s28,
-    fpu_s29,
-    fpu_s30,
-    fpu_s31,
-    fpu_fpscr,
-
-    fpu_d0,
-    fpu_d1,
-    fpu_d2,
-    fpu_d3,
-    fpu_d4,
-    fpu_d5,
-    fpu_d6,
-    fpu_d7,
-    fpu_d8,
-    fpu_d9,
-    fpu_d10,
-    fpu_d11,
-    fpu_d12,
-    fpu_d13,
-    fpu_d14,
-    fpu_d15,
-    fpu_d16,
-    fpu_d17,
-    fpu_d18,
-    fpu_d19,
-    fpu_d20,
-    fpu_d21,
-    fpu_d22,
-    fpu_d23,
-    fpu_d24,
-    fpu_d25,
-    fpu_d26,
-    fpu_d27,
-    fpu_d28,
-    fpu_d29,
-    fpu_d30,
-    fpu_d31,
-
-    fpu_q0,
-    fpu_q1,
-    fpu_q2,
-    fpu_q3,
-    fpu_q4,
-    fpu_q5,
-    fpu_q6,
-    fpu_q7,
-    fpu_q8,
-    fpu_q9,
-    fpu_q10,
-    fpu_q11,
-    fpu_q12,
-    fpu_q13,
-    fpu_q14,
-    fpu_q15,
-
-    exc_exception,
-    exc_fsr,
-    exc_far,
-
-    dbg_bvr0,
-    dbg_bvr1,
-    dbg_bvr2,
-    dbg_bvr3,
-    dbg_bvr4,
-    dbg_bvr5,
-    dbg_bvr6,
-    dbg_bvr7,
-    dbg_bvr8,
-    dbg_bvr9,
-    dbg_bvr10,
-    dbg_bvr11,
-    dbg_bvr12,
-    dbg_bvr13,
-    dbg_bvr14,
-    dbg_bvr15,
-
-    dbg_bcr0,
-    dbg_bcr1,
-    dbg_bcr2,
-    dbg_bcr3,
-    dbg_bcr4,
-    dbg_bcr5,
-    dbg_bcr6,
-    dbg_bcr7,
-    dbg_bcr8,
-    dbg_bcr9,
-    dbg_bcr10,
-    dbg_bcr11,
-    dbg_bcr12,
-    dbg_bcr13,
-    dbg_bcr14,
-    dbg_bcr15,
-
-    dbg_wvr0,
-    dbg_wvr1,
-    dbg_wvr2,
-    dbg_wvr3,
-    dbg_wvr4,
-    dbg_wvr5,
-    dbg_wvr6,
-    dbg_wvr7,
-    dbg_wvr8,
-    dbg_wvr9,
-    dbg_wvr10,
-    dbg_wvr11,
-    dbg_wvr12,
-    dbg_wvr13,
-    dbg_wvr14,
-    dbg_wvr15,
-
-    dbg_wcr0,
-    dbg_wcr1,
-    dbg_wcr2,
-    dbg_wcr3,
-    dbg_wcr4,
-    dbg_wcr5,
-    dbg_wcr6,
-    dbg_wcr7,
-    dbg_wcr8,
-    dbg_wcr9,
-    dbg_wcr10,
-    dbg_wcr11,
-    dbg_wcr12,
-    dbg_wcr13,
-    dbg_wcr14,
-    dbg_wcr15,
-
-    k_num_registers
+enum {
+  gpr_r0 = 0,
+  gpr_r1,
+  gpr_r2,
+  gpr_r3,
+  gpr_r4,
+  gpr_r5,
+  gpr_r6,
+  gpr_r7,
+  gpr_r8,
+  gpr_r9,
+  gpr_r10,
+  gpr_r11,
+  gpr_r12,
+  gpr_r13,
+  gpr_sp = gpr_r13,
+  gpr_r14,
+  gpr_lr = gpr_r14,
+  gpr_r15,
+  gpr_pc = gpr_r15,
+  gpr_cpsr,
+
+  fpu_s0,
+  fpu_s1,
+  fpu_s2,
+  fpu_s3,
+  fpu_s4,
+  fpu_s5,
+  fpu_s6,
+  fpu_s7,
+  fpu_s8,
+  fpu_s9,
+  fpu_s10,
+  fpu_s11,
+  fpu_s12,
+  fpu_s13,
+  fpu_s14,
+  fpu_s15,
+  fpu_s16,
+  fpu_s17,
+  fpu_s18,
+  fpu_s19,
+  fpu_s20,
+  fpu_s21,
+  fpu_s22,
+  fpu_s23,
+  fpu_s24,
+  fpu_s25,
+  fpu_s26,
+  fpu_s27,
+  fpu_s28,
+  fpu_s29,
+  fpu_s30,
+  fpu_s31,
+  fpu_fpscr,
+
+  fpu_d0,
+  fpu_d1,
+  fpu_d2,
+  fpu_d3,
+  fpu_d4,
+  fpu_d5,
+  fpu_d6,
+  fpu_d7,
+  fpu_d8,
+  fpu_d9,
+  fpu_d10,
+  fpu_d11,
+  fpu_d12,
+  fpu_d13,
+  fpu_d14,
+  fpu_d15,
+  fpu_d16,
+  fpu_d17,
+  fpu_d18,
+  fpu_d19,
+  fpu_d20,
+  fpu_d21,
+  fpu_d22,
+  fpu_d23,
+  fpu_d24,
+  fpu_d25,
+  fpu_d26,
+  fpu_d27,
+  fpu_d28,
+  fpu_d29,
+  fpu_d30,
+  fpu_d31,
+
+  fpu_q0,
+  fpu_q1,
+  fpu_q2,
+  fpu_q3,
+  fpu_q4,
+  fpu_q5,
+  fpu_q6,
+  fpu_q7,
+  fpu_q8,
+  fpu_q9,
+  fpu_q10,
+  fpu_q11,
+  fpu_q12,
+  fpu_q13,
+  fpu_q14,
+  fpu_q15,
+
+  exc_exception,
+  exc_fsr,
+  exc_far,
+
+  dbg_bvr0,
+  dbg_bvr1,
+  dbg_bvr2,
+  dbg_bvr3,
+  dbg_bvr4,
+  dbg_bvr5,
+  dbg_bvr6,
+  dbg_bvr7,
+  dbg_bvr8,
+  dbg_bvr9,
+  dbg_bvr10,
+  dbg_bvr11,
+  dbg_bvr12,
+  dbg_bvr13,
+  dbg_bvr14,
+  dbg_bvr15,
+
+  dbg_bcr0,
+  dbg_bcr1,
+  dbg_bcr2,
+  dbg_bcr3,
+  dbg_bcr4,
+  dbg_bcr5,
+  dbg_bcr6,
+  dbg_bcr7,
+  dbg_bcr8,
+  dbg_bcr9,
+  dbg_bcr10,
+  dbg_bcr11,
+  dbg_bcr12,
+  dbg_bcr13,
+  dbg_bcr14,
+  dbg_bcr15,
+
+  dbg_wvr0,
+  dbg_wvr1,
+  dbg_wvr2,
+  dbg_wvr3,
+  dbg_wvr4,
+  dbg_wvr5,
+  dbg_wvr6,
+  dbg_wvr7,
+  dbg_wvr8,
+  dbg_wvr9,
+  dbg_wvr10,
+  dbg_wvr11,
+  dbg_wvr12,
+  dbg_wvr13,
+  dbg_wvr14,
+  dbg_wvr15,
+
+  dbg_wcr0,
+  dbg_wcr1,
+  dbg_wcr2,
+  dbg_wcr3,
+  dbg_wcr4,
+  dbg_wcr5,
+  dbg_wcr6,
+  dbg_wcr7,
+  dbg_wcr8,
+  dbg_wcr9,
+  dbg_wcr10,
+  dbg_wcr11,
+  dbg_wcr12,
+  dbg_wcr13,
+  dbg_wcr14,
+  dbg_wcr15,
+
+  k_num_registers
 };
 
-static uint32_t g_s0_invalidates[]  = { fpu_d0,  fpu_q0, LLDB_INVALID_REGNUM };
-static uint32_t g_s1_invalidates[]  = { fpu_d0,  fpu_q0, LLDB_INVALID_REGNUM };
-static uint32_t g_s2_invalidates[]  = { fpu_d1,  fpu_q0, LLDB_INVALID_REGNUM };
-static uint32_t g_s3_invalidates[]  = { fpu_d1,  fpu_q0, LLDB_INVALID_REGNUM };
-static uint32_t g_s4_invalidates[]  = { fpu_d2,  fpu_q1, LLDB_INVALID_REGNUM };
-static uint32_t g_s5_invalidates[]  = { fpu_d2,  fpu_q1, LLDB_INVALID_REGNUM };
-static uint32_t g_s6_invalidates[]  = { fpu_d3,  fpu_q1, LLDB_INVALID_REGNUM };
-static uint32_t g_s7_invalidates[]  = { fpu_d3,  fpu_q1, LLDB_INVALID_REGNUM };
-static uint32_t g_s8_invalidates[]  = { fpu_d4,  fpu_q2, LLDB_INVALID_REGNUM };
-static uint32_t g_s9_invalidates[]  = { fpu_d4,  fpu_q2, LLDB_INVALID_REGNUM };
-static uint32_t g_s10_invalidates[] = { fpu_d5,  fpu_q2, LLDB_INVALID_REGNUM };
-static uint32_t g_s11_invalidates[] = { fpu_d5,  fpu_q2, LLDB_INVALID_REGNUM };
-static uint32_t g_s12_invalidates[] = { fpu_d6,  fpu_q3, LLDB_INVALID_REGNUM };
-static uint32_t g_s13_invalidates[] = { fpu_d6,  fpu_q3, LLDB_INVALID_REGNUM };
-static uint32_t g_s14_invalidates[] = { fpu_d7,  fpu_q3, LLDB_INVALID_REGNUM };
-static uint32_t g_s15_invalidates[] = { fpu_d7,  fpu_q3, LLDB_INVALID_REGNUM };
-static uint32_t g_s16_invalidates[] = { fpu_d8,  fpu_q4, LLDB_INVALID_REGNUM };
-static uint32_t g_s17_invalidates[] = { fpu_d8,  fpu_q4, LLDB_INVALID_REGNUM };
-static uint32_t g_s18_invalidates[] = { fpu_d9,  fpu_q4, LLDB_INVALID_REGNUM };
-static uint32_t g_s19_invalidates[] = { fpu_d9,  fpu_q4, LLDB_INVALID_REGNUM };
-static uint32_t g_s20_invalidates[] = { fpu_d10, fpu_q5, LLDB_INVALID_REGNUM };
-static uint32_t g_s21_invalidates[] = { fpu_d10, fpu_q5, LLDB_INVALID_REGNUM };
-static uint32_t g_s22_invalidates[] = { fpu_d11, fpu_q5, LLDB_INVALID_REGNUM };
-static uint32_t g_s23_invalidates[] = { fpu_d11, fpu_q5, LLDB_INVALID_REGNUM };
-static uint32_t g_s24_invalidates[] = { fpu_d12, fpu_q6, LLDB_INVALID_REGNUM };
-static uint32_t g_s25_invalidates[] = { fpu_d12, fpu_q6, LLDB_INVALID_REGNUM };
-static uint32_t g_s26_invalidates[] = { fpu_d13, fpu_q6, LLDB_INVALID_REGNUM };
-static uint32_t g_s27_invalidates[] = { fpu_d13, fpu_q6, LLDB_INVALID_REGNUM };
-static uint32_t g_s28_invalidates[] = { fpu_d14, fpu_q7, LLDB_INVALID_REGNUM };
-static uint32_t g_s29_invalidates[] = { fpu_d14, fpu_q7, LLDB_INVALID_REGNUM };
-static uint32_t g_s30_invalidates[] = { fpu_d15, fpu_q7, LLDB_INVALID_REGNUM };
-static uint32_t g_s31_invalidates[] = { fpu_d15, fpu_q7, LLDB_INVALID_REGNUM };
-
-static uint32_t g_d0_contains[] =  { fpu_s0,  fpu_s1,  LLDB_INVALID_REGNUM };
-static uint32_t g_d1_contains[] =  { fpu_s2,  fpu_s3,  LLDB_INVALID_REGNUM };
-static uint32_t g_d2_contains[] =  { fpu_s4,  fpu_s5,  LLDB_INVALID_REGNUM };
-static uint32_t g_d3_contains[] =  { fpu_s6,  fpu_s7,  LLDB_INVALID_REGNUM };
-static uint32_t g_d4_contains[] =  { fpu_s8,  fpu_s9,  LLDB_INVALID_REGNUM };
-static uint32_t g_d5_contains[] =  { fpu_s10, fpu_s11, LLDB_INVALID_REGNUM };
-static uint32_t g_d6_contains[] =  { fpu_s12, fpu_s13, LLDB_INVALID_REGNUM };
-static uint32_t g_d7_contains[] =  { fpu_s14, fpu_s15, LLDB_INVALID_REGNUM };
-static uint32_t g_d8_contains[] =  { fpu_s16, fpu_s17, LLDB_INVALID_REGNUM };
-static uint32_t g_d9_contains[] =  { fpu_s18, fpu_s19, LLDB_INVALID_REGNUM };
-static uint32_t g_d10_contains[] = { fpu_s20, fpu_s21, LLDB_INVALID_REGNUM };
-static uint32_t g_d11_contains[] = { fpu_s22, fpu_s23, LLDB_INVALID_REGNUM };
-static uint32_t g_d12_contains[] = { fpu_s24, fpu_s25, LLDB_INVALID_REGNUM };
-static uint32_t g_d13_contains[] = { fpu_s26, fpu_s27, LLDB_INVALID_REGNUM };
-static uint32_t g_d14_contains[] = { fpu_s28, fpu_s29, LLDB_INVALID_REGNUM };
-static uint32_t g_d15_contains[] = { fpu_s30, fpu_s31, LLDB_INVALID_REGNUM };
-
-static uint32_t g_d0_invalidates[]  = { fpu_q0, LLDB_INVALID_REGNUM };
-static uint32_t g_d1_invalidates[]  = { fpu_q0, LLDB_INVALID_REGNUM };
-static uint32_t g_d2_invalidates[]  = { fpu_q1, LLDB_INVALID_REGNUM };
-static uint32_t g_d3_invalidates[]  = { fpu_q1, LLDB_INVALID_REGNUM };
-static uint32_t g_d4_invalidates[]  = { fpu_q2, LLDB_INVALID_REGNUM };
-static uint32_t g_d5_invalidates[]  = { fpu_q2, LLDB_INVALID_REGNUM };
-static uint32_t g_d6_invalidates[]  = { fpu_q3, LLDB_INVALID_REGNUM };
-static uint32_t g_d7_invalidates[]  = { fpu_q3, LLDB_INVALID_REGNUM };
-static uint32_t g_d8_invalidates[]  = { fpu_q4, LLDB_INVALID_REGNUM };
-static uint32_t g_d9_invalidates[]  = { fpu_q4, LLDB_INVALID_REGNUM };
-static uint32_t g_d10_invalidates[] = { fpu_q5, LLDB_INVALID_REGNUM };
-static uint32_t g_d11_invalidates[] = { fpu_q5, LLDB_INVALID_REGNUM };
-static uint32_t g_d12_invalidates[] = { fpu_q6, LLDB_INVALID_REGNUM };
-static uint32_t g_d13_invalidates[] = { fpu_q6, LLDB_INVALID_REGNUM };
-static uint32_t g_d14_invalidates[] = { fpu_q7, LLDB_INVALID_REGNUM };
-static uint32_t g_d15_invalidates[] = { fpu_q7, LLDB_INVALID_REGNUM };
-static uint32_t g_d16_invalidates[] = { fpu_q8, LLDB_INVALID_REGNUM };
-static uint32_t g_d17_invalidates[] = { fpu_q8, LLDB_INVALID_REGNUM };
-static uint32_t g_d18_invalidates[] = { fpu_q9, LLDB_INVALID_REGNUM };
-static uint32_t g_d19_invalidates[] = { fpu_q9, LLDB_INVALID_REGNUM };
-static uint32_t g_d20_invalidates[] = { fpu_q10, LLDB_INVALID_REGNUM };
-static uint32_t g_d21_invalidates[] = { fpu_q10, LLDB_INVALID_REGNUM };
-static uint32_t g_d22_invalidates[] = { fpu_q11, LLDB_INVALID_REGNUM };
-static uint32_t g_d23_invalidates[] = { fpu_q11, LLDB_INVALID_REGNUM };
-static uint32_t g_d24_invalidates[] = { fpu_q12, LLDB_INVALID_REGNUM };
-static uint32_t g_d25_invalidates[] = { fpu_q12, LLDB_INVALID_REGNUM };
-static uint32_t g_d26_invalidates[] = { fpu_q13, LLDB_INVALID_REGNUM };
-static uint32_t g_d27_invalidates[] = { fpu_q13, LLDB_INVALID_REGNUM };
-static uint32_t g_d28_invalidates[] = { fpu_q14, LLDB_INVALID_REGNUM };
-static uint32_t g_d29_invalidates[] = { fpu_q14, LLDB_INVALID_REGNUM };
-static uint32_t g_d30_invalidates[] = { fpu_q15, LLDB_INVALID_REGNUM };
-static uint32_t g_d31_invalidates[] = { fpu_q15, LLDB_INVALID_REGNUM };
-
-static uint32_t g_q0_contains[] =  { fpu_d0,  fpu_d1,  fpu_s0,  fpu_s1,  fpu_s2,  fpu_s3,  LLDB_INVALID_REGNUM };
-static uint32_t g_q1_contains[] =  { fpu_d2,  fpu_d3,  fpu_s4,  fpu_s5,  fpu_s6,  fpu_s7,  LLDB_INVALID_REGNUM };
-static uint32_t g_q2_contains[] =  { fpu_d4,  fpu_d5,  fpu_s8,  fpu_s9,  fpu_s10, fpu_s11, LLDB_INVALID_REGNUM };
-static uint32_t g_q3_contains[] =  { fpu_d6,  fpu_d7,  fpu_s12, fpu_s13, fpu_s14, fpu_s15, LLDB_INVALID_REGNUM };
-static uint32_t g_q4_contains[] =  { fpu_d8,  fpu_d9,  fpu_s16, fpu_s17, fpu_s18, fpu_s19, LLDB_INVALID_REGNUM };
-static uint32_t g_q5_contains[] =  { fpu_d10, fpu_d11, fpu_s20, fpu_s21, fpu_s22, fpu_s23, LLDB_INVALID_REGNUM };
-static uint32_t g_q6_contains[] =  { fpu_d12, fpu_d13, fpu_s24, fpu_s25, fpu_s26, fpu_s27, LLDB_INVALID_REGNUM };
-static uint32_t g_q7_contains[] =  { fpu_d14, fpu_d15, fpu_s28, fpu_s29, fpu_s30, fpu_s31, LLDB_INVALID_REGNUM };
-static uint32_t g_q8_contains[] =  { fpu_d16, fpu_d17, LLDB_INVALID_REGNUM };
-static uint32_t g_q9_contains[] =  { fpu_d18, fpu_d19, LLDB_INVALID_REGNUM };
-static uint32_t g_q10_contains[] = { fpu_d20, fpu_d21, LLDB_INVALID_REGNUM };
-static uint32_t g_q11_contains[] = { fpu_d22, fpu_d23, LLDB_INVALID_REGNUM };
-static uint32_t g_q12_contains[] = { fpu_d24, fpu_d25, LLDB_INVALID_REGNUM };
-static uint32_t g_q13_contains[] = { fpu_d26, fpu_d27, LLDB_INVALID_REGNUM };
-static uint32_t g_q14_contains[] = { fpu_d28, fpu_d29, LLDB_INVALID_REGNUM };
-static uint32_t g_q15_contains[] = { fpu_d30, fpu_d31, LLDB_INVALID_REGNUM };
+static uint32_t g_s0_invalidates[] = {fpu_d0, fpu_q0, LLDB_INVALID_REGNUM};
+static uint32_t g_s1_invalidates[] = {fpu_d0, fpu_q0, LLDB_INVALID_REGNUM};
+static uint32_t g_s2_invalidates[] = {fpu_d1, fpu_q0, LLDB_INVALID_REGNUM};
+static uint32_t g_s3_invalidates[] = {fpu_d1, fpu_q0, LLDB_INVALID_REGNUM};
+static uint32_t g_s4_invalidates[] = {fpu_d2, fpu_q1, LLDB_INVALID_REGNUM};
+static uint32_t g_s5_invalidates[] = {fpu_d2, fpu_q1, LLDB_INVALID_REGNUM};
+static uint32_t g_s6_invalidates[] = {fpu_d3, fpu_q1, LLDB_INVALID_REGNUM};
+static uint32_t g_s7_invalidates[] = {fpu_d3, fpu_q1, LLDB_INVALID_REGNUM};
+static uint32_t g_s8_invalidates[] = {fpu_d4, fpu_q2, LLDB_INVALID_REGNUM};
+static uint32_t g_s9_invalidates[] = {fpu_d4, fpu_q2, LLDB_INVALID_REGNUM};
+static uint32_t g_s10_invalidates[] = {fpu_d5, fpu_q2, LLDB_INVALID_REGNUM};
+static uint32_t g_s11_invalidates[] = {fpu_d5, fpu_q2, LLDB_INVALID_REGNUM};
+static uint32_t g_s12_invalidates[] = {fpu_d6, fpu_q3, LLDB_INVALID_REGNUM};
+static uint32_t g_s13_invalidates[] = {fpu_d6, fpu_q3, LLDB_INVALID_REGNUM};
+static uint32_t g_s14_invalidates[] = {fpu_d7, fpu_q3, LLDB_INVALID_REGNUM};
+static uint32_t g_s15_invalidates[] = {fpu_d7, fpu_q3, LLDB_INVALID_REGNUM};
+static uint32_t g_s16_invalidates[] = {fpu_d8, fpu_q4, LLDB_INVALID_REGNUM};
+static uint32_t g_s17_invalidates[] = {fpu_d8, fpu_q4, LLDB_INVALID_REGNUM};
+static uint32_t g_s18_invalidates[] = {fpu_d9, fpu_q4, LLDB_INVALID_REGNUM};
+static uint32_t g_s19_invalidates[] = {fpu_d9, fpu_q4, LLDB_INVALID_REGNUM};
+static uint32_t g_s20_invalidates[] = {fpu_d10, fpu_q5, LLDB_INVALID_REGNUM};
+static uint32_t g_s21_invalidates[] = {fpu_d10, fpu_q5, LLDB_INVALID_REGNUM};
+static uint32_t g_s22_invalidates[] = {fpu_d11, fpu_q5, LLDB_INVALID_REGNUM};
+static uint32_t g_s23_invalidates[] = {fpu_d11, fpu_q5, LLDB_INVALID_REGNUM};
+static uint32_t g_s24_invalidates[] = {fpu_d12, fpu_q6, LLDB_INVALID_REGNUM};
+static uint32_t g_s25_invalidates[] = {fpu_d12, fpu_q6, LLDB_INVALID_REGNUM};
+static uint32_t g_s26_invalidates[] = {fpu_d13, fpu_q6, LLDB_INVALID_REGNUM};
+static uint32_t g_s27_invalidates[] = {fpu_d13, fpu_q6, LLDB_INVALID_REGNUM};
+static uint32_t g_s28_invalidates[] = {fpu_d14, fpu_q7, LLDB_INVALID_REGNUM};
+static uint32_t g_s29_invalidates[] = {fpu_d14, fpu_q7, LLDB_INVALID_REGNUM};
+static uint32_t g_s30_invalidates[] = {fpu_d15, fpu_q7, LLDB_INVALID_REGNUM};
+static uint32_t g_s31_invalidates[] = {fpu_d15, fpu_q7, LLDB_INVALID_REGNUM};
+
+static uint32_t g_d0_contains[] = {fpu_s0, fpu_s1, LLDB_INVALID_REGNUM};
+static uint32_t g_d1_contains[] = {fpu_s2, fpu_s3, LLDB_INVALID_REGNUM};
+static uint32_t g_d2_contains[] = {fpu_s4, fpu_s5, LLDB_INVALID_REGNUM};
+static uint32_t g_d3_contains[] = {fpu_s6, fpu_s7, LLDB_INVALID_REGNUM};
+static uint32_t g_d4_contains[] = {fpu_s8, fpu_s9, LLDB_INVALID_REGNUM};
+static uint32_t g_d5_contains[] = {fpu_s10, fpu_s11, LLDB_INVALID_REGNUM};
+static uint32_t g_d6_contains[] = {fpu_s12, fpu_s13, LLDB_INVALID_REGNUM};
+static uint32_t g_d7_contains[] = {fpu_s14, fpu_s15, LLDB_INVALID_REGNUM};
+static uint32_t g_d8_contains[] = {fpu_s16, fpu_s17, LLDB_INVALID_REGNUM};
+static uint32_t g_d9_contains[] = {fpu_s18, fpu_s19, LLDB_INVALID_REGNUM};
+static uint32_t g_d10_contains[] = {fpu_s20, fpu_s21, LLDB_INVALID_REGNUM};
+static uint32_t g_d11_contains[] = {fpu_s22, fpu_s23, LLDB_INVALID_REGNUM};
+static uint32_t g_d12_contains[] = {fpu_s24, fpu_s25, LLDB_INVALID_REGNUM};
+static uint32_t g_d13_contains[] = {fpu_s26, fpu_s27, LLDB_INVALID_REGNUM};
+static uint32_t g_d14_contains[] = {fpu_s28, fpu_s29, LLDB_INVALID_REGNUM};
+static uint32_t g_d15_contains[] = {fpu_s30, fpu_s31, LLDB_INVALID_REGNUM};
+
+static uint32_t g_d0_invalidates[] = {fpu_q0, LLDB_INVALID_REGNUM};
+static uint32_t g_d1_invalidates[] = {fpu_q0, LLDB_INVALID_REGNUM};
+static uint32_t g_d2_invalidates[] = {fpu_q1, LLDB_INVALID_REGNUM};
+static uint32_t g_d3_invalidates[] = {fpu_q1, LLDB_INVALID_REGNUM};
+static uint32_t g_d4_invalidates[] = {fpu_q2, LLDB_INVALID_REGNUM};
+static uint32_t g_d5_invalidates[] = {fpu_q2, LLDB_INVALID_REGNUM};
+static uint32_t g_d6_invalidates[] = {fpu_q3, LLDB_INVALID_REGNUM};
+static uint32_t g_d7_invalidates[] = {fpu_q3, LLDB_INVALID_REGNUM};
+static uint32_t g_d8_invalidates[] = {fpu_q4, LLDB_INVALID_REGNUM};
+static uint32_t g_d9_invalidates[] = {fpu_q4, LLDB_INVALID_REGNUM};
+static uint32_t g_d10_invalidates[] = {fpu_q5, LLDB_INVALID_REGNUM};
+static uint32_t g_d11_invalidates[] = {fpu_q5, LLDB_INVALID_REGNUM};
+static uint32_t g_d12_invalidates[] = {fpu_q6, LLDB_INVALID_REGNUM};
+static uint32_t g_d13_invalidates[] = {fpu_q6, LLDB_INVALID_REGNUM};
+static uint32_t g_d14_invalidates[] = {fpu_q7, LLDB_INVALID_REGNUM};
+static uint32_t g_d15_invalidates[] = {fpu_q7, LLDB_INVALID_REGNUM};
+static uint32_t g_d16_invalidates[] = {fpu_q8, LLDB_INVALID_REGNUM};
+static uint32_t g_d17_invalidates[] = {fpu_q8, LLDB_INVALID_REGNUM};
+static uint32_t g_d18_invalidates[] = {fpu_q9, LLDB_INVALID_REGNUM};
+static uint32_t g_d19_invalidates[] = {fpu_q9, LLDB_INVALID_REGNUM};
+static uint32_t g_d20_invalidates[] = {fpu_q10, LLDB_INVALID_REGNUM};
+static uint32_t g_d21_invalidates[] = {fpu_q10, LLDB_INVALID_REGNUM};
+static uint32_t g_d22_invalidates[] = {fpu_q11, LLDB_INVALID_REGNUM};
+static uint32_t g_d23_invalidates[] = {fpu_q11, LLDB_INVALID_REGNUM};
+static uint32_t g_d24_invalidates[] = {fpu_q12, LLDB_INVALID_REGNUM};
+static uint32_t g_d25_invalidates[] = {fpu_q12, LLDB_INVALID_REGNUM};
+static uint32_t g_d26_invalidates[] = {fpu_q13, LLDB_INVALID_REGNUM};
+static uint32_t g_d27_invalidates[] = {fpu_q13, LLDB_INVALID_REGNUM};
+static uint32_t g_d28_invalidates[] = {fpu_q14, LLDB_INVALID_REGNUM};
+static uint32_t g_d29_invalidates[] = {fpu_q14, LLDB_INVALID_REGNUM};
+static uint32_t g_d30_invalidates[] = {fpu_q15, LLDB_INVALID_REGNUM};
+static uint32_t g_d31_invalidates[] = {fpu_q15, LLDB_INVALID_REGNUM};
+
+static uint32_t g_q0_contains[] = {
+    fpu_d0, fpu_d1, fpu_s0, fpu_s1, fpu_s2, fpu_s3, LLDB_INVALID_REGNUM};
+static uint32_t g_q1_contains[] = {
+    fpu_d2, fpu_d3, fpu_s4, fpu_s5, fpu_s6, fpu_s7, LLDB_INVALID_REGNUM};
+static uint32_t g_q2_contains[] = {
+    fpu_d4, fpu_d5, fpu_s8, fpu_s9, fpu_s10, fpu_s11, LLDB_INVALID_REGNUM};
+static uint32_t g_q3_contains[] = {
+    fpu_d6, fpu_d7, fpu_s12, fpu_s13, fpu_s14, fpu_s15, LLDB_INVALID_REGNUM};
+static uint32_t g_q4_contains[] = {
+    fpu_d8, fpu_d9, fpu_s16, fpu_s17, fpu_s18, fpu_s19, LLDB_INVALID_REGNUM};
+static uint32_t g_q5_contains[] = {
+    fpu_d10, fpu_d11, fpu_s20, fpu_s21, fpu_s22, fpu_s23, LLDB_INVALID_REGNUM};
+static uint32_t g_q6_contains[] = {
+    fpu_d12, fpu_d13, fpu_s24, fpu_s25, fpu_s26, fpu_s27, LLDB_INVALID_REGNUM};
+static uint32_t g_q7_contains[] = {
+    fpu_d14, fpu_d15, fpu_s28, fpu_s29, fpu_s30, fpu_s31, LLDB_INVALID_REGNUM};
+static uint32_t g_q8_contains[] = {fpu_d16, fpu_d17, LLDB_INVALID_REGNUM};
+static uint32_t g_q9_contains[] = {fpu_d18, fpu_d19, LLDB_INVALID_REGNUM};
+static uint32_t g_q10_contains[] = {fpu_d20, fpu_d21, LLDB_INVALID_REGNUM};
+static uint32_t g_q11_contains[] = {fpu_d22, fpu_d23, LLDB_INVALID_REGNUM};
+static uint32_t g_q12_contains[] = {fpu_d24, fpu_d25, LLDB_INVALID_REGNUM};
+static uint32_t g_q13_contains[] = {fpu_d26, fpu_d27, LLDB_INVALID_REGNUM};
+static uint32_t g_q14_contains[] = {fpu_d28, fpu_d29, LLDB_INVALID_REGNUM};
+static uint32_t g_q15_contains[] = {fpu_d30, fpu_d31, LLDB_INVALID_REGNUM};
 
 static RegisterInfo g_register_infos_arm[] = {
-//  NAME         ALT     SZ   OFFSET          ENCODING          FORMAT                  EH_FRAME             DWARF                GENERIC                     PROCESS PLUGIN       LLDB NATIVE      VALUE REGS      INVALIDATE REGS
-//  ===========  ======= ==   ==============  ================  ====================    ===================  ===================  ==========================  ===================  =============    ==============  =================
-{   "r0",        nullptr, 4,  GPR_OFFSET(0),  eEncodingUint,    eFormatHex,           { ehframe_r0,          dwarf_r0,            LLDB_REGNUM_GENERIC_ARG1,   LLDB_INVALID_REGNUM, gpr_r0        }, nullptr,        nullptr, nullptr, 0},
-{   "r1",        nullptr, 4,  GPR_OFFSET(1),  eEncodingUint,    eFormatHex,           { ehframe_r1,          dwarf_r1,            LLDB_REGNUM_GENERIC_ARG2,   LLDB_INVALID_REGNUM, gpr_r1        }, nullptr,        nullptr, nullptr, 0},
-{   "r2",        nullptr, 4,  GPR_OFFSET(2),  eEncodingUint,    eFormatHex,           { ehframe_r2,          dwarf_r2,            LLDB_REGNUM_GENERIC_ARG3,   LLDB_INVALID_REGNUM, gpr_r2        }, nullptr,        nullptr, nullptr, 0},
-{   "r3",        nullptr, 4,  GPR_OFFSET(3),  eEncodingUint,    eFormatHex,           { ehframe_r3,          dwarf_r3,            LLDB_REGNUM_GENERIC_ARG4,   LLDB_INVALID_REGNUM, gpr_r3        }, nullptr,        nullptr, nullptr, 0},
-{   "r4",        nullptr, 4,  GPR_OFFSET(4),  eEncodingUint,    eFormatHex,           { ehframe_r4,          dwarf_r4,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r4        }, nullptr,        nullptr, nullptr, 0},
-{   "r5",        nullptr, 4,  GPR_OFFSET(5),  eEncodingUint,    eFormatHex,           { ehframe_r5,          dwarf_r5,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r5        }, nullptr,        nullptr, nullptr, 0},
-{   "r6",        nullptr, 4,  GPR_OFFSET(6),  eEncodingUint,    eFormatHex,           { ehframe_r6,          dwarf_r6,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r6        }, nullptr,        nullptr, nullptr, 0},
-{   "r7",        nullptr, 4,  GPR_OFFSET(7),  eEncodingUint,    eFormatHex,           { ehframe_r7,          dwarf_r7,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r7        }, nullptr,        nullptr, nullptr, 0},
-{   "r8",        nullptr, 4,  GPR_OFFSET(8),  eEncodingUint,    eFormatHex,           { ehframe_r8,          dwarf_r8,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r8        }, nullptr,        nullptr, nullptr, 0},
-{   "r9",        nullptr, 4,  GPR_OFFSET(9),  eEncodingUint,    eFormatHex,           { ehframe_r9,          dwarf_r9,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r9        }, nullptr,        nullptr, nullptr, 0},
-{   "r10",       nullptr, 4,  GPR_OFFSET(10), eEncodingUint,    eFormatHex,           { ehframe_r10,         dwarf_r10,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r10       }, nullptr,        nullptr, nullptr, 0},
-{   "r11",       nullptr, 4,  GPR_OFFSET(11), eEncodingUint,    eFormatHex,           { ehframe_r11,         dwarf_r11,           LLDB_REGNUM_GENERIC_FP,     LLDB_INVALID_REGNUM, gpr_r11       }, nullptr,        nullptr, nullptr, 0},
-{   "r12",       nullptr, 4,  GPR_OFFSET(12), eEncodingUint,    eFormatHex,           { ehframe_r12,         dwarf_r12,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r12       }, nullptr,        nullptr, nullptr, 0},
-{   "sp",        "r13",   4,  GPR_OFFSET(13), eEncodingUint,    eFormatHex,           { ehframe_sp,          dwarf_sp,            LLDB_REGNUM_GENERIC_SP,     LLDB_INVALID_REGNUM, gpr_sp        }, nullptr,        nullptr, nullptr, 0},
-{   "lr",        "r14",   4,  GPR_OFFSET(14), eEncodingUint,    eFormatHex,           { ehframe_lr,          dwarf_lr,            LLDB_REGNUM_GENERIC_RA,     LLDB_INVALID_REGNUM, gpr_lr        }, nullptr,        nullptr, nullptr, 0},
-{   "pc",        "r15",   4,  GPR_OFFSET(15), eEncodingUint,    eFormatHex,           { ehframe_pc,          dwarf_pc,            LLDB_REGNUM_GENERIC_PC,     LLDB_INVALID_REGNUM, gpr_pc        }, nullptr,        nullptr, nullptr, 0},
-{   "cpsr",      "psr",   4,  GPR_OFFSET(16), eEncodingUint,    eFormatHex,           { ehframe_cpsr,        dwarf_cpsr,          LLDB_REGNUM_GENERIC_FLAGS,  LLDB_INVALID_REGNUM, gpr_cpsr      }, nullptr,        nullptr, nullptr, 0},
-
-{   "s0",        nullptr, 4,  FPU_OFFSET(0),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s0,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s0        }, nullptr, g_s0_invalidates, nullptr, 0},
-{   "s1",        nullptr, 4,  FPU_OFFSET(1),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s1,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s1        }, nullptr, g_s1_invalidates, nullptr, 0},
-{   "s2",        nullptr, 4,  FPU_OFFSET(2),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s2,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s2        }, nullptr, g_s2_invalidates, nullptr, 0},
-{   "s3",        nullptr, 4,  FPU_OFFSET(3),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s3,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s3        }, nullptr, g_s3_invalidates, nullptr, 0},
-{   "s4",        nullptr, 4,  FPU_OFFSET(4),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s4,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s4        }, nullptr, g_s4_invalidates, nullptr, 0},
-{   "s5",        nullptr, 4,  FPU_OFFSET(5),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s5,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s5        }, nullptr, g_s5_invalidates, nullptr, 0},
-{   "s6",        nullptr, 4,  FPU_OFFSET(6),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s6,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s6        }, nullptr, g_s6_invalidates, nullptr, 0},
-{   "s7",        nullptr, 4,  FPU_OFFSET(7),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s7,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s7        }, nullptr, g_s7_invalidates, nullptr, 0},
-{   "s8",        nullptr, 4,  FPU_OFFSET(8),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s8,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s8        }, nullptr, g_s8_invalidates, nullptr, 0},
-{   "s9",        nullptr, 4,  FPU_OFFSET(9),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s9,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s9        }, nullptr, g_s9_invalidates, nullptr, 0},
-{   "s10",       nullptr, 4,  FPU_OFFSET(10), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s10,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s10       }, nullptr, g_s10_invalidates, nullptr, 0},
-{   "s11",       nullptr, 4,  FPU_OFFSET(11), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s11,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s11       }, nullptr, g_s11_invalidates, nullptr, 0},
-{   "s12",       nullptr, 4,  FPU_OFFSET(12), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s12,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s12       }, nullptr, g_s12_invalidates, nullptr, 0},
-{   "s13",       nullptr, 4,  FPU_OFFSET(13), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s13,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s13       }, nullptr, g_s13_invalidates, nullptr, 0},
-{   "s14",       nullptr, 4,  FPU_OFFSET(14), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s14,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s14       }, nullptr, g_s14_invalidates, nullptr, 0},
-{   "s15",       nullptr, 4,  FPU_OFFSET(15), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s15,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s15       }, nullptr, g_s15_invalidates, nullptr, 0},
-{   "s16",       nullptr, 4,  FPU_OFFSET(16), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s16,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s16       }, nullptr, g_s16_invalidates, nullptr, 0},
-{   "s17",       nullptr, 4,  FPU_OFFSET(17), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s17,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s17       }, nullptr, g_s17_invalidates, nullptr, 0},
-{   "s18",       nullptr, 4,  FPU_OFFSET(18), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s18,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s18       }, nullptr, g_s18_invalidates, nullptr, 0},
-{   "s19",       nullptr, 4,  FPU_OFFSET(19), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s19,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s19       }, nullptr, g_s19_invalidates, nullptr, 0},
-{   "s20",       nullptr, 4,  FPU_OFFSET(20), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s20,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s20       }, nullptr, g_s20_invalidates, nullptr, 0},
-{   "s21",       nullptr, 4,  FPU_OFFSET(21), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s21,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s21       }, nullptr, g_s21_invalidates, nullptr, 0},
-{   "s22",       nullptr, 4,  FPU_OFFSET(22), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s22,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s22       }, nullptr, g_s22_invalidates, nullptr, 0},
-{   "s23",       nullptr, 4,  FPU_OFFSET(23), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s23,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s23       }, nullptr, g_s23_invalidates, nullptr, 0},
-{   "s24",       nullptr, 4,  FPU_OFFSET(24), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s24,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s24       }, nullptr, g_s24_invalidates, nullptr, 0},
-{   "s25",       nullptr, 4,  FPU_OFFSET(25), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s25,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s25       }, nullptr, g_s25_invalidates, nullptr, 0},
-{   "s26",       nullptr, 4,  FPU_OFFSET(26), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s26,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s26       }, nullptr, g_s26_invalidates, nullptr, 0},
-{   "s27",       nullptr, 4,  FPU_OFFSET(27), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s27,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s27       }, nullptr, g_s27_invalidates, nullptr, 0},
-{   "s28",       nullptr, 4,  FPU_OFFSET(28), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s28,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s28       }, nullptr, g_s28_invalidates, nullptr, 0},
-{   "s29",       nullptr, 4,  FPU_OFFSET(29), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s29,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s29       }, nullptr, g_s29_invalidates, nullptr, 0},
-{   "s30",       nullptr, 4,  FPU_OFFSET(30), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s30,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s30       }, nullptr, g_s30_invalidates, nullptr, 0},
-{   "s31",       nullptr, 4,  FPU_OFFSET(31), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s31,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s31       }, nullptr, g_s31_invalidates, nullptr, 0},
-{   "fpscr",     nullptr, 4,  FPSCR_OFFSET,   eEncodingUint,    eFormatHex,           { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_fpscr     }, nullptr,        nullptr, nullptr,    0},
-
-{   "d0",        nullptr, 8,  FPU_OFFSET(0),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d0,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d0        }, g_d0_contains, g_d0_invalidates, nullptr, 0},
-{   "d1",        nullptr, 8,  FPU_OFFSET(2),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d1,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d1        }, g_d1_contains, g_d1_invalidates, nullptr, 0},
-{   "d2",        nullptr, 8,  FPU_OFFSET(4),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d2,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d2        }, g_d2_contains, g_d2_invalidates, nullptr, 0},
-{   "d3",        nullptr, 8,  FPU_OFFSET(6),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d3,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d3        }, g_d3_contains, g_d3_invalidates, nullptr, 0},
-{   "d4",        nullptr, 8,  FPU_OFFSET(8),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d4,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d4        }, g_d4_contains, g_d4_invalidates, nullptr, 0},
-{   "d5",        nullptr, 8,  FPU_OFFSET(10), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d5,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d5        }, g_d5_contains, g_d5_invalidates, nullptr, 0},
-{   "d6",        nullptr, 8,  FPU_OFFSET(12), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d6,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d6        }, g_d6_contains, g_d6_invalidates, nullptr, 0},
-{   "d7",        nullptr, 8,  FPU_OFFSET(14), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d7,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d7        }, g_d7_contains, g_d7_invalidates, nullptr, 0},
-{   "d8",        nullptr, 8,  FPU_OFFSET(16), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d8,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d8        }, g_d8_contains, g_d8_invalidates, nullptr, 0},
-{   "d9",        nullptr, 8,  FPU_OFFSET(18), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d9,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d9        }, g_d9_contains, g_d9_invalidates, nullptr, 0},
-{   "d10",       nullptr, 8,  FPU_OFFSET(20), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d10,           LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM, fpu_d10      }, g_d10_contains, g_d10_invalidates, nullptr, 0},
-{   "d11",       nullptr, 8,  FPU_OFFSET(22), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d11,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d11     }, g_d11_contains, g_d11_invalidates, nullptr, 0},
-{   "d12",       nullptr, 8,  FPU_OFFSET(24), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d12,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d12     }, g_d12_contains, g_d12_invalidates, nullptr, 0},
-{   "d13",       nullptr, 8,  FPU_OFFSET(26), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d13,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d13     }, g_d13_contains, g_d13_invalidates, nullptr, 0},
-{   "d14",       nullptr, 8,  FPU_OFFSET(28), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d14,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d14     }, g_d14_contains, g_d14_invalidates, nullptr, 0},
-{   "d15",       nullptr, 8,  FPU_OFFSET(30), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d15,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d15     }, g_d15_contains, g_d15_invalidates, nullptr, 0},
-{   "d16",       nullptr, 8,  FPU_OFFSET(32), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d16,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d16     }, nullptr,   g_d16_invalidates, nullptr, 0 },
-{   "d17",       nullptr, 8,  FPU_OFFSET(34), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d17,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d17       }, nullptr, g_d17_invalidates, nullptr, 0},
-{   "d18",       nullptr, 8,  FPU_OFFSET(36), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d18,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d18       }, nullptr, g_d18_invalidates, nullptr, 0},
-{   "d19",       nullptr, 8,  FPU_OFFSET(38), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d19,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d19       }, nullptr, g_d19_invalidates, nullptr, 0},
-{   "d20",       nullptr, 8,  FPU_OFFSET(40), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d20,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d20       }, nullptr, g_d20_invalidates, nullptr, 0},
-{   "d21",       nullptr, 8,  FPU_OFFSET(42), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d21,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d21       }, nullptr, g_d21_invalidates, nullptr, 0},
-{   "d22",       nullptr, 8,  FPU_OFFSET(44), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d22,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d22       }, nullptr, g_d22_invalidates, nullptr, 0},
-{   "d23",       nullptr, 8,  FPU_OFFSET(46), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d23,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d23       }, nullptr, g_d23_invalidates, nullptr, 0},
-{   "d24",       nullptr, 8,  FPU_OFFSET(48), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d24,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d24       }, nullptr, g_d24_invalidates, nullptr, 0},
-{   "d25",       nullptr, 8,  FPU_OFFSET(50), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d25,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d25       }, nullptr, g_d25_invalidates, nullptr, 0},
-{   "d26",       nullptr, 8,  FPU_OFFSET(52), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d26,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d26       }, nullptr, g_d26_invalidates, nullptr, 0},
-{   "d27",       nullptr, 8,  FPU_OFFSET(54), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d27,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d27       }, nullptr, g_d27_invalidates, nullptr, 0},
-{   "d28",       nullptr, 8,  FPU_OFFSET(56), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d28,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d28       }, nullptr, g_d28_invalidates, nullptr, 0},
-{   "d29",       nullptr, 8,  FPU_OFFSET(58), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d29,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d29       }, nullptr, g_d29_invalidates, nullptr, 0},
-{   "d30",       nullptr, 8,  FPU_OFFSET(60), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d30,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d30       }, nullptr, g_d30_invalidates, nullptr, 0},
-{   "d31",       nullptr, 8,  FPU_OFFSET(62), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d31,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d31       }, nullptr, g_d31_invalidates, nullptr, 0},
-
-{   "q0",        nullptr, 16, FPU_OFFSET(0),  eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q0,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q0        }, g_q0_contains,  nullptr, nullptr, 0},
-{   "q1",        nullptr, 16, FPU_OFFSET(4),  eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q1,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q1        }, g_q1_contains,  nullptr, nullptr, 0},
-{   "q2",        nullptr, 16, FPU_OFFSET(8),  eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q2,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q2        }, g_q2_contains,  nullptr, nullptr, 0},
-{   "q3",        nullptr, 16, FPU_OFFSET(12), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q3,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q3        }, g_q3_contains,  nullptr, nullptr, 0},
-{   "q4",        nullptr, 16, FPU_OFFSET(16), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q4,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q4        }, g_q4_contains,  nullptr, nullptr, 0},
-{   "q5",        nullptr, 16, FPU_OFFSET(20), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q5,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q5        }, g_q5_contains,  nullptr, nullptr, 0},
-{   "q6",        nullptr, 16, FPU_OFFSET(24), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q6,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q6        }, g_q6_contains,  nullptr, nullptr, 0},
-{   "q7",        nullptr, 16, FPU_OFFSET(28), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q7,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q7        }, g_q7_contains,  nullptr, nullptr, 0},
-{   "q8",        nullptr, 16, FPU_OFFSET(32), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q8,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q8        }, g_q8_contains,  nullptr, nullptr, 0},
-{   "q9",        nullptr, 16, FPU_OFFSET(36), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q9,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q9        }, g_q9_contains,  nullptr, nullptr, 0},
-{   "q10",       nullptr, 16, FPU_OFFSET(40), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q10,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q10       }, g_q10_contains, nullptr, nullptr, 0},
-{   "q11",       nullptr, 16, FPU_OFFSET(44), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q11,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q11       }, g_q11_contains, nullptr, nullptr, 0},
-{   "q12",       nullptr, 16, FPU_OFFSET(48), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q12,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q12       }, g_q12_contains, nullptr, nullptr, 0},
-{   "q13",       nullptr, 16, FPU_OFFSET(52), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q13,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q13       }, g_q13_contains, nullptr, nullptr, 0},
-{   "q14",       nullptr, 16, FPU_OFFSET(56), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q14,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q14       }, g_q14_contains, nullptr, nullptr, 0},
-{   "q15",       nullptr, 16, FPU_OFFSET(60), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q15,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q15       }, g_q15_contains, nullptr, nullptr, 0},
-
-{   "exception", nullptr, 4,  EXC_OFFSET(0),  eEncodingUint,    eFormatHex,           { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, exc_exception }, nullptr,           nullptr, nullptr, 0},
-{   "fsr",       nullptr, 4,  EXC_OFFSET(1),  eEncodingUint,    eFormatHex,           { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, exc_fsr       }, nullptr,           nullptr, nullptr, 0},
-{   "far",       nullptr, 4,  EXC_OFFSET(2),  eEncodingUint,    eFormatHex,           { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, exc_far       }, nullptr,           nullptr, nullptr, 0},
-
-{   DEFINE_DBG (bvr, 0) },
-{   DEFINE_DBG (bvr, 1) },
-{   DEFINE_DBG (bvr, 2) },
-{   DEFINE_DBG (bvr, 3) },
-{   DEFINE_DBG (bvr, 4) },
-{   DEFINE_DBG (bvr, 5) },
-{   DEFINE_DBG (bvr, 6) },
-{   DEFINE_DBG (bvr, 7) },
-{   DEFINE_DBG (bvr, 8) },
-{   DEFINE_DBG (bvr, 9) },
-{   DEFINE_DBG (bvr, 10) },
-{   DEFINE_DBG (bvr, 11) },
-{   DEFINE_DBG (bvr, 12) },
-{   DEFINE_DBG (bvr, 13) },
-{   DEFINE_DBG (bvr, 14) },
-{   DEFINE_DBG (bvr, 15) },
-
-{   DEFINE_DBG (bcr, 0) },
-{   DEFINE_DBG (bcr, 1) },
-{   DEFINE_DBG (bcr, 2) },
-{   DEFINE_DBG (bcr, 3) },
-{   DEFINE_DBG (bcr, 4) },
-{   DEFINE_DBG (bcr, 5) },
-{   DEFINE_DBG (bcr, 6) },
-{   DEFINE_DBG (bcr, 7) },
-{   DEFINE_DBG (bcr, 8) },
-{   DEFINE_DBG (bcr, 9) },
-{   DEFINE_DBG (bcr, 10) },
-{   DEFINE_DBG (bcr, 11) },
-{   DEFINE_DBG (bcr, 12) },
-{   DEFINE_DBG (bcr, 13) },
-{   DEFINE_DBG (bcr, 14) },
-{   DEFINE_DBG (bcr, 15) },
-
-{   DEFINE_DBG (wvr, 0) },
-{   DEFINE_DBG (wvr, 1) },
-{   DEFINE_DBG (wvr, 2) },
-{   DEFINE_DBG (wvr, 3) },
-{   DEFINE_DBG (wvr, 4) },
-{   DEFINE_DBG (wvr, 5) },
-{   DEFINE_DBG (wvr, 6) },
-{   DEFINE_DBG (wvr, 7) },
-{   DEFINE_DBG (wvr, 8) },
-{   DEFINE_DBG (wvr, 9) },
-{   DEFINE_DBG (wvr, 10) },
-{   DEFINE_DBG (wvr, 11) },
-{   DEFINE_DBG (wvr, 12) },
-{   DEFINE_DBG (wvr, 13) },
-{   DEFINE_DBG (wvr, 14) },
-{   DEFINE_DBG (wvr, 15) },
-
-{   DEFINE_DBG (wcr, 0) },
-{   DEFINE_DBG (wcr, 1) },
-{   DEFINE_DBG (wcr, 2) },
-{   DEFINE_DBG (wcr, 3) },
-{   DEFINE_DBG (wcr, 4) },
-{   DEFINE_DBG (wcr, 5) },
-{   DEFINE_DBG (wcr, 6) },
-{   DEFINE_DBG (wcr, 7) },
-{   DEFINE_DBG (wcr, 8) },
-{   DEFINE_DBG (wcr, 9) },
-{   DEFINE_DBG (wcr, 10) },
-{   DEFINE_DBG (wcr, 11) },
-{   DEFINE_DBG (wcr, 12) },
-{   DEFINE_DBG (wcr, 13) },
-{   DEFINE_DBG (wcr, 14) },
-{   DEFINE_DBG (wcr, 15) }
-};
+    //  NAME         ALT     SZ   OFFSET          ENCODING          FORMAT
+    //  EH_FRAME             DWARF                GENERIC
+    //  PROCESS PLUGIN       LLDB NATIVE      VALUE REGS      INVALIDATE REGS
+    //  ===========  ======= ==   ==============  ================
+    //  ====================    ===================  ===================
+    //  ==========================  ===================  =============
+    //  ==============  =================
+    {"r0",
+     nullptr,
+     4,
+     GPR_OFFSET(0),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r0, dwarf_r0, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM,
+      gpr_r0},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r1",
+     nullptr,
+     4,
+     GPR_OFFSET(1),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r1, dwarf_r1, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM,
+      gpr_r1},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r2",
+     nullptr,
+     4,
+     GPR_OFFSET(2),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r2, dwarf_r2, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM,
+      gpr_r2},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r3",
+     nullptr,
+     4,
+     GPR_OFFSET(3),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM,
+      gpr_r3},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r4",
+     nullptr,
+     4,
+     GPR_OFFSET(4),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r4},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r5",
+     nullptr,
+     4,
+     GPR_OFFSET(5),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r5},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r6",
+     nullptr,
+     4,
+     GPR_OFFSET(6),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r6},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r7",
+     nullptr,
+     4,
+     GPR_OFFSET(7),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r7, dwarf_r7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r7},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r8",
+     nullptr,
+     4,
+     GPR_OFFSET(8),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r8},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r9",
+     nullptr,
+     4,
+     GPR_OFFSET(9),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r9},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r10",
+     nullptr,
+     4,
+     GPR_OFFSET(10),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      gpr_r10},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r11",
+     nullptr,
+     4,
+     GPR_OFFSET(11),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r11, dwarf_r11, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM,
+      gpr_r11},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"r12",
+     nullptr,
+     4,
+     GPR_OFFSET(12),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      gpr_r12},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"sp",
+     "r13",
+     4,
+     GPR_OFFSET(13),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM,
+      gpr_sp},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"lr",
+     "r14",
+     4,
+     GPR_OFFSET(14),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM,
+      gpr_lr},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"pc",
+     "r15",
+     4,
+     GPR_OFFSET(15),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM,
+      gpr_pc},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"cpsr",
+     "psr",
+     4,
+     GPR_OFFSET(16),
+     eEncodingUint,
+     eFormatHex,
+     {ehframe_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM,
+      gpr_cpsr},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+
+    {"s0",
+     nullptr,
+     4,
+     FPU_OFFSET(0),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s0},
+     nullptr,
+     g_s0_invalidates,
+     nullptr,
+     0},
+    {"s1",
+     nullptr,
+     4,
+     FPU_OFFSET(1),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s1},
+     nullptr,
+     g_s1_invalidates,
+     nullptr,
+     0},
+    {"s2",
+     nullptr,
+     4,
+     FPU_OFFSET(2),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s2},
+     nullptr,
+     g_s2_invalidates,
+     nullptr,
+     0},
+    {"s3",
+     nullptr,
+     4,
+     FPU_OFFSET(3),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s3},
+     nullptr,
+     g_s3_invalidates,
+     nullptr,
+     0},
+    {"s4",
+     nullptr,
+     4,
+     FPU_OFFSET(4),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s4},
+     nullptr,
+     g_s4_invalidates,
+     nullptr,
+     0},
+    {"s5",
+     nullptr,
+     4,
+     FPU_OFFSET(5),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s5},
+     nullptr,
+     g_s5_invalidates,
+     nullptr,
+     0},
+    {"s6",
+     nullptr,
+     4,
+     FPU_OFFSET(6),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s6},
+     nullptr,
+     g_s6_invalidates,
+     nullptr,
+     0},
+    {"s7",
+     nullptr,
+     4,
+     FPU_OFFSET(7),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s7},
+     nullptr,
+     g_s7_invalidates,
+     nullptr,
+     0},
+    {"s8",
+     nullptr,
+     4,
+     FPU_OFFSET(8),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s8},
+     nullptr,
+     g_s8_invalidates,
+     nullptr,
+     0},
+    {"s9",
+     nullptr,
+     4,
+     FPU_OFFSET(9),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s9},
+     nullptr,
+     g_s9_invalidates,
+     nullptr,
+     0},
+    {"s10",
+     nullptr,
+     4,
+     FPU_OFFSET(10),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s10},
+     nullptr,
+     g_s10_invalidates,
+     nullptr,
+     0},
+    {"s11",
+     nullptr,
+     4,
+     FPU_OFFSET(11),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s11},
+     nullptr,
+     g_s11_invalidates,
+     nullptr,
+     0},
+    {"s12",
+     nullptr,
+     4,
+     FPU_OFFSET(12),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s12},
+     nullptr,
+     g_s12_invalidates,
+     nullptr,
+     0},
+    {"s13",
+     nullptr,
+     4,
+     FPU_OFFSET(13),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s13},
+     nullptr,
+     g_s13_invalidates,
+     nullptr,
+     0},
+    {"s14",
+     nullptr,
+     4,
+     FPU_OFFSET(14),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s14},
+     nullptr,
+     g_s14_invalidates,
+     nullptr,
+     0},
+    {"s15",
+     nullptr,
+     4,
+     FPU_OFFSET(15),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s15},
+     nullptr,
+     g_s15_invalidates,
+     nullptr,
+     0},
+    {"s16",
+     nullptr,
+     4,
+     FPU_OFFSET(16),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s16},
+     nullptr,
+     g_s16_invalidates,
+     nullptr,
+     0},
+    {"s17",
+     nullptr,
+     4,
+     FPU_OFFSET(17),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s17},
+     nullptr,
+     g_s17_invalidates,
+     nullptr,
+     0},
+    {"s18",
+     nullptr,
+     4,
+     FPU_OFFSET(18),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s18},
+     nullptr,
+     g_s18_invalidates,
+     nullptr,
+     0},
+    {"s19",
+     nullptr,
+     4,
+     FPU_OFFSET(19),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s19},
+     nullptr,
+     g_s19_invalidates,
+     nullptr,
+     0},
+    {"s20",
+     nullptr,
+     4,
+     FPU_OFFSET(20),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s20},
+     nullptr,
+     g_s20_invalidates,
+     nullptr,
+     0},
+    {"s21",
+     nullptr,
+     4,
+     FPU_OFFSET(21),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s21},
+     nullptr,
+     g_s21_invalidates,
+     nullptr,
+     0},
+    {"s22",
+     nullptr,
+     4,
+     FPU_OFFSET(22),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s22},
+     nullptr,
+     g_s22_invalidates,
+     nullptr,
+     0},
+    {"s23",
+     nullptr,
+     4,
+     FPU_OFFSET(23),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s23},
+     nullptr,
+     g_s23_invalidates,
+     nullptr,
+     0},
+    {"s24",
+     nullptr,
+     4,
+     FPU_OFFSET(24),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s24},
+     nullptr,
+     g_s24_invalidates,
+     nullptr,
+     0},
+    {"s25",
+     nullptr,
+     4,
+     FPU_OFFSET(25),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s25},
+     nullptr,
+     g_s25_invalidates,
+     nullptr,
+     0},
+    {"s26",
+     nullptr,
+     4,
+     FPU_OFFSET(26),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s26},
+     nullptr,
+     g_s26_invalidates,
+     nullptr,
+     0},
+    {"s27",
+     nullptr,
+     4,
+     FPU_OFFSET(27),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s27},
+     nullptr,
+     g_s27_invalidates,
+     nullptr,
+     0},
+    {"s28",
+     nullptr,
+     4,
+     FPU_OFFSET(28),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s28},
+     nullptr,
+     g_s28_invalidates,
+     nullptr,
+     0},
+    {"s29",
+     nullptr,
+     4,
+     FPU_OFFSET(29),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s29},
+     nullptr,
+     g_s29_invalidates,
+     nullptr,
+     0},
+    {"s30",
+     nullptr,
+     4,
+     FPU_OFFSET(30),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s30},
+     nullptr,
+     g_s30_invalidates,
+     nullptr,
+     0},
+    {"s31",
+     nullptr,
+     4,
+     FPU_OFFSET(31),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_s31},
+     nullptr,
+     g_s31_invalidates,
+     nullptr,
+     0},
+    {"fpscr",
+     nullptr,
+     4,
+     FPSCR_OFFSET,
+     eEncodingUint,
+     eFormatHex,
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, fpu_fpscr},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+
+    {"d0",
+     nullptr,
+     8,
+     FPU_OFFSET(0),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d0},
+     g_d0_contains,
+     g_d0_invalidates,
+     nullptr,
+     0},
+    {"d1",
+     nullptr,
+     8,
+     FPU_OFFSET(2),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d1},
+     g_d1_contains,
+     g_d1_invalidates,
+     nullptr,
+     0},
+    {"d2",
+     nullptr,
+     8,
+     FPU_OFFSET(4),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d2},
+     g_d2_contains,
+     g_d2_invalidates,
+     nullptr,
+     0},
+    {"d3",
+     nullptr,
+     8,
+     FPU_OFFSET(6),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d3},
+     g_d3_contains,
+     g_d3_invalidates,
+     nullptr,
+     0},
+    {"d4",
+     nullptr,
+     8,
+     FPU_OFFSET(8),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d4},
+     g_d4_contains,
+     g_d4_invalidates,
+     nullptr,
+     0},
+    {"d5",
+     nullptr,
+     8,
+     FPU_OFFSET(10),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d5},
+     g_d5_contains,
+     g_d5_invalidates,
+     nullptr,
+     0},
+    {"d6",
+     nullptr,
+     8,
+     FPU_OFFSET(12),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d6},
+     g_d6_contains,
+     g_d6_invalidates,
+     nullptr,
+     0},
+    {"d7",
+     nullptr,
+     8,
+     FPU_OFFSET(14),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d7},
+     g_d7_contains,
+     g_d7_invalidates,
+     nullptr,
+     0},
+    {"d8",
+     nullptr,
+     8,
+     FPU_OFFSET(16),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d8},
+     g_d8_contains,
+     g_d8_invalidates,
+     nullptr,
+     0},
+    {"d9",
+     nullptr,
+     8,
+     FPU_OFFSET(18),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d9},
+     g_d9_contains,
+     g_d9_invalidates,
+     nullptr,
+     0},
+    {"d10",
+     nullptr,
+     8,
+     FPU_OFFSET(20),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d10},
+     g_d10_contains,
+     g_d10_invalidates,
+     nullptr,
+     0},
+    {"d11",
+     nullptr,
+     8,
+     FPU_OFFSET(22),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d11},
+     g_d11_contains,
+     g_d11_invalidates,
+     nullptr,
+     0},
+    {"d12",
+     nullptr,
+     8,
+     FPU_OFFSET(24),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d12},
+     g_d12_contains,
+     g_d12_invalidates,
+     nullptr,
+     0},
+    {"d13",
+     nullptr,
+     8,
+     FPU_OFFSET(26),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d13},
+     g_d13_contains,
+     g_d13_invalidates,
+     nullptr,
+     0},
+    {"d14",
+     nullptr,
+     8,
+     FPU_OFFSET(28),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d14},
+     g_d14_contains,
+     g_d14_invalidates,
+     nullptr,
+     0},
+    {"d15",
+     nullptr,
+     8,
+     FPU_OFFSET(30),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d15},
+     g_d15_contains,
+     g_d15_invalidates,
+     nullptr,
+     0},
+    {"d16",
+     nullptr,
+     8,
+     FPU_OFFSET(32),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d16},
+     nullptr,
+     g_d16_invalidates,
+     nullptr,
+     0},
+    {"d17",
+     nullptr,
+     8,
+     FPU_OFFSET(34),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d17},
+     nullptr,
+     g_d17_invalidates,
+     nullptr,
+     0},
+    {"d18",
+     nullptr,
+     8,
+     FPU_OFFSET(36),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d18},
+     nullptr,
+     g_d18_invalidates,
+     nullptr,
+     0},
+    {"d19",
+     nullptr,
+     8,
+     FPU_OFFSET(38),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d19},
+     nullptr,
+     g_d19_invalidates,
+     nullptr,
+     0},
+    {"d20",
+     nullptr,
+     8,
+     FPU_OFFSET(40),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d20},
+     nullptr,
+     g_d20_invalidates,
+     nullptr,
+     0},
+    {"d21",
+     nullptr,
+     8,
+     FPU_OFFSET(42),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d21},
+     nullptr,
+     g_d21_invalidates,
+     nullptr,
+     0},
+    {"d22",
+     nullptr,
+     8,
+     FPU_OFFSET(44),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d22},
+     nullptr,
+     g_d22_invalidates,
+     nullptr,
+     0},
+    {"d23",
+     nullptr,
+     8,
+     FPU_OFFSET(46),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d23},
+     nullptr,
+     g_d23_invalidates,
+     nullptr,
+     0},
+    {"d24",
+     nullptr,
+     8,
+     FPU_OFFSET(48),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d24},
+     nullptr,
+     g_d24_invalidates,
+     nullptr,
+     0},
+    {"d25",
+     nullptr,
+     8,
+     FPU_OFFSET(50),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d25},
+     nullptr,
+     g_d25_invalidates,
+     nullptr,
+     0},
+    {"d26",
+     nullptr,
+     8,
+     FPU_OFFSET(52),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d26},
+     nullptr,
+     g_d26_invalidates,
+     nullptr,
+     0},
+    {"d27",
+     nullptr,
+     8,
+     FPU_OFFSET(54),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d27},
+     nullptr,
+     g_d27_invalidates,
+     nullptr,
+     0},
+    {"d28",
+     nullptr,
+     8,
+     FPU_OFFSET(56),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d28},
+     nullptr,
+     g_d28_invalidates,
+     nullptr,
+     0},
+    {"d29",
+     nullptr,
+     8,
+     FPU_OFFSET(58),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d29},
+     nullptr,
+     g_d29_invalidates,
+     nullptr,
+     0},
+    {"d30",
+     nullptr,
+     8,
+     FPU_OFFSET(60),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d30},
+     nullptr,
+     g_d30_invalidates,
+     nullptr,
+     0},
+    {"d31",
+     nullptr,
+     8,
+     FPU_OFFSET(62),
+     eEncodingIEEE754,
+     eFormatFloat,
+     {LLDB_INVALID_REGNUM, dwarf_d31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_d31},
+     nullptr,
+     g_d31_invalidates,
+     nullptr,
+     0},
+
+    {"q0",
+     nullptr,
+     16,
+     FPU_OFFSET(0),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q0},
+     g_q0_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q1",
+     nullptr,
+     16,
+     FPU_OFFSET(4),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q1},
+     g_q1_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q2",
+     nullptr,
+     16,
+     FPU_OFFSET(8),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q2},
+     g_q2_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q3",
+     nullptr,
+     16,
+     FPU_OFFSET(12),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q3},
+     g_q3_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q4",
+     nullptr,
+     16,
+     FPU_OFFSET(16),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q4},
+     g_q4_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q5",
+     nullptr,
+     16,
+     FPU_OFFSET(20),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q5},
+     g_q5_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q6",
+     nullptr,
+     16,
+     FPU_OFFSET(24),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q6},
+     g_q6_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q7",
+     nullptr,
+     16,
+     FPU_OFFSET(28),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q7},
+     g_q7_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q8",
+     nullptr,
+     16,
+     FPU_OFFSET(32),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q8},
+     g_q8_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q9",
+     nullptr,
+     16,
+     FPU_OFFSET(36),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q9},
+     g_q9_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q10",
+     nullptr,
+     16,
+     FPU_OFFSET(40),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q10},
+     g_q10_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q11",
+     nullptr,
+     16,
+     FPU_OFFSET(44),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q11},
+     g_q11_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q12",
+     nullptr,
+     16,
+     FPU_OFFSET(48),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q12},
+     g_q12_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q13",
+     nullptr,
+     16,
+     FPU_OFFSET(52),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q13},
+     g_q13_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q14",
+     nullptr,
+     16,
+     FPU_OFFSET(56),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q14},
+     g_q14_contains,
+     nullptr,
+     nullptr,
+     0},
+    {"q15",
+     nullptr,
+     16,
+     FPU_OFFSET(60),
+     eEncodingVector,
+     eFormatVectorOfUInt8,
+     {LLDB_INVALID_REGNUM, dwarf_q15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      fpu_q15},
+     g_q15_contains,
+     nullptr,
+     nullptr,
+     0},
+
+    {"exception",
+     nullptr,
+     4,
+     EXC_OFFSET(0),
+     eEncodingUint,
+     eFormatHex,
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, exc_exception},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"fsr",
+     nullptr,
+     4,
+     EXC_OFFSET(1),
+     eEncodingUint,
+     eFormatHex,
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, exc_fsr},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+    {"far",
+     nullptr,
+     4,
+     EXC_OFFSET(2),
+     eEncodingUint,
+     eFormatHex,
+     {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM, exc_far},
+     nullptr,
+     nullptr,
+     nullptr,
+     0},
+
+    {DEFINE_DBG(bvr, 0)},
+    {DEFINE_DBG(bvr, 1)},
+    {DEFINE_DBG(bvr, 2)},
+    {DEFINE_DBG(bvr, 3)},
+    {DEFINE_DBG(bvr, 4)},
+    {DEFINE_DBG(bvr, 5)},
+    {DEFINE_DBG(bvr, 6)},
+    {DEFINE_DBG(bvr, 7)},
+    {DEFINE_DBG(bvr, 8)},
+    {DEFINE_DBG(bvr, 9)},
+    {DEFINE_DBG(bvr, 10)},
+    {DEFINE_DBG(bvr, 11)},
+    {DEFINE_DBG(bvr, 12)},
+    {DEFINE_DBG(bvr, 13)},
+    {DEFINE_DBG(bvr, 14)},
+    {DEFINE_DBG(bvr, 15)},
+
+    {DEFINE_DBG(bcr, 0)},
+    {DEFINE_DBG(bcr, 1)},
+    {DEFINE_DBG(bcr, 2)},
+    {DEFINE_DBG(bcr, 3)},
+    {DEFINE_DBG(bcr, 4)},
+    {DEFINE_DBG(bcr, 5)},
+    {DEFINE_DBG(bcr, 6)},
+    {DEFINE_DBG(bcr, 7)},
+    {DEFINE_DBG(bcr, 8)},
+    {DEFINE_DBG(bcr, 9)},
+    {DEFINE_DBG(bcr, 10)},
+    {DEFINE_DBG(bcr, 11)},
+    {DEFINE_DBG(bcr, 12)},
+    {DEFINE_DBG(bcr, 13)},
+    {DEFINE_DBG(bcr, 14)},
+    {DEFINE_DBG(bcr, 15)},
+
+    {DEFINE_DBG(wvr, 0)},
+    {DEFINE_DBG(wvr, 1)},
+    {DEFINE_DBG(wvr, 2)},
+    {DEFINE_DBG(wvr, 3)},
+    {DEFINE_DBG(wvr, 4)},
+    {DEFINE_DBG(wvr, 5)},
+    {DEFINE_DBG(wvr, 6)},
+    {DEFINE_DBG(wvr, 7)},
+    {DEFINE_DBG(wvr, 8)},
+    {DEFINE_DBG(wvr, 9)},
+    {DEFINE_DBG(wvr, 10)},
+    {DEFINE_DBG(wvr, 11)},
+    {DEFINE_DBG(wvr, 12)},
+    {DEFINE_DBG(wvr, 13)},
+    {DEFINE_DBG(wvr, 14)},
+    {DEFINE_DBG(wvr, 15)},
+
+    {DEFINE_DBG(wcr, 0)},
+    {DEFINE_DBG(wcr, 1)},
+    {DEFINE_DBG(wcr, 2)},
+    {DEFINE_DBG(wcr, 3)},
+    {DEFINE_DBG(wcr, 4)},
+    {DEFINE_DBG(wcr, 5)},
+    {DEFINE_DBG(wcr, 6)},
+    {DEFINE_DBG(wcr, 7)},
+    {DEFINE_DBG(wcr, 8)},
+    {DEFINE_DBG(wcr, 9)},
+    {DEFINE_DBG(wcr, 10)},
+    {DEFINE_DBG(wcr, 11)},
+    {DEFINE_DBG(wcr, 12)},
+    {DEFINE_DBG(wcr, 13)},
+    {DEFINE_DBG(wcr, 14)},
+    {DEFINE_DBG(wcr, 15)}};
 
 #endif // DECLARE_REGISTER_INFOS_ARM_STRUCT
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
index f360f25..b996533 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
@@ -15,9 +15,9 @@
 // C++ Includes
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
 #include "lldb/lldb-defines.h"
 #include "lldb/lldb-enumerations.h"
+#include "lldb/lldb-private.h"
 
 #include "Utility/ARM64_DWARF_Registers.h"
 #include "Utility/ARM64_ehframe_Registers.h"
@@ -50,302 +50,668 @@
 #error DEFINE_DBG must be defined before including this header file
 #endif
 
-enum
-{
-    gpr_x0 = 0,
-    gpr_x1,
-    gpr_x2,
-    gpr_x3,
-    gpr_x4,
-    gpr_x5,
-    gpr_x6,
-    gpr_x7,
-    gpr_x8,
-    gpr_x9,
-    gpr_x10,
-    gpr_x11,
-    gpr_x12,
-    gpr_x13,
-    gpr_x14,
-    gpr_x15,
-    gpr_x16,
-    gpr_x17,
-    gpr_x18,
-    gpr_x19,
-    gpr_x20,
-    gpr_x21,
-    gpr_x22,
-    gpr_x23,
-    gpr_x24,
-    gpr_x25,
-    gpr_x26,
-    gpr_x27,
-    gpr_x28,
-    gpr_x29 = 29,  gpr_fp = gpr_x29,
-    gpr_x30 = 30,  gpr_lr = gpr_x30,  gpr_ra = gpr_x30,
-    gpr_x31 = 31,  gpr_sp = gpr_x31,
-    gpr_pc = 32,
-    gpr_cpsr,
-
-    fpu_v0,
-    fpu_v1,
-    fpu_v2,
-    fpu_v3,
-    fpu_v4,
-    fpu_v5,
-    fpu_v6,
-    fpu_v7,
-    fpu_v8,
-    fpu_v9,
-    fpu_v10,
-    fpu_v11,
-    fpu_v12,
-    fpu_v13,
-    fpu_v14,
-    fpu_v15,
-    fpu_v16,
-    fpu_v17,
-    fpu_v18,
-    fpu_v19,
-    fpu_v20,
-    fpu_v21,
-    fpu_v22,
-    fpu_v23,
-    fpu_v24,
-    fpu_v25,
-    fpu_v26,
-    fpu_v27,
-    fpu_v28,
-    fpu_v29,
-    fpu_v30,
-    fpu_v31,
-
-    fpu_fpsr,
-    fpu_fpcr,
-
-    exc_far,
-    exc_esr,
-    exc_exception,
-
-    dbg_bvr0,
-    dbg_bvr1,
-    dbg_bvr2,
-    dbg_bvr3,
-    dbg_bvr4,
-    dbg_bvr5,
-    dbg_bvr6,
-    dbg_bvr7,
-    dbg_bvr8,
-    dbg_bvr9,
-    dbg_bvr10,
-    dbg_bvr11,
-    dbg_bvr12,
-    dbg_bvr13,
-    dbg_bvr14,
-    dbg_bvr15,
-
-    dbg_bcr0,
-    dbg_bcr1,
-    dbg_bcr2,
-    dbg_bcr3,
-    dbg_bcr4,
-    dbg_bcr5,
-    dbg_bcr6,
-    dbg_bcr7,
-    dbg_bcr8,
-    dbg_bcr9,
-    dbg_bcr10,
-    dbg_bcr11,
-    dbg_bcr12,
-    dbg_bcr13,
-    dbg_bcr14,
-    dbg_bcr15,
-
-    dbg_wvr0,
-    dbg_wvr1,
-    dbg_wvr2,
-    dbg_wvr3,
-    dbg_wvr4,
-    dbg_wvr5,
-    dbg_wvr6,
-    dbg_wvr7,
-    dbg_wvr8,
-    dbg_wvr9,
-    dbg_wvr10,
-    dbg_wvr11,
-    dbg_wvr12,
-    dbg_wvr13,
-    dbg_wvr14,
-    dbg_wvr15,
-
-    dbg_wcr0,
-    dbg_wcr1,
-    dbg_wcr2,
-    dbg_wcr3,
-    dbg_wcr4,
-    dbg_wcr5,
-    dbg_wcr6,
-    dbg_wcr7,
-    dbg_wcr8,
-    dbg_wcr9,
-    dbg_wcr10,
-    dbg_wcr11,
-    dbg_wcr12,
-    dbg_wcr13,
-    dbg_wcr14,
-    dbg_wcr15,
-
-    k_num_registers
+// Offsets for a little-endian layout of the register context
+#define GPR_W_PSEUDO_REG_ENDIAN_OFFSET 0
+#define FPU_S_PSEUDO_REG_ENDIAN_OFFSET 0
+#define FPU_D_PSEUDO_REG_ENDIAN_OFFSET 0
+
+enum {
+  gpr_x0 = 0,
+  gpr_x1,
+  gpr_x2,
+  gpr_x3,
+  gpr_x4,
+  gpr_x5,
+  gpr_x6,
+  gpr_x7,
+  gpr_x8,
+  gpr_x9,
+  gpr_x10,
+  gpr_x11,
+  gpr_x12,
+  gpr_x13,
+  gpr_x14,
+  gpr_x15,
+  gpr_x16,
+  gpr_x17,
+  gpr_x18,
+  gpr_x19,
+  gpr_x20,
+  gpr_x21,
+  gpr_x22,
+  gpr_x23,
+  gpr_x24,
+  gpr_x25,
+  gpr_x26,
+  gpr_x27,
+  gpr_x28,
+  gpr_x29 = 29,
+  gpr_fp = gpr_x29,
+  gpr_x30 = 30,
+  gpr_lr = gpr_x30,
+  gpr_ra = gpr_x30,
+  gpr_x31 = 31,
+  gpr_sp = gpr_x31,
+  gpr_pc = 32,
+  gpr_cpsr,
+
+  gpr_w0,
+  gpr_w1,
+  gpr_w2,
+  gpr_w3,
+  gpr_w4,
+  gpr_w5,
+  gpr_w6,
+  gpr_w7,
+  gpr_w8,
+  gpr_w9,
+  gpr_w10,
+  gpr_w11,
+  gpr_w12,
+  gpr_w13,
+  gpr_w14,
+  gpr_w15,
+  gpr_w16,
+  gpr_w17,
+  gpr_w18,
+  gpr_w19,
+  gpr_w20,
+  gpr_w21,
+  gpr_w22,
+  gpr_w23,
+  gpr_w24,
+  gpr_w25,
+  gpr_w26,
+  gpr_w27,
+  gpr_w28,
+
+  fpu_v0,
+  fpu_v1,
+  fpu_v2,
+  fpu_v3,
+  fpu_v4,
+  fpu_v5,
+  fpu_v6,
+  fpu_v7,
+  fpu_v8,
+  fpu_v9,
+  fpu_v10,
+  fpu_v11,
+  fpu_v12,
+  fpu_v13,
+  fpu_v14,
+  fpu_v15,
+  fpu_v16,
+  fpu_v17,
+  fpu_v18,
+  fpu_v19,
+  fpu_v20,
+  fpu_v21,
+  fpu_v22,
+  fpu_v23,
+  fpu_v24,
+  fpu_v25,
+  fpu_v26,
+  fpu_v27,
+  fpu_v28,
+  fpu_v29,
+  fpu_v30,
+  fpu_v31,
+
+  fpu_s0,
+  fpu_s1,
+  fpu_s2,
+  fpu_s3,
+  fpu_s4,
+  fpu_s5,
+  fpu_s6,
+  fpu_s7,
+  fpu_s8,
+  fpu_s9,
+  fpu_s10,
+  fpu_s11,
+  fpu_s12,
+  fpu_s13,
+  fpu_s14,
+  fpu_s15,
+  fpu_s16,
+  fpu_s17,
+  fpu_s18,
+  fpu_s19,
+  fpu_s20,
+  fpu_s21,
+  fpu_s22,
+  fpu_s23,
+  fpu_s24,
+  fpu_s25,
+  fpu_s26,
+  fpu_s27,
+  fpu_s28,
+  fpu_s29,
+  fpu_s30,
+  fpu_s31,
+
+  fpu_d0,
+  fpu_d1,
+  fpu_d2,
+  fpu_d3,
+  fpu_d4,
+  fpu_d5,
+  fpu_d6,
+  fpu_d7,
+  fpu_d8,
+  fpu_d9,
+  fpu_d10,
+  fpu_d11,
+  fpu_d12,
+  fpu_d13,
+  fpu_d14,
+  fpu_d15,
+  fpu_d16,
+  fpu_d17,
+  fpu_d18,
+  fpu_d19,
+  fpu_d20,
+  fpu_d21,
+  fpu_d22,
+  fpu_d23,
+  fpu_d24,
+  fpu_d25,
+  fpu_d26,
+  fpu_d27,
+  fpu_d28,
+  fpu_d29,
+  fpu_d30,
+  fpu_d31,
+
+  fpu_fpsr,
+  fpu_fpcr,
+
+  exc_far,
+  exc_esr,
+  exc_exception,
+
+  dbg_bvr0,
+  dbg_bvr1,
+  dbg_bvr2,
+  dbg_bvr3,
+  dbg_bvr4,
+  dbg_bvr5,
+  dbg_bvr6,
+  dbg_bvr7,
+  dbg_bvr8,
+  dbg_bvr9,
+  dbg_bvr10,
+  dbg_bvr11,
+  dbg_bvr12,
+  dbg_bvr13,
+  dbg_bvr14,
+  dbg_bvr15,
+
+  dbg_bcr0,
+  dbg_bcr1,
+  dbg_bcr2,
+  dbg_bcr3,
+  dbg_bcr4,
+  dbg_bcr5,
+  dbg_bcr6,
+  dbg_bcr7,
+  dbg_bcr8,
+  dbg_bcr9,
+  dbg_bcr10,
+  dbg_bcr11,
+  dbg_bcr12,
+  dbg_bcr13,
+  dbg_bcr14,
+  dbg_bcr15,
+
+  dbg_wvr0,
+  dbg_wvr1,
+  dbg_wvr2,
+  dbg_wvr3,
+  dbg_wvr4,
+  dbg_wvr5,
+  dbg_wvr6,
+  dbg_wvr7,
+  dbg_wvr8,
+  dbg_wvr9,
+  dbg_wvr10,
+  dbg_wvr11,
+  dbg_wvr12,
+  dbg_wvr13,
+  dbg_wvr14,
+  dbg_wvr15,
+
+  dbg_wcr0,
+  dbg_wcr1,
+  dbg_wcr2,
+  dbg_wcr3,
+  dbg_wcr4,
+  dbg_wcr5,
+  dbg_wcr6,
+  dbg_wcr7,
+  dbg_wcr8,
+  dbg_wcr9,
+  dbg_wcr10,
+  dbg_wcr11,
+  dbg_wcr12,
+  dbg_wcr13,
+  dbg_wcr14,
+  dbg_wcr15,
+
+  k_num_registers
 };
 
-static lldb_private::RegisterInfo g_register_infos_arm64[] = {
-// General purpose registers
-//  NAME        ALT     SZ  OFFSET              ENCODING                FORMAT                 EH_FRAME                     DWARF                      GENERIC                     PROCESS PLUGIN          LLDB NATIVE   VALUE REGS    INVALIDATE REGS
-//  ======      ======= ==  =============       =============         ============            ===============              ===============            =========================   =====================   ============= ==========    ===============
-{   "x0",       nullptr,  8,  GPR_OFFSET(0),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x0,           arm64_dwarf::x0,           LLDB_REGNUM_GENERIC_ARG1,   LLDB_INVALID_REGNUM,       gpr_x0      },      nullptr,        nullptr, nullptr, 0},
-{   "x1",       nullptr,  8,  GPR_OFFSET(1),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x1,           arm64_dwarf::x1,           LLDB_REGNUM_GENERIC_ARG2,   LLDB_INVALID_REGNUM,       gpr_x1      },      nullptr,        nullptr, nullptr, 0},
-{   "x2",       nullptr,  8,  GPR_OFFSET(2),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x2,           arm64_dwarf::x2,           LLDB_REGNUM_GENERIC_ARG3,   LLDB_INVALID_REGNUM,       gpr_x2      },      nullptr,        nullptr, nullptr, 0},
-{   "x3",       nullptr,  8,  GPR_OFFSET(3),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x3,           arm64_dwarf::x3,           LLDB_REGNUM_GENERIC_ARG4,   LLDB_INVALID_REGNUM,       gpr_x3      },      nullptr,        nullptr, nullptr, 0},
-{   "x4",       nullptr,  8,  GPR_OFFSET(4),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x4,           arm64_dwarf::x4,           LLDB_REGNUM_GENERIC_ARG5,   LLDB_INVALID_REGNUM,       gpr_x4      },      nullptr,        nullptr, nullptr, 0},
-{   "x5",       nullptr,  8,  GPR_OFFSET(5),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x5,           arm64_dwarf::x5,           LLDB_REGNUM_GENERIC_ARG6,   LLDB_INVALID_REGNUM,       gpr_x5      },      nullptr,        nullptr, nullptr, 0},
-{   "x6",       nullptr,  8,  GPR_OFFSET(6),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x6,           arm64_dwarf::x6,           LLDB_REGNUM_GENERIC_ARG7,   LLDB_INVALID_REGNUM,       gpr_x6      },      nullptr,        nullptr, nullptr, 0},
-{   "x7",       nullptr,  8,  GPR_OFFSET(7),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x7,           arm64_dwarf::x7,           LLDB_REGNUM_GENERIC_ARG8,   LLDB_INVALID_REGNUM,       gpr_x7      },      nullptr,        nullptr, nullptr, 0},
-{   "x8",       nullptr,  8,  GPR_OFFSET(8),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x8,           arm64_dwarf::x8,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x8      },      nullptr,        nullptr, nullptr, 0},
-{   "x9",       nullptr,  8,  GPR_OFFSET(9),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x9,           arm64_dwarf::x9,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x9      },      nullptr,        nullptr, nullptr, 0},
-{   "x10",      nullptr,  8,  GPR_OFFSET(10),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x10,          arm64_dwarf::x10,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x10     },      nullptr,        nullptr, nullptr, 0},
-{   "x11",      nullptr,  8,  GPR_OFFSET(11),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x11,          arm64_dwarf::x11,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x11     },      nullptr,        nullptr, nullptr, 0},
-{   "x12",      nullptr,  8,  GPR_OFFSET(12),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x12,          arm64_dwarf::x12,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x12     },      nullptr,        nullptr, nullptr, 0},
-{   "x13",      nullptr,  8,  GPR_OFFSET(13),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x13,          arm64_dwarf::x13,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x13     },      nullptr,        nullptr, nullptr, 0},
-{   "x14",      nullptr,  8,  GPR_OFFSET(14),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x14,          arm64_dwarf::x14,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x14     },      nullptr,        nullptr, nullptr, 0},
-{   "x15",      nullptr,  8,  GPR_OFFSET(15),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x15,          arm64_dwarf::x15,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x15     },      nullptr,        nullptr, nullptr, 0},
-{   "x16",      nullptr,  8,  GPR_OFFSET(16),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x16,          arm64_dwarf::x16,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x16     },      nullptr,        nullptr, nullptr, 0},
-{   "x17",      nullptr,  8,  GPR_OFFSET(17),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x17,          arm64_dwarf::x17,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x17     },      nullptr,        nullptr, nullptr, 0},
-{   "x18",      nullptr,  8,  GPR_OFFSET(18),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x18,          arm64_dwarf::x18,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x18     },      nullptr,        nullptr, nullptr, 0},
-{   "x19",      nullptr,  8,  GPR_OFFSET(19),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x19,          arm64_dwarf::x19,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x19     },      nullptr,        nullptr, nullptr, 0},
-{   "x20",      nullptr,  8,  GPR_OFFSET(20),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x20,          arm64_dwarf::x20,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x20     },      nullptr,        nullptr, nullptr, 0},
-{   "x21",      nullptr,  8,  GPR_OFFSET(21),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x21,          arm64_dwarf::x21,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x21     },      nullptr,        nullptr, nullptr, 0},
-{   "x22",      nullptr,  8,  GPR_OFFSET(22),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x22,          arm64_dwarf::x22,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x22     },      nullptr,        nullptr, nullptr, 0},
-{   "x23",      nullptr,  8,  GPR_OFFSET(23),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x23,          arm64_dwarf::x23,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x23     },      nullptr,        nullptr, nullptr, 0},
-{   "x24",      nullptr,  8,  GPR_OFFSET(24),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x24,          arm64_dwarf::x24,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x24     },      nullptr,        nullptr, nullptr, 0},
-{   "x25",      nullptr,  8,  GPR_OFFSET(25),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x25,          arm64_dwarf::x25,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x25     },      nullptr,        nullptr, nullptr, 0},
-{   "x26",      nullptr,  8,  GPR_OFFSET(26),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x26,          arm64_dwarf::x26,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x26     },      nullptr,        nullptr, nullptr, 0},
-{   "x27",      nullptr,  8,  GPR_OFFSET(27),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x27,          arm64_dwarf::x27,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x27     },      nullptr,        nullptr, nullptr, 0},
-{   "x28",      nullptr,  8,  GPR_OFFSET(28),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x28,          arm64_dwarf::x28,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x28     },      nullptr,        nullptr, nullptr, 0},
-
-{   "fp",       "x29",    8,  GPR_OFFSET(29),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::fp,           arm64_dwarf::fp,           LLDB_REGNUM_GENERIC_FP,     LLDB_INVALID_REGNUM,       gpr_fp      },      nullptr,        nullptr, nullptr, 0},
-{   "lr",       "x30",    8,  GPR_OFFSET(30),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::lr,           arm64_dwarf::lr,           LLDB_REGNUM_GENERIC_RA,     LLDB_INVALID_REGNUM,       gpr_lr      },      nullptr,        nullptr, nullptr, 0},
-{   "sp",       "x31",    8,  GPR_OFFSET(31),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::sp,           arm64_dwarf::sp,           LLDB_REGNUM_GENERIC_SP,     LLDB_INVALID_REGNUM,       gpr_sp      },      nullptr,        nullptr, nullptr, 0},
-{   "pc",       nullptr,  8,  GPR_OFFSET(32),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::pc,           arm64_dwarf::pc,           LLDB_REGNUM_GENERIC_PC,     LLDB_INVALID_REGNUM,       gpr_pc      },      nullptr,        nullptr, nullptr, 0},
-
-{   "cpsr",     nullptr,  4,  GPR_OFFSET_NAME(cpsr), lldb::eEncodingUint,  lldb::eFormatHex,  { arm64_ehframe::cpsr,         arm64_dwarf::cpsr,         LLDB_REGNUM_GENERIC_FLAGS,  LLDB_INVALID_REGNUM,       gpr_cpsr    },      nullptr,        nullptr, nullptr, 0},
-
-{   "v0",       nullptr, 16,  FPU_OFFSET(0),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v0,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v0      },      nullptr,        nullptr, nullptr, 0},
-{   "v1",       nullptr, 16,  FPU_OFFSET(1),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v1,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v1      },      nullptr,        nullptr, nullptr, 0},
-{   "v2",       nullptr, 16,  FPU_OFFSET(2),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v2,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v2      },      nullptr,        nullptr, nullptr, 0},
-{   "v3",       nullptr, 16,  FPU_OFFSET(3),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v3,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v3      },      nullptr,        nullptr, nullptr, 0},
-{   "v4",       nullptr, 16,  FPU_OFFSET(4),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v4,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v4      },      nullptr,        nullptr, nullptr, 0},
-{   "v5",       nullptr, 16,  FPU_OFFSET(5),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v5,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v5      },      nullptr,        nullptr, nullptr, 0},
-{   "v6",       nullptr, 16,  FPU_OFFSET(6),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v6,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v6      },      nullptr,        nullptr, nullptr, 0},
-{   "v7",       nullptr, 16,  FPU_OFFSET(7),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v7,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v7      },      nullptr,        nullptr, nullptr, 0},
-{   "v8",       nullptr, 16,  FPU_OFFSET(8),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v8,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v8      },      nullptr,        nullptr, nullptr, 0},
-{   "v9",       nullptr, 16,  FPU_OFFSET(9),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v9,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v9      },      nullptr,        nullptr, nullptr, 0},
-{   "v10",      nullptr, 16,  FPU_OFFSET(10),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v10,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v10     },      nullptr,        nullptr, nullptr, 0},
-{   "v11",      nullptr, 16,  FPU_OFFSET(11),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v11,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v11     },      nullptr,        nullptr, nullptr, 0},
-{   "v12",      nullptr, 16,  FPU_OFFSET(12),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v12,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v12     },      nullptr,        nullptr, nullptr, 0},
-{   "v13",      nullptr, 16,  FPU_OFFSET(13),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v13,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v13     },      nullptr,        nullptr, nullptr, 0},
-{   "v14",      nullptr, 16,  FPU_OFFSET(14),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v14,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v14     },      nullptr,        nullptr, nullptr, 0},
-{   "v15",      nullptr, 16,  FPU_OFFSET(15),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v15,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v15     },      nullptr,        nullptr, nullptr, 0},
-{   "v16",      nullptr, 16,  FPU_OFFSET(16),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v16,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v16     },      nullptr,        nullptr, nullptr, 0},
-{   "v17",      nullptr, 16,  FPU_OFFSET(17),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v17,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v17     },      nullptr,        nullptr, nullptr, 0},
-{   "v18",      nullptr, 16,  FPU_OFFSET(18),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v18,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v18     },      nullptr,        nullptr, nullptr, 0},
-{   "v19",      nullptr, 16,  FPU_OFFSET(19),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v19,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v19     },      nullptr,        nullptr, nullptr, 0},
-{   "v20",      nullptr, 16,  FPU_OFFSET(20),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v20,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v20     },      nullptr,        nullptr, nullptr, 0},
-{   "v21",      nullptr, 16,  FPU_OFFSET(21),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v21,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v21     },      nullptr,        nullptr, nullptr, 0},
-{   "v22",      nullptr, 16,  FPU_OFFSET(22),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v22,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v22     },      nullptr,        nullptr, nullptr, 0},
-{   "v23",      nullptr, 16,  FPU_OFFSET(23),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v23,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v23     },      nullptr,        nullptr, nullptr, 0},
-{   "v24",      nullptr, 16,  FPU_OFFSET(24),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v24,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v24     },      nullptr,        nullptr, nullptr, 0},
-{   "v25",      nullptr, 16,  FPU_OFFSET(25),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v25,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v25     },      nullptr,        nullptr, nullptr, 0},
-{   "v26",      nullptr, 16,  FPU_OFFSET(26),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v26,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v26     },      nullptr,        nullptr, nullptr, 0},
-{   "v27",      nullptr, 16,  FPU_OFFSET(27),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v27,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v27     },      nullptr,        nullptr, nullptr, 0},
-{   "v28",      nullptr, 16,  FPU_OFFSET(28),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v28,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v28     },      nullptr,        nullptr, nullptr, 0},
-{   "v29",      nullptr, 16,  FPU_OFFSET(29),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v29,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v29     },      nullptr,        nullptr, nullptr, 0},
-{   "v30",      nullptr, 16,  FPU_OFFSET(30),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v30,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v30     },      nullptr,        nullptr, nullptr, 0},
-{   "v31",      nullptr, 16,  FPU_OFFSET(31),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v31,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v31     },      nullptr,        nullptr, nullptr, 0},
-
-{   "fpsr",     nullptr,  4,  FPU_OFFSET_NAME(fpsr),     lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,  fpu_fpsr   },      nullptr,        nullptr, nullptr, 0},
-{   "fpcr",     nullptr,  4,  FPU_OFFSET_NAME(fpcr),     lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,  fpu_fpcr   },      nullptr,        nullptr, nullptr, 0},
-
-{   "far",      nullptr,  8,  EXC_OFFSET_NAME(far),       lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    exc_far       },    nullptr,        nullptr, nullptr, 0},
-{   "esr",      nullptr,  4,  EXC_OFFSET_NAME(esr),       lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    exc_esr       },    nullptr,        nullptr, nullptr, 0},
-{   "exception",nullptr,  4,  EXC_OFFSET_NAME(exception), lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    exc_exception },    nullptr,        nullptr, nullptr, 0},
-
-{   DEFINE_DBG (bvr, 0) },
-{   DEFINE_DBG (bvr, 1) },
-{   DEFINE_DBG (bvr, 2) },
-{   DEFINE_DBG (bvr, 3) },
-{   DEFINE_DBG (bvr, 4) },
-{   DEFINE_DBG (bvr, 5) },
-{   DEFINE_DBG (bvr, 6) },
-{   DEFINE_DBG (bvr, 7) },
-{   DEFINE_DBG (bvr, 8) },
-{   DEFINE_DBG (bvr, 9) },
-{   DEFINE_DBG (bvr, 10) },
-{   DEFINE_DBG (bvr, 11) },
-{   DEFINE_DBG (bvr, 12) },
-{   DEFINE_DBG (bvr, 13) },
-{   DEFINE_DBG (bvr, 14) },
-{   DEFINE_DBG (bvr, 15) },
-
-{   DEFINE_DBG (bcr, 0) },
-{   DEFINE_DBG (bcr, 1) },
-{   DEFINE_DBG (bcr, 2) },
-{   DEFINE_DBG (bcr, 3) },
-{   DEFINE_DBG (bcr, 4) },
-{   DEFINE_DBG (bcr, 5) },
-{   DEFINE_DBG (bcr, 6) },
-{   DEFINE_DBG (bcr, 7) },
-{   DEFINE_DBG (bcr, 8) },
-{   DEFINE_DBG (bcr, 9) },
-{   DEFINE_DBG (bcr, 10) },
-{   DEFINE_DBG (bcr, 11) },
-{   DEFINE_DBG (bcr, 12) },
-{   DEFINE_DBG (bcr, 13) },
-{   DEFINE_DBG (bcr, 14) },
-{   DEFINE_DBG (bcr, 15) },
-
-{   DEFINE_DBG (wvr, 0) },
-{   DEFINE_DBG (wvr, 1) },
-{   DEFINE_DBG (wvr, 2) },
-{   DEFINE_DBG (wvr, 3) },
-{   DEFINE_DBG (wvr, 4) },
-{   DEFINE_DBG (wvr, 5) },
-{   DEFINE_DBG (wvr, 6) },
-{   DEFINE_DBG (wvr, 7) },
-{   DEFINE_DBG (wvr, 8) },
-{   DEFINE_DBG (wvr, 9) },
-{   DEFINE_DBG (wvr, 10) },
-{   DEFINE_DBG (wvr, 11) },
-{   DEFINE_DBG (wvr, 12) },
-{   DEFINE_DBG (wvr, 13) },
-{   DEFINE_DBG (wvr, 14) },
-{   DEFINE_DBG (wvr, 15) },
-
-{   DEFINE_DBG (wcr, 0) },
-{   DEFINE_DBG (wcr, 1) },
-{   DEFINE_DBG (wcr, 2) },
-{   DEFINE_DBG (wcr, 3) },
-{   DEFINE_DBG (wcr, 4) },
-{   DEFINE_DBG (wcr, 5) },
-{   DEFINE_DBG (wcr, 6) },
-{   DEFINE_DBG (wcr, 7) },
-{   DEFINE_DBG (wcr, 8) },
-{   DEFINE_DBG (wcr, 9) },
-{   DEFINE_DBG (wcr, 10) },
-{   DEFINE_DBG (wcr, 11) },
-{   DEFINE_DBG (wcr, 12) },
-{   DEFINE_DBG (wcr, 13) },
-{   DEFINE_DBG (wcr, 14) },
-{   DEFINE_DBG (wcr, 15) }
+static uint32_t g_contained_x0[] = {gpr_x0, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x1[] = {gpr_x1, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x2[] = {gpr_x2, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x3[] = {gpr_x3, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x4[] = {gpr_x4, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x5[] = {gpr_x5, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x6[] = {gpr_x6, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x7[] = {gpr_x7, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x8[] = {gpr_x8, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x9[] = {gpr_x9, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x10[] = {gpr_x10, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x11[] = {gpr_x11, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x12[] = {gpr_x12, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x13[] = {gpr_x13, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x14[] = {gpr_x14, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x15[] = {gpr_x15, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x16[] = {gpr_x16, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x17[] = {gpr_x17, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x18[] = {gpr_x18, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x19[] = {gpr_x19, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x20[] = {gpr_x20, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x21[] = {gpr_x21, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x22[] = {gpr_x22, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x23[] = {gpr_x23, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x24[] = {gpr_x24, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x25[] = {gpr_x25, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x26[] = {gpr_x26, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x27[] = {gpr_x27, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_x28[] = {gpr_x28, LLDB_INVALID_REGNUM};
+
+static uint32_t g_w0_invalidates[] = {gpr_x0, LLDB_INVALID_REGNUM};
+static uint32_t g_w1_invalidates[] = {gpr_x1, LLDB_INVALID_REGNUM};
+static uint32_t g_w2_invalidates[] = {gpr_x2, LLDB_INVALID_REGNUM};
+static uint32_t g_w3_invalidates[] = {gpr_x3, LLDB_INVALID_REGNUM};
+static uint32_t g_w4_invalidates[] = {gpr_x4, LLDB_INVALID_REGNUM};
+static uint32_t g_w5_invalidates[] = {gpr_x5, LLDB_INVALID_REGNUM};
+static uint32_t g_w6_invalidates[] = {gpr_x6, LLDB_INVALID_REGNUM};
+static uint32_t g_w7_invalidates[] = {gpr_x7, LLDB_INVALID_REGNUM};
+static uint32_t g_w8_invalidates[] = {gpr_x8, LLDB_INVALID_REGNUM};
+static uint32_t g_w9_invalidates[] = {gpr_x9, LLDB_INVALID_REGNUM};
+static uint32_t g_w10_invalidates[] = {gpr_x10, LLDB_INVALID_REGNUM};
+static uint32_t g_w11_invalidates[] = {gpr_x11, LLDB_INVALID_REGNUM};
+static uint32_t g_w12_invalidates[] = {gpr_x12, LLDB_INVALID_REGNUM};
+static uint32_t g_w13_invalidates[] = {gpr_x13, LLDB_INVALID_REGNUM};
+static uint32_t g_w14_invalidates[] = {gpr_x14, LLDB_INVALID_REGNUM};
+static uint32_t g_w15_invalidates[] = {gpr_x15, LLDB_INVALID_REGNUM};
+static uint32_t g_w16_invalidates[] = {gpr_x16, LLDB_INVALID_REGNUM};
+static uint32_t g_w17_invalidates[] = {gpr_x17, LLDB_INVALID_REGNUM};
+static uint32_t g_w18_invalidates[] = {gpr_x18, LLDB_INVALID_REGNUM};
+static uint32_t g_w19_invalidates[] = {gpr_x19, LLDB_INVALID_REGNUM};
+static uint32_t g_w20_invalidates[] = {gpr_x20, LLDB_INVALID_REGNUM};
+static uint32_t g_w21_invalidates[] = {gpr_x21, LLDB_INVALID_REGNUM};
+static uint32_t g_w22_invalidates[] = {gpr_x22, LLDB_INVALID_REGNUM};
+static uint32_t g_w23_invalidates[] = {gpr_x23, LLDB_INVALID_REGNUM};
+static uint32_t g_w24_invalidates[] = {gpr_x24, LLDB_INVALID_REGNUM};
+static uint32_t g_w25_invalidates[] = {gpr_x25, LLDB_INVALID_REGNUM};
+static uint32_t g_w26_invalidates[] = {gpr_x26, LLDB_INVALID_REGNUM};
+static uint32_t g_w27_invalidates[] = {gpr_x27, LLDB_INVALID_REGNUM};
+static uint32_t g_w28_invalidates[] = {gpr_x28, LLDB_INVALID_REGNUM};
+
+static uint32_t g_contained_v0[] = {fpu_v0, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v1[] = {fpu_v1, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v2[] = {fpu_v2, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v3[] = {fpu_v3, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v4[] = {fpu_v4, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v5[] = {fpu_v5, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v6[] = {fpu_v6, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v7[] = {fpu_v7, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v8[] = {fpu_v8, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v9[] = {fpu_v9, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v10[] = {fpu_v10, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v11[] = {fpu_v11, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v12[] = {fpu_v12, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v13[] = {fpu_v13, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v14[] = {fpu_v14, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v15[] = {fpu_v15, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v16[] = {fpu_v16, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v17[] = {fpu_v17, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v18[] = {fpu_v18, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v19[] = {fpu_v19, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v20[] = {fpu_v20, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v21[] = {fpu_v21, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v22[] = {fpu_v22, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v23[] = {fpu_v23, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v24[] = {fpu_v24, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v25[] = {fpu_v25, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v26[] = {fpu_v26, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v27[] = {fpu_v27, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v28[] = {fpu_v28, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v29[] = {fpu_v29, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v30[] = {fpu_v30, LLDB_INVALID_REGNUM};
+static uint32_t g_contained_v31[] = {fpu_v31, LLDB_INVALID_REGNUM};
+
+static uint32_t g_s0_invalidates[] = {fpu_v0, fpu_d0, LLDB_INVALID_REGNUM};
+static uint32_t g_s1_invalidates[] = {fpu_v1, fpu_d1, LLDB_INVALID_REGNUM};
+static uint32_t g_s2_invalidates[] = {fpu_v2, fpu_d2, LLDB_INVALID_REGNUM};
+static uint32_t g_s3_invalidates[] = {fpu_v3, fpu_d3, LLDB_INVALID_REGNUM};
+static uint32_t g_s4_invalidates[] = {fpu_v4, fpu_d4, LLDB_INVALID_REGNUM};
+static uint32_t g_s5_invalidates[] = {fpu_v5, fpu_d5, LLDB_INVALID_REGNUM};
+static uint32_t g_s6_invalidates[] = {fpu_v6, fpu_d6, LLDB_INVALID_REGNUM};
+static uint32_t g_s7_invalidates[] = {fpu_v7, fpu_d7, LLDB_INVALID_REGNUM};
+static uint32_t g_s8_invalidates[] = {fpu_v8, fpu_d8, LLDB_INVALID_REGNUM};
+static uint32_t g_s9_invalidates[] = {fpu_v9, fpu_d9, LLDB_INVALID_REGNUM};
+static uint32_t g_s10_invalidates[] = {fpu_v10, fpu_d10, LLDB_INVALID_REGNUM};
+static uint32_t g_s11_invalidates[] = {fpu_v11, fpu_d11, LLDB_INVALID_REGNUM};
+static uint32_t g_s12_invalidates[] = {fpu_v12, fpu_d12, LLDB_INVALID_REGNUM};
+static uint32_t g_s13_invalidates[] = {fpu_v13, fpu_d13, LLDB_INVALID_REGNUM};
+static uint32_t g_s14_invalidates[] = {fpu_v14, fpu_d14, LLDB_INVALID_REGNUM};
+static uint32_t g_s15_invalidates[] = {fpu_v15, fpu_d15, LLDB_INVALID_REGNUM};
+static uint32_t g_s16_invalidates[] = {fpu_v16, fpu_d16, LLDB_INVALID_REGNUM};
+static uint32_t g_s17_invalidates[] = {fpu_v17, fpu_d17, LLDB_INVALID_REGNUM};
+static uint32_t g_s18_invalidates[] = {fpu_v18, fpu_d18, LLDB_INVALID_REGNUM};
+static uint32_t g_s19_invalidates[] = {fpu_v19, fpu_d19, LLDB_INVALID_REGNUM};
+static uint32_t g_s20_invalidates[] = {fpu_v20, fpu_d20, LLDB_INVALID_REGNUM};
+static uint32_t g_s21_invalidates[] = {fpu_v21, fpu_d21, LLDB_INVALID_REGNUM};
+static uint32_t g_s22_invalidates[] = {fpu_v22, fpu_d22, LLDB_INVALID_REGNUM};
+static uint32_t g_s23_invalidates[] = {fpu_v23, fpu_d23, LLDB_INVALID_REGNUM};
+static uint32_t g_s24_invalidates[] = {fpu_v24, fpu_d24, LLDB_INVALID_REGNUM};
+static uint32_t g_s25_invalidates[] = {fpu_v25, fpu_d25, LLDB_INVALID_REGNUM};
+static uint32_t g_s26_invalidates[] = {fpu_v26, fpu_d26, LLDB_INVALID_REGNUM};
+static uint32_t g_s27_invalidates[] = {fpu_v27, fpu_d27, LLDB_INVALID_REGNUM};
+static uint32_t g_s28_invalidates[] = {fpu_v28, fpu_d28, LLDB_INVALID_REGNUM};
+static uint32_t g_s29_invalidates[] = {fpu_v29, fpu_d29, LLDB_INVALID_REGNUM};
+static uint32_t g_s30_invalidates[] = {fpu_v30, fpu_d30, LLDB_INVALID_REGNUM};
+static uint32_t g_s31_invalidates[] = {fpu_v31, fpu_d31, LLDB_INVALID_REGNUM};
+
+static uint32_t g_d0_invalidates[] = {fpu_v0, fpu_s0, LLDB_INVALID_REGNUM};
+static uint32_t g_d1_invalidates[] = {fpu_v1, fpu_s1, LLDB_INVALID_REGNUM};
+static uint32_t g_d2_invalidates[] = {fpu_v2, fpu_s2, LLDB_INVALID_REGNUM};
+static uint32_t g_d3_invalidates[] = {fpu_v3, fpu_s3, LLDB_INVALID_REGNUM};
+static uint32_t g_d4_invalidates[] = {fpu_v4, fpu_s4, LLDB_INVALID_REGNUM};
+static uint32_t g_d5_invalidates[] = {fpu_v5, fpu_s5, LLDB_INVALID_REGNUM};
+static uint32_t g_d6_invalidates[] = {fpu_v6, fpu_s6, LLDB_INVALID_REGNUM};
+static uint32_t g_d7_invalidates[] = {fpu_v7, fpu_s7, LLDB_INVALID_REGNUM};
+static uint32_t g_d8_invalidates[] = {fpu_v8, fpu_s8, LLDB_INVALID_REGNUM};
+static uint32_t g_d9_invalidates[] = {fpu_v9, fpu_s9, LLDB_INVALID_REGNUM};
+static uint32_t g_d10_invalidates[] = {fpu_v10, fpu_s10, LLDB_INVALID_REGNUM};
+static uint32_t g_d11_invalidates[] = {fpu_v11, fpu_s11, LLDB_INVALID_REGNUM};
+static uint32_t g_d12_invalidates[] = {fpu_v12, fpu_s12, LLDB_INVALID_REGNUM};
+static uint32_t g_d13_invalidates[] = {fpu_v13, fpu_s13, LLDB_INVALID_REGNUM};
+static uint32_t g_d14_invalidates[] = {fpu_v14, fpu_s14, LLDB_INVALID_REGNUM};
+static uint32_t g_d15_invalidates[] = {fpu_v15, fpu_s15, LLDB_INVALID_REGNUM};
+static uint32_t g_d16_invalidates[] = {fpu_v16, fpu_s16, LLDB_INVALID_REGNUM};
+static uint32_t g_d17_invalidates[] = {fpu_v17, fpu_s17, LLDB_INVALID_REGNUM};
+static uint32_t g_d18_invalidates[] = {fpu_v18, fpu_s18, LLDB_INVALID_REGNUM};
+static uint32_t g_d19_invalidates[] = {fpu_v19, fpu_s19, LLDB_INVALID_REGNUM};
+static uint32_t g_d20_invalidates[] = {fpu_v20, fpu_s20, LLDB_INVALID_REGNUM};
+static uint32_t g_d21_invalidates[] = {fpu_v21, fpu_s21, LLDB_INVALID_REGNUM};
+static uint32_t g_d22_invalidates[] = {fpu_v22, fpu_s22, LLDB_INVALID_REGNUM};
+static uint32_t g_d23_invalidates[] = {fpu_v23, fpu_s23, LLDB_INVALID_REGNUM};
+static uint32_t g_d24_invalidates[] = {fpu_v24, fpu_s24, LLDB_INVALID_REGNUM};
+static uint32_t g_d25_invalidates[] = {fpu_v25, fpu_s25, LLDB_INVALID_REGNUM};
+static uint32_t g_d26_invalidates[] = {fpu_v26, fpu_s26, LLDB_INVALID_REGNUM};
+static uint32_t g_d27_invalidates[] = {fpu_v27, fpu_s27, LLDB_INVALID_REGNUM};
+static uint32_t g_d28_invalidates[] = {fpu_v28, fpu_s28, LLDB_INVALID_REGNUM};
+static uint32_t g_d29_invalidates[] = {fpu_v29, fpu_s29, LLDB_INVALID_REGNUM};
+static uint32_t g_d30_invalidates[] = {fpu_v30, fpu_s30, LLDB_INVALID_REGNUM};
+static uint32_t g_d31_invalidates[] = {fpu_v31, fpu_s31, LLDB_INVALID_REGNUM};
+
+static lldb_private::RegisterInfo g_register_infos_arm64_le[] = {
+    // clang-format off
+  // General purpose registers
+  // NAME   ALT     SZ  OFFSET          ENCODING             FORMAT             EH_FRAME            DWARF             GENERIC                   PROCESS PLUGIN       LLDB      VALUE REGS      INVAL    DYNEXPR  SZ
+  // =====  ======= ==  =============   ===================  ================   =================   ===============   ========================  ===================  ======    ==============  =======  =======  ==
+    {"x0",  nullptr, 8, GPR_OFFSET(0),  lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x0,  arm64_dwarf::x0,  LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM, gpr_x0},  nullptr,        nullptr, nullptr, 0},
+    {"x1",  nullptr, 8, GPR_OFFSET(1),  lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x1,  arm64_dwarf::x1,  LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM, gpr_x1},  nullptr,        nullptr, nullptr, 0},
+    {"x2",  nullptr, 8, GPR_OFFSET(2),  lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x2,  arm64_dwarf::x2,  LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM, gpr_x2},  nullptr,        nullptr, nullptr, 0},
+    {"x3",  nullptr, 8, GPR_OFFSET(3),  lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x3,  arm64_dwarf::x3,  LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM, gpr_x3},  nullptr,        nullptr, nullptr, 0},
+    {"x4",  nullptr, 8, GPR_OFFSET(4),  lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x4,  arm64_dwarf::x4,  LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM, gpr_x4},  nullptr,        nullptr, nullptr, 0},
+    {"x5",  nullptr, 8, GPR_OFFSET(5),  lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x5,  arm64_dwarf::x5,  LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM, gpr_x5},  nullptr,        nullptr, nullptr, 0},
+    {"x6",  nullptr, 8, GPR_OFFSET(6),  lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x6,  arm64_dwarf::x6,  LLDB_REGNUM_GENERIC_ARG7, LLDB_INVALID_REGNUM, gpr_x6},  nullptr,        nullptr, nullptr, 0},
+    {"x7",  nullptr, 8, GPR_OFFSET(7),  lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x7,  arm64_dwarf::x7,  LLDB_REGNUM_GENERIC_ARG8, LLDB_INVALID_REGNUM, gpr_x7},  nullptr,        nullptr, nullptr, 0},
+    {"x8",  nullptr, 8, GPR_OFFSET(8),  lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x8,  arm64_dwarf::x8,  LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x8},  nullptr,        nullptr, nullptr, 0},
+    {"x9",  nullptr, 8, GPR_OFFSET(9),  lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x9,  arm64_dwarf::x9,  LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x9},  nullptr,        nullptr, nullptr, 0},
+    {"x10", nullptr, 8, GPR_OFFSET(10), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x10, arm64_dwarf::x10, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x10}, nullptr,        nullptr, nullptr, 0},
+    {"x11", nullptr, 8, GPR_OFFSET(11), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x11, arm64_dwarf::x11, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x11}, nullptr,        nullptr, nullptr, 0},
+    {"x12", nullptr, 8, GPR_OFFSET(12), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x12, arm64_dwarf::x12, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x12}, nullptr,        nullptr, nullptr, 0},
+    {"x13", nullptr, 8, GPR_OFFSET(13), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x13, arm64_dwarf::x13, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x13}, nullptr,        nullptr, nullptr, 0},
+    {"x14", nullptr, 8, GPR_OFFSET(14), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x14, arm64_dwarf::x14, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x14}, nullptr,        nullptr, nullptr, 0},
+    {"x15", nullptr, 8, GPR_OFFSET(15), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x15, arm64_dwarf::x15, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x15}, nullptr,        nullptr, nullptr, 0},
+    {"x16", nullptr, 8, GPR_OFFSET(16), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x16, arm64_dwarf::x16, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x16}, nullptr,        nullptr, nullptr, 0},
+    {"x17", nullptr, 8, GPR_OFFSET(17), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x17, arm64_dwarf::x17, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x17}, nullptr,        nullptr, nullptr, 0},
+    {"x18", nullptr, 8, GPR_OFFSET(18), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x18, arm64_dwarf::x18, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x18}, nullptr,        nullptr, nullptr, 0},
+    {"x19", nullptr, 8, GPR_OFFSET(19), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x19, arm64_dwarf::x19, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x19}, nullptr,        nullptr, nullptr, 0},
+    {"x20", nullptr, 8, GPR_OFFSET(20), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x20, arm64_dwarf::x20, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x20}, nullptr,        nullptr, nullptr, 0},
+    {"x21", nullptr, 8, GPR_OFFSET(21), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x21, arm64_dwarf::x21, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x21}, nullptr,        nullptr, nullptr, 0},
+    {"x22", nullptr, 8, GPR_OFFSET(22), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x22, arm64_dwarf::x22, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x22}, nullptr,        nullptr, nullptr, 0},
+    {"x23", nullptr, 8, GPR_OFFSET(23), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x23, arm64_dwarf::x23, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x23}, nullptr,        nullptr, nullptr, 0},
+    {"x24", nullptr, 8, GPR_OFFSET(24), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x24, arm64_dwarf::x24, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x24}, nullptr,        nullptr, nullptr, 0},
+    {"x25", nullptr, 8, GPR_OFFSET(25), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x25, arm64_dwarf::x25, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x25}, nullptr,        nullptr, nullptr, 0},
+    {"x26", nullptr, 8, GPR_OFFSET(26), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x26, arm64_dwarf::x26, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x26}, nullptr,        nullptr, nullptr, 0},
+    {"x27", nullptr, 8, GPR_OFFSET(27), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x27, arm64_dwarf::x27, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x27}, nullptr,        nullptr, nullptr, 0},
+    {"x28", nullptr, 8, GPR_OFFSET(28), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::x28, arm64_dwarf::x28, LLDB_INVALID_REGNUM,      LLDB_INVALID_REGNUM, gpr_x28}, nullptr,        nullptr, nullptr, 0},
+    {"fp",  "x29",   8, GPR_OFFSET(29), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::fp, arm64_dwarf::fp,   LLDB_REGNUM_GENERIC_FP,   LLDB_INVALID_REGNUM, gpr_fp},  nullptr,        nullptr, nullptr, 0},
+    {"lr",  "x30",   8, GPR_OFFSET(30), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::lr, arm64_dwarf::lr,   LLDB_REGNUM_GENERIC_RA,   LLDB_INVALID_REGNUM, gpr_lr},  nullptr,        nullptr, nullptr, 0},
+    {"sp",  "x31",   8, GPR_OFFSET(31), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::sp, arm64_dwarf::sp,   LLDB_REGNUM_GENERIC_SP,   LLDB_INVALID_REGNUM, gpr_sp},  nullptr,        nullptr, nullptr, 0},
+    {"pc",  nullptr, 8, GPR_OFFSET(32), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::pc, arm64_dwarf::pc,   LLDB_REGNUM_GENERIC_PC,   LLDB_INVALID_REGNUM, gpr_pc},  nullptr,        nullptr, nullptr, 0},
+
+    {"cpsr",nullptr, 4, GPR_OFFSET_NAME(cpsr), lldb::eEncodingUint, lldb::eFormatHex, {arm64_ehframe::cpsr, arm64_dwarf::cpsr, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM, gpr_cpsr}, nullptr, nullptr, nullptr, 0},
+
+  // NAME   ALT     SZ  OFFSET                                           ENCODING             FORMAT             EH_FRAME             DWARF                GENERIC              PROCESS PLUGIN       LLDB      VALUE            INVALIDATES        DYNEXPR  SZ
+  // =====  ======= ==  ==============================================   ===================  ================   =================    ===============      ===================  ===================  ======    ===============  =================  =======  ==
+    {"w0",  nullptr, 4, GPR_OFFSET(0) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET,  lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w0},  g_contained_x0,  g_w0_invalidates,  nullptr, 0},
+    {"w1",  nullptr, 4, GPR_OFFSET(1) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET,  lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w1},  g_contained_x1,  g_w1_invalidates,  nullptr, 0},
+    {"w2",  nullptr, 4, GPR_OFFSET(2) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET,  lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w2},  g_contained_x2,  g_w2_invalidates,  nullptr, 0},
+    {"w3",  nullptr, 4, GPR_OFFSET(3) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET,  lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w3},  g_contained_x3,  g_w3_invalidates,  nullptr, 0},
+    {"w4",  nullptr, 4, GPR_OFFSET(4) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET,  lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w4},  g_contained_x4,  g_w4_invalidates,  nullptr, 0},
+    {"w5",  nullptr, 4, GPR_OFFSET(5) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET,  lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w5},  g_contained_x5,  g_w5_invalidates,  nullptr, 0},
+    {"w6",  nullptr, 4, GPR_OFFSET(6) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET,  lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w6},  g_contained_x6,  g_w6_invalidates,  nullptr, 0},
+    {"w7",  nullptr, 4, GPR_OFFSET(7) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET,  lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w7},  g_contained_x7,  g_w7_invalidates,  nullptr, 0},
+    {"w8",  nullptr, 4, GPR_OFFSET(8) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET,  lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w8},  g_contained_x8,  g_w8_invalidates,  nullptr, 0},
+    {"w9",  nullptr, 4, GPR_OFFSET(9) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET,  lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w9},  g_contained_x9,  g_w9_invalidates,  nullptr, 0},
+    {"w10", nullptr, 4, GPR_OFFSET(10) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w10}, g_contained_x10, g_w10_invalidates, nullptr, 0},
+    {"w11", nullptr, 4, GPR_OFFSET(11) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w11}, g_contained_x11, g_w11_invalidates, nullptr, 0},
+    {"w12", nullptr, 4, GPR_OFFSET(12) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w12}, g_contained_x12, g_w12_invalidates, nullptr, 0},
+    {"w13", nullptr, 4, GPR_OFFSET(13) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w13}, g_contained_x13, g_w13_invalidates, nullptr, 0},
+    {"w14", nullptr, 4, GPR_OFFSET(14) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w14}, g_contained_x14, g_w14_invalidates, nullptr, 0},
+    {"w15", nullptr, 4, GPR_OFFSET(15) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w15}, g_contained_x15, g_w15_invalidates, nullptr, 0},
+    {"w16", nullptr, 4, GPR_OFFSET(16) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w16}, g_contained_x16, g_w16_invalidates, nullptr, 0},
+    {"w17", nullptr, 4, GPR_OFFSET(17) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w17}, g_contained_x17, g_w17_invalidates, nullptr, 0},
+    {"w18", nullptr, 4, GPR_OFFSET(18) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w18}, g_contained_x18, g_w18_invalidates, nullptr, 0},
+    {"w19", nullptr, 4, GPR_OFFSET(19) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w19}, g_contained_x19, g_w19_invalidates, nullptr, 0},
+    {"w20", nullptr, 4, GPR_OFFSET(20) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w20}, g_contained_x20, g_w20_invalidates, nullptr, 0},
+    {"w21", nullptr, 4, GPR_OFFSET(21) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w21}, g_contained_x21, g_w21_invalidates, nullptr, 0},
+    {"w22", nullptr, 4, GPR_OFFSET(22) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w22}, g_contained_x22, g_w22_invalidates, nullptr, 0},
+    {"w23", nullptr, 4, GPR_OFFSET(23) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w23}, g_contained_x23, g_w23_invalidates, nullptr, 0},
+    {"w24", nullptr, 4, GPR_OFFSET(24) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w24}, g_contained_x24, g_w24_invalidates, nullptr, 0},
+    {"w25", nullptr, 4, GPR_OFFSET(25) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w25}, g_contained_x25, g_w25_invalidates, nullptr, 0},
+    {"w26", nullptr, 4, GPR_OFFSET(26) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w26}, g_contained_x26, g_w26_invalidates, nullptr, 0},
+    {"w27", nullptr, 4, GPR_OFFSET(27) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w27}, g_contained_x27, g_w27_invalidates, nullptr, 0},
+    {"w28", nullptr, 4, GPR_OFFSET(28) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_w28}, g_contained_x28, g_w28_invalidates, nullptr, 0},
+
+  // NAME   ALT      SZ  OFFSET         ENCODING                FORMAT                       EH_FRAME             DWARF             GENERIC              PROCESS PLUGIN       LLDB      VALUE REGS      INVAL    DYNEXPR  SZ
+  // =====  =======  ==  =============  ===================     ================             =================    ===============   ===================  ===================  ======    ==============  =======  =======  ==
+    {"v0",  nullptr, 16, FPU_OFFSET(0), lldb::eEncodingVector,  lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v0,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v0},  nullptr,        nullptr, nullptr, 0},
+    {"v1",  nullptr, 16, FPU_OFFSET(1), lldb::eEncodingVector,  lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v1,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v1},  nullptr,        nullptr, nullptr, 0},
+    {"v2",  nullptr, 16, FPU_OFFSET(2), lldb::eEncodingVector,  lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v2,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v2},  nullptr,        nullptr, nullptr, 0},
+    {"v3",  nullptr, 16, FPU_OFFSET(3), lldb::eEncodingVector,  lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v3,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v3},  nullptr,        nullptr, nullptr, 0},
+    {"v4",  nullptr, 16, FPU_OFFSET(4), lldb::eEncodingVector,  lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v4,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v4},  nullptr,        nullptr, nullptr, 0},
+    {"v5",  nullptr, 16, FPU_OFFSET(5), lldb::eEncodingVector,  lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v5,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v5},  nullptr,        nullptr, nullptr, 0},
+    {"v6",  nullptr, 16, FPU_OFFSET(6), lldb::eEncodingVector,  lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v6,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v6},  nullptr,        nullptr, nullptr, 0},
+    {"v7",  nullptr, 16, FPU_OFFSET(7), lldb::eEncodingVector,  lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v7,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v7},  nullptr,        nullptr, nullptr, 0},
+    {"v8",  nullptr, 16, FPU_OFFSET(8), lldb::eEncodingVector,  lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v8,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v8},  nullptr,        nullptr, nullptr, 0},
+    {"v9",  nullptr, 16, FPU_OFFSET(9), lldb::eEncodingVector,  lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v9,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v9},  nullptr,        nullptr, nullptr, 0},
+    {"v10", nullptr, 16, FPU_OFFSET(10), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v10}, nullptr,        nullptr, nullptr, 0},
+    {"v11", nullptr, 16, FPU_OFFSET(11), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v11}, nullptr,        nullptr, nullptr, 0},
+    {"v12", nullptr, 16, FPU_OFFSET(12), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v12}, nullptr,        nullptr, nullptr, 0},
+    {"v13", nullptr, 16, FPU_OFFSET(13), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v13}, nullptr,        nullptr, nullptr, 0},
+    {"v14", nullptr, 16, FPU_OFFSET(14), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v14}, nullptr,        nullptr, nullptr, 0},
+    {"v15", nullptr, 16, FPU_OFFSET(15), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v15}, nullptr,        nullptr, nullptr, 0},
+    {"v16", nullptr, 16, FPU_OFFSET(16), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v16}, nullptr,        nullptr, nullptr, 0},
+    {"v17", nullptr, 16, FPU_OFFSET(17), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v17}, nullptr,        nullptr, nullptr, 0},
+    {"v18", nullptr, 16, FPU_OFFSET(18), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v18}, nullptr,        nullptr, nullptr, 0},
+    {"v19", nullptr, 16, FPU_OFFSET(19), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v19}, nullptr,        nullptr, nullptr, 0},
+    {"v20", nullptr, 16, FPU_OFFSET(20), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v20}, nullptr,        nullptr, nullptr, 0},
+    {"v21", nullptr, 16, FPU_OFFSET(21), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v21}, nullptr,        nullptr, nullptr, 0},
+    {"v22", nullptr, 16, FPU_OFFSET(22), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v22}, nullptr,        nullptr, nullptr, 0},
+    {"v23", nullptr, 16, FPU_OFFSET(23), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v23}, nullptr,        nullptr, nullptr, 0},
+    {"v24", nullptr, 16, FPU_OFFSET(24), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v24}, nullptr,        nullptr, nullptr, 0},
+    {"v25", nullptr, 16, FPU_OFFSET(25), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v25}, nullptr,        nullptr, nullptr, 0},
+    {"v26", nullptr, 16, FPU_OFFSET(26), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v26}, nullptr,        nullptr, nullptr, 0},
+    {"v27", nullptr, 16, FPU_OFFSET(27), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v27}, nullptr,        nullptr, nullptr, 0},
+    {"v28", nullptr, 16, FPU_OFFSET(28), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v28}, nullptr,        nullptr, nullptr, 0},
+    {"v29", nullptr, 16, FPU_OFFSET(29), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v29}, nullptr,        nullptr, nullptr, 0},
+    {"v30", nullptr, 16, FPU_OFFSET(30), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v30}, nullptr,        nullptr, nullptr, 0},
+    {"v31", nullptr, 16, FPU_OFFSET(31), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, {LLDB_INVALID_REGNUM, arm64_dwarf::v31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v31}, nullptr,        nullptr, nullptr, 0},
+
+  // NAME   ALT     SZ  OFFSET                                           ENCODING                FORMAT               EH_FRAME             DWARF                GENERIC              PROCESS PLUGIN       LLDB      VALUE REGS       INVALIDATES        DYNEXPR  SZ
+  // =====  ======= ==  ==============================================   ===================     ================     =================    ===============      ===================  ===================  ======    ===============  =================  =======  ==
+    {"s0",  nullptr, 4, FPU_OFFSET(0)  + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s0},  g_contained_v0,  g_s0_invalidates,  nullptr, 0},
+    {"s1",  nullptr, 4, FPU_OFFSET(1)  + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s1},  g_contained_v1,  g_s1_invalidates,  nullptr, 0},
+    {"s2",  nullptr, 4, FPU_OFFSET(2)  + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s2},  g_contained_v2,  g_s2_invalidates,  nullptr, 0},
+    {"s3",  nullptr, 4, FPU_OFFSET(3)  + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s3},  g_contained_v3,  g_s3_invalidates,  nullptr, 0},
+    {"s4",  nullptr, 4, FPU_OFFSET(4)  + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s4},  g_contained_v4,  g_s4_invalidates,  nullptr, 0},
+    {"s5",  nullptr, 4, FPU_OFFSET(5)  + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s5},  g_contained_v5,  g_s5_invalidates,  nullptr, 0},
+    {"s6",  nullptr, 4, FPU_OFFSET(6)  + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s6},  g_contained_v6,  g_s6_invalidates,  nullptr, 0},
+    {"s7",  nullptr, 4, FPU_OFFSET(7)  + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s7},  g_contained_v7,  g_s7_invalidates,  nullptr, 0},
+    {"s8",  nullptr, 4, FPU_OFFSET(8)  + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s8},  g_contained_v8,  g_s8_invalidates,  nullptr, 0},
+    {"s9",  nullptr, 4, FPU_OFFSET(9)  + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s9},  g_contained_v9,  g_s9_invalidates,  nullptr, 0},
+    {"s10", nullptr, 4, FPU_OFFSET(10) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s10}, g_contained_v10, g_s10_invalidates, nullptr, 0},
+    {"s11", nullptr, 4, FPU_OFFSET(11) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s11}, g_contained_v11, g_s11_invalidates, nullptr, 0},
+    {"s12", nullptr, 4, FPU_OFFSET(12) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s12}, g_contained_v12, g_s12_invalidates, nullptr, 0},
+    {"s13", nullptr, 4, FPU_OFFSET(13) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s13}, g_contained_v13, g_s13_invalidates, nullptr, 0},
+    {"s14", nullptr, 4, FPU_OFFSET(14) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s14}, g_contained_v14, g_s14_invalidates, nullptr, 0},
+    {"s15", nullptr, 4, FPU_OFFSET(15) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s15}, g_contained_v15, g_s15_invalidates, nullptr, 0},
+    {"s16", nullptr, 4, FPU_OFFSET(16) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s16}, g_contained_v16, g_s16_invalidates, nullptr, 0},
+    {"s17", nullptr, 4, FPU_OFFSET(17) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s17}, g_contained_v17, g_s17_invalidates, nullptr, 0},
+    {"s18", nullptr, 4, FPU_OFFSET(18) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s18}, g_contained_v18, g_s18_invalidates, nullptr, 0},
+    {"s19", nullptr, 4, FPU_OFFSET(19) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s19}, g_contained_v19, g_s19_invalidates, nullptr, 0},
+    {"s20", nullptr, 4, FPU_OFFSET(20) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s20}, g_contained_v20, g_s20_invalidates, nullptr, 0},
+    {"s21", nullptr, 4, FPU_OFFSET(21) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s21}, g_contained_v21, g_s21_invalidates, nullptr, 0},
+    {"s22", nullptr, 4, FPU_OFFSET(22) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s22}, g_contained_v22, g_s22_invalidates, nullptr, 0},
+    {"s23", nullptr, 4, FPU_OFFSET(23) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s23}, g_contained_v23, g_s23_invalidates, nullptr, 0},
+    {"s24", nullptr, 4, FPU_OFFSET(24) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s24}, g_contained_v24, g_s24_invalidates, nullptr, 0},
+    {"s25", nullptr, 4, FPU_OFFSET(25) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s25}, g_contained_v25, g_s25_invalidates, nullptr, 0},
+    {"s26", nullptr, 4, FPU_OFFSET(26) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s26}, g_contained_v26, g_s26_invalidates, nullptr, 0},
+    {"s27", nullptr, 4, FPU_OFFSET(27) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s27}, g_contained_v27, g_s27_invalidates, nullptr, 0},
+    {"s28", nullptr, 4, FPU_OFFSET(28) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s28}, g_contained_v28, g_s28_invalidates, nullptr, 0},
+    {"s29", nullptr, 4, FPU_OFFSET(29) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s29}, g_contained_v29, g_s29_invalidates, nullptr, 0},
+    {"s30", nullptr, 4, FPU_OFFSET(30) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s30}, g_contained_v30, g_s30_invalidates, nullptr, 0},
+    {"s31", nullptr, 4, FPU_OFFSET(31) + FPU_S_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s31}, g_contained_v31, g_s31_invalidates, nullptr, 0},
+
+    {"d0",  nullptr, 8, FPU_OFFSET(0)  + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d0},  g_contained_v0,  g_d0_invalidates,  nullptr, 0},
+    {"d1",  nullptr, 8, FPU_OFFSET(1)  + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d1},  g_contained_v1,  g_d1_invalidates,  nullptr, 0},
+    {"d2",  nullptr, 8, FPU_OFFSET(2)  + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d2},  g_contained_v2,  g_d2_invalidates,  nullptr, 0},
+    {"d3",  nullptr, 8, FPU_OFFSET(3)  + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d3},  g_contained_v3,  g_d3_invalidates,  nullptr, 0},
+    {"d4",  nullptr, 8, FPU_OFFSET(4)  + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d4},  g_contained_v4,  g_d4_invalidates,  nullptr, 0},
+    {"d5",  nullptr, 8, FPU_OFFSET(5)  + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d5},  g_contained_v5,  g_d5_invalidates,  nullptr, 0},
+    {"d6",  nullptr, 8, FPU_OFFSET(6)  + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d6},  g_contained_v6,  g_d6_invalidates,  nullptr, 0},
+    {"d7",  nullptr, 8, FPU_OFFSET(7)  + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d7},  g_contained_v7,  g_d7_invalidates,  nullptr, 0},
+    {"d8",  nullptr, 8, FPU_OFFSET(8)  + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d8},  g_contained_v8,  g_d8_invalidates,  nullptr, 0},
+    {"d9",  nullptr, 8, FPU_OFFSET(9)  + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d9},  g_contained_v9,  g_d9_invalidates,  nullptr, 0},
+    {"d10", nullptr, 8, FPU_OFFSET(10) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d10}, g_contained_v10, g_d10_invalidates, nullptr, 0},
+    {"d11", nullptr, 8, FPU_OFFSET(11) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d11}, g_contained_v11, g_d11_invalidates, nullptr, 0},
+    {"d12", nullptr, 8, FPU_OFFSET(12) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d12}, g_contained_v12, g_d12_invalidates, nullptr, 0},
+    {"d13", nullptr, 8, FPU_OFFSET(13) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d13}, g_contained_v13, g_d13_invalidates, nullptr, 0},
+    {"d14", nullptr, 8, FPU_OFFSET(14) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d14}, g_contained_v14, g_d14_invalidates, nullptr, 0},
+    {"d15", nullptr, 8, FPU_OFFSET(15) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d15}, g_contained_v15, g_d15_invalidates, nullptr, 0},
+    {"d16", nullptr, 8, FPU_OFFSET(16) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d16}, g_contained_v16, g_d16_invalidates, nullptr, 0},
+    {"d17", nullptr, 8, FPU_OFFSET(17) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d17}, g_contained_v17, g_d17_invalidates, nullptr, 0},
+    {"d18", nullptr, 8, FPU_OFFSET(18) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d18}, g_contained_v18, g_d18_invalidates, nullptr, 0},
+    {"d19", nullptr, 8, FPU_OFFSET(19) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d19}, g_contained_v19, g_d19_invalidates, nullptr, 0},
+    {"d20", nullptr, 8, FPU_OFFSET(20) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d20}, g_contained_v20, g_d20_invalidates, nullptr, 0},
+    {"d21", nullptr, 8, FPU_OFFSET(21) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d21}, g_contained_v21, g_d21_invalidates, nullptr, 0},
+    {"d22", nullptr, 8, FPU_OFFSET(22) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d22}, g_contained_v22, g_d22_invalidates, nullptr, 0},
+    {"d23", nullptr, 8, FPU_OFFSET(23) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d23}, g_contained_v23, g_d23_invalidates, nullptr, 0},
+    {"d24", nullptr, 8, FPU_OFFSET(24) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d24}, g_contained_v24, g_d24_invalidates, nullptr, 0},
+    {"d25", nullptr, 8, FPU_OFFSET(25) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d25}, g_contained_v25, g_d25_invalidates, nullptr, 0},
+    {"d26", nullptr, 8, FPU_OFFSET(26) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d26}, g_contained_v26, g_d26_invalidates, nullptr, 0},
+    {"d27", nullptr, 8, FPU_OFFSET(27) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d27}, g_contained_v27, g_d27_invalidates, nullptr, 0},
+    {"d28", nullptr, 8, FPU_OFFSET(28) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d28}, g_contained_v28, g_d28_invalidates, nullptr, 0},
+    {"d29", nullptr, 8, FPU_OFFSET(29) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d29}, g_contained_v29, g_d29_invalidates, nullptr, 0},
+    {"d30", nullptr, 8, FPU_OFFSET(30) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d30}, g_contained_v30, g_d30_invalidates, nullptr, 0},
+    {"d31", nullptr, 8, FPU_OFFSET(31) + FPU_D_PSEUDO_REG_ENDIAN_OFFSET, lldb::eEncodingIEEE754, lldb::eFormatFloat, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d31}, g_contained_v31, g_d31_invalidates, nullptr, 0},
+
+    {"fpsr", nullptr, 4, FPU_OFFSET_NAME(fpsr), lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_fpsr}, nullptr, nullptr, nullptr, 0},
+    {"fpcr", nullptr, 4, FPU_OFFSET_NAME(fpcr), lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_fpcr}, nullptr, nullptr, nullptr, 0},
+
+    {"far", nullptr, 8, EXC_OFFSET_NAME(far), lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_far}, nullptr, nullptr, nullptr, 0},
+    {"esr", nullptr, 4, EXC_OFFSET_NAME(esr), lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_esr}, nullptr, nullptr, nullptr, 0},
+    {"exception", nullptr, 4, EXC_OFFSET_NAME(exception), lldb::eEncodingUint, lldb::eFormatHex, {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_exception}, nullptr, nullptr, nullptr, 0},
+
+    {DEFINE_DBG(bvr, 0)},
+    {DEFINE_DBG(bvr, 1)},
+    {DEFINE_DBG(bvr, 2)},
+    {DEFINE_DBG(bvr, 3)},
+    {DEFINE_DBG(bvr, 4)},
+    {DEFINE_DBG(bvr, 5)},
+    {DEFINE_DBG(bvr, 6)},
+    {DEFINE_DBG(bvr, 7)},
+    {DEFINE_DBG(bvr, 8)},
+    {DEFINE_DBG(bvr, 9)},
+    {DEFINE_DBG(bvr, 10)},
+    {DEFINE_DBG(bvr, 11)},
+    {DEFINE_DBG(bvr, 12)},
+    {DEFINE_DBG(bvr, 13)},
+    {DEFINE_DBG(bvr, 14)},
+    {DEFINE_DBG(bvr, 15)},
+
+    {DEFINE_DBG(bcr, 0)},
+    {DEFINE_DBG(bcr, 1)},
+    {DEFINE_DBG(bcr, 2)},
+    {DEFINE_DBG(bcr, 3)},
+    {DEFINE_DBG(bcr, 4)},
+    {DEFINE_DBG(bcr, 5)},
+    {DEFINE_DBG(bcr, 6)},
+    {DEFINE_DBG(bcr, 7)},
+    {DEFINE_DBG(bcr, 8)},
+    {DEFINE_DBG(bcr, 9)},
+    {DEFINE_DBG(bcr, 10)},
+    {DEFINE_DBG(bcr, 11)},
+    {DEFINE_DBG(bcr, 12)},
+    {DEFINE_DBG(bcr, 13)},
+    {DEFINE_DBG(bcr, 14)},
+    {DEFINE_DBG(bcr, 15)},
+
+    {DEFINE_DBG(wvr, 0)},
+    {DEFINE_DBG(wvr, 1)},
+    {DEFINE_DBG(wvr, 2)},
+    {DEFINE_DBG(wvr, 3)},
+    {DEFINE_DBG(wvr, 4)},
+    {DEFINE_DBG(wvr, 5)},
+    {DEFINE_DBG(wvr, 6)},
+    {DEFINE_DBG(wvr, 7)},
+    {DEFINE_DBG(wvr, 8)},
+    {DEFINE_DBG(wvr, 9)},
+    {DEFINE_DBG(wvr, 10)},
+    {DEFINE_DBG(wvr, 11)},
+    {DEFINE_DBG(wvr, 12)},
+    {DEFINE_DBG(wvr, 13)},
+    {DEFINE_DBG(wvr, 14)},
+    {DEFINE_DBG(wvr, 15)},
+
+    {DEFINE_DBG(wcr, 0)},
+    {DEFINE_DBG(wcr, 1)},
+    {DEFINE_DBG(wcr, 2)},
+    {DEFINE_DBG(wcr, 3)},
+    {DEFINE_DBG(wcr, 4)},
+    {DEFINE_DBG(wcr, 5)},
+    {DEFINE_DBG(wcr, 6)},
+    {DEFINE_DBG(wcr, 7)},
+    {DEFINE_DBG(wcr, 8)},
+    {DEFINE_DBG(wcr, 9)},
+    {DEFINE_DBG(wcr, 10)},
+    {DEFINE_DBG(wcr, 11)},
+    {DEFINE_DBG(wcr, 12)},
+    {DEFINE_DBG(wcr, 13)},
+    {DEFINE_DBG(wcr, 14)},
+    {DEFINE_DBG(wcr, 15)}
+    // clang-format on
 };
 
 #endif // DECLARE_REGISTER_INFOS_ARM64_STRUCT
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_i386.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_i386.h
index a94b790..8597d0c 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_i386.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_i386.h
@@ -7,41 +7,47 @@
 //
 //===----------------------------------------------------------------------===//
 
-// C Includes
-#include <stddef.h>
-
-// C++ Includes
-// Other libraries and framework includes
 #include "llvm/Support/Compiler.h"
+#include <cstddef>
+#include <cstdint>
 
 // Project includes
 
 #ifdef DECLARE_REGISTER_INFOS_I386_STRUCT
 
 // Computes the offset of the given GPR in the user data area.
-#define GPR_OFFSET(regname) \
-    (LLVM_EXTENSION offsetof(GPR, regname))
+#define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname))
 
 // Computes the offset of the given FPR in the extended data area.
-#define FPR_OFFSET(regname)  \
-    (LLVM_EXTENSION offsetof(UserArea, i387) + \
-     LLVM_EXTENSION offsetof(FPR_i386, regname))
+#define FPR_OFFSET(regname)                                                    \
+  (LLVM_EXTENSION offsetof(UserArea, i387) +                                   \
+   LLVM_EXTENSION offsetof(FPR_i386, regname))
 
 // Computes the offset of the YMM register assembled from register halves.
 // Based on DNBArchImplI386.cpp from debugserver
-#define YMM_OFFSET(reg_index) \
+#define YMM_OFFSET(reg_index)                                                  \
+  (LLVM_EXTENSION offsetof(UserArea, i387) +                                   \
+   LLVM_EXTENSION offsetof(FPR, xstate) +                                      \
+   LLVM_EXTENSION offsetof(FXSAVE, xmm[7]) + sizeof(XMMReg) +                  \
+   (32 * reg_index))
+
+#define BNDR_OFFSET(reg_index) \
+    (LLVM_EXTENSION offsetof(UserArea, i387) + \
+     LLVM_EXTENSION offsetof(FPR, xstate) + \
+     LLVM_EXTENSION offsetof(XSAVE, mpxr[reg_index]))
+
+#define BNDC_OFFSET(reg_index) \
     (LLVM_EXTENSION offsetof(UserArea, i387) + \
      LLVM_EXTENSION offsetof(FPR, xstate) + \
-     LLVM_EXTENSION offsetof(FXSAVE, xmm[7]) + \
-     sizeof(XMMReg) + (32 * reg_index))
+     LLVM_EXTENSION offsetof(XSAVE, mpxc[reg_index]))
 
 // Number of bytes needed to represent a FPR.
 #if !defined(FPR_SIZE)
-#define FPR_SIZE(reg) sizeof(((FXSAVE*)NULL)->reg)
+#define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg)
 #endif
 
 // Number of bytes needed to represent the i'th FP register.
-#define FP_SIZE sizeof(((MMSReg*)NULL)->bytes)
+#define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes)
 
 // Number of bytes needed to represent an XMM register.
 #define XMM_SIZE sizeof(XMMReg)
@@ -49,158 +55,235 @@
 // Number of bytes needed to represent a YMM register.
 #define YMM_SIZE sizeof(YMMReg)
 
+// Number of bytes needed to represent MPX registers.
+#define BNDR_SIZE sizeof(MPXReg)
+#define BNDC_SIZE sizeof(MPXCsr)
+
 // Note that the size and offset will be updated by platform-specific classes.
-#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)            \
-    { #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint,  \
-      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##reg##_i386 }, NULL, NULL, NULL, 0}
+#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)                       \
+  {                                                                            \
+    #reg, alt, sizeof(((GPR *)nullptr)->reg),                                  \
+                      GPR_OFFSET(reg), eEncodingUint, eFormatHex,              \
+                                 {kind1, kind2, kind3, kind4,                  \
+                                  lldb_##reg##_i386 },                         \
+                                  nullptr, nullptr, nullptr, 0                 \
+  }
 
-#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4)           \
-    { #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint,   \
-      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_i386 }, NULL, NULL, NULL, 0}
+#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4)                      \
+  {                                                                            \
+    #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
+                                           {kind1, kind2, kind3, kind4,        \
+                                            lldb_##name##_i386 },              \
+                                            nullptr, nullptr, nullptr, 0       \
+  }
 
 // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
 
-#define DEFINE_FP_ST(reg, i)                                       \
-    { #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]),    \
-      eEncodingVector, eFormatVectorOfUInt8,                       \
-      { ehframe_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_st##i##_i386 }, \
-      NULL, NULL, NULL, 0}
-
-#define DEFINE_FP_MM(reg, i)                                                \
-    { #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]),   \
-      eEncodingUint, eFormatHex,                                            \
-      { ehframe_mm##i##_i386, dwarf_mm##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_mm##i##_i386 }, \
-      NULL, NULL, NULL, 0}
-
-#define DEFINE_XMM(reg, i)                                         \
-    { #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]),   \
-      eEncodingVector, eFormatVectorOfUInt8,                       \
-      { ehframe_##reg##i##_i386, dwarf_##reg##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386}, \
-      NULL, NULL, NULL, 0}
-
-// I believe the YMM registers use dwarf_xmm_%_i386 register numbers and then differentiate based on register size.
-#define DEFINE_YMM(reg, i)                                         \
-    { #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(i),        \
-      eEncodingVector, eFormatVectorOfUInt8,                       \
-      { LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 }, \
-      NULL, NULL, NULL, 0}
-
-#define DEFINE_DR(reg, i)                                               \
-    { #reg#i, NULL, DR_SIZE, DR_OFFSET(i), eEncodingUint, eFormatHex,   \
-      { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,  \
-        LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL, NULL, 0}
-
-#define DEFINE_GPR_PSEUDO_16(reg16, reg32)                  \
-    { #reg16, NULL, 2, GPR_OFFSET(reg32), eEncodingUint,    \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg16##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32, NULL, 0}
-#define DEFINE_GPR_PSEUDO_8H(reg8, reg32)                   \
-    { #reg8, NULL, 1, GPR_OFFSET(reg32)+1, eEncodingUint,   \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32, NULL, 0}
-#define DEFINE_GPR_PSEUDO_8L(reg8, reg32)                   \
-    { #reg8, NULL, 1, GPR_OFFSET(reg32), eEncodingUint,     \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32, NULL, 0}
- 
-static RegisterInfo
-g_register_infos_i386[] =
-{
+#define DEFINE_FP_ST(reg, i)                                                   \
+  {                                                                            \
+    #reg #i, nullptr, FP_SIZE,                                                 \
+        LLVM_EXTENSION FPR_OFFSET(                                             \
+            stmm[i]), eEncodingVector, eFormatVectorOfUInt8,                   \
+            {ehframe_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM,    \
+             LLDB_INVALID_REGNUM, lldb_st##i##_i386 },                         \
+             nullptr, nullptr, nullptr, 0                                      \
+  }
+
+#define DEFINE_FP_MM(reg, i)                                                   \
+  {                                                                            \
+    #reg #i, nullptr, sizeof(uint64_t),                                        \
+                          LLVM_EXTENSION FPR_OFFSET(                           \
+                              stmm[i]), eEncodingUint, eFormatHex,             \
+                              {ehframe_mm##i##_i386, dwarf_mm##i##_i386,       \
+                               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,       \
+                               lldb_mm##i##_i386 },                            \
+                               nullptr, nullptr, nullptr, 0                    \
+  }
+
+#define DEFINE_XMM(reg, i)                                                     \
+  {                                                                            \
+    #reg #i, nullptr, XMM_SIZE,                                                \
+        LLVM_EXTENSION FPR_OFFSET(                                             \
+            reg[i]), eEncodingVector, eFormatVectorOfUInt8,                    \
+            {ehframe_##reg##i##_i386, dwarf_##reg##i##_i386,                   \
+             LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 }, \
+             nullptr, nullptr, nullptr, 0                                      \
+  }
+
+// I believe the YMM registers use dwarf_xmm_%_i386 register numbers and then
+// differentiate based on register size.
+#define DEFINE_YMM(reg, i)                                                     \
+  {                                                                            \
+    #reg #i, nullptr, YMM_SIZE,                                                \
+        LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8,   \
+                                  {LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386,   \
+                                   LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,   \
+                                   lldb_##reg##i##_i386 },                     \
+                                   nullptr, nullptr, nullptr, 0                \
+  }
+
+#define DEFINE_BNDR(reg, i)                                                    \
+  {                                                                            \
+    #reg #i, nullptr, BNDR_SIZE,                                               \
+        LLVM_EXTENSION BNDR_OFFSET(i), eEncodingVector, eFormatVectorOfUInt64, \
+        {dwarf_##reg##i##_i386, dwarf_##reg##i##_i386, LLDB_INVALID_REGNUM,    \
+         LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 },                          \
+         nullptr, nullptr, nullptr, 0                                          \
+  }
+
+#define DEFINE_BNDC(name, i)                                                   \
+  {                                                                            \
+    #name, nullptr, BNDC_SIZE,                                                 \
+           LLVM_EXTENSION BNDC_OFFSET(i), eEncodingVector,                     \
+           eFormatVectorOfUInt8,                                               \
+           {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,     \
+            LLDB_INVALID_REGNUM, lldb_##name##_i386 },                         \
+            nullptr, nullptr, nullptr, 0                                       \
+  }
+
+#define DEFINE_DR(reg, i)                                                      \
+  {                                                                            \
+    #reg #i, nullptr, DR_SIZE,                                                 \
+        DR_OFFSET(i), eEncodingUint, eFormatHex,                               \
+                  {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                   \
+                   LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                   \
+                   LLDB_INVALID_REGNUM },                                      \
+                   nullptr, nullptr, nullptr, 0                                \
+  }
+
+#define DEFINE_GPR_PSEUDO_16(reg16, reg32)                                     \
+  {                                                                            \
+    #reg16, nullptr, 2,                                                        \
+        GPR_OFFSET(reg32), eEncodingUint, eFormatHex,                          \
+                   {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    lldb_##reg16##_i386 },                                     \
+                    RegisterContextPOSIX_x86::g_contained_##reg32,             \
+                    RegisterContextPOSIX_x86::g_invalidate_##reg32, nullptr, 0 \
+  }
+
+#define DEFINE_GPR_PSEUDO_8H(reg8, reg32)                                      \
+  {                                                                            \
+    #reg8, nullptr, 1,                                                         \
+        GPR_OFFSET(reg32) + 1, eEncodingUint, eFormatHex,                      \
+                   {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    lldb_##reg8##_i386 },                                      \
+                    RegisterContextPOSIX_x86::g_contained_##reg32,             \
+                    RegisterContextPOSIX_x86::g_invalidate_##reg32, nullptr, 0 \
+  }
+
+#define DEFINE_GPR_PSEUDO_8L(reg8, reg32)                                      \
+  {                                                                            \
+    #reg8, nullptr, 1,                                                         \
+        GPR_OFFSET(reg32), eEncodingUint, eFormatHex,                          \
+                   {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    lldb_##reg8##_i386 },                                      \
+                    RegisterContextPOSIX_x86::g_contained_##reg32,             \
+                    RegisterContextPOSIX_x86::g_invalidate_##reg32, nullptr, 0 \
+  }
+
+static RegisterInfo g_register_infos_i386[] = {
     // General purpose registers.
-    DEFINE_GPR(eax,    nullptr, ehframe_eax_i386,    dwarf_eax_i386,      LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(ebx,    nullptr, ehframe_ebx_i386,    dwarf_ebx_i386,      LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(ecx,    nullptr, ehframe_ecx_i386,    dwarf_ecx_i386,      LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(edx,    nullptr, ehframe_edx_i386,    dwarf_edx_i386,      LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(edi,    nullptr, ehframe_edi_i386,    dwarf_edi_i386,      LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(esi,    nullptr, ehframe_esi_i386,    dwarf_esi_i386,      LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(ebp,    "fp",    ehframe_ebp_i386,    dwarf_ebp_i386,      LLDB_REGNUM_GENERIC_FP,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(esp,    "sp",    ehframe_esp_i386,    dwarf_esp_i386,      LLDB_REGNUM_GENERIC_SP,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(eip,    "pc",    ehframe_eip_i386,    dwarf_eip_i386,      LLDB_REGNUM_GENERIC_PC,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(eflags, "flags", ehframe_eflags_i386, dwarf_eflags_i386,   LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
-    DEFINE_GPR(cs,     nullptr, LLDB_INVALID_REGNUM, dwarf_cs_i386,       LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(fs,     nullptr, LLDB_INVALID_REGNUM, dwarf_fs_i386,       LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(gs,     nullptr, LLDB_INVALID_REGNUM, dwarf_gs_i386,       LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(ss,     nullptr, LLDB_INVALID_REGNUM, dwarf_ss_i386,       LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(ds,     nullptr, LLDB_INVALID_REGNUM, dwarf_ds_i386,       LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(es,     nullptr, LLDB_INVALID_REGNUM, dwarf_es_i386,       LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-
-    DEFINE_GPR_PSEUDO_16(ax,  eax),
-    DEFINE_GPR_PSEUDO_16(bx,  ebx),
-    DEFINE_GPR_PSEUDO_16(cx,  ecx),
-    DEFINE_GPR_PSEUDO_16(dx,  edx),
-    DEFINE_GPR_PSEUDO_16(di,  edi),
-    DEFINE_GPR_PSEUDO_16(si,  esi),
-    DEFINE_GPR_PSEUDO_16(bp,  ebp),
-    DEFINE_GPR_PSEUDO_16(sp,  esp),
-    DEFINE_GPR_PSEUDO_8H(ah,  eax),
-    DEFINE_GPR_PSEUDO_8H(bh,  ebx),
-    DEFINE_GPR_PSEUDO_8H(ch,  ecx),
-    DEFINE_GPR_PSEUDO_8H(dh,  edx),
-    DEFINE_GPR_PSEUDO_8L(al,  eax),
-    DEFINE_GPR_PSEUDO_8L(bl,  ebx),
-    DEFINE_GPR_PSEUDO_8L(cl,  ecx),
-    DEFINE_GPR_PSEUDO_8L(dl,  edx),
+    DEFINE_GPR(eax, nullptr, ehframe_eax_i386, dwarf_eax_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(ebx, nullptr, ehframe_ebx_i386, dwarf_ebx_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(ecx, nullptr, ehframe_ecx_i386, dwarf_ecx_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(edx, nullptr, ehframe_edx_i386, dwarf_edx_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(edi, nullptr, ehframe_edi_i386, dwarf_edi_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(esi, nullptr, ehframe_esi_i386, dwarf_esi_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(ebp, "fp", ehframe_ebp_i386, dwarf_ebp_i386,
+               LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(esp, "sp", ehframe_esp_i386, dwarf_esp_i386,
+               LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(eip, "pc", ehframe_eip_i386, dwarf_eip_i386,
+               LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(eflags, "flags", ehframe_eflags_i386, dwarf_eflags_i386,
+               LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(cs, nullptr, LLDB_INVALID_REGNUM, dwarf_cs_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(fs, nullptr, LLDB_INVALID_REGNUM, dwarf_fs_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(gs, nullptr, LLDB_INVALID_REGNUM, dwarf_gs_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(ss, nullptr, LLDB_INVALID_REGNUM, dwarf_ss_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(ds, nullptr, LLDB_INVALID_REGNUM, dwarf_ds_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(es, nullptr, LLDB_INVALID_REGNUM, dwarf_es_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+
+    DEFINE_GPR_PSEUDO_16(ax, eax), DEFINE_GPR_PSEUDO_16(bx, ebx),
+    DEFINE_GPR_PSEUDO_16(cx, ecx), DEFINE_GPR_PSEUDO_16(dx, edx),
+    DEFINE_GPR_PSEUDO_16(di, edi), DEFINE_GPR_PSEUDO_16(si, esi),
+    DEFINE_GPR_PSEUDO_16(bp, ebp), DEFINE_GPR_PSEUDO_16(sp, esp),
+    DEFINE_GPR_PSEUDO_8H(ah, eax), DEFINE_GPR_PSEUDO_8H(bh, ebx),
+    DEFINE_GPR_PSEUDO_8H(ch, ecx), DEFINE_GPR_PSEUDO_8H(dh, edx),
+    DEFINE_GPR_PSEUDO_8L(al, eax), DEFINE_GPR_PSEUDO_8L(bl, ebx),
+    DEFINE_GPR_PSEUDO_8L(cl, ecx), DEFINE_GPR_PSEUDO_8L(dl, edx),
 
     // i387 Floating point registers.
-    DEFINE_FPR(fctrl,     fctrl,          LLDB_INVALID_REGNUM, dwarf_fctrl_i386,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fstat,     fstat,          LLDB_INVALID_REGNUM, dwarf_fstat_i386,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(ftag,      ftag,           LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fop,       fop,            LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fiseg,     ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fioff,     ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(foseg,     ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fooff,     ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(mxcsr,     mxcsr,          LLDB_INVALID_REGNUM, dwarf_mxcsr_i386,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(mxcsrmask, mxcsrmask,      LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fctrl, fctrl, LLDB_INVALID_REGNUM, dwarf_fctrl_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fstat, fstat, LLDB_INVALID_REGNUM, dwarf_fstat_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(mxcsr, mxcsr, LLDB_INVALID_REGNUM, dwarf_mxcsr_i386,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
 
     // FP registers.
-    DEFINE_FP_ST(st, 0),
-    DEFINE_FP_ST(st, 1),
-    DEFINE_FP_ST(st, 2),
-    DEFINE_FP_ST(st, 3),
-    DEFINE_FP_ST(st, 4),
-    DEFINE_FP_ST(st, 5),
-    DEFINE_FP_ST(st, 6),
-    DEFINE_FP_ST(st, 7),
-    DEFINE_FP_MM(mm, 0),
-    DEFINE_FP_MM(mm, 1),
-    DEFINE_FP_MM(mm, 2),
-    DEFINE_FP_MM(mm, 3),
-    DEFINE_FP_MM(mm, 4),
-    DEFINE_FP_MM(mm, 5),
-    DEFINE_FP_MM(mm, 6),
+    DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2),
+    DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5),
+    DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7), DEFINE_FP_MM(mm, 0),
+    DEFINE_FP_MM(mm, 1), DEFINE_FP_MM(mm, 2), DEFINE_FP_MM(mm, 3),
+    DEFINE_FP_MM(mm, 4), DEFINE_FP_MM(mm, 5), DEFINE_FP_MM(mm, 6),
     DEFINE_FP_MM(mm, 7),
 
     // XMM registers
-    DEFINE_XMM(xmm, 0),
-    DEFINE_XMM(xmm, 1),
-    DEFINE_XMM(xmm, 2),
-    DEFINE_XMM(xmm, 3),
-    DEFINE_XMM(xmm, 4),
-    DEFINE_XMM(xmm, 5),
-    DEFINE_XMM(xmm, 6),
-    DEFINE_XMM(xmm, 7),
+    DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2),
+    DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5),
+    DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7),
 
     // Copy of YMM registers assembled from xmm and ymmh
-    DEFINE_YMM(ymm, 0),
-    DEFINE_YMM(ymm, 1),
-    DEFINE_YMM(ymm, 2),
-    DEFINE_YMM(ymm, 3),
-    DEFINE_YMM(ymm, 4),
-    DEFINE_YMM(ymm, 5),
-    DEFINE_YMM(ymm, 6),
-    DEFINE_YMM(ymm, 7),
+    DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2),
+    DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5),
+    DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7),
+
+    // MPX registers
+    DEFINE_BNDR(bnd, 0),
+    DEFINE_BNDR(bnd, 1),
+    DEFINE_BNDR(bnd, 2),
+    DEFINE_BNDR(bnd, 3),
+
+    DEFINE_BNDC(bndcfgu, 0),
+    DEFINE_BNDC(bndstatus, 1),
 
     // Debug registers for lldb internal use
-    DEFINE_DR(dr, 0),
-    DEFINE_DR(dr, 1),
-    DEFINE_DR(dr, 2),
-    DEFINE_DR(dr, 3),
-    DEFINE_DR(dr, 4),
-    DEFINE_DR(dr, 5),
-    DEFINE_DR(dr, 6),
-    DEFINE_DR(dr, 7)
-};
-
-static_assert((sizeof(g_register_infos_i386) / sizeof(g_register_infos_i386[0])) == k_num_registers_i386,
-    "g_register_infos_x86_64 has wrong number of register infos");
+    DEFINE_DR(dr, 0), DEFINE_DR(dr, 1), DEFINE_DR(dr, 2), DEFINE_DR(dr, 3),
+    DEFINE_DR(dr, 4), DEFINE_DR(dr, 5), DEFINE_DR(dr, 6), DEFINE_DR(dr, 7)};
+
+static_assert((sizeof(g_register_infos_i386) /
+               sizeof(g_register_infos_i386[0])) == k_num_registers_i386,
+              "g_register_infos_x86_64 has wrong number of register infos");
 
 #undef GPR_OFFSET
 #undef FPR_OFFSET
@@ -214,6 +297,8 @@ static_assert((sizeof(g_register_infos_i386) / sizeof(g_register_infos_i386[0]))
 #undef DEFINE_FP
 #undef DEFINE_XMM
 #undef DEFINE_YMM
+#undef DEFINE_BNDR
+#undef DEFINE_BNDC
 #undef DEFINE_DR
 #undef DEFINE_GPR_PSEUDO_16
 #undef DEFINE_GPR_PSEUDO_8H
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_mips.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_mips.h
index 81294e7..b116b99 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_mips.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_mips.h
@@ -12,27 +12,27 @@
 
 // C++ Includes
 // Other libraries and framework includes
-#include "llvm/Support/Compiler.h"
 #include "lldb/Core/dwarf.h"
+#include "llvm/Support/Compiler.h"
 
 // Project includes
 
 #ifdef DECLARE_REGISTER_INFOS_MIPS_STRUCT
 
 // Computes the offset of the given GPR in the user data area.
-#define GPR_OFFSET(regname) \
-    (LLVM_EXTENSION offsetof(UserArea, gpr) + \
-     LLVM_EXTENSION offsetof(GPR_linux_mips, regname))
+#define GPR_OFFSET(regname)                                                    \
+  (LLVM_EXTENSION offsetof(UserArea, gpr) +                                    \
+   LLVM_EXTENSION offsetof(GPR_linux_mips, regname))
 
 // Computes the offset of the given FPR in the extended data area.
-#define FPR_OFFSET(regname)  \
-     (LLVM_EXTENSION offsetof(UserArea, fpr) + \
-      LLVM_EXTENSION offsetof(FPR_linux_mips, regname))
+#define FPR_OFFSET(regname)                                                    \
+  (LLVM_EXTENSION offsetof(UserArea, fpr) +                                    \
+   LLVM_EXTENSION offsetof(FPR_linux_mips, regname))
 
 // Computes the offset of the given MSA in the extended data area.
-#define MSA_OFFSET(regname)  \
-     (LLVM_EXTENSION offsetof(UserArea, msa) + \
-      LLVM_EXTENSION offsetof(MSA_linux_mips, regname))
+#define MSA_OFFSET(regname)                                                    \
+  (LLVM_EXTENSION offsetof(UserArea, msa) +                                    \
+   LLVM_EXTENSION offsetof(MSA_linux_mips, regname))
 
 // Note that the size and offset will be updated by platform-specific classes.
 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3)                              \
@@ -44,11 +44,10 @@
                                   NULL, NULL, NULL, 0                          \
   }
 
-const uint8_t dwarf_opcode_mips [] = {
-                                        llvm::dwarf::DW_OP_regx, dwarf_sr_mips, llvm::dwarf::DW_OP_lit1,
-                                        llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shl, llvm::dwarf::DW_OP_and,
-                                        llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr
-                                     };
+const uint8_t dwarf_opcode_mips[] = {
+    llvm::dwarf::DW_OP_regx,  dwarf_sr_mips,          llvm::dwarf::DW_OP_lit1,
+    llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shl, llvm::dwarf::DW_OP_and,
+    llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr};
 
 #define DEFINE_FPR(reg, alt, kind1, kind2, kind3)                              \
   {                                                                            \
@@ -69,13 +68,23 @@ const uint8_t dwarf_opcode_mips [] = {
                                   NULL, NULL, NULL, 0                          \
   }
 
-#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4)    \
-    { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingVector,   \
-      eFormatVectorOfUInt8, { kind1, kind2, kind3, kind4, msa_##reg##_mips }, NULL, NULL, NULL, 0}
+#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4)                       \
+  {                                                                            \
+    #reg, alt, sizeof(((MSA_linux_mips *) 0)->reg),                            \
+                      MSA_OFFSET(reg), eEncodingVector, eFormatVectorOfUInt8,  \
+                                 {kind1, kind2, kind3, kind4,                  \
+                                  msa_##reg##_mips },                          \
+                                  NULL, NULL, NULL, 0                          \
+  }
 
-#define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4)    \
-    { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingUint, \
-      eFormatHex, { kind1, kind2, kind3, kind4, msa_##reg##_mips }, NULL, NULL, NULL, 0}
+#define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4)                  \
+  {                                                                            \
+    #reg, alt, sizeof(((MSA_linux_mips *) 0)->reg),                            \
+                      MSA_OFFSET(reg), eEncodingUint, eFormatHex,              \
+                                 {kind1, kind2, kind3, kind4,                  \
+                                  msa_##reg##_mips },                          \
+                                  NULL, NULL, NULL, 0                          \
+  }
 
 // RegisterKind: EH_Frame, DWARF, Generic, Procss Plugin, LLDB
 
@@ -283,11 +292,11 @@ static RegisterInfo g_register_infos_mips[] = {
     DEFINE_MSA_INFO(fir, nullptr, dwarf_fir_mips, dwarf_fir_mips,
                     LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
     DEFINE_MSA_INFO(config5, nullptr, dwarf_config5_mips, dwarf_config5_mips,
-                    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM)
-};
+                    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM)};
 
-static_assert((sizeof(g_register_infos_mips) / sizeof(g_register_infos_mips[0])) == k_num_registers_mips,
-    "g_register_infos_mips has wrong number of register infos");
+static_assert((sizeof(g_register_infos_mips) /
+               sizeof(g_register_infos_mips[0])) == k_num_registers_mips,
+              "g_register_infos_mips has wrong number of register infos");
 
 #undef GPR_OFFSET
 #undef FPR_OFFSET
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h
index 5e9c503..3c3912f 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h
@@ -12,8 +12,8 @@
 
 // C++ Includes
 // Other libraries and framework includes
-#include "llvm/Support/Compiler.h"
 #include "lldb/Core/dwarf.h"
+#include "llvm/Support/Compiler.h"
 
 // Project includes
 
@@ -21,23 +21,22 @@
 
 // Computes the offset of the given GPR in the user data area.
 #ifdef LINUX_MIPS64
-    #define GPR_OFFSET(regname) \
-        (LLVM_EXTENSION offsetof(UserArea, gpr) + \
-         LLVM_EXTENSION offsetof(GPR_linux_mips, regname))
+#define GPR_OFFSET(regname)                                                    \
+  (LLVM_EXTENSION offsetof(UserArea, gpr) +                                    \
+   LLVM_EXTENSION offsetof(GPR_linux_mips, regname))
 #else
-    #define GPR_OFFSET(regname) \
-        (LLVM_EXTENSION offsetof(GPR_freebsd_mips, regname))
+#define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR_freebsd_mips, regname))
 #endif
 
 // Computes the offset of the given FPR in the extended data area.
-#define FPR_OFFSET(regname) \
-     (LLVM_EXTENSION offsetof(UserArea, fpr) + \
-      LLVM_EXTENSION offsetof(FPR_linux_mips, regname))
+#define FPR_OFFSET(regname)                                                    \
+  (LLVM_EXTENSION offsetof(UserArea, fpr) +                                    \
+   LLVM_EXTENSION offsetof(FPR_linux_mips, regname))
 
 // Computes the offset of the given MSA in the extended data area.
-#define MSA_OFFSET(regname) \
-     (LLVM_EXTENSION offsetof(UserArea, msa) + \
-      LLVM_EXTENSION offsetof(MSA_linux_mips, regname))
+#define MSA_OFFSET(regname)                                                    \
+  (LLVM_EXTENSION offsetof(UserArea, msa) +                                    \
+   LLVM_EXTENSION offsetof(MSA_linux_mips, regname))
 
 // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
 
@@ -52,9 +51,14 @@
                                   NULL, NULL, NULL, 0                          \
   }
 #else
-    #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)    \
-         { #reg, alt, sizeof(((GPR_freebsd_mips*)0)->reg), GPR_OFFSET(reg), eEncodingUint, \
-          eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL, NULL, 0}
+#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)                       \
+  {                                                                            \
+    #reg, alt, sizeof(((GPR_freebsd_mips *) 0)->reg),                          \
+                      GPR_OFFSET(reg), eEncodingUint, eFormatHex,              \
+                                 {kind1, kind2, kind3, kind4,                  \
+                                  gpr_##reg##_mips64 },                        \
+                                  NULL, NULL, NULL, 0                          \
+  }
 #endif
 
 #define DEFINE_GPR_INFO(reg, alt, kind1, kind2, kind3)                         \
@@ -66,11 +70,10 @@
                                   NULL, NULL, NULL, 0                          \
   }
 
-const uint8_t dwarf_opcode_mips64 [] = {
-                                           llvm::dwarf::DW_OP_regx, dwarf_sr_mips64, llvm::dwarf::DW_OP_lit1,
-                                           llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shl, llvm::dwarf::DW_OP_and, 
-                                           llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr
-                                       };
+const uint8_t dwarf_opcode_mips64[] = {
+    llvm::dwarf::DW_OP_regx,  dwarf_sr_mips64,        llvm::dwarf::DW_OP_lit1,
+    llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shl, llvm::dwarf::DW_OP_and,
+    llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr};
 
 #define DEFINE_FPR(reg, alt, kind1, kind2, kind3)                              \
   {                                                                            \
@@ -91,60 +94,108 @@ const uint8_t dwarf_opcode_mips64 [] = {
                                   NULL, NULL, NULL, 0                          \
   }
 
+#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4)                       \
+  {                                                                            \
+    #reg, alt, sizeof(((MSA_linux_mips *) 0)->reg),                            \
+                      MSA_OFFSET(reg), eEncodingVector, eFormatVectorOfUInt8,  \
+                                 {kind1, kind2, kind3, kind4,                  \
+                                  msa_##reg##_mips64 },                        \
+                                  NULL, NULL, NULL, 0                          \
+  }
 
-#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4)    \
-    { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingVector,   \
-      eFormatVectorOfUInt8, { kind1, kind2, kind3, kind4, msa_##reg##_mips64 }, NULL, NULL, NULL, 0}
-
-#define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4)    \
-    { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingUint,   \
-      eFormatHex, { kind1, kind2, kind3, kind4, msa_##reg##_mips64 }, NULL, NULL, NULL, 0}
+#define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4)                  \
+  {                                                                            \
+    #reg, alt, sizeof(((MSA_linux_mips *) 0)->reg),                            \
+                      MSA_OFFSET(reg), eEncodingUint, eFormatHex,              \
+                                 {kind1, kind2, kind3, kind4,                  \
+                                  msa_##reg##_mips64 },                        \
+                                  NULL, NULL, NULL, 0                          \
+  }
 
-static RegisterInfo
-g_register_infos_mips64[] =
-{
-    // General purpose registers.            EH_Frame,                  DWARF,              Generic,    Process Plugin
+static RegisterInfo g_register_infos_mips64[] = {
+// General purpose registers.            EH_Frame,                  DWARF,
+// Generic,    Process Plugin
 #ifndef LINUX_MIPS64
-    DEFINE_GPR(zero,     "r0",      dwarf_zero_mips64,      dwarf_zero_mips64,  LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r1,       nullptr,   dwarf_r1_mips64,        dwarf_r1_mips64,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r2,       nullptr,   dwarf_r2_mips64,        dwarf_r2_mips64,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r3,       nullptr,   dwarf_r3_mips64,        dwarf_r3_mips64,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r4,       nullptr,   dwarf_r4_mips64,        dwarf_r4_mips64,    LLDB_REGNUM_GENERIC_ARG1,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r5,       nullptr,   dwarf_r5_mips64,        dwarf_r5_mips64,    LLDB_REGNUM_GENERIC_ARG2,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r6,       nullptr,   dwarf_r6_mips64,        dwarf_r6_mips64,    LLDB_REGNUM_GENERIC_ARG3,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r7,       nullptr,   dwarf_r7_mips64,        dwarf_r7_mips64,    LLDB_REGNUM_GENERIC_ARG4,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r8,       nullptr,   dwarf_r8_mips64,        dwarf_r8_mips64,    LLDB_REGNUM_GENERIC_ARG5,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r9,       nullptr,   dwarf_r9_mips64,        dwarf_r9_mips64,    LLDB_REGNUM_GENERIC_ARG6,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r10,      nullptr,   dwarf_r10_mips64,       dwarf_r10_mips64,   LLDB_REGNUM_GENERIC_ARG7,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r11,      nullptr,   dwarf_r11_mips64,       dwarf_r11_mips64,   LLDB_REGNUM_GENERIC_ARG8,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r12,      nullptr,   dwarf_r12_mips64,       dwarf_r12_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r13,      nullptr,   dwarf_r13_mips64,       dwarf_r13_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r14,      nullptr,   dwarf_r14_mips64,       dwarf_r14_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r15,      nullptr,   dwarf_r15_mips64,       dwarf_r15_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r16,      nullptr,   dwarf_r16_mips64,       dwarf_r16_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r17,      nullptr,   dwarf_r17_mips64,       dwarf_r17_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r18,      nullptr,   dwarf_r18_mips64,       dwarf_r18_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r19,      nullptr,   dwarf_r19_mips64,       dwarf_r19_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r20,      nullptr,   dwarf_r20_mips64,       dwarf_r20_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r21,      nullptr,   dwarf_r21_mips64,       dwarf_r21_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r22,      nullptr,   dwarf_r22_mips64,       dwarf_r22_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r23,      nullptr,   dwarf_r23_mips64,       dwarf_r23_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r24,      nullptr,   dwarf_r24_mips64,       dwarf_r24_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r25,      nullptr,   dwarf_r25_mips64,       dwarf_r25_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r26,      nullptr,   dwarf_r26_mips64,       dwarf_r26_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r27,      nullptr,   dwarf_r27_mips64,       dwarf_r27_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(gp,       "r28",     dwarf_gp_mips64,        dwarf_gp_mips64,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(sp,       "r29",     dwarf_sp_mips64,        dwarf_sp_mips64,    LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r30,      nullptr,   dwarf_r30_mips64,       dwarf_r30_mips64,   LLDB_REGNUM_GENERIC_FP,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(ra,       "r31",     dwarf_ra_mips64,        dwarf_ra_mips64,    LLDB_REGNUM_GENERIC_RA,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(sr,       nullptr,   dwarf_sr_mips64,        dwarf_sr_mips64,    LLDB_REGNUM_GENERIC_FLAGS,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(mullo,    nullptr,   dwarf_lo_mips64,        dwarf_lo_mips64,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(mulhi,    nullptr,   dwarf_hi_mips64,        dwarf_hi_mips64,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(badvaddr, nullptr,   dwarf_bad_mips64,       dwarf_bad_mips64,   LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(cause,    nullptr,   dwarf_cause_mips64,     dwarf_cause_mips64, LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(pc,       "pc",      dwarf_pc_mips64,        dwarf_pc_mips64,    LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
-    DEFINE_GPR(ic,       nullptr,   dwarf_ic_mips64,        dwarf_ic_mips64,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(dummy,    nullptr,   dwarf_dummy_mips64,     dwarf_dummy_mips64, LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM),
+    DEFINE_GPR(zero, "r0", dwarf_zero_mips64, dwarf_zero_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r1, nullptr, dwarf_r1_mips64, dwarf_r1_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r2, nullptr, dwarf_r2_mips64, dwarf_r2_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r3, nullptr, dwarf_r3_mips64, dwarf_r3_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r4, nullptr, dwarf_r4_mips64, dwarf_r4_mips64,
+               LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r5, nullptr, dwarf_r5_mips64, dwarf_r5_mips64,
+               LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r6, nullptr, dwarf_r6_mips64, dwarf_r6_mips64,
+               LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r7, nullptr, dwarf_r7_mips64, dwarf_r7_mips64,
+               LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r8, nullptr, dwarf_r8_mips64, dwarf_r8_mips64,
+               LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r9, nullptr, dwarf_r9_mips64, dwarf_r9_mips64,
+               LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r10, nullptr, dwarf_r10_mips64, dwarf_r10_mips64,
+               LLDB_REGNUM_GENERIC_ARG7, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r11, nullptr, dwarf_r11_mips64, dwarf_r11_mips64,
+               LLDB_REGNUM_GENERIC_ARG8, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r12, nullptr, dwarf_r12_mips64, dwarf_r12_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r13, nullptr, dwarf_r13_mips64, dwarf_r13_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r14, nullptr, dwarf_r14_mips64, dwarf_r14_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r15, nullptr, dwarf_r15_mips64, dwarf_r15_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r16, nullptr, dwarf_r16_mips64, dwarf_r16_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r17, nullptr, dwarf_r17_mips64, dwarf_r17_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r18, nullptr, dwarf_r18_mips64, dwarf_r18_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r19, nullptr, dwarf_r19_mips64, dwarf_r19_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r20, nullptr, dwarf_r20_mips64, dwarf_r20_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r21, nullptr, dwarf_r21_mips64, dwarf_r21_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r22, nullptr, dwarf_r22_mips64, dwarf_r22_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r23, nullptr, dwarf_r23_mips64, dwarf_r23_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r24, nullptr, dwarf_r24_mips64, dwarf_r24_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r25, nullptr, dwarf_r25_mips64, dwarf_r25_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r26, nullptr, dwarf_r26_mips64, dwarf_r26_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r27, nullptr, dwarf_r27_mips64, dwarf_r27_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(gp, "r28", dwarf_gp_mips64, dwarf_gp_mips64, LLDB_INVALID_REGNUM,
+               LLDB_INVALID_REGNUM),
+    DEFINE_GPR(sp, "r29", dwarf_sp_mips64, dwarf_sp_mips64,
+               LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r30, nullptr, dwarf_r30_mips64, dwarf_r30_mips64,
+               LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(ra, "r31", dwarf_ra_mips64, dwarf_ra_mips64,
+               LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(sr, nullptr, dwarf_sr_mips64, dwarf_sr_mips64,
+               LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(mullo, nullptr, dwarf_lo_mips64, dwarf_lo_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips64, dwarf_hi_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(badvaddr, nullptr, dwarf_bad_mips64, dwarf_bad_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(cause, nullptr, dwarf_cause_mips64, dwarf_cause_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(pc, "pc", dwarf_pc_mips64, dwarf_pc_mips64,
+               LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(ic, nullptr, dwarf_ic_mips64, dwarf_ic_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_GPR(dummy, nullptr, dwarf_dummy_mips64, dwarf_dummy_mips64,
+               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
 #else
     DEFINE_GPR(zero, "r0", dwarf_zero_mips64, dwarf_zero_mips64,
                LLDB_INVALID_REGNUM),
@@ -372,8 +423,9 @@ g_register_infos_mips64[] =
 #endif
 };
 
-static_assert((sizeof(g_register_infos_mips64) / sizeof(g_register_infos_mips64[0])) == k_num_registers_mips64,
-    "g_register_infos_mips64 has wrong number of register infos");
+static_assert((sizeof(g_register_infos_mips64) /
+               sizeof(g_register_infos_mips64[0])) == k_num_registers_mips64,
+              "g_register_infos_mips64 has wrong number of register infos");
 
 #undef DEFINE_GPR
 #undef DEFINE_GPR_INFO
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_powerpc.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_powerpc.h
index 927c73a..c0d47f0 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_powerpc.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_powerpc.h
@@ -10,170 +10,216 @@
 #include <stddef.h>
 
 // Computes the offset of the given GPR in the user data area.
-#define GPR_OFFSET(regname)                                                 \
-    (offsetof(GPR, regname))
-#define FPR_OFFSET(regname)                                                 \
-    (offsetof(FPR, regname))
-#define VMX_OFFSET(regname)                                                 \
-    (offsetof(VMX, regname))
-#define GPR_SIZE(regname)                                                   \
-    (sizeof(((GPR*)NULL)->regname))
+#define GPR_OFFSET(regname) (offsetof(GPR, regname))
+#define FPR_OFFSET(regname) (offsetof(FPR, regname))
+#define VMX_OFFSET(regname) (offsetof(VMX, regname))
+#define GPR_SIZE(regname) (sizeof(((GPR *)NULL)->regname))
 
 #ifdef DECLARE_REGISTER_INFOS_POWERPC_STRUCT
 
 // Note that the size and offset will be updated by platform-specific classes.
-#define DEFINE_GPR(reg, alt, lldb_kind)           \
-    { #reg, alt, GPR_SIZE(reg), GPR_OFFSET(reg), eEncodingUint, \
-      eFormatHex, { dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, lldb_kind, LLDB_INVALID_REGNUM, gpr_##reg##_powerpc }, NULL, NULL, NULL, 0}
-#define DEFINE_FPR(reg, lldb_kind)           \
-    { #reg, NULL, 8, FPR_OFFSET(reg), eEncodingIEEE754, \
-      eFormatFloat, { dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, lldb_kind, LLDB_INVALID_REGNUM, fpr_##reg##_powerpc }, NULL, NULL, NULL, 0}
-#define DEFINE_VMX(reg, lldb_kind)           \
-    { #reg, NULL, 16, VMX_OFFSET(reg), eEncodingVector, \
-      eFormatVectorOfUInt32, { dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, lldb_kind, LLDB_INVALID_REGNUM, vmx_##reg##_powerpc }, NULL, NULL, NULL, 0}
+#define DEFINE_GPR(reg, alt, lldb_kind)                                        \
+  {                                                                            \
+    #reg, alt, GPR_SIZE(reg), GPR_OFFSET(reg), eEncodingUint, eFormatHex,      \
+                                         {dwarf_##reg##_powerpc,               \
+                                          dwarf_##reg##_powerpc, lldb_kind,    \
+                                          LLDB_INVALID_REGNUM,                 \
+                                          gpr_##reg##_powerpc },               \
+                                          NULL, NULL, NULL, 0                  \
+  }
+#define DEFINE_FPR(reg, lldb_kind)                                             \
+  {                                                                            \
+    #reg, NULL, 8, FPR_OFFSET(reg), eEncodingIEEE754, eFormatFloat,            \
+                              {dwarf_##reg##_powerpc, dwarf_##reg##_powerpc,   \
+                               lldb_kind, LLDB_INVALID_REGNUM,                 \
+                               fpr_##reg##_powerpc },                          \
+                               NULL, NULL, NULL, 0                             \
+  }
+#define DEFINE_VMX(reg, lldb_kind)                                             \
+  {                                                                            \
+    #reg, NULL, 16, VMX_OFFSET(reg), eEncodingVector, eFormatVectorOfUInt32,   \
+                               {dwarf_##reg##_powerpc, dwarf_##reg##_powerpc,  \
+                                lldb_kind, LLDB_INVALID_REGNUM,                \
+                                vmx_##reg##_powerpc },                         \
+                                NULL, NULL, NULL, 0                            \
+  }
 
-    // General purpose registers.            EH_Frame,                  DWARF,              Generic,                Process Plugin
-#define POWERPC_REGS \
-    DEFINE_GPR(r0,       NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r1,       "sp",  LLDB_REGNUM_GENERIC_SP), \
-    DEFINE_GPR(r2,       NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r3,       "arg1",LLDB_REGNUM_GENERIC_ARG1), \
-    DEFINE_GPR(r4,       "arg2",LLDB_REGNUM_GENERIC_ARG2), \
-    DEFINE_GPR(r5,       "arg3",LLDB_REGNUM_GENERIC_ARG3), \
-    DEFINE_GPR(r6,       "arg4",LLDB_REGNUM_GENERIC_ARG4), \
-    DEFINE_GPR(r7,       "arg5",LLDB_REGNUM_GENERIC_ARG5), \
-    DEFINE_GPR(r8,       "arg6",LLDB_REGNUM_GENERIC_ARG6), \
-    DEFINE_GPR(r9,       "arg7",LLDB_REGNUM_GENERIC_ARG7), \
-    DEFINE_GPR(r10,      "arg8",LLDB_REGNUM_GENERIC_ARG8), \
-    DEFINE_GPR(r11,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r12,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r13,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r14,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r15,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r16,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r17,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r18,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r19,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r20,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r21,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r22,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r23,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r24,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r25,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r26,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r27,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r28,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r29,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r30,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(r31,      NULL,  LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(lr,       "lr",  LLDB_REGNUM_GENERIC_RA), \
-    DEFINE_GPR(cr,       "cr",  LLDB_REGNUM_GENERIC_FLAGS), \
-    DEFINE_GPR(xer,      "xer", LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(ctr,      "ctr", LLDB_INVALID_REGNUM), \
-    DEFINE_GPR(pc,       "pc",  LLDB_REGNUM_GENERIC_PC), \
-    DEFINE_FPR(f0,       LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f1,       LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f2,       LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f3,       LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f4,       LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f5,       LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f6,       LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f7,       LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f8,       LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f9,       LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f10,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f11,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f12,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f13,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f14,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f15,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f16,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f17,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f18,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f19,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f20,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f21,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f22,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f23,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f24,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f25,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f26,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f27,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f28,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f29,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f30,      LLDB_INVALID_REGNUM), \
-    DEFINE_FPR(f31,      LLDB_INVALID_REGNUM), \
-    { "fpscr", NULL, 8, FPR_OFFSET(fpscr), eEncodingUint, eFormatHex, { dwarf_fpscr_powerpc, dwarf_fpscr_powerpc, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpr_fpscr_powerpc }, NULL, NULL }, \
-    DEFINE_VMX(v0,       LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v1,       LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v2,       LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v3,       LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v4,       LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v5,       LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v6,       LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v7,       LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v8,       LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v9,       LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v10,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v11,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v12,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v13,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v14,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v15,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v16,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v17,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v18,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v19,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v20,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v21,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v22,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v23,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v24,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v25,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v26,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v27,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v28,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v29,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v30,      LLDB_INVALID_REGNUM), \
-    DEFINE_VMX(v31,      LLDB_INVALID_REGNUM), \
-    { "vrsave", NULL, 4, VMX_OFFSET(vrsave), eEncodingUint, eFormatHex, { dwarf_vrsave_powerpc, dwarf_vrsave_powerpc, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vrsave_powerpc }, NULL, NULL, NULL, 0}, \
-    { "vscr", NULL, 4, VMX_OFFSET(vscr), eEncodingUint, eFormatHex, { dwarf_vscr_powerpc, dwarf_vscr_powerpc, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vscr_powerpc }, NULL, NULL, NULL, 0},
+// General purpose registers.            EH_Frame,                  DWARF,
+// Generic,                Process Plugin
+#define POWERPC_REGS                                                           \
+  DEFINE_GPR(r0, NULL, LLDB_INVALID_REGNUM)                                    \
+  , DEFINE_GPR(r1, "sp", LLDB_REGNUM_GENERIC_SP),                              \
+      DEFINE_GPR(r2, NULL, LLDB_INVALID_REGNUM),                               \
+      DEFINE_GPR(r3, "arg1", LLDB_REGNUM_GENERIC_ARG1),                        \
+      DEFINE_GPR(r4, "arg2", LLDB_REGNUM_GENERIC_ARG2),                        \
+      DEFINE_GPR(r5, "arg3", LLDB_REGNUM_GENERIC_ARG3),                        \
+      DEFINE_GPR(r6, "arg4", LLDB_REGNUM_GENERIC_ARG4),                        \
+      DEFINE_GPR(r7, "arg5", LLDB_REGNUM_GENERIC_ARG5),                        \
+      DEFINE_GPR(r8, "arg6", LLDB_REGNUM_GENERIC_ARG6),                        \
+      DEFINE_GPR(r9, "arg7", LLDB_REGNUM_GENERIC_ARG7),                        \
+      DEFINE_GPR(r10, "arg8", LLDB_REGNUM_GENERIC_ARG8),                       \
+      DEFINE_GPR(r11, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r12, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r13, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r14, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r15, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r16, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r17, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r18, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r19, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r20, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r21, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r22, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r23, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r24, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r25, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r26, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r27, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r28, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r29, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r30, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(r31, NULL, LLDB_INVALID_REGNUM),                              \
+      DEFINE_GPR(lr, "lr", LLDB_REGNUM_GENERIC_RA),                            \
+      DEFINE_GPR(cr, "cr", LLDB_REGNUM_GENERIC_FLAGS),                         \
+      DEFINE_GPR(xer, "xer", LLDB_INVALID_REGNUM),                             \
+      DEFINE_GPR(ctr, "ctr", LLDB_INVALID_REGNUM),                             \
+      DEFINE_GPR(pc, "pc", LLDB_REGNUM_GENERIC_PC),                            \
+      DEFINE_FPR(f0, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_FPR(f1, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_FPR(f2, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_FPR(f3, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_FPR(f4, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_FPR(f5, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_FPR(f6, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_FPR(f7, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_FPR(f8, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_FPR(f9, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_FPR(f10, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f11, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f12, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f13, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f14, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f15, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f16, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f17, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f18, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f19, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f20, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f21, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f22, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f23, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f24, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f25, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f26, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f27, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f28, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f29, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f30, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_FPR(f31, LLDB_INVALID_REGNUM),                                    \
+      {"fpscr",                                                                \
+       NULL,                                                                   \
+       8,                                                                      \
+       FPR_OFFSET(fpscr),                                                      \
+       eEncodingUint,                                                          \
+       eFormatHex,                                                             \
+       {dwarf_fpscr_powerpc, dwarf_fpscr_powerpc, LLDB_INVALID_REGNUM,         \
+        LLDB_INVALID_REGNUM, fpr_fpscr_powerpc},                               \
+       NULL,                                                                   \
+       NULL,                                                                   \
+       NULL,                                                                   \
+       0},                                                                     \
+      DEFINE_VMX(v0, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_VMX(v1, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_VMX(v2, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_VMX(v3, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_VMX(v4, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_VMX(v5, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_VMX(v6, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_VMX(v7, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_VMX(v8, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_VMX(v9, LLDB_INVALID_REGNUM),                                     \
+      DEFINE_VMX(v10, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v11, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v12, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v13, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v14, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v15, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v16, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v17, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v18, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v19, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v20, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v21, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v22, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v23, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v24, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v25, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v26, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v27, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v28, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v29, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v30, LLDB_INVALID_REGNUM),                                    \
+      DEFINE_VMX(v31, LLDB_INVALID_REGNUM),                                    \
+      {"vrsave",                                                               \
+       NULL,                                                                   \
+       4,                                                                      \
+       VMX_OFFSET(vrsave),                                                     \
+       eEncodingUint,                                                          \
+       eFormatHex,                                                             \
+       {dwarf_vrsave_powerpc, dwarf_vrsave_powerpc, LLDB_INVALID_REGNUM,       \
+        LLDB_INVALID_REGNUM, vmx_vrsave_powerpc},                              \
+       NULL,                                                                   \
+       NULL,                                                                   \
+       NULL,                                                                   \
+       0},                                                                     \
+      {"vscr",                                                                 \
+       NULL,                                                                   \
+       4,                                                                      \
+       VMX_OFFSET(vscr),                                                       \
+       eEncodingUint,                                                          \
+       eFormatHex,                                                             \
+       {dwarf_vscr_powerpc, dwarf_vscr_powerpc, LLDB_INVALID_REGNUM,           \
+        LLDB_INVALID_REGNUM, vmx_vscr_powerpc},                                \
+       NULL,                                                                   \
+       NULL,                                                                   \
+       NULL,                                                                   \
+       0},
 
-static RegisterInfo
-g_register_infos_powerpc64[] =
-{
+static RegisterInfo g_register_infos_powerpc64[] = {
 #define GPR GPR64
     POWERPC_REGS
 #undef GPR
 };
 
-static RegisterInfo
-g_register_infos_powerpc32[] =
-{
+static RegisterInfo g_register_infos_powerpc32[] = {
 #define GPR GPR32
     POWERPC_REGS
 #undef GPR
 };
 
-static RegisterInfo
-g_register_infos_powerpc64_32[] =
-{
+static RegisterInfo g_register_infos_powerpc64_32[] = {
 #define GPR GPR64
 #undef GPR_SIZE
-#define GPR_SIZE(reg)   (sizeof(uint32_t))
+#define GPR_SIZE(reg) (sizeof(uint32_t))
 #undef GPR_OFFSET
-#define GPR_OFFSET(regname)                                                 \
-    (offsetof(GPR, regname) + (sizeof(((GPR *)NULL)->regname) - GPR_SIZE(reg)))
+#define GPR_OFFSET(regname)                                                    \
+  (offsetof(GPR, regname) + (sizeof(((GPR *)NULL)->regname) - GPR_SIZE(reg)))
     POWERPC_REGS
 #undef GPR
 };
 
-static_assert((sizeof(g_register_infos_powerpc32) / sizeof(g_register_infos_powerpc32[0])) == k_num_registers_powerpc,
-    "g_register_infos_powerpc32 has wrong number of register infos");
-static_assert((sizeof(g_register_infos_powerpc64) / sizeof(g_register_infos_powerpc64[0])) == k_num_registers_powerpc,
-    "g_register_infos_powerpc64 has wrong number of register infos");
-static_assert(sizeof(g_register_infos_powerpc64_32) == sizeof(g_register_infos_powerpc64),
-    "g_register_infos_powerpc64_32 doesn't match size of g_register_infos_powerpc64");
+static_assert((sizeof(g_register_infos_powerpc32) /
+               sizeof(g_register_infos_powerpc32[0])) ==
+                  k_num_registers_powerpc,
+              "g_register_infos_powerpc32 has wrong number of register infos");
+static_assert((sizeof(g_register_infos_powerpc64) /
+               sizeof(g_register_infos_powerpc64[0])) ==
+                  k_num_registers_powerpc,
+              "g_register_infos_powerpc64 has wrong number of register infos");
+static_assert(sizeof(g_register_infos_powerpc64_32) ==
+                  sizeof(g_register_infos_powerpc64),
+              "g_register_infos_powerpc64_32 doesn't match size of "
+              "g_register_infos_powerpc64");
 
 #undef DEFINE_FPR
 #undef DEFINE_GPR
@@ -181,4 +227,3 @@ static_assert(sizeof(g_register_infos_powerpc64_32) == sizeof(g_register_infos_p
 #endif // DECLARE_REGISTER_INFOS_POWERPC_STRUCT
 
 #undef GPR_OFFSET
-
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_s390x.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_s390x.h
index 0710174..0bbf4224 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_s390x.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_s390x.h
@@ -27,36 +27,39 @@
 
 // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
 
-#define DEFINE_GPR(name, size, offset, alt, generic)                                                                   \
-    {                                                                                                                  \
-        #name, alt, size, offset, eEncodingUint, eFormatHex,                                                           \
-        { dwarf_##name##_s390x, dwarf_##name##_s390x, generic, LLDB_INVALID_REGNUM, lldb_##name##_s390x },             \
-        NULL, NULL, NULL, 0                                                                                            \
-    }
-
-#define DEFINE_GPR_NODWARF(name, size, offset, alt, generic)                                                           \
-    {                                                                                                                  \
-        #name, alt, size, offset, eEncodingUint, eFormatHex,                                                           \
-        { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, generic, LLDB_INVALID_REGNUM, lldb_##name##_s390x },               \
-        NULL, NULL, NULL, 0                                                                                            \
-    }
-
-#define DEFINE_FPR(name, size, offset)                                                                                 \
-    {                                                                                                                  \
-        #name, NULL, size, offset, eEncodingUint, eFormatHex,                                                          \
-        { dwarf_##name##_s390x, dwarf_##name##_s390x, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \
-        NULL, NULL, NULL, 0                                                                                            \
-    }
-
-#define DEFINE_FPR_NODWARF(name, size, offset)                                                                         \
-    {                                                                                                                  \
-        #name, NULL, size, offset, eEncodingUint, eFormatHex,                                                          \
-        { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##name##_s390x },   \
-        NULL, NULL, NULL, 0                                                                                            \
-    }
-
-static RegisterInfo g_register_infos_s390x[] =
-{
+#define DEFINE_GPR(name, size, offset, alt, generic)                           \
+  {                                                                            \
+    #name, alt, size, offset, eEncodingUint, eFormatHex,                       \
+        {dwarf_##name##_s390x, dwarf_##name##_s390x, generic,                  \
+         LLDB_INVALID_REGNUM, lldb_##name##_s390x },                           \
+         NULL, NULL, NULL, 0                                                   \
+  }
+
+#define DEFINE_GPR_NODWARF(name, size, offset, alt, generic)                   \
+  {                                                                            \
+    #name, alt, size, offset, eEncodingUint, eFormatHex,                       \
+        {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, generic,                    \
+         LLDB_INVALID_REGNUM, lldb_##name##_s390x },                           \
+         NULL, NULL, NULL, 0                                                   \
+  }
+
+#define DEFINE_FPR(name, size, offset)                                         \
+  {                                                                            \
+    #name, NULL, size, offset, eEncodingUint, eFormatHex,                      \
+        {dwarf_##name##_s390x, dwarf_##name##_s390x, LLDB_INVALID_REGNUM,      \
+         LLDB_INVALID_REGNUM, lldb_##name##_s390x },                           \
+         NULL, NULL, NULL, 0                                                   \
+  }
+
+#define DEFINE_FPR_NODWARF(name, size, offset)                                 \
+  {                                                                            \
+    #name, NULL, size, offset, eEncodingUint, eFormatHex,                      \
+        {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        \
+         LLDB_INVALID_REGNUM, lldb_##name##_s390x },                           \
+         NULL, NULL, NULL, 0                                                   \
+  }
+
+static RegisterInfo g_register_infos_s390x[] = {
     // General purpose registers.
     DEFINE_GPR(r0, 8, GPR_OFFSET(0), nullptr, LLDB_INVALID_REGNUM),
     DEFINE_GPR(r1, 8, GPR_OFFSET(1), nullptr, LLDB_INVALID_REGNUM),
@@ -94,31 +97,25 @@ static RegisterInfo g_register_infos_s390x[] =
     DEFINE_GPR(pswa, 8, 8, "pc", LLDB_REGNUM_GENERIC_PC),
 
     // Floating point registers.
-    DEFINE_FPR(f0, 8, FPR_OFFSET(0)),
-    DEFINE_FPR(f1, 8, FPR_OFFSET(1)),
-    DEFINE_FPR(f2, 8, FPR_OFFSET(2)),
-    DEFINE_FPR(f3, 8, FPR_OFFSET(3)),
-    DEFINE_FPR(f4, 8, FPR_OFFSET(4)),
-    DEFINE_FPR(f5, 8, FPR_OFFSET(5)),
-    DEFINE_FPR(f6, 8, FPR_OFFSET(6)),
-    DEFINE_FPR(f7, 8, FPR_OFFSET(7)),
-    DEFINE_FPR(f8, 8, FPR_OFFSET(8)),
-    DEFINE_FPR(f9, 8, FPR_OFFSET(9)),
-    DEFINE_FPR(f10, 8, FPR_OFFSET(10)),
-    DEFINE_FPR(f11, 8, FPR_OFFSET(11)),
-    DEFINE_FPR(f12, 8, FPR_OFFSET(12)),
-    DEFINE_FPR(f13, 8, FPR_OFFSET(13)),
-    DEFINE_FPR(f14, 8, FPR_OFFSET(14)),
-    DEFINE_FPR(f15, 8, FPR_OFFSET(15)),
+    DEFINE_FPR(f0, 8, FPR_OFFSET(0)), DEFINE_FPR(f1, 8, FPR_OFFSET(1)),
+    DEFINE_FPR(f2, 8, FPR_OFFSET(2)), DEFINE_FPR(f3, 8, FPR_OFFSET(3)),
+    DEFINE_FPR(f4, 8, FPR_OFFSET(4)), DEFINE_FPR(f5, 8, FPR_OFFSET(5)),
+    DEFINE_FPR(f6, 8, FPR_OFFSET(6)), DEFINE_FPR(f7, 8, FPR_OFFSET(7)),
+    DEFINE_FPR(f8, 8, FPR_OFFSET(8)), DEFINE_FPR(f9, 8, FPR_OFFSET(9)),
+    DEFINE_FPR(f10, 8, FPR_OFFSET(10)), DEFINE_FPR(f11, 8, FPR_OFFSET(11)),
+    DEFINE_FPR(f12, 8, FPR_OFFSET(12)), DEFINE_FPR(f13, 8, FPR_OFFSET(13)),
+    DEFINE_FPR(f14, 8, FPR_OFFSET(14)), DEFINE_FPR(f15, 8, FPR_OFFSET(15)),
     DEFINE_FPR_NODWARF(fpc, 4, 0),
 
     // Linux operating-specific info.
-    DEFINE_GPR_NODWARF(orig_r2, 8, 16 + 16 * 8 + 16 * 4, nullptr, LLDB_INVALID_REGNUM),
+    DEFINE_GPR_NODWARF(orig_r2, 8, 16 + 16 * 8 + 16 * 4, nullptr,
+                       LLDB_INVALID_REGNUM),
     DEFINE_GPR_NODWARF(last_break, 8, 0, nullptr, LLDB_INVALID_REGNUM),
     DEFINE_GPR_NODWARF(system_call, 4, 0, nullptr, LLDB_INVALID_REGNUM),
 };
 
-static_assert((sizeof(g_register_infos_s390x) / sizeof(g_register_infos_s390x[0])) == k_num_registers_s390x,
+static_assert((sizeof(g_register_infos_s390x) /
+               sizeof(g_register_infos_s390x[0])) == k_num_registers_s390x,
               "g_register_infos_s390x has wrong number of register infos");
 
 #undef GPR_OFFSET
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_x86_64.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_x86_64.h
index aeb6672..2ba8059 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_x86_64.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_x86_64.h
@@ -7,40 +7,45 @@
 //
 //===----------------------------------------------------------------------===//
 
-// C Includes
-#include <stddef.h>
-
-// C++ Includes
-// Other libraries and framework includes
 #include "llvm/Support/Compiler.h"
+#include <cstddef>
+#include <cstdint>
 
 // Project includes
 
 // Computes the offset of the given GPR in the user data area.
-#define GPR_OFFSET(regname) \
-    (LLVM_EXTENSION offsetof(GPR, regname))
+#define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname))
 
 // Computes the offset of the given FPR in the extended data area.
-#define FPR_OFFSET(regname) \
-    (LLVM_EXTENSION offsetof(UserArea, fpr) + \
-     LLVM_EXTENSION offsetof(FPR, xstate) + \
-     LLVM_EXTENSION offsetof(FXSAVE, regname))
+#define FPR_OFFSET(regname)                                                    \
+  (LLVM_EXTENSION offsetof(UserArea, fpr) +                                    \
+   LLVM_EXTENSION offsetof(FPR, xstate) +                                      \
+   LLVM_EXTENSION offsetof(FXSAVE, regname))
 
 // Computes the offset of the YMM register assembled from register halves.
 // Based on DNBArchImplX86_64.cpp from debugserver
-#define YMM_OFFSET(reg_index) \
+#define YMM_OFFSET(reg_index)                                                  \
+  (LLVM_EXTENSION offsetof(UserArea, fpr) +                                    \
+   LLVM_EXTENSION offsetof(FPR, xstate) +                                      \
+   LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + (32 * reg_index))
+
+#define BNDR_OFFSET(reg_index) \
+    (LLVM_EXTENSION offsetof(UserArea, fpr) + \
+     LLVM_EXTENSION offsetof(FPR, xstate) + \
+     LLVM_EXTENSION offsetof(XSAVE, mpxr[reg_index]))
+
+#define BNDC_OFFSET(reg_index) \
     (LLVM_EXTENSION offsetof(UserArea, fpr) + \
      LLVM_EXTENSION offsetof(FPR, xstate) + \
-     LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + \
-     (32 * reg_index))
+     LLVM_EXTENSION offsetof(XSAVE, mpxc[reg_index]))
 
 #ifdef DECLARE_REGISTER_INFOS_X86_64_STRUCT
 
 // Number of bytes needed to represent a FPR.
-#define FPR_SIZE(reg) sizeof(((FXSAVE*)NULL)->reg)
+#define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg)
 
 // Number of bytes needed to represent the i'th FP register.
-#define FP_SIZE sizeof(((MMSReg*)NULL)->bytes)
+#define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes)
 
 // Number of bytes needed to represent an XMM register.
 #define XMM_SIZE sizeof(XMMReg)
@@ -48,222 +53,260 @@
 // Number of bytes needed to represent a YMM register.
 #define YMM_SIZE sizeof(YMMReg)
 
-#define DR_SIZE sizeof(((DBG*)NULL)->dr[0])
+// Number of bytes needed to represent MPX registers.
+#define BNDR_SIZE sizeof(MPXReg)
+#define BNDC_SIZE sizeof(MPXCsr)
+
+#define DR_SIZE sizeof(((DBG *)nullptr)->dr[0])
 
 // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
 
 // Note that the size and offset will be updated by platform-specific classes.
-#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)    \
-    { #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, \
-      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##reg##_x86_64 }, NULL, NULL, NULL, 0}
-
-#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4)    \
-    { #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint,   \
-      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_x86_64 }, NULL, NULL, NULL, 0}
-
-#define DEFINE_FP_ST(reg, i)                                       \
-    { #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]),   \
-      eEncodingVector, eFormatVectorOfUInt8,                       \
-      { dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \
-      NULL, NULL, NULL, 0}
-
-#define DEFINE_FP_MM(reg, i)                                                \
-    { #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]),   \
-      eEncodingUint, eFormatHex,                                            \
-      { dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_mm##i##_x86_64 }, \
-      NULL, NULL, NULL, 0}
-
-#define DEFINE_XMM(reg, i)                                         \
-    { #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]),   \
-      eEncodingVector, eFormatVectorOfUInt8,                       \
-      { dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_x86_64}, \
-      NULL, NULL, NULL, 0}
-
-#define DEFINE_YMM(reg, i)                                                          \
-    { #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(i),                         \
-      eEncodingVector, eFormatVectorOfUInt8,                                        \
-      { dwarf_##reg##i##h_x86_64, dwarf_##reg##i##h_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_x86_64 }, \
-      NULL, NULL, NULL, 0}
-
-#define DEFINE_DR(reg, i)                                               \
-    { #reg#i, NULL, DR_SIZE, DR_OFFSET(i), eEncodingUint, eFormatHex,   \
-      { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,  \
-      LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL, NULL, 0}
-
-#define DEFINE_GPR_PSEUDO_32(reg32, reg64)          \
-    { #reg32, NULL, 4, GPR_OFFSET(reg64), eEncodingUint,   \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg32##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64, NULL, 0}
-#define DEFINE_GPR_PSEUDO_16(reg16, reg64)          \
-    { #reg16, NULL, 2, GPR_OFFSET(reg64), eEncodingUint,   \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg16##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64, NULL, 0}
-#define DEFINE_GPR_PSEUDO_8H(reg8, reg64)           \
-    { #reg8, NULL, 1, GPR_OFFSET(reg64)+1, eEncodingUint,  \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64, NULL, 0}
-#define DEFINE_GPR_PSEUDO_8L(reg8, reg64)           \
-    { #reg8, NULL, 1, GPR_OFFSET(reg64), eEncodingUint,    \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64, NULL, 0}
-
-static RegisterInfo
-g_register_infos_x86_64[] =
-{
-    // General purpose registers.           EH_Frame,                   DWARF,                Generic,                Process Plugin
-    DEFINE_GPR(rax,    nullptr,     dwarf_rax_x86_64,        dwarf_rax_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rbx,    nullptr,     dwarf_rbx_x86_64,        dwarf_rbx_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rcx,    "arg4",      dwarf_rcx_x86_64,        dwarf_rcx_x86_64,    LLDB_REGNUM_GENERIC_ARG4,  LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rdx,    "arg3",      dwarf_rdx_x86_64,        dwarf_rdx_x86_64,    LLDB_REGNUM_GENERIC_ARG3,  LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rdi,    "arg1",      dwarf_rdi_x86_64,        dwarf_rdi_x86_64,    LLDB_REGNUM_GENERIC_ARG1,  LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rsi,    "arg2",      dwarf_rsi_x86_64,        dwarf_rsi_x86_64,    LLDB_REGNUM_GENERIC_ARG2,  LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rbp,    "fp",        dwarf_rbp_x86_64,        dwarf_rbp_x86_64,    LLDB_REGNUM_GENERIC_FP,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rsp,    "sp",        dwarf_rsp_x86_64,        dwarf_rsp_x86_64,    LLDB_REGNUM_GENERIC_SP,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r8,     "arg5",      dwarf_r8_x86_64,         dwarf_r8_x86_64,     LLDB_REGNUM_GENERIC_ARG5,  LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r9,     "arg6",      dwarf_r9_x86_64,         dwarf_r9_x86_64,     LLDB_REGNUM_GENERIC_ARG6,  LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r10,    nullptr,     dwarf_r10_x86_64,        dwarf_r10_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r11,    nullptr,     dwarf_r11_x86_64,        dwarf_r11_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r12,    nullptr,     dwarf_r12_x86_64,        dwarf_r12_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r13,    nullptr,     dwarf_r13_x86_64,        dwarf_r13_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r14,    nullptr,     dwarf_r14_x86_64,        dwarf_r14_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r15,    nullptr,     dwarf_r15_x86_64,        dwarf_r15_x86_64,    LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rip,    "pc",        dwarf_rip_x86_64,        dwarf_rip_x86_64,    LLDB_REGNUM_GENERIC_PC,    LLDB_INVALID_REGNUM),
-    DEFINE_GPR(rflags, "flags",     dwarf_rflags_x86_64,     dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
-    DEFINE_GPR(cs,     nullptr,     dwarf_cs_x86_64,         dwarf_cs_x86_64,     LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(fs,     nullptr,     dwarf_fs_x86_64,         dwarf_fs_x86_64,     LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(gs,     nullptr,     dwarf_gs_x86_64,         dwarf_gs_x86_64,     LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(ss,     nullptr,     dwarf_ss_x86_64,         dwarf_ss_x86_64,     LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(ds,     nullptr,     dwarf_ds_x86_64,         dwarf_ds_x86_64,     LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-    DEFINE_GPR(es,     nullptr,     dwarf_es_x86_64,         dwarf_es_x86_64,     LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM),
-
-    DEFINE_GPR_PSEUDO_32(eax, rax),
-    DEFINE_GPR_PSEUDO_32(ebx, rbx),
-    DEFINE_GPR_PSEUDO_32(ecx, rcx),
-    DEFINE_GPR_PSEUDO_32(edx, rdx),
-    DEFINE_GPR_PSEUDO_32(edi, rdi),
-    DEFINE_GPR_PSEUDO_32(esi, rsi),
-    DEFINE_GPR_PSEUDO_32(ebp, rbp),
-    DEFINE_GPR_PSEUDO_32(esp, rsp),
-    DEFINE_GPR_PSEUDO_32(r8d,  r8),
-    DEFINE_GPR_PSEUDO_32(r9d,  r9),
-    DEFINE_GPR_PSEUDO_32(r10d, r10),
-    DEFINE_GPR_PSEUDO_32(r11d, r11),
-    DEFINE_GPR_PSEUDO_32(r12d, r12),
-    DEFINE_GPR_PSEUDO_32(r13d, r13),
-    DEFINE_GPR_PSEUDO_32(r14d, r14),
-    DEFINE_GPR_PSEUDO_32(r15d, r15),
-    DEFINE_GPR_PSEUDO_16(ax,   rax),
-    DEFINE_GPR_PSEUDO_16(bx,   rbx),
-    DEFINE_GPR_PSEUDO_16(cx,   rcx),
-    DEFINE_GPR_PSEUDO_16(dx,   rdx),
-    DEFINE_GPR_PSEUDO_16(di,   rdi),
-    DEFINE_GPR_PSEUDO_16(si,   rsi),
-    DEFINE_GPR_PSEUDO_16(bp,   rbp),
-    DEFINE_GPR_PSEUDO_16(sp,   rsp),
-    DEFINE_GPR_PSEUDO_16(r8w,  r8),
-    DEFINE_GPR_PSEUDO_16(r9w,  r9),
-    DEFINE_GPR_PSEUDO_16(r10w, r10),
-    DEFINE_GPR_PSEUDO_16(r11w, r11),
-    DEFINE_GPR_PSEUDO_16(r12w, r12),
-    DEFINE_GPR_PSEUDO_16(r13w, r13),
-    DEFINE_GPR_PSEUDO_16(r14w, r14),
-    DEFINE_GPR_PSEUDO_16(r15w, r15),
-    DEFINE_GPR_PSEUDO_8H(ah,   rax),
-    DEFINE_GPR_PSEUDO_8H(bh,   rbx),
-    DEFINE_GPR_PSEUDO_8H(ch,   rcx),
-    DEFINE_GPR_PSEUDO_8H(dh,   rdx),
-    DEFINE_GPR_PSEUDO_8L(al,   rax),
-    DEFINE_GPR_PSEUDO_8L(bl,   rbx),
-    DEFINE_GPR_PSEUDO_8L(cl,   rcx),
-    DEFINE_GPR_PSEUDO_8L(dl,   rdx),
-    DEFINE_GPR_PSEUDO_8L(dil,  rdi),
-    DEFINE_GPR_PSEUDO_8L(sil,  rsi),
-    DEFINE_GPR_PSEUDO_8L(bpl,  rbp),
-    DEFINE_GPR_PSEUDO_8L(spl,  rsp),
-    DEFINE_GPR_PSEUDO_8L(r8l,  r8),
-    DEFINE_GPR_PSEUDO_8L(r9l,  r9),
-    DEFINE_GPR_PSEUDO_8L(r10l, r10),
-    DEFINE_GPR_PSEUDO_8L(r11l, r11),
-    DEFINE_GPR_PSEUDO_8L(r12l, r12),
-    DEFINE_GPR_PSEUDO_8L(r13l, r13),
-    DEFINE_GPR_PSEUDO_8L(r14l, r14),
-    DEFINE_GPR_PSEUDO_8L(r15l, r15),
-
-    // i387 Floating point registers. EH_frame,                                  DWARF,               Generic,          Process Plugin
-    DEFINE_FPR(fctrl,     fctrl,              dwarf_fctrl_x86_64,     dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fstat,     fstat,              dwarf_fstat_x86_64,     dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(ftag,      ftag,           LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fop,       fop,            LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fiseg,     ptr.i386_.fiseg, LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fioff,     ptr.i386_.fioff, LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(foseg,     ptr.i386_.foseg, LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(fooff,     ptr.i386_.fooff, LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(mxcsr,     mxcsr,              dwarf_mxcsr_x86_64,     dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
-    DEFINE_FPR(mxcsrmask, mxcsrmask,      LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM,    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)                       \
+  {                                                                            \
+    #reg, alt, sizeof(((GPR *)nullptr)->reg),                                  \
+                      GPR_OFFSET(reg), eEncodingUint, eFormatHex,              \
+                                 {kind1, kind2, kind3, kind4,                  \
+                                  lldb_##reg##_x86_64 },                       \
+                                  nullptr, nullptr, nullptr, 0                 \
+  }
+
+#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4)                      \
+  {                                                                            \
+    #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
+                                           {kind1, kind2, kind3, kind4,        \
+                                            lldb_##name##_x86_64 },            \
+                                            nullptr, nullptr, nullptr, 0       \
+  }
+
+#define DEFINE_FP_ST(reg, i)                                                   \
+  {                                                                            \
+    #reg #i, nullptr, FP_SIZE,                                                 \
+        LLVM_EXTENSION FPR_OFFSET(                                             \
+            stmm[i]), eEncodingVector, eFormatVectorOfUInt8,                   \
+            {dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM,  \
+             LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 },                       \
+             nullptr, nullptr, nullptr, 0                                      \
+  }
+
+#define DEFINE_FP_MM(reg, i)                                                   \
+  {                                                                            \
+    #reg #i, nullptr, sizeof(uint64_t),                                        \
+                          LLVM_EXTENSION FPR_OFFSET(                           \
+                              stmm[i]), eEncodingUint, eFormatHex,             \
+                              {dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64,     \
+                               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,       \
+                               lldb_mm##i##_x86_64 },                          \
+                               nullptr, nullptr, nullptr, 0                    \
+  }
+
+#define DEFINE_XMM(reg, i)                                                     \
+  {                                                                            \
+    #reg #i, nullptr, XMM_SIZE,                                                \
+        LLVM_EXTENSION FPR_OFFSET(                                             \
+            reg[i]), eEncodingVector, eFormatVectorOfUInt8,                    \
+            {dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64,                 \
+             LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                         \
+             lldb_##reg##i##_x86_64 },                                         \
+             nullptr, nullptr, nullptr, 0                                      \
+  }
+
+#define DEFINE_YMM(reg, i)                                                     \
+  {                                                                            \
+    #reg #i, nullptr, YMM_SIZE,                                                \
+        LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8,   \
+                                  {dwarf_##reg##i##h_x86_64,                   \
+                                   dwarf_##reg##i##h_x86_64,                   \
+                                   LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,   \
+                                   lldb_##reg##i##_x86_64 },                   \
+                                   nullptr, nullptr, nullptr, 0                \
+  }
+
+#define DEFINE_BNDR(reg, i)                                                    \
+  {                                                                            \
+    #reg #i, nullptr, BNDR_SIZE,                                               \
+        LLVM_EXTENSION BNDR_OFFSET(i), eEncodingVector, eFormatVectorOfUInt64, \
+                                   {dwarf_##reg##i##_x86_64,                   \
+                                    dwarf_##reg##i##_x86_64,                   \
+                                    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,  \
+                                    lldb_##reg##i##_x86_64 },                  \
+                                    nullptr, nullptr, nullptr, 0               \
+  }
+
+#define DEFINE_BNDC(name, i)                                                   \
+  {                                                                            \
+    #name, nullptr, BNDC_SIZE,                                                 \
+        LLVM_EXTENSION BNDC_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8,  \
+        {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        \
+         LLDB_INVALID_REGNUM, lldb_##name##_x86_64 },                          \
+         nullptr, nullptr, nullptr, 0                                          \
+  }
+
+#define DEFINE_DR(reg, i)                                                      \
+  {                                                                            \
+    #reg #i, nullptr, DR_SIZE,                                                 \
+        DR_OFFSET(i), eEncodingUint, eFormatHex,                               \
+                  {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                   \
+                   LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                   \
+                   LLDB_INVALID_REGNUM },                                      \
+                   nullptr, nullptr, nullptr, 0                                \
+  }
+
+#define DEFINE_GPR_PSEUDO_32(reg32, reg64)                                     \
+  {                                                                            \
+    #reg32, nullptr, 4,                                                        \
+        GPR_OFFSET(reg64), eEncodingUint, eFormatHex,                          \
+                   {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    lldb_##reg32##_x86_64 },                                   \
+                    RegisterContextPOSIX_x86::g_contained_##reg64,             \
+                    RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
+  }
+
+#define DEFINE_GPR_PSEUDO_16(reg16, reg64)                                     \
+  {                                                                            \
+    #reg16, nullptr, 2,                                                        \
+        GPR_OFFSET(reg64), eEncodingUint, eFormatHex,                          \
+                   {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    lldb_##reg16##_x86_64 },                                   \
+                    RegisterContextPOSIX_x86::g_contained_##reg64,             \
+                    RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
+  }
+
+#define DEFINE_GPR_PSEUDO_8H(reg8, reg64)                                      \
+  {                                                                            \
+    #reg8, nullptr, 1,                                                         \
+        GPR_OFFSET(reg64) + 1, eEncodingUint, eFormatHex,                      \
+                   {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    lldb_##reg8##_x86_64 },                                    \
+                    RegisterContextPOSIX_x86::g_contained_##reg64,             \
+                    RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
+  }
+
+#define DEFINE_GPR_PSEUDO_8L(reg8, reg64)                                      \
+  {                                                                            \
+    #reg8, nullptr, 1,                                                         \
+        GPR_OFFSET(reg64), eEncodingUint, eFormatHex,                          \
+                   {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,                  \
+                    lldb_##reg8##_x86_64 },                                    \
+                    RegisterContextPOSIX_x86::g_contained_##reg64,             \
+                    RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
+  }
+
+// clang-format off
+static RegisterInfo g_register_infos_x86_64[] = {
+// General purpose registers     EH_Frame              DWARF                 Generic                     Process Plugin
+//  ===========================  ==================    ================      =========================   ====================
+    DEFINE_GPR(rax,    nullptr,  dwarf_rax_x86_64,     dwarf_rax_x86_64,     LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rbx,    nullptr,  dwarf_rbx_x86_64,     dwarf_rbx_x86_64,     LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rcx,    "arg4",   dwarf_rcx_x86_64,     dwarf_rcx_x86_64,     LLDB_REGNUM_GENERIC_ARG4,   LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rdx,    "arg3",   dwarf_rdx_x86_64,     dwarf_rdx_x86_64,     LLDB_REGNUM_GENERIC_ARG3,   LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rdi,    "arg1",   dwarf_rdi_x86_64,     dwarf_rdi_x86_64,     LLDB_REGNUM_GENERIC_ARG1,   LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rsi,    "arg2",   dwarf_rsi_x86_64,     dwarf_rsi_x86_64,     LLDB_REGNUM_GENERIC_ARG2,   LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rbp,    "fp",     dwarf_rbp_x86_64,     dwarf_rbp_x86_64,     LLDB_REGNUM_GENERIC_FP,     LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rsp,    "sp",     dwarf_rsp_x86_64,     dwarf_rsp_x86_64,     LLDB_REGNUM_GENERIC_SP,     LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r8,     "arg5",   dwarf_r8_x86_64,      dwarf_r8_x86_64,      LLDB_REGNUM_GENERIC_ARG5,   LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r9,     "arg6",   dwarf_r9_x86_64,      dwarf_r9_x86_64,      LLDB_REGNUM_GENERIC_ARG6,   LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r10,    nullptr,  dwarf_r10_x86_64,     dwarf_r10_x86_64,     LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r11,    nullptr,  dwarf_r11_x86_64,     dwarf_r11_x86_64,     LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r12,    nullptr,  dwarf_r12_x86_64,     dwarf_r12_x86_64,     LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r13,    nullptr,  dwarf_r13_x86_64,     dwarf_r13_x86_64,     LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r14,    nullptr,  dwarf_r14_x86_64,     dwarf_r14_x86_64,     LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(r15,    nullptr,  dwarf_r15_x86_64,     dwarf_r15_x86_64,     LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rip,    "pc",     dwarf_rip_x86_64,     dwarf_rip_x86_64,     LLDB_REGNUM_GENERIC_PC,     LLDB_INVALID_REGNUM),
+    DEFINE_GPR(rflags, "flags",  dwarf_rflags_x86_64,  dwarf_rflags_x86_64,  LLDB_REGNUM_GENERIC_FLAGS,  LLDB_INVALID_REGNUM),
+    DEFINE_GPR(cs,     nullptr,  dwarf_cs_x86_64,      dwarf_cs_x86_64,      LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(fs,     nullptr,  dwarf_fs_x86_64,      dwarf_fs_x86_64,      LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(gs,     nullptr,  dwarf_gs_x86_64,      dwarf_gs_x86_64,      LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(ss,     nullptr,  dwarf_ss_x86_64,      dwarf_ss_x86_64,      LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(ds,     nullptr,  dwarf_ds_x86_64,      dwarf_ds_x86_64,      LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+    DEFINE_GPR(es,     nullptr,  dwarf_es_x86_64,      dwarf_es_x86_64,      LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM),
+
+    DEFINE_GPR_PSEUDO_32(eax, rax), DEFINE_GPR_PSEUDO_32(ebx, rbx),
+    DEFINE_GPR_PSEUDO_32(ecx, rcx), DEFINE_GPR_PSEUDO_32(edx, rdx),
+    DEFINE_GPR_PSEUDO_32(edi, rdi), DEFINE_GPR_PSEUDO_32(esi, rsi),
+    DEFINE_GPR_PSEUDO_32(ebp, rbp), DEFINE_GPR_PSEUDO_32(esp, rsp),
+    DEFINE_GPR_PSEUDO_32(r8d, r8), DEFINE_GPR_PSEUDO_32(r9d, r9),
+    DEFINE_GPR_PSEUDO_32(r10d, r10), DEFINE_GPR_PSEUDO_32(r11d, r11),
+    DEFINE_GPR_PSEUDO_32(r12d, r12), DEFINE_GPR_PSEUDO_32(r13d, r13),
+    DEFINE_GPR_PSEUDO_32(r14d, r14), DEFINE_GPR_PSEUDO_32(r15d, r15),
+    DEFINE_GPR_PSEUDO_16(ax, rax), DEFINE_GPR_PSEUDO_16(bx, rbx),
+    DEFINE_GPR_PSEUDO_16(cx, rcx), DEFINE_GPR_PSEUDO_16(dx, rdx),
+    DEFINE_GPR_PSEUDO_16(di, rdi), DEFINE_GPR_PSEUDO_16(si, rsi),
+    DEFINE_GPR_PSEUDO_16(bp, rbp), DEFINE_GPR_PSEUDO_16(sp, rsp),
+    DEFINE_GPR_PSEUDO_16(r8w, r8), DEFINE_GPR_PSEUDO_16(r9w, r9),
+    DEFINE_GPR_PSEUDO_16(r10w, r10), DEFINE_GPR_PSEUDO_16(r11w, r11),
+    DEFINE_GPR_PSEUDO_16(r12w, r12), DEFINE_GPR_PSEUDO_16(r13w, r13),
+    DEFINE_GPR_PSEUDO_16(r14w, r14), DEFINE_GPR_PSEUDO_16(r15w, r15),
+    DEFINE_GPR_PSEUDO_8H(ah, rax), DEFINE_GPR_PSEUDO_8H(bh, rbx),
+    DEFINE_GPR_PSEUDO_8H(ch, rcx), DEFINE_GPR_PSEUDO_8H(dh, rdx),
+    DEFINE_GPR_PSEUDO_8L(al, rax), DEFINE_GPR_PSEUDO_8L(bl, rbx),
+    DEFINE_GPR_PSEUDO_8L(cl, rcx), DEFINE_GPR_PSEUDO_8L(dl, rdx),
+    DEFINE_GPR_PSEUDO_8L(dil, rdi), DEFINE_GPR_PSEUDO_8L(sil, rsi),
+    DEFINE_GPR_PSEUDO_8L(bpl, rbp), DEFINE_GPR_PSEUDO_8L(spl, rsp),
+    DEFINE_GPR_PSEUDO_8L(r8l, r8), DEFINE_GPR_PSEUDO_8L(r9l, r9),
+    DEFINE_GPR_PSEUDO_8L(r10l, r10), DEFINE_GPR_PSEUDO_8L(r11l, r11),
+    DEFINE_GPR_PSEUDO_8L(r12l, r12), DEFINE_GPR_PSEUDO_8L(r13l, r13),
+    DEFINE_GPR_PSEUDO_8L(r14l, r14), DEFINE_GPR_PSEUDO_8L(r15l, r15),
+
+//  i387 Floating point registers.         EH_frame             DWARF                Generic              Process Plugin
+//  ====================================== ===============      ==================   ===================  ====================
+    DEFINE_FPR(fctrl,     fctrl,           dwarf_fctrl_x86_64,  dwarf_fctrl_x86_64,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fstat,     fstat,           dwarf_fstat_x86_64,  dwarf_fstat_x86_64,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(ftag,      ftag,            LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fop,       fop,             LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fiseg,     ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fioff,     ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(foseg,     ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(fooff,     ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(mxcsr,     mxcsr,           dwarf_mxcsr_x86_64,  dwarf_mxcsr_x86_64,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
+    DEFINE_FPR(mxcsrmask, mxcsrmask,       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
 
     // FP registers.
-    DEFINE_FP_ST(st, 0),
-    DEFINE_FP_ST(st, 1),
-    DEFINE_FP_ST(st, 2),
-    DEFINE_FP_ST(st, 3),
-    DEFINE_FP_ST(st, 4),
-    DEFINE_FP_ST(st, 5),
-    DEFINE_FP_ST(st, 6),
-    DEFINE_FP_ST(st, 7),
-    DEFINE_FP_MM(mm, 0),
-    DEFINE_FP_MM(mm, 1),
-    DEFINE_FP_MM(mm, 2),
-    DEFINE_FP_MM(mm, 3),
-    DEFINE_FP_MM(mm, 4),
-    DEFINE_FP_MM(mm, 5),
-    DEFINE_FP_MM(mm, 6),
+    DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2),
+    DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5),
+    DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7), DEFINE_FP_MM(mm, 0),
+    DEFINE_FP_MM(mm, 1), DEFINE_FP_MM(mm, 2), DEFINE_FP_MM(mm, 3),
+    DEFINE_FP_MM(mm, 4), DEFINE_FP_MM(mm, 5), DEFINE_FP_MM(mm, 6),
     DEFINE_FP_MM(mm, 7),
 
     // XMM registers
-    DEFINE_XMM(xmm, 0),
-    DEFINE_XMM(xmm, 1),
-    DEFINE_XMM(xmm, 2),
-    DEFINE_XMM(xmm, 3),
-    DEFINE_XMM(xmm, 4),
-    DEFINE_XMM(xmm, 5),
-    DEFINE_XMM(xmm, 6),
-    DEFINE_XMM(xmm, 7),
-    DEFINE_XMM(xmm, 8),
-    DEFINE_XMM(xmm, 9),
-    DEFINE_XMM(xmm, 10),
-    DEFINE_XMM(xmm, 11),
-    DEFINE_XMM(xmm, 12),
-    DEFINE_XMM(xmm, 13),
-    DEFINE_XMM(xmm, 14),
+    DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2),
+    DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5),
+    DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7), DEFINE_XMM(xmm, 8),
+    DEFINE_XMM(xmm, 9), DEFINE_XMM(xmm, 10), DEFINE_XMM(xmm, 11),
+    DEFINE_XMM(xmm, 12), DEFINE_XMM(xmm, 13), DEFINE_XMM(xmm, 14),
     DEFINE_XMM(xmm, 15),
 
     // Copy of YMM registers assembled from xmm and ymmh
-    DEFINE_YMM(ymm, 0),
-    DEFINE_YMM(ymm, 1),
-    DEFINE_YMM(ymm, 2),
-    DEFINE_YMM(ymm, 3),
-    DEFINE_YMM(ymm, 4),
-    DEFINE_YMM(ymm, 5),
-    DEFINE_YMM(ymm, 6),
-    DEFINE_YMM(ymm, 7),
-    DEFINE_YMM(ymm, 8),
-    DEFINE_YMM(ymm, 9),
-    DEFINE_YMM(ymm, 10),
-    DEFINE_YMM(ymm, 11),
-    DEFINE_YMM(ymm, 12),
-    DEFINE_YMM(ymm, 13),
-    DEFINE_YMM(ymm, 14),
+    DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2),
+    DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5),
+    DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7), DEFINE_YMM(ymm, 8),
+    DEFINE_YMM(ymm, 9), DEFINE_YMM(ymm, 10), DEFINE_YMM(ymm, 11),
+    DEFINE_YMM(ymm, 12), DEFINE_YMM(ymm, 13), DEFINE_YMM(ymm, 14),
     DEFINE_YMM(ymm, 15),
 
+    // MPX registers
+    DEFINE_BNDR(bnd, 0),
+    DEFINE_BNDR(bnd, 1),
+    DEFINE_BNDR(bnd, 2),
+    DEFINE_BNDR(bnd, 3),
+
+    DEFINE_BNDC(bndcfgu, 0),
+    DEFINE_BNDC(bndstatus, 1),
+
     // Debug registers for lldb internal use
-    DEFINE_DR(dr, 0),
-    DEFINE_DR(dr, 1),
-    DEFINE_DR(dr, 2),
-    DEFINE_DR(dr, 3),
-    DEFINE_DR(dr, 4),
-    DEFINE_DR(dr, 5),
-    DEFINE_DR(dr, 6),
-    DEFINE_DR(dr, 7)
-};
-
-static_assert((sizeof(g_register_infos_x86_64) / sizeof(g_register_infos_x86_64[0])) == k_num_registers_x86_64,
-    "g_register_infos_x86_64 has wrong number of register infos");
+    DEFINE_DR(dr, 0), DEFINE_DR(dr, 1), DEFINE_DR(dr, 2), DEFINE_DR(dr, 3),
+    DEFINE_DR(dr, 4), DEFINE_DR(dr, 5), DEFINE_DR(dr, 6), DEFINE_DR(dr, 7)};
+
+// clang-format on
+
+static_assert((sizeof(g_register_infos_x86_64) /
+               sizeof(g_register_infos_x86_64[0])) == k_num_registers_x86_64,
+              "g_register_infos_x86_64 has wrong number of register infos");
 
 #undef FPR_SIZE
 #undef FP_SIZE
@@ -274,6 +317,8 @@ static_assert((sizeof(g_register_infos_x86_64) / sizeof(g_register_infos_x86_64[
 #undef DEFINE_FP
 #undef DEFINE_XMM
 #undef DEFINE_YMM
+#undef DEFINE_BNDR
+#undef DEFINE_BNDC
 #undef DEFINE_DR
 #undef DEFINE_GPR_PSEUDO_32
 #undef DEFINE_GPR_PSEUDO_16
@@ -284,130 +329,131 @@ static_assert((sizeof(g_register_infos_x86_64) / sizeof(g_register_infos_x86_64[
 
 #ifdef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
 
-#define UPDATE_GPR_INFO(reg, reg64)                                             \
-do {                                                                            \
-    g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64);         \
-} while(false);
-
-#define UPDATE_GPR_INFO_8H(reg, reg64)                                          \
-do {                                                                            \
-    g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64) + 1;     \
-} while(false);
-
-#define UPDATE_FPR_INFO(reg, reg64)                                             \
-do {                                                                            \
-    g_register_infos[lldb_##reg##_i386].byte_offset = FPR_OFFSET(reg64);         \
-} while(false);
-
-#define UPDATE_FP_INFO(reg, i)                                                  \
-do {                                                                            \
-    g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(stmm[i]);    \
-} while(false);
-
-#define UPDATE_XMM_INFO(reg, i)                                                 \
-do {                                                                            \
-    g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(reg[i]);     \
-} while(false);
-
-#define UPDATE_YMM_INFO(reg, i)                                                 \
-do {                                                                            \
-    g_register_infos[lldb_##reg##i##_i386].byte_offset = YMM_OFFSET(i);         \
-} while(false);
-
-#define UPDATE_DR_INFO(reg_index)                                               \
-do {                                                                            \
-    g_register_infos[lldb_dr##reg_index##_i386].byte_offset = DR_OFFSET(reg_index);  \
-} while(false);
-
-    // Update the register offsets
-    UPDATE_GPR_INFO(eax,    rax);
-    UPDATE_GPR_INFO(ebx,    rbx);
-    UPDATE_GPR_INFO(ecx,    rcx);
-    UPDATE_GPR_INFO(edx,    rdx);
-    UPDATE_GPR_INFO(edi,    rdi);
-    UPDATE_GPR_INFO(esi,    rsi);
-    UPDATE_GPR_INFO(ebp,    rbp);
-    UPDATE_GPR_INFO(esp,    rsp);
-    UPDATE_GPR_INFO(eip,    rip);
-    UPDATE_GPR_INFO(eflags, rflags);
-    UPDATE_GPR_INFO(cs,     cs);
-    UPDATE_GPR_INFO(fs,     fs);
-    UPDATE_GPR_INFO(gs,     gs);
-    UPDATE_GPR_INFO(ss,     ss);
-    UPDATE_GPR_INFO(ds,     ds);
-    UPDATE_GPR_INFO(es,     es);
-
-    UPDATE_GPR_INFO(ax,     rax);
-    UPDATE_GPR_INFO(bx,     rbx);
-    UPDATE_GPR_INFO(cx,     rcx);
-    UPDATE_GPR_INFO(dx,     rdx);
-    UPDATE_GPR_INFO(di,     rdi);
-    UPDATE_GPR_INFO(si,     rsi);
-    UPDATE_GPR_INFO(bp,     rbp);
-    UPDATE_GPR_INFO(sp,     rsp);
-    UPDATE_GPR_INFO_8H(ah,  rax);
-    UPDATE_GPR_INFO_8H(bh,  rbx);
-    UPDATE_GPR_INFO_8H(ch,  rcx);
-    UPDATE_GPR_INFO_8H(dh,  rdx);
-    UPDATE_GPR_INFO(al,     rax);
-    UPDATE_GPR_INFO(bl,     rbx);
-    UPDATE_GPR_INFO(cl,     rcx);
-    UPDATE_GPR_INFO(dl,     rdx);
-
-    UPDATE_FPR_INFO(fctrl,     fctrl);
-    UPDATE_FPR_INFO(fstat,     fstat);
-    UPDATE_FPR_INFO(ftag,      ftag);
-    UPDATE_FPR_INFO(fop,       fop);
-    UPDATE_FPR_INFO(fiseg,     ptr.i386_.fiseg);
-    UPDATE_FPR_INFO(fioff,     ptr.i386_.fioff);
-    UPDATE_FPR_INFO(fooff,     ptr.i386_.fooff);
-    UPDATE_FPR_INFO(foseg,     ptr.i386_.foseg);
-    UPDATE_FPR_INFO(mxcsr,     mxcsr);
-    UPDATE_FPR_INFO(mxcsrmask, mxcsrmask);
-
-    UPDATE_FP_INFO(st, 0);
-    UPDATE_FP_INFO(st, 1);
-    UPDATE_FP_INFO(st, 2);
-    UPDATE_FP_INFO(st, 3);
-    UPDATE_FP_INFO(st, 4);
-    UPDATE_FP_INFO(st, 5);
-    UPDATE_FP_INFO(st, 6);
-    UPDATE_FP_INFO(st, 7);
-    UPDATE_FP_INFO(mm, 0);
-    UPDATE_FP_INFO(mm, 1);
-    UPDATE_FP_INFO(mm, 2);
-    UPDATE_FP_INFO(mm, 3);
-    UPDATE_FP_INFO(mm, 4);
-    UPDATE_FP_INFO(mm, 5);
-    UPDATE_FP_INFO(mm, 6);
-    UPDATE_FP_INFO(mm, 7);
-
-    UPDATE_XMM_INFO(xmm, 0);
-    UPDATE_XMM_INFO(xmm, 1);
-    UPDATE_XMM_INFO(xmm, 2);
-    UPDATE_XMM_INFO(xmm, 3);
-    UPDATE_XMM_INFO(xmm, 4);
-    UPDATE_XMM_INFO(xmm, 5);
-    UPDATE_XMM_INFO(xmm, 6);
-    UPDATE_XMM_INFO(xmm, 7);
-
-    UPDATE_YMM_INFO(ymm, 0);
-    UPDATE_YMM_INFO(ymm, 1);
-    UPDATE_YMM_INFO(ymm, 2);
-    UPDATE_YMM_INFO(ymm, 3);
-    UPDATE_YMM_INFO(ymm, 4);
-    UPDATE_YMM_INFO(ymm, 5);
-    UPDATE_YMM_INFO(ymm, 6);
-    UPDATE_YMM_INFO(ymm, 7);
-
-    UPDATE_DR_INFO(0);
-    UPDATE_DR_INFO(1);
-    UPDATE_DR_INFO(2);
-    UPDATE_DR_INFO(3);
-    UPDATE_DR_INFO(4);
-    UPDATE_DR_INFO(5);
-    UPDATE_DR_INFO(6);
-    UPDATE_DR_INFO(7);
+#define UPDATE_GPR_INFO(reg, reg64)                                            \
+  do {                                                                         \
+    g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64);       \
+  } while (false);
+
+#define UPDATE_GPR_INFO_8H(reg, reg64)                                         \
+  do {                                                                         \
+    g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64) + 1;   \
+  } while (false);
+
+#define UPDATE_FPR_INFO(reg, reg64)                                            \
+  do {                                                                         \
+    g_register_infos[lldb_##reg##_i386].byte_offset = FPR_OFFSET(reg64);       \
+  } while (false);
+
+#define UPDATE_FP_INFO(reg, i)                                                 \
+  do {                                                                         \
+    g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(stmm[i]);  \
+  } while (false);
+
+#define UPDATE_XMM_INFO(reg, i)                                                \
+  do {                                                                         \
+    g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(reg[i]);   \
+  } while (false);
+
+#define UPDATE_YMM_INFO(reg, i)                                                \
+  do {                                                                         \
+    g_register_infos[lldb_##reg##i##_i386].byte_offset = YMM_OFFSET(i);        \
+  } while (false);
+
+#define UPDATE_DR_INFO(reg_index)                                              \
+  do {                                                                         \
+    g_register_infos[lldb_dr##reg_index##_i386].byte_offset =                  \
+        DR_OFFSET(reg_index);                                                  \
+  } while (false);
+
+// Update the register offsets
+UPDATE_GPR_INFO(eax, rax);
+UPDATE_GPR_INFO(ebx, rbx);
+UPDATE_GPR_INFO(ecx, rcx);
+UPDATE_GPR_INFO(edx, rdx);
+UPDATE_GPR_INFO(edi, rdi);
+UPDATE_GPR_INFO(esi, rsi);
+UPDATE_GPR_INFO(ebp, rbp);
+UPDATE_GPR_INFO(esp, rsp);
+UPDATE_GPR_INFO(eip, rip);
+UPDATE_GPR_INFO(eflags, rflags);
+UPDATE_GPR_INFO(cs, cs);
+UPDATE_GPR_INFO(fs, fs);
+UPDATE_GPR_INFO(gs, gs);
+UPDATE_GPR_INFO(ss, ss);
+UPDATE_GPR_INFO(ds, ds);
+UPDATE_GPR_INFO(es, es);
+
+UPDATE_GPR_INFO(ax, rax);
+UPDATE_GPR_INFO(bx, rbx);
+UPDATE_GPR_INFO(cx, rcx);
+UPDATE_GPR_INFO(dx, rdx);
+UPDATE_GPR_INFO(di, rdi);
+UPDATE_GPR_INFO(si, rsi);
+UPDATE_GPR_INFO(bp, rbp);
+UPDATE_GPR_INFO(sp, rsp);
+UPDATE_GPR_INFO_8H(ah, rax);
+UPDATE_GPR_INFO_8H(bh, rbx);
+UPDATE_GPR_INFO_8H(ch, rcx);
+UPDATE_GPR_INFO_8H(dh, rdx);
+UPDATE_GPR_INFO(al, rax);
+UPDATE_GPR_INFO(bl, rbx);
+UPDATE_GPR_INFO(cl, rcx);
+UPDATE_GPR_INFO(dl, rdx);
+
+UPDATE_FPR_INFO(fctrl, fctrl);
+UPDATE_FPR_INFO(fstat, fstat);
+UPDATE_FPR_INFO(ftag, ftag);
+UPDATE_FPR_INFO(fop, fop);
+UPDATE_FPR_INFO(fiseg, ptr.i386_.fiseg);
+UPDATE_FPR_INFO(fioff, ptr.i386_.fioff);
+UPDATE_FPR_INFO(fooff, ptr.i386_.fooff);
+UPDATE_FPR_INFO(foseg, ptr.i386_.foseg);
+UPDATE_FPR_INFO(mxcsr, mxcsr);
+UPDATE_FPR_INFO(mxcsrmask, mxcsrmask);
+
+UPDATE_FP_INFO(st, 0);
+UPDATE_FP_INFO(st, 1);
+UPDATE_FP_INFO(st, 2);
+UPDATE_FP_INFO(st, 3);
+UPDATE_FP_INFO(st, 4);
+UPDATE_FP_INFO(st, 5);
+UPDATE_FP_INFO(st, 6);
+UPDATE_FP_INFO(st, 7);
+UPDATE_FP_INFO(mm, 0);
+UPDATE_FP_INFO(mm, 1);
+UPDATE_FP_INFO(mm, 2);
+UPDATE_FP_INFO(mm, 3);
+UPDATE_FP_INFO(mm, 4);
+UPDATE_FP_INFO(mm, 5);
+UPDATE_FP_INFO(mm, 6);
+UPDATE_FP_INFO(mm, 7);
+
+UPDATE_XMM_INFO(xmm, 0);
+UPDATE_XMM_INFO(xmm, 1);
+UPDATE_XMM_INFO(xmm, 2);
+UPDATE_XMM_INFO(xmm, 3);
+UPDATE_XMM_INFO(xmm, 4);
+UPDATE_XMM_INFO(xmm, 5);
+UPDATE_XMM_INFO(xmm, 6);
+UPDATE_XMM_INFO(xmm, 7);
+
+UPDATE_YMM_INFO(ymm, 0);
+UPDATE_YMM_INFO(ymm, 1);
+UPDATE_YMM_INFO(ymm, 2);
+UPDATE_YMM_INFO(ymm, 3);
+UPDATE_YMM_INFO(ymm, 4);
+UPDATE_YMM_INFO(ymm, 5);
+UPDATE_YMM_INFO(ymm, 6);
+UPDATE_YMM_INFO(ymm, 7);
+
+UPDATE_DR_INFO(0);
+UPDATE_DR_INFO(1);
+UPDATE_DR_INFO(2);
+UPDATE_DR_INFO(3);
+UPDATE_DR_INFO(4);
+UPDATE_DR_INFO(5);
+UPDATE_DR_INFO(6);
+UPDATE_DR_INFO(7);
 
 #undef UPDATE_GPR_INFO
 #undef UPDATE_GPR_INFO_8H
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
index 7c0487b..3b29a18 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
@@ -28,508 +28,557 @@
 
 using namespace lldb;
 using namespace lldb_private;
-    
-const char *
-StopInfoMachException::GetDescription ()
-{
-    if (m_description.empty() && m_value != 0)
-    {
-        ExecutionContext exe_ctx (m_thread_wp.lock());
-        Target *target = exe_ctx.GetTargetPtr();
-        const llvm::Triple::ArchType cpu = target ? target->GetArchitecture().GetMachine() : llvm::Triple::UnknownArch;
-
-        const char *exc_desc = NULL;
-        const char *code_label = "code";
-        const char *code_desc = NULL;
-        const char *subcode_label = "subcode";
-        const char *subcode_desc = NULL;
-        switch (m_value)
-        {
-        case 1: // EXC_BAD_ACCESS
-            exc_desc = "EXC_BAD_ACCESS";
-            subcode_label = "address";
-            switch (cpu)
-            {
-            case llvm::Triple::x86:
-            case llvm::Triple::x86_64:
-                switch (m_exc_code)
-                {
-                case 0xd: code_desc = "EXC_I386_GPFLT"; m_exc_data_count = 1; break;
-                }
-                break;
-            case llvm::Triple::arm:
-            case llvm::Triple::thumb:
-                switch (m_exc_code)
-                {
-                case 0x101: code_desc = "EXC_ARM_DA_ALIGN"; break;
-                case 0x102: code_desc = "EXC_ARM_DA_DEBUG"; break;
-                }
-                break;
-
-            case llvm::Triple::ppc:
-            case llvm::Triple::ppc64:
-                switch (m_exc_code)
-                {
-                case 0x101: code_desc = "EXC_PPC_VM_PROT_READ"; break;
-                case 0x102: code_desc = "EXC_PPC_BADSPACE";     break;
-                case 0x103: code_desc = "EXC_PPC_UNALIGNED";    break;
-                }
-                break;
-
-            default:
-                break;
-            }
-            break;
-
-        case 2: // EXC_BAD_INSTRUCTION
-            exc_desc = "EXC_BAD_INSTRUCTION";
-            switch (cpu)
-            {
-            case llvm::Triple::x86:
-            case llvm::Triple::x86_64:
-                if (m_exc_code == 1)
-                    code_desc = "EXC_I386_INVOP";
-                break;
-
-            case llvm::Triple::ppc:
-            case llvm::Triple::ppc64:
-                switch (m_exc_code)
-                {
-                case 1: code_desc = "EXC_PPC_INVALID_SYSCALL"; break; 
-                case 2: code_desc = "EXC_PPC_UNIPL_INST"; break; 
-                case 3: code_desc = "EXC_PPC_PRIVINST"; break; 
-                case 4: code_desc = "EXC_PPC_PRIVREG"; break; 
-                case 5: code_desc = "EXC_PPC_TRACE"; break; 
-                case 6: code_desc = "EXC_PPC_PERFMON"; break; 
-                }
-                break;
-
-            case llvm::Triple::arm:
-            case llvm::Triple::thumb:
-                if (m_exc_code == 1)
-                    code_desc = "EXC_ARM_UNDEFINED";
-                break;
-
-            default:
-                break;
-            }
-            break;
-
-        case 3: // EXC_ARITHMETIC
-            exc_desc = "EXC_ARITHMETIC";
-            switch (cpu)
-            {
-            case llvm::Triple::x86:
-            case llvm::Triple::x86_64:
-                switch (m_exc_code)
-                {
-                case 1: code_desc = "EXC_I386_DIV"; break;
-                case 2: code_desc = "EXC_I386_INTO"; break;
-                case 3: code_desc = "EXC_I386_NOEXT"; break;
-                case 4: code_desc = "EXC_I386_EXTOVR"; break;
-                case 5: code_desc = "EXC_I386_EXTERR"; break;
-                case 6: code_desc = "EXC_I386_EMERR"; break;
-                case 7: code_desc = "EXC_I386_BOUND"; break;
-                case 8: code_desc = "EXC_I386_SSEEXTERR"; break;
-                }
-                break;
-
-            case llvm::Triple::ppc:
-            case llvm::Triple::ppc64:
-                switch (m_exc_code)
-                {
-                case 1: code_desc = "EXC_PPC_OVERFLOW"; break;
-                case 2: code_desc = "EXC_PPC_ZERO_DIVIDE"; break;
-                case 3: code_desc = "EXC_PPC_FLT_INEXACT"; break;
-                case 4: code_desc = "EXC_PPC_FLT_ZERO_DIVIDE"; break;
-                case 5: code_desc = "EXC_PPC_FLT_UNDERFLOW"; break;
-                case 6: code_desc = "EXC_PPC_FLT_OVERFLOW"; break;
-                case 7: code_desc = "EXC_PPC_FLT_NOT_A_NUMBER"; break;
-                }
-                break;
-
-            default:
-                break;
-            }
-            break;
-
-        case 4: // EXC_EMULATION
-            exc_desc = "EXC_EMULATION";
-            break;
-
-
-        case 5: // EXC_SOFTWARE
-            exc_desc = "EXC_SOFTWARE";
-            if (m_exc_code == 0x10003)
-            {
-                subcode_desc = "EXC_SOFT_SIGNAL";
-                subcode_label = "signo";
-            }
-            break;
-        
-        case 6: // EXC_BREAKPOINT
-            {
-                exc_desc = "EXC_BREAKPOINT";
-                switch (cpu)
-                {
-                case llvm::Triple::x86:
-                case llvm::Triple::x86_64:
-                    switch (m_exc_code)
-                    {
-                    case 1: code_desc = "EXC_I386_SGL"; break;
-                    case 2: code_desc = "EXC_I386_BPT"; break;
-                    }
-                    break;
-
-                case llvm::Triple::ppc:
-                case llvm::Triple::ppc64:
-                    switch (m_exc_code)
-                    {
-                    case 1: code_desc = "EXC_PPC_BREAKPOINT"; break;
-                    }
-                    break;
-                
-                case llvm::Triple::arm:
-                case llvm::Triple::thumb:
-                    switch (m_exc_code)
-                    {
-                    case 0x101: code_desc = "EXC_ARM_DA_ALIGN"; break;
-                    case 0x102: code_desc = "EXC_ARM_DA_DEBUG"; break;
-                    case 1: code_desc = "EXC_ARM_BREAKPOINT"; break;
-                    // FIXME temporary workaround, exc_code 0 does not really mean EXC_ARM_BREAKPOINT
-                    case 0: code_desc = "EXC_ARM_BREAKPOINT"; break;
-                    }
-                    break;
-
-                default:
-                    break;
-                }
-            }
-            break;
 
+const char *StopInfoMachException::GetDescription() {
+  if (m_description.empty() && m_value != 0) {
+    ExecutionContext exe_ctx(m_thread_wp.lock());
+    Target *target = exe_ctx.GetTargetPtr();
+    const llvm::Triple::ArchType cpu =
+        target ? target->GetArchitecture().GetMachine()
+               : llvm::Triple::UnknownArch;
+
+    const char *exc_desc = NULL;
+    const char *code_label = "code";
+    const char *code_desc = NULL;
+    const char *subcode_label = "subcode";
+    const char *subcode_desc = NULL;
+    switch (m_value) {
+    case 1: // EXC_BAD_ACCESS
+      exc_desc = "EXC_BAD_ACCESS";
+      subcode_label = "address";
+      switch (cpu) {
+      case llvm::Triple::x86:
+      case llvm::Triple::x86_64:
+        switch (m_exc_code) {
+        case 0xd:
+          code_desc = "EXC_I386_GPFLT";
+          m_exc_data_count = 1;
+          break;
+        }
+        break;
+      case llvm::Triple::arm:
+      case llvm::Triple::thumb:
+        switch (m_exc_code) {
+        case 0x101:
+          code_desc = "EXC_ARM_DA_ALIGN";
+          break;
+        case 0x102:
+          code_desc = "EXC_ARM_DA_DEBUG";
+          break;
+        }
+        break;
+
+      case llvm::Triple::ppc:
+      case llvm::Triple::ppc64:
+        switch (m_exc_code) {
+        case 0x101:
+          code_desc = "EXC_PPC_VM_PROT_READ";
+          break;
+        case 0x102:
+          code_desc = "EXC_PPC_BADSPACE";
+          break;
+        case 0x103:
+          code_desc = "EXC_PPC_UNALIGNED";
+          break;
+        }
+        break;
+
+      default:
+        break;
+      }
+      break;
+
+    case 2: // EXC_BAD_INSTRUCTION
+      exc_desc = "EXC_BAD_INSTRUCTION";
+      switch (cpu) {
+      case llvm::Triple::x86:
+      case llvm::Triple::x86_64:
+        if (m_exc_code == 1)
+          code_desc = "EXC_I386_INVOP";
+        break;
+
+      case llvm::Triple::ppc:
+      case llvm::Triple::ppc64:
+        switch (m_exc_code) {
+        case 1:
+          code_desc = "EXC_PPC_INVALID_SYSCALL";
+          break;
+        case 2:
+          code_desc = "EXC_PPC_UNIPL_INST";
+          break;
+        case 3:
+          code_desc = "EXC_PPC_PRIVINST";
+          break;
+        case 4:
+          code_desc = "EXC_PPC_PRIVREG";
+          break;
+        case 5:
+          code_desc = "EXC_PPC_TRACE";
+          break;
+        case 6:
+          code_desc = "EXC_PPC_PERFMON";
+          break;
+        }
+        break;
+
+      case llvm::Triple::arm:
+      case llvm::Triple::thumb:
+        if (m_exc_code == 1)
+          code_desc = "EXC_ARM_UNDEFINED";
+        break;
+
+      default:
+        break;
+      }
+      break;
+
+    case 3: // EXC_ARITHMETIC
+      exc_desc = "EXC_ARITHMETIC";
+      switch (cpu) {
+      case llvm::Triple::x86:
+      case llvm::Triple::x86_64:
+        switch (m_exc_code) {
+        case 1:
+          code_desc = "EXC_I386_DIV";
+          break;
+        case 2:
+          code_desc = "EXC_I386_INTO";
+          break;
+        case 3:
+          code_desc = "EXC_I386_NOEXT";
+          break;
+        case 4:
+          code_desc = "EXC_I386_EXTOVR";
+          break;
+        case 5:
+          code_desc = "EXC_I386_EXTERR";
+          break;
+        case 6:
+          code_desc = "EXC_I386_EMERR";
+          break;
         case 7:
-            exc_desc = "EXC_SYSCALL";
-            break;
-
+          code_desc = "EXC_I386_BOUND";
+          break;
         case 8:
-            exc_desc = "EXC_MACH_SYSCALL";
-            break;
-
-        case 9:
-            exc_desc = "EXC_RPC_ALERT";
-            break;
-
-        case 10:
-            exc_desc = "EXC_CRASH";
-            break;
-        case 11:
-            exc_desc = "EXC_RESOURCE";
-            break;
-        case 12:
-            exc_desc = "EXC_GUARD";
-            break;
+          code_desc = "EXC_I386_SSEEXTERR";
+          break;
+        }
+        break;
+
+      case llvm::Triple::ppc:
+      case llvm::Triple::ppc64:
+        switch (m_exc_code) {
+        case 1:
+          code_desc = "EXC_PPC_OVERFLOW";
+          break;
+        case 2:
+          code_desc = "EXC_PPC_ZERO_DIVIDE";
+          break;
+        case 3:
+          code_desc = "EXC_PPC_FLT_INEXACT";
+          break;
+        case 4:
+          code_desc = "EXC_PPC_FLT_ZERO_DIVIDE";
+          break;
+        case 5:
+          code_desc = "EXC_PPC_FLT_UNDERFLOW";
+          break;
+        case 6:
+          code_desc = "EXC_PPC_FLT_OVERFLOW";
+          break;
+        case 7:
+          code_desc = "EXC_PPC_FLT_NOT_A_NUMBER";
+          break;
+        }
+        break;
+
+      default:
+        break;
+      }
+      break;
+
+    case 4: // EXC_EMULATION
+      exc_desc = "EXC_EMULATION";
+      break;
+
+    case 5: // EXC_SOFTWARE
+      exc_desc = "EXC_SOFTWARE";
+      if (m_exc_code == 0x10003) {
+        subcode_desc = "EXC_SOFT_SIGNAL";
+        subcode_label = "signo";
+      }
+      break;
+
+    case 6: // EXC_BREAKPOINT
+    {
+      exc_desc = "EXC_BREAKPOINT";
+      switch (cpu) {
+      case llvm::Triple::x86:
+      case llvm::Triple::x86_64:
+        switch (m_exc_code) {
+        case 1:
+          code_desc = "EXC_I386_SGL";
+          break;
+        case 2:
+          code_desc = "EXC_I386_BPT";
+          break;
+        }
+        break;
+
+      case llvm::Triple::ppc:
+      case llvm::Triple::ppc64:
+        switch (m_exc_code) {
+        case 1:
+          code_desc = "EXC_PPC_BREAKPOINT";
+          break;
         }
-        
-        StreamString strm;
+        break;
+
+      case llvm::Triple::arm:
+      case llvm::Triple::thumb:
+        switch (m_exc_code) {
+        case 0x101:
+          code_desc = "EXC_ARM_DA_ALIGN";
+          break;
+        case 0x102:
+          code_desc = "EXC_ARM_DA_DEBUG";
+          break;
+        case 1:
+          code_desc = "EXC_ARM_BREAKPOINT";
+          break;
+        // FIXME temporary workaround, exc_code 0 does not really mean
+        // EXC_ARM_BREAKPOINT
+        case 0:
+          code_desc = "EXC_ARM_BREAKPOINT";
+          break;
+        }
+        break;
+
+      default:
+        break;
+      }
+    } break;
+
+    case 7:
+      exc_desc = "EXC_SYSCALL";
+      break;
+
+    case 8:
+      exc_desc = "EXC_MACH_SYSCALL";
+      break;
+
+    case 9:
+      exc_desc = "EXC_RPC_ALERT";
+      break;
+
+    case 10:
+      exc_desc = "EXC_CRASH";
+      break;
+    case 11:
+      exc_desc = "EXC_RESOURCE";
+      break;
+    case 12:
+      exc_desc = "EXC_GUARD";
+      break;
+    }
 
-        if (exc_desc)
-            strm.PutCString(exc_desc);
-        else
-            strm.Printf("EXC_??? (%" PRIu64 ")", m_value);
+    StreamString strm;
 
-        if (m_exc_data_count >= 1)
-        {
-            if (code_desc)
-                strm.Printf(" (%s=%s", code_label, code_desc);
-            else
-                strm.Printf(" (%s=%" PRIu64, code_label, m_exc_code);
-        }
+    if (exc_desc)
+      strm.PutCString(exc_desc);
+    else
+      strm.Printf("EXC_??? (%" PRIu64 ")", m_value);
 
-        if (m_exc_data_count >= 2)
-        {
-            if (subcode_desc)
-                strm.Printf(", %s=%s", subcode_label, subcode_desc);
-            else
-                strm.Printf(", %s=0x%" PRIx64, subcode_label, m_exc_subcode);
-        }
-        
-        if (m_exc_data_count > 0)
-            strm.PutChar(')');
-        
-        m_description.swap (strm.GetString());
+    if (m_exc_data_count >= 1) {
+      if (code_desc)
+        strm.Printf(" (%s=%s", code_label, code_desc);
+      else
+        strm.Printf(" (%s=%" PRIu64, code_label, m_exc_code);
     }
-    return m_description.c_str();
-}
 
+    if (m_exc_data_count >= 2) {
+      if (subcode_desc)
+        strm.Printf(", %s=%s", subcode_label, subcode_desc);
+      else
+        strm.Printf(", %s=0x%" PRIx64, subcode_label, m_exc_subcode);
+    }
 
+    if (m_exc_data_count > 0)
+      strm.PutChar(')');
 
+    m_description = strm.GetString();
+  }
+  return m_description.c_str();
+}
 
+StopInfoSP StopInfoMachException::CreateStopReasonWithMachException(
+    Thread &thread, uint32_t exc_type, uint32_t exc_data_count,
+    uint64_t exc_code, uint64_t exc_sub_code, uint64_t exc_sub_sub_code,
+    bool pc_already_adjusted, bool adjust_pc_if_needed) {
+  if (exc_type != 0) {
+    uint32_t pc_decrement = 0;
+    ExecutionContext exe_ctx(thread.shared_from_this());
+    Target *target = exe_ctx.GetTargetPtr();
+    const llvm::Triple::ArchType cpu =
+        target ? target->GetArchitecture().GetMachine()
+               : llvm::Triple::UnknownArch;
+
+    switch (exc_type) {
+    case 1: // EXC_BAD_ACCESS
+      break;
+
+    case 2: // EXC_BAD_INSTRUCTION
+      switch (cpu) {
+      case llvm::Triple::ppc:
+      case llvm::Triple::ppc64:
+        switch (exc_code) {
+        case 1: // EXC_PPC_INVALID_SYSCALL
+        case 2: // EXC_PPC_UNIPL_INST
+        case 3: // EXC_PPC_PRIVINST
+        case 4: // EXC_PPC_PRIVREG
+          break;
+        case 5: // EXC_PPC_TRACE
+          return StopInfo::CreateStopReasonToTrace(thread);
+        case 6: // EXC_PPC_PERFMON
+          break;
+        }
+        break;
+
+      default:
+        break;
+      }
+      break;
+
+    case 3: // EXC_ARITHMETIC
+    case 4: // EXC_EMULATION
+      break;
+
+    case 5:                    // EXC_SOFTWARE
+      if (exc_code == 0x10003) // EXC_SOFT_SIGNAL
+      {
+        if (exc_sub_code == 5) {
+          // On MacOSX, a SIGTRAP can signify that a process has called
+          // exec, so we should check with our dynamic loader to verify.
+          ProcessSP process_sp(thread.GetProcess());
+          if (process_sp) {
+            DynamicLoader *dynamic_loader = process_sp->GetDynamicLoader();
+            if (dynamic_loader && dynamic_loader->ProcessDidExec()) {
+              // The program was re-exec'ed
+              return StopInfo::CreateStopReasonWithExec(thread);
+            }
+            //                        if (!process_did_exec)
+            //                        {
+            //                            // We have a SIGTRAP, make sure we
+            //                            didn't exec by checking
+            //                            // for the PC being at
+            //                            "_dyld_start"...
+            //                            lldb::StackFrameSP frame_sp
+            //                            (thread.GetStackFrameAtIndex(0));
+            //                            if (frame_sp)
+            //                            {
+            //                                const Symbol *symbol =
+            //                                frame_sp->GetSymbolContext(eSymbolContextSymbol).symbol;
+            //                                if (symbol)
+            //                                {
+            //                                    if (symbol->GetName() ==
+            //                                    ConstString("_dyld_start"))
+            //                                        process_did_exec = true;
+            //                                }
+            //                            }
+            //                        }
+          }
+        }
+        return StopInfo::CreateStopReasonWithSignal(thread, exc_sub_code);
+      }
+      break;
 
-StopInfoSP
-StopInfoMachException::CreateStopReasonWithMachException 
-(
-    Thread &thread,
-    uint32_t exc_type, 
-    uint32_t exc_data_count,
-    uint64_t exc_code,
-    uint64_t exc_sub_code,
-    uint64_t exc_sub_sub_code,
-    bool pc_already_adjusted,
-    bool adjust_pc_if_needed
-)
-{
-    if (exc_type != 0)
+    case 6: // EXC_BREAKPOINT
     {
-        uint32_t pc_decrement = 0;
-        ExecutionContext exe_ctx (thread.shared_from_this());
-        Target *target = exe_ctx.GetTargetPtr();
-        const llvm::Triple::ArchType cpu = target ? target->GetArchitecture().GetMachine() : llvm::Triple::UnknownArch;
-
-        switch (exc_type)
+      bool is_actual_breakpoint = false;
+      bool is_trace_if_actual_breakpoint_missing = false;
+      switch (cpu) {
+      case llvm::Triple::x86:
+      case llvm::Triple::x86_64:
+        if (exc_code == 1) // EXC_I386_SGL
         {
-        case 1: // EXC_BAD_ACCESS
-            break;
-
-        case 2: // EXC_BAD_INSTRUCTION
-            switch (cpu)
-            {
-            case llvm::Triple::ppc:
-            case llvm::Triple::ppc64:
-                switch (exc_code)
-                {
-                case 1: // EXC_PPC_INVALID_SYSCALL
-                case 2: // EXC_PPC_UNIPL_INST
-                case 3: // EXC_PPC_PRIVINST
-                case 4: // EXC_PPC_PRIVREG
-                    break;
-                case 5: // EXC_PPC_TRACE
-                    return StopInfo::CreateStopReasonToTrace (thread);
-                case 6: // EXC_PPC_PERFMON
-                    break;
-                }
-                break;
-
-            default:
-                break;
+          if (!exc_sub_code) {
+            // This looks like a plain trap.
+            // Have to check if there is a breakpoint here as well.  When you
+            // single-step onto a trap,
+            // the single step stops you not to trap.  Since we also do that
+            // check below, let's just use
+            // that logic.
+            is_actual_breakpoint = true;
+            is_trace_if_actual_breakpoint_missing = true;
+          } else {
+
+            // It's a watchpoint, then.
+            // The exc_sub_code indicates the data break address.
+            lldb::WatchpointSP wp_sp;
+            if (target)
+              wp_sp = target->GetWatchpointList().FindByAddress(
+                  (lldb::addr_t)exc_sub_code);
+            if (wp_sp && wp_sp->IsEnabled()) {
+              // Debugserver may piggyback the hardware index of the fired
+              // watchpoint in the exception data.
+              // Set the hardware index if that's the case.
+              if (exc_data_count >= 3)
+                wp_sp->SetHardwareIndex((uint32_t)exc_sub_sub_code);
+              return StopInfo::CreateStopReasonWithWatchpointID(thread,
+                                                                wp_sp->GetID());
             }
-            break;
-
-        case 3: // EXC_ARITHMETIC
-        case 4: // EXC_EMULATION
-            break;
-
-        case 5: // EXC_SOFTWARE
-            if (exc_code == 0x10003) // EXC_SOFT_SIGNAL
-            {
-                if (exc_sub_code == 5)
-                {
-                    // On MacOSX, a SIGTRAP can signify that a process has called
-                    // exec, so we should check with our dynamic loader to verify.
-                    ProcessSP process_sp (thread.GetProcess());
-                    if (process_sp)
-                    {
-                        DynamicLoader *dynamic_loader = process_sp->GetDynamicLoader();
-                        if (dynamic_loader && dynamic_loader->ProcessDidExec())
-                        {
-                            // The program was re-exec'ed
-                            return StopInfo::CreateStopReasonWithExec (thread);
-                        }
-//                        if (!process_did_exec)
-//                        {
-//                            // We have a SIGTRAP, make sure we didn't exec by checking
-//                            // for the PC being at "_dyld_start"...
-//                            lldb::StackFrameSP frame_sp (thread.GetStackFrameAtIndex(0));
-//                            if (frame_sp)
-//                            {
-//                                const Symbol *symbol = frame_sp->GetSymbolContext(eSymbolContextSymbol).symbol;
-//                                if (symbol)
-//                                {
-//                                    if (symbol->GetName() == ConstString("_dyld_start"))
-//                                        process_did_exec = true;
-//                                }
-//                            }
-//                        }
-                    }
-                }
-                return StopInfo::CreateStopReasonWithSignal (thread, exc_sub_code);
-            }
-            break;
-        
-        case 6: // EXC_BREAKPOINT
-            {
-                bool is_actual_breakpoint = false;
-                bool is_trace_if_actual_breakpoint_missing = false;
-                switch (cpu)
-                {
-                case llvm::Triple::x86:
-                case llvm::Triple::x86_64:
-                    if (exc_code == 1) // EXC_I386_SGL
-                    {
-                        if (!exc_sub_code)
-                        {
-                            // This looks like a plain trap.
-                            // Have to check if there is a breakpoint here as well.  When you single-step onto a trap,
-                            // the single step stops you not to trap.  Since we also do that check below, let's just use
-                            // that logic.
-                            is_actual_breakpoint = true;
-                            is_trace_if_actual_breakpoint_missing = true;
-                        }
-                        else
-                        {
-
-                            // It's a watchpoint, then.
-                            // The exc_sub_code indicates the data break address.
-                            lldb::WatchpointSP wp_sp;
-                            if (target)
-                                wp_sp = target->GetWatchpointList().FindByAddress((lldb::addr_t)exc_sub_code);
-                            if (wp_sp && wp_sp->IsEnabled())
-                            {
-                                // Debugserver may piggyback the hardware index of the fired watchpoint in the exception data.
-                                // Set the hardware index if that's the case.
-                                if (exc_data_count >=3)
-                                    wp_sp->SetHardwareIndex((uint32_t)exc_sub_sub_code);
-                                return StopInfo::CreateStopReasonWithWatchpointID(thread, wp_sp->GetID());
-                            }
-                        }
-                    }
-                    else if (exc_code == 2 ||   // EXC_I386_BPT
-                             exc_code == 3)     // EXC_I386_BPTFLT
-                    {
-                        // KDP returns EXC_I386_BPTFLT for trace breakpoints
-                        if (exc_code == 3)
-                            is_trace_if_actual_breakpoint_missing = true;
-
-                        is_actual_breakpoint = true;
-                        if (!pc_already_adjusted)
-                            pc_decrement = 1;
-                    }
-                    break;
-
-                case llvm::Triple::ppc:
-                case llvm::Triple::ppc64:
-                    is_actual_breakpoint = exc_code == 1; // EXC_PPC_BREAKPOINT
-                    break;
-                
-                case llvm::Triple::arm:
-                case llvm::Triple::thumb:
-                    if (exc_code == 0x102) // EXC_ARM_DA_DEBUG
-                    {
-                        // It's a watchpoint, then, if the exc_sub_code indicates a known/enabled
-                        // data break address from our watchpoint list.
-                        lldb::WatchpointSP wp_sp;
-                        if (target)
-                            wp_sp = target->GetWatchpointList().FindByAddress((lldb::addr_t)exc_sub_code);
-                        if (wp_sp && wp_sp->IsEnabled())
-                        {
-                            // Debugserver may piggyback the hardware index of the fired watchpoint in the exception data.
-                            // Set the hardware index if that's the case.
-                            if (exc_data_count >=3)
-                                wp_sp->SetHardwareIndex((uint32_t)exc_sub_sub_code);
-                            return StopInfo::CreateStopReasonWithWatchpointID(thread, wp_sp->GetID());
-                        }
-                        else
-                        {
-                            is_actual_breakpoint = true;
-                            is_trace_if_actual_breakpoint_missing = true;
-                        }
-                    }
-                    else if (exc_code == 1) // EXC_ARM_BREAKPOINT
-                    {
-                        is_actual_breakpoint = true;
-                        is_trace_if_actual_breakpoint_missing = true;
-                    }
-                    else if (exc_code == 0) // FIXME not EXC_ARM_BREAKPOINT but a kernel is currently returning this so accept it as indicating a breakpoint until the kernel is fixed
-                    {
-                        is_actual_breakpoint = true;
-                        is_trace_if_actual_breakpoint_missing = true;
-                    }
-                    break;
-
-                case llvm::Triple::aarch64:
-                {
-                    if (exc_code == 1 && exc_sub_code == 0) // EXC_ARM_BREAKPOINT
-                    {
-                        // This is hit when we single instruction step aka MDSCR_EL1 SS bit 0 is set
-                        return StopInfo::CreateStopReasonToTrace(thread);
-                    }
-                    if (exc_code == 0x102) // EXC_ARM_DA_DEBUG
-                    {
-                        // It's a watchpoint, then, if the exc_sub_code indicates a known/enabled
-                        // data break address from our watchpoint list.
-                        lldb::WatchpointSP wp_sp;
-                        if (target)
-                            wp_sp = target->GetWatchpointList().FindByAddress((lldb::addr_t)exc_sub_code);
-                        if (wp_sp && wp_sp->IsEnabled())
-                        {
-                            // Debugserver may piggyback the hardware index of the fired watchpoint in the exception data.
-                            // Set the hardware index if that's the case.
-                            if (exc_data_count >= 3)
-                                wp_sp->SetHardwareIndex((uint32_t)exc_sub_sub_code);
-                            return StopInfo::CreateStopReasonWithWatchpointID(thread, wp_sp->GetID());
-                        }
-                        // EXC_ARM_DA_DEBUG seems to be reused for EXC_BREAKPOINT as well as EXC_BAD_ACCESS
-                        if (thread.GetTemporaryResumeState() == eStateStepping)
-                            return StopInfo::CreateStopReasonToTrace(thread);
-                    }
-                    // It looks like exc_sub_code has the 4 bytes of the instruction that triggered the 
-                    // exception, i.e. our breakpoint opcode
-                    is_actual_breakpoint = exc_code == 1;
-                    break;
-                }
-
-                default:
-                    break;
-                }
-
-                if (is_actual_breakpoint)
-                {
-                    RegisterContextSP reg_ctx_sp (thread.GetRegisterContext());
-                    addr_t pc = reg_ctx_sp->GetPC() - pc_decrement;
-
-                    ProcessSP process_sp (thread.CalculateProcess());
-
-                    lldb::BreakpointSiteSP bp_site_sp;
-                    if (process_sp)
-                        bp_site_sp = process_sp->GetBreakpointSiteList().FindByAddress(pc);
-                    if (bp_site_sp && bp_site_sp->IsEnabled())
-                    {
-                        // Update the PC if we were asked to do so, but only do
-                        // so if we find a breakpoint that we know about cause
-                        // this could be a trap instruction in the code
-                        if (pc_decrement > 0 && adjust_pc_if_needed)
-                            reg_ctx_sp->SetPC (pc);
-
-                        // If the breakpoint is for this thread, then we'll report the hit, but if it is for another thread,
-                        // we can just report no reason.  We don't need to worry about stepping over the breakpoint here, that
-                        // will be taken care of when the thread resumes and notices that there's a breakpoint under the pc.
-                        // If we have an operating system plug-in, we might have set a thread specific breakpoint using the
-                        // operating system thread ID, so we can't make any assumptions about the thread ID so we must always
-                        // report the breakpoint regardless of the thread.
-                        if (bp_site_sp->ValidForThisThread (&thread) || thread.GetProcess()->GetOperatingSystem () != NULL)
-                            return StopInfo::CreateStopReasonWithBreakpointSiteID (thread, bp_site_sp->GetID());
-                        else if (is_trace_if_actual_breakpoint_missing)
-                            return StopInfo::CreateStopReasonToTrace (thread);
-                        else
-                            return StopInfoSP();
-                    }
-
-                    // Don't call this a trace if we weren't single stepping this thread.
-                    if (is_trace_if_actual_breakpoint_missing && thread.GetTemporaryResumeState() == eStateStepping)
-                    {
-                        return StopInfo::CreateStopReasonToTrace (thread);
-                    }
-                }
-            }
-            break;
+          }
+        } else if (exc_code == 2 || // EXC_I386_BPT
+                   exc_code == 3)   // EXC_I386_BPTFLT
+        {
+          // KDP returns EXC_I386_BPTFLT for trace breakpoints
+          if (exc_code == 3)
+            is_trace_if_actual_breakpoint_missing = true;
 
-        case 7:     // EXC_SYSCALL
-        case 8:     // EXC_MACH_SYSCALL
-        case 9:     // EXC_RPC_ALERT
-        case 10:    // EXC_CRASH
-            break;
+          is_actual_breakpoint = true;
+          if (!pc_already_adjusted)
+            pc_decrement = 1;
         }
-        
-        return StopInfoSP(new StopInfoMachException (thread, exc_type, exc_data_count, exc_code, exc_sub_code));
+        break;
+
+      case llvm::Triple::ppc:
+      case llvm::Triple::ppc64:
+        is_actual_breakpoint = exc_code == 1; // EXC_PPC_BREAKPOINT
+        break;
+
+      case llvm::Triple::arm:
+      case llvm::Triple::thumb:
+        if (exc_code == 0x102) // EXC_ARM_DA_DEBUG
+        {
+          // It's a watchpoint, then, if the exc_sub_code indicates a
+          // known/enabled
+          // data break address from our watchpoint list.
+          lldb::WatchpointSP wp_sp;
+          if (target)
+            wp_sp = target->GetWatchpointList().FindByAddress(
+                (lldb::addr_t)exc_sub_code);
+          if (wp_sp && wp_sp->IsEnabled()) {
+            // Debugserver may piggyback the hardware index of the fired
+            // watchpoint in the exception data.
+            // Set the hardware index if that's the case.
+            if (exc_data_count >= 3)
+              wp_sp->SetHardwareIndex((uint32_t)exc_sub_sub_code);
+            return StopInfo::CreateStopReasonWithWatchpointID(thread,
+                                                              wp_sp->GetID());
+          } else {
+            is_actual_breakpoint = true;
+            is_trace_if_actual_breakpoint_missing = true;
+          }
+        } else if (exc_code == 1) // EXC_ARM_BREAKPOINT
+        {
+          is_actual_breakpoint = true;
+          is_trace_if_actual_breakpoint_missing = true;
+        } else if (exc_code == 0) // FIXME not EXC_ARM_BREAKPOINT but a kernel
+                                  // is currently returning this so accept it as
+                                  // indicating a breakpoint until the kernel is
+                                  // fixed
+        {
+          is_actual_breakpoint = true;
+          is_trace_if_actual_breakpoint_missing = true;
+        }
+        break;
+
+      case llvm::Triple::aarch64: {
+        if (exc_code == 1 && exc_sub_code == 0) // EXC_ARM_BREAKPOINT
+        {
+          // This is hit when we single instruction step aka MDSCR_EL1 SS bit 0
+          // is set
+          is_actual_breakpoint = false;
+          is_trace_if_actual_breakpoint_missing = true;
+        }
+        if (exc_code == 0x102) // EXC_ARM_DA_DEBUG
+        {
+          // It's a watchpoint, then, if the exc_sub_code indicates a
+          // known/enabled
+          // data break address from our watchpoint list.
+          lldb::WatchpointSP wp_sp;
+          if (target)
+            wp_sp = target->GetWatchpointList().FindByAddress(
+                (lldb::addr_t)exc_sub_code);
+          if (wp_sp && wp_sp->IsEnabled()) {
+            // Debugserver may piggyback the hardware index of the fired
+            // watchpoint in the exception data.
+            // Set the hardware index if that's the case.
+            if (exc_data_count >= 3)
+              wp_sp->SetHardwareIndex((uint32_t)exc_sub_sub_code);
+            return StopInfo::CreateStopReasonWithWatchpointID(thread,
+                                                              wp_sp->GetID());
+          }
+          // EXC_ARM_DA_DEBUG seems to be reused for EXC_BREAKPOINT as well as
+          // EXC_BAD_ACCESS
+          if (thread.GetTemporaryResumeState() == eStateStepping)
+            return StopInfo::CreateStopReasonToTrace(thread);
+        }
+        // It looks like exc_sub_code has the 4 bytes of the instruction that
+        // triggered the
+        // exception, i.e. our breakpoint opcode
+        is_actual_breakpoint = exc_code == 1;
+        break;
+      }
+
+      default:
+        break;
+      }
+
+      if (is_actual_breakpoint) {
+        RegisterContextSP reg_ctx_sp(thread.GetRegisterContext());
+        addr_t pc = reg_ctx_sp->GetPC() - pc_decrement;
+
+        ProcessSP process_sp(thread.CalculateProcess());
+
+        lldb::BreakpointSiteSP bp_site_sp;
+        if (process_sp)
+          bp_site_sp = process_sp->GetBreakpointSiteList().FindByAddress(pc);
+        if (bp_site_sp && bp_site_sp->IsEnabled()) {
+          // Update the PC if we were asked to do so, but only do
+          // so if we find a breakpoint that we know about cause
+          // this could be a trap instruction in the code
+          if (pc_decrement > 0 && adjust_pc_if_needed)
+            reg_ctx_sp->SetPC(pc);
+
+          // If the breakpoint is for this thread, then we'll report the hit,
+          // but if it is for another thread,
+          // we can just report no reason.  We don't need to worry about
+          // stepping over the breakpoint here, that
+          // will be taken care of when the thread resumes and notices that
+          // there's a breakpoint under the pc.
+          // If we have an operating system plug-in, we might have set a thread
+          // specific breakpoint using the
+          // operating system thread ID, so we can't make any assumptions about
+          // the thread ID so we must always
+          // report the breakpoint regardless of the thread.
+          if (bp_site_sp->ValidForThisThread(&thread) ||
+              thread.GetProcess()->GetOperatingSystem() != NULL)
+            return StopInfo::CreateStopReasonWithBreakpointSiteID(
+                thread, bp_site_sp->GetID());
+          else if (is_trace_if_actual_breakpoint_missing)
+            return StopInfo::CreateStopReasonToTrace(thread);
+          else
+            return StopInfoSP();
+        }
+
+        // Don't call this a trace if we weren't single stepping this thread.
+        if (is_trace_if_actual_breakpoint_missing &&
+            thread.GetTemporaryResumeState() == eStateStepping) {
+          return StopInfo::CreateStopReasonToTrace(thread);
+        }
+      }
+    } break;
+
+    case 7:  // EXC_SYSCALL
+    case 8:  // EXC_MACH_SYSCALL
+    case 9:  // EXC_RPC_ALERT
+    case 10: // EXC_CRASH
+      break;
     }
-    return StopInfoSP();
+
+    return StopInfoSP(new StopInfoMachException(
+        thread, exc_type, exc_data_count, exc_code, exc_sub_code));
+  }
+  return StopInfoSP();
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/StopInfoMachException.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/StopInfoMachException.h
index 25e05ec..9451645 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/StopInfoMachException.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/StopInfoMachException.h
@@ -20,52 +20,37 @@
 
 namespace lldb_private {
 
-class StopInfoMachException : public StopInfo
-{
+class StopInfoMachException : public StopInfo {
 public:
-    //------------------------------------------------------------------
-    // Constructors and Destructors
-    //------------------------------------------------------------------
-    StopInfoMachException (Thread &thread, 
-                           uint32_t exc_type, 
-                           uint32_t exc_data_count,
-                           uint64_t exc_code, 
-                           uint64_t exc_subcode) :
-        StopInfo (thread, exc_type),
-        m_exc_data_count (exc_data_count),
-        m_exc_code (exc_code),
-        m_exc_subcode (exc_subcode)
-    {
-    }
-
-    ~StopInfoMachException() override = default;
-
-    lldb::StopReason
-    GetStopReason() const override
-    {
-        return lldb::eStopReasonException;
-    }
-
-    const char *
-    GetDescription() override;
-
-    // Since some mach exceptions will be reported as breakpoints, signals,
-    // or trace, we use this static accessor which will translate the mach
-    // exception into the correct StopInfo.
-    static lldb::StopInfoSP
-    CreateStopReasonWithMachException (Thread &thread, 
-                                       uint32_t exc_type, 
-                                       uint32_t exc_data_count,
-                                       uint64_t exc_code, 
-                                       uint64_t exc_sub_code,
-                                       uint64_t exc_sub_sub_code,
-                                       bool pc_already_adjusted = true,
-                                       bool adjust_pc_if_needed = false);
+  //------------------------------------------------------------------
+  // Constructors and Destructors
+  //------------------------------------------------------------------
+  StopInfoMachException(Thread &thread, uint32_t exc_type,
+                        uint32_t exc_data_count, uint64_t exc_code,
+                        uint64_t exc_subcode)
+      : StopInfo(thread, exc_type), m_exc_data_count(exc_data_count),
+        m_exc_code(exc_code), m_exc_subcode(exc_subcode) {}
+
+  ~StopInfoMachException() override = default;
+
+  lldb::StopReason GetStopReason() const override {
+    return lldb::eStopReasonException;
+  }
+
+  const char *GetDescription() override;
+
+  // Since some mach exceptions will be reported as breakpoints, signals,
+  // or trace, we use this static accessor which will translate the mach
+  // exception into the correct StopInfo.
+  static lldb::StopInfoSP CreateStopReasonWithMachException(
+      Thread &thread, uint32_t exc_type, uint32_t exc_data_count,
+      uint64_t exc_code, uint64_t exc_sub_code, uint64_t exc_sub_sub_code,
+      bool pc_already_adjusted = true, bool adjust_pc_if_needed = false);
 
 protected:
-    uint32_t m_exc_data_count;
-    uint64_t m_exc_code;
-    uint64_t m_exc_subcode;
+  uint32_t m_exc_data_count;
+  uint64_t m_exc_code;
+  uint64_t m_exc_subcode;
 };
 
 } // namespace lldb_private
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ThreadMemory.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ThreadMemory.cpp
index 6a7aa62..b3cac1c 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ThreadMemory.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ThreadMemory.cpp
@@ -1,4 +1,5 @@
-//===-- ThreadMemory.cpp ----------------------------------------------*- C++ -*-===//
+//===-- ThreadMemory.cpp ----------------------------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -8,133 +9,97 @@
 //===----------------------------------------------------------------------===//
 
 #include "Plugins/Process/Utility/ThreadMemory.h"
+#include "Plugins/Process/Utility/RegisterContextThreadMemory.h"
 #include "lldb/Target/OperatingSystem.h"
-#include "lldb/Target/RegisterContext.h"
 #include "lldb/Target/Process.h"
+#include "lldb/Target/RegisterContext.h"
 #include "lldb/Target/StopInfo.h"
 #include "lldb/Target/Unwind.h"
-#include "Plugins/Process/Utility/RegisterContextThreadMemory.h"
 
 using namespace lldb;
 using namespace lldb_private;
 
-ThreadMemory::ThreadMemory (Process &process,
-                            tid_t tid,
-                            const ValueObjectSP &thread_info_valobj_sp) :
-    Thread (process, tid),
-    m_backing_thread_sp (),
-    m_thread_info_valobj_sp (thread_info_valobj_sp),
-    m_name(),
-    m_queue()
-{
-}
-
+ThreadMemory::ThreadMemory(Process &process, tid_t tid,
+                           const ValueObjectSP &thread_info_valobj_sp)
+    : Thread(process, tid), m_backing_thread_sp(),
+      m_thread_info_valobj_sp(thread_info_valobj_sp), m_name(), m_queue() {}
 
-ThreadMemory::ThreadMemory (Process &process,
-                            lldb::tid_t tid,
-                            const char *name,
-                            const char *queue,
-                            lldb::addr_t register_data_addr) :
-    Thread (process, tid),
-    m_backing_thread_sp (),
-    m_thread_info_valobj_sp (),
-    m_name(),
-    m_queue(),
-    m_register_data_addr (register_data_addr)
-{
-    if (name)
-        m_name = name;
-    if (queue)
-        m_queue = queue;
+ThreadMemory::ThreadMemory(Process &process, lldb::tid_t tid, const char *name,
+                           const char *queue, lldb::addr_t register_data_addr)
+    : Thread(process, tid), m_backing_thread_sp(), m_thread_info_valobj_sp(),
+      m_name(), m_queue(), m_register_data_addr(register_data_addr) {
+  if (name)
+    m_name = name;
+  if (queue)
+    m_queue = queue;
 }
 
+ThreadMemory::~ThreadMemory() { DestroyThread(); }
 
-ThreadMemory::~ThreadMemory()
-{
-    DestroyThread();
+void ThreadMemory::WillResume(StateType resume_state) {
+  if (m_backing_thread_sp)
+    m_backing_thread_sp->WillResume(resume_state);
 }
 
-void
-ThreadMemory::WillResume (StateType resume_state)
-{
-    if (m_backing_thread_sp)
-        m_backing_thread_sp->WillResume(resume_state);
+void ThreadMemory::ClearStackFrames() {
+  if (m_backing_thread_sp)
+    m_backing_thread_sp->ClearStackFrames();
+  Thread::ClearStackFrames();
 }
 
-void
-ThreadMemory::ClearStackFrames ()
-{
-    if (m_backing_thread_sp)
-        m_backing_thread_sp->ClearStackFrames();
-    Thread::ClearStackFrames();
+RegisterContextSP ThreadMemory::GetRegisterContext() {
+  if (!m_reg_context_sp)
+    m_reg_context_sp.reset(
+        new RegisterContextThreadMemory(*this, m_register_data_addr));
+  return m_reg_context_sp;
 }
 
 RegisterContextSP
-ThreadMemory::GetRegisterContext ()
-{
-    if (!m_reg_context_sp)
-        m_reg_context_sp.reset (new RegisterContextThreadMemory (*this, m_register_data_addr));
-    return m_reg_context_sp;
-}
+ThreadMemory::CreateRegisterContextForFrame(StackFrame *frame) {
+  RegisterContextSP reg_ctx_sp;
+  uint32_t concrete_frame_idx = 0;
 
-RegisterContextSP
-ThreadMemory::CreateRegisterContextForFrame (StackFrame *frame)
-{
-    RegisterContextSP reg_ctx_sp;
-    uint32_t concrete_frame_idx = 0;
-    
-    if (frame)
-        concrete_frame_idx = frame->GetConcreteFrameIndex ();
-    
-    if (concrete_frame_idx == 0)
-    {
-        reg_ctx_sp = GetRegisterContext ();
-    }
-    else
-    {
-        Unwind *unwinder = GetUnwinder ();
-        if (unwinder)
-            reg_ctx_sp = unwinder->CreateRegisterContextForFrame (frame);
-    }
-    return reg_ctx_sp;
+  if (frame)
+    concrete_frame_idx = frame->GetConcreteFrameIndex();
+
+  if (concrete_frame_idx == 0) {
+    reg_ctx_sp = GetRegisterContext();
+  } else {
+    Unwind *unwinder = GetUnwinder();
+    if (unwinder)
+      reg_ctx_sp = unwinder->CreateRegisterContextForFrame(frame);
+  }
+  return reg_ctx_sp;
 }
 
-bool
-ThreadMemory::CalculateStopInfo ()
-{
-    if (m_backing_thread_sp)
-    {
-        lldb::StopInfoSP backing_stop_info_sp (m_backing_thread_sp->GetPrivateStopInfo());
-        if (backing_stop_info_sp && backing_stop_info_sp->IsValidForOperatingSystemThread(*this))
-        {
-            backing_stop_info_sp->SetThread (shared_from_this());
-            SetStopInfo (backing_stop_info_sp);
-            return true;
-        }
+bool ThreadMemory::CalculateStopInfo() {
+  if (m_backing_thread_sp) {
+    lldb::StopInfoSP backing_stop_info_sp(
+        m_backing_thread_sp->GetPrivateStopInfo());
+    if (backing_stop_info_sp &&
+        backing_stop_info_sp->IsValidForOperatingSystemThread(*this)) {
+      backing_stop_info_sp->SetThread(shared_from_this());
+      SetStopInfo(backing_stop_info_sp);
+      return true;
     }
-    else
-    {
-        ProcessSP process_sp (GetProcess());
+  } else {
+    ProcessSP process_sp(GetProcess());
 
-        if (process_sp)
-        {
-            OperatingSystem *os = process_sp->GetOperatingSystem ();
-            if (os)
-            {
-                SetStopInfo (os->CreateThreadStopReason (this));
-                return true;
-            }
-        }
+    if (process_sp) {
+      OperatingSystem *os = process_sp->GetOperatingSystem();
+      if (os) {
+        SetStopInfo(os->CreateThreadStopReason(this));
+        return true;
+      }
     }
-    return false;
+  }
+  return false;
 }
 
-void
-ThreadMemory::RefreshStateAfterStop()
-{
-    if (m_backing_thread_sp)
-        return m_backing_thread_sp->RefreshStateAfterStop();
-    
-    if (m_reg_context_sp)
-        m_reg_context_sp->InvalidateAllRegisters();
+void ThreadMemory::RefreshStateAfterStop() {
+  if (m_backing_thread_sp)
+    return m_backing_thread_sp->RefreshStateAfterStop();
+
+  if (m_reg_context_sp)
+    m_reg_context_sp->InvalidateAllRegisters();
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ThreadMemory.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ThreadMemory.h
index 1e7cbfa..095544d 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ThreadMemory.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ThreadMemory.h
@@ -18,129 +18,94 @@
 // Project includes
 #include "lldb/Target/Thread.h"
 
-class ThreadMemory :
-    public lldb_private::Thread
-{
+class ThreadMemory : public lldb_private::Thread {
 public:
-    ThreadMemory (lldb_private::Process &process,
-                  lldb::tid_t tid,
-                  const lldb::ValueObjectSP &thread_info_valobj_sp);
-
-    ThreadMemory (lldb_private::Process &process,
-                  lldb::tid_t tid,
-                  const char *name,
-                  const char *queue,
-                  lldb::addr_t register_data_addr);
-
-    ~ThreadMemory() override;
-
-    lldb::RegisterContextSP
-    GetRegisterContext() override;
-
-    lldb::RegisterContextSP
-    CreateRegisterContextForFrame(lldb_private::StackFrame *frame) override;
-
-    bool
-    CalculateStopInfo() override;
-
-    const char *
-    GetInfo() override
-    {
-        if (m_backing_thread_sp)
-            m_backing_thread_sp->GetInfo();
-        return nullptr;
-    }
-
-    const char *
-    GetName() override
-    {
-        if (!m_name.empty())
-            return m_name.c_str();
-        if (m_backing_thread_sp)
-            m_backing_thread_sp->GetName();
-        return nullptr;
-    }
-    
-    const char *
-    GetQueueName() override
-    {
-        if (!m_queue.empty())
-            return m_queue.c_str();
-        if (m_backing_thread_sp)
-            m_backing_thread_sp->GetQueueName();
-        return nullptr;
-    }
-
-    void
-    WillResume(lldb::StateType resume_state) override;
-
-    void
-    DidResume() override
-    {
-        if (m_backing_thread_sp)
-            m_backing_thread_sp->DidResume();
-    }
-    
-    lldb::user_id_t
-    GetProtocolID() const override
-    {
-        if (m_backing_thread_sp)
-            return m_backing_thread_sp->GetProtocolID();
-        return Thread::GetProtocolID();
-    }
-
-    void
-    RefreshStateAfterStop() override;
-    
-    lldb::ValueObjectSP &
-    GetValueObject ()
-    {
-        return m_thread_info_valobj_sp;
-    }
-    
-    void
-    ClearStackFrames() override;
-
-    void
-    ClearBackingThread() override
-    {
-        m_backing_thread_sp.reset();
-    }
-
-    bool
-    SetBackingThread(const lldb::ThreadSP &thread_sp) override
-    {
-        //printf ("Thread 0x%llx is being backed by thread 0x%llx\n", GetID(), thread_sp->GetID());
-        m_backing_thread_sp = thread_sp;
-        return (bool)thread_sp;
-    }
-    
-    lldb::ThreadSP
-    GetBackingThread() const override
-    {
-        return m_backing_thread_sp;
-    }
+  ThreadMemory(lldb_private::Process &process, lldb::tid_t tid,
+               const lldb::ValueObjectSP &thread_info_valobj_sp);
+
+  ThreadMemory(lldb_private::Process &process, lldb::tid_t tid,
+               const char *name, const char *queue,
+               lldb::addr_t register_data_addr);
+
+  ~ThreadMemory() override;
+
+  lldb::RegisterContextSP GetRegisterContext() override;
+
+  lldb::RegisterContextSP
+  CreateRegisterContextForFrame(lldb_private::StackFrame *frame) override;
+
+  bool CalculateStopInfo() override;
+
+  const char *GetInfo() override {
+    if (m_backing_thread_sp)
+      m_backing_thread_sp->GetInfo();
+    return nullptr;
+  }
+
+  const char *GetName() override {
+    if (!m_name.empty())
+      return m_name.c_str();
+    if (m_backing_thread_sp)
+      m_backing_thread_sp->GetName();
+    return nullptr;
+  }
+
+  const char *GetQueueName() override {
+    if (!m_queue.empty())
+      return m_queue.c_str();
+    if (m_backing_thread_sp)
+      m_backing_thread_sp->GetQueueName();
+    return nullptr;
+  }
+
+  void WillResume(lldb::StateType resume_state) override;
+
+  void DidResume() override {
+    if (m_backing_thread_sp)
+      m_backing_thread_sp->DidResume();
+  }
+
+  lldb::user_id_t GetProtocolID() const override {
+    if (m_backing_thread_sp)
+      return m_backing_thread_sp->GetProtocolID();
+    return Thread::GetProtocolID();
+  }
+
+  void RefreshStateAfterStop() override;
+
+  lldb::ValueObjectSP &GetValueObject() { return m_thread_info_valobj_sp; }
+
+  void ClearStackFrames() override;
+
+  void ClearBackingThread() override { m_backing_thread_sp.reset(); }
+
+  bool SetBackingThread(const lldb::ThreadSP &thread_sp) override {
+    // printf ("Thread 0x%llx is being backed by thread 0x%llx\n", GetID(),
+    // thread_sp->GetID());
+    m_backing_thread_sp = thread_sp;
+    return (bool)thread_sp;
+  }
+
+  lldb::ThreadSP GetBackingThread() const override {
+    return m_backing_thread_sp;
+  }
 
 protected:
-    bool
-    IsOperatingSystemPluginThread() const override
-    {
-        return true;
-    }
-    
-    // If this memory thread is actually represented by a thread from the
-    // lldb_private::Process subclass, then fill in the thread here and
-    // all APIs will be routed through this thread object. If m_backing_thread_sp
-    // is empty, then this thread is simply in memory with no representation
-    // through the process plug-in.
-    lldb::ThreadSP m_backing_thread_sp;
-    lldb::ValueObjectSP m_thread_info_valobj_sp;
-    std::string m_name;
-    std::string m_queue;
-    lldb::addr_t m_register_data_addr;
+  bool IsOperatingSystemPluginThread() const override { return true; }
+
+  // If this memory thread is actually represented by a thread from the
+  // lldb_private::Process subclass, then fill in the thread here and
+  // all APIs will be routed through this thread object. If m_backing_thread_sp
+  // is empty, then this thread is simply in memory with no representation
+  // through the process plug-in.
+  lldb::ThreadSP m_backing_thread_sp;
+  lldb::ValueObjectSP m_thread_info_valobj_sp;
+  std::string m_name;
+  std::string m_queue;
+  lldb::addr_t m_register_data_addr;
 
 private:
-    DISALLOW_COPY_AND_ASSIGN (ThreadMemory);
+  DISALLOW_COPY_AND_ASSIGN(ThreadMemory);
 };
 
 #endif // liblldb_ThreadMemory_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindLLDB.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindLLDB.cpp
index 9be09c4..6e2a9a9 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindLLDB.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindLLDB.cpp
@@ -7,529 +7,532 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "lldb/Core/Module.h"
 #include "lldb/Core/Log.h"
+#include "lldb/Core/Module.h"
 #include "lldb/Symbol/FuncUnwinders.h"
 #include "lldb/Symbol/Function.h"
 #include "lldb/Symbol/UnwindPlan.h"
 #include "lldb/Target/ABI.h"
-#include "lldb/Target/Thread.h"
-#include "lldb/Target/Target.h"
 #include "lldb/Target/Process.h"
 #include "lldb/Target/RegisterContext.h"
+#include "lldb/Target/Target.h"
+#include "lldb/Target/Thread.h"
 
-#include "UnwindLLDB.h"
 #include "RegisterContextLLDB.h"
+#include "UnwindLLDB.h"
 
 using namespace lldb;
 using namespace lldb_private;
 
-UnwindLLDB::UnwindLLDB (Thread &thread) :
-    Unwind (thread),
-    m_frames(),
-    m_unwind_complete(false),
-    m_user_supplied_trap_handler_functions()
-{
-    ProcessSP process_sp(thread.GetProcess());
-    if (process_sp)
-    {
-        Args args;
-        process_sp->GetTarget().GetUserSpecifiedTrapHandlerNames (args);
-        size_t count = args.GetArgumentCount();
-        for (size_t i = 0; i < count; i++)
-        {
-            const char *func_name = args.GetArgumentAtIndex(i);
-            m_user_supplied_trap_handler_functions.push_back (ConstString (func_name));
-        }
+UnwindLLDB::UnwindLLDB(Thread &thread)
+    : Unwind(thread), m_frames(), m_unwind_complete(false),
+      m_user_supplied_trap_handler_functions() {
+  ProcessSP process_sp(thread.GetProcess());
+  if (process_sp) {
+    Args args;
+    process_sp->GetTarget().GetUserSpecifiedTrapHandlerNames(args);
+    size_t count = args.GetArgumentCount();
+    for (size_t i = 0; i < count; i++) {
+      const char *func_name = args.GetArgumentAtIndex(i);
+      m_user_supplied_trap_handler_functions.push_back(ConstString(func_name));
     }
+  }
 }
 
-uint32_t
-UnwindLLDB::DoGetFrameCount()
-{
-    if (!m_unwind_complete)
-    {
+uint32_t UnwindLLDB::DoGetFrameCount() {
+  if (!m_unwind_complete) {
 //#define DEBUG_FRAME_SPEED 1
 #if DEBUG_FRAME_SPEED
 #define FRAME_COUNT 10000
-        TimeValue time_value (TimeValue::Now());
+    using namespace std::chrono;
+    auto time_value = steady_clock::now();
 #endif
-        if (!AddFirstFrame ())
-            return 0;
+    if (!AddFirstFrame())
+      return 0;
 
-        ProcessSP process_sp (m_thread.GetProcess());
-        ABI *abi = process_sp ? process_sp->GetABI().get() : NULL;
+    ProcessSP process_sp(m_thread.GetProcess());
+    ABI *abi = process_sp ? process_sp->GetABI().get() : NULL;
 
-        while (AddOneMoreFrame (abi))
-        {
+    while (AddOneMoreFrame(abi)) {
 #if DEBUG_FRAME_SPEED
-            if ((m_frames.size() % FRAME_COUNT) == 0)
-            {
-                TimeValue now(TimeValue::Now());
-                uint64_t delta_t = now - time_value;
-                printf ("%u frames in %" PRIu64 ".%09llu ms (%g frames/sec)\n",
-                        FRAME_COUNT,
-                        delta_t / TimeValue::NanoSecPerSec, 
-                        delta_t % TimeValue::NanoSecPerSec,
-                        (float)FRAME_COUNT / ((float)delta_t / (float)TimeValue::NanoSecPerSec));
-                time_value = now;
-            }
+      if ((m_frames.size() % FRAME_COUNT) == 0) {
+        const auto now = steady_clock::now();
+        const auto delta_t = now - time_value;
+        printf("%u frames in %.9f ms (%g frames/sec)\n", FRAME_COUNT,
+               duration<double, std::milli>(delta_t).count(),
+               (float)FRAME_COUNT / duration<double>(delta_t).count());
+        time_value = now;
+      }
 #endif
-        }
     }
-    return m_frames.size ();
+  }
+  return m_frames.size();
 }
 
-bool
-UnwindLLDB::AddFirstFrame ()
-{
-    if (m_frames.size() > 0)
-        return true;
-        
-    ProcessSP process_sp (m_thread.GetProcess());
-    ABI *abi = process_sp ? process_sp->GetABI().get() : NULL;
+bool UnwindLLDB::AddFirstFrame() {
+  if (m_frames.size() > 0)
+    return true;
 
-    // First, set up the 0th (initial) frame
-    CursorSP first_cursor_sp(new Cursor ());
-    RegisterContextLLDBSP reg_ctx_sp (new RegisterContextLLDB (m_thread, 
-                                                               RegisterContextLLDBSP(), 
-                                                               first_cursor_sp->sctx, 
-                                                               0, *this));
-    if (reg_ctx_sp.get() == NULL)
-        goto unwind_done;
-    
-    if (!reg_ctx_sp->IsValid())
-        goto unwind_done;
+  ProcessSP process_sp(m_thread.GetProcess());
+  ABI *abi = process_sp ? process_sp->GetABI().get() : NULL;
 
-    if (!reg_ctx_sp->GetCFA (first_cursor_sp->cfa))
-        goto unwind_done;
+  // First, set up the 0th (initial) frame
+  CursorSP first_cursor_sp(new Cursor());
+  RegisterContextLLDBSP reg_ctx_sp(new RegisterContextLLDB(
+      m_thread, RegisterContextLLDBSP(), first_cursor_sp->sctx, 0, *this));
+  if (reg_ctx_sp.get() == NULL)
+    goto unwind_done;
 
-    if (!reg_ctx_sp->ReadPC (first_cursor_sp->start_pc))
-        goto unwind_done;
+  if (!reg_ctx_sp->IsValid())
+    goto unwind_done;
 
-    // Everything checks out, so release the auto pointer value and let the
-    // cursor own it in its shared pointer
-    first_cursor_sp->reg_ctx_lldb_sp = reg_ctx_sp;
-    m_frames.push_back (first_cursor_sp);
+  if (!reg_ctx_sp->GetCFA(first_cursor_sp->cfa))
+    goto unwind_done;
 
-    // Update the Full Unwind Plan for this frame if not valid
-    UpdateUnwindPlanForFirstFrameIfInvalid(abi);
+  if (!reg_ctx_sp->ReadPC(first_cursor_sp->start_pc))
+    goto unwind_done;
 
-    return true;
+  // Everything checks out, so release the auto pointer value and let the
+  // cursor own it in its shared pointer
+  first_cursor_sp->reg_ctx_lldb_sp = reg_ctx_sp;
+  m_frames.push_back(first_cursor_sp);
+
+  // Update the Full Unwind Plan for this frame if not valid
+  UpdateUnwindPlanForFirstFrameIfInvalid(abi);
+
+  return true;
 
 unwind_done:
-    Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
-    if (log)
-    {
-        log->Printf ("th%d Unwind of this thread is complete.", m_thread.GetIndexID());
-    }
-    m_unwind_complete = true;
-    return false;
+  Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+  if (log) {
+    log->Printf("th%d Unwind of this thread is complete.",
+                m_thread.GetIndexID());
+  }
+  m_unwind_complete = true;
+  return false;
 }
 
-UnwindLLDB::CursorSP
-UnwindLLDB::GetOneMoreFrame (ABI* abi)
-{
-    assert (m_frames.size() != 0 && "Get one more frame called with empty frame list");
-
-    // If we've already gotten to the end of the stack, don't bother to try again...
-    if (m_unwind_complete)
-        return nullptr;
-        
-    Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
-
-    CursorSP prev_frame = m_frames.back();
-    uint32_t cur_idx = m_frames.size();
-
-    CursorSP cursor_sp(new Cursor ());
-    RegisterContextLLDBSP reg_ctx_sp(new RegisterContextLLDB (m_thread, 
-                                                              prev_frame->reg_ctx_lldb_sp, 
-                                                              cursor_sp->sctx, 
-                                                              cur_idx, 
-                                                              *this));
-
-    // We want to detect an unwind that cycles erroneously and stop backtracing.
-    // Don't want this maximum unwind limit to be too low -- if you have a backtrace
-    // with an "infinitely recursing" bug, it will crash when the stack blows out
-    // and the first 35,000 frames are uninteresting - it's the top most 5 frames that
-    // you actually care about.  So you can't just cap the unwind at 10,000 or something.
-    // Realistically anything over around 200,000 is going to blow out the stack space.
-    // If we're still unwinding at that point, we're probably never going to finish.
-    if (cur_idx > 300000)
-    {
-        if (log)
-            log->Printf ("%*sFrame %d unwound too many frames, assuming unwind has gone astray, stopping.", 
-                         cur_idx < 100 ? cur_idx : 100, "", cur_idx);
+UnwindLLDB::CursorSP UnwindLLDB::GetOneMoreFrame(ABI *abi) {
+  assert(m_frames.size() != 0 &&
+         "Get one more frame called with empty frame list");
+
+  // If we've already gotten to the end of the stack, don't bother to try
+  // again...
+  if (m_unwind_complete)
+    return nullptr;
+
+  Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
+
+  CursorSP prev_frame = m_frames.back();
+  uint32_t cur_idx = m_frames.size();
+
+  CursorSP cursor_sp(new Cursor());
+  RegisterContextLLDBSP reg_ctx_sp(new RegisterContextLLDB(
+      m_thread, prev_frame->reg_ctx_lldb_sp, cursor_sp->sctx, cur_idx, *this));
+
+  // We want to detect an unwind that cycles erroneously and stop backtracing.
+  // Don't want this maximum unwind limit to be too low -- if you have a
+  // backtrace
+  // with an "infinitely recursing" bug, it will crash when the stack blows out
+  // and the first 35,000 frames are uninteresting - it's the top most 5 frames
+  // that
+  // you actually care about.  So you can't just cap the unwind at 10,000 or
+  // something.
+  // Realistically anything over around 200,000 is going to blow out the stack
+  // space.
+  // If we're still unwinding at that point, we're probably never going to
+  // finish.
+  if (cur_idx > 300000) {
+    if (log)
+      log->Printf("%*sFrame %d unwound too many frames, assuming unwind has "
+                  "gone astray, stopping.",
+                  cur_idx < 100 ? cur_idx : 100, "", cur_idx);
+    return nullptr;
+  }
+
+  if (reg_ctx_sp.get() == NULL) {
+    // If the RegisterContextLLDB has a fallback UnwindPlan, it will switch to
+    // that and return
+    // true.  Subsequent calls to TryFallbackUnwindPlan() will return false.
+    if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) {
+      // TryFallbackUnwindPlan for prev_frame succeeded and updated
+      // reg_ctx_lldb_sp field of
+      // prev_frame. However, cfa field of prev_frame still needs to be updated.
+      // Hence updating it.
+      if (!(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa)))
         return nullptr;
-    }
-
-    if (reg_ctx_sp.get() == NULL)
-    {
-        // If the RegisterContextLLDB has a fallback UnwindPlan, it will switch to that and return
-        // true.  Subsequent calls to TryFallbackUnwindPlan() will return false.
-        if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan())
-        {
-            // TryFallbackUnwindPlan for prev_frame succeeded and updated reg_ctx_lldb_sp field of
-            // prev_frame. However, cfa field of prev_frame still needs to be updated. Hence updating it.
-            if ( !(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa)))
-                return nullptr;
-
-            return GetOneMoreFrame (abi);
-        }
 
-        if (log)
-            log->Printf ("%*sFrame %d did not get a RegisterContext, stopping.",
-                         cur_idx < 100 ? cur_idx : 100, "", cur_idx);
-        return nullptr;
+      return GetOneMoreFrame(abi);
     }
 
-    if (!reg_ctx_sp->IsValid())
-    {
-        // We failed to get a valid RegisterContext.
-        // See if the regctx below this on the stack has a fallback unwind plan it can use.
-        // Subsequent calls to TryFallbackUnwindPlan() will return false.
-        if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan())
-        {
-            // TryFallbackUnwindPlan for prev_frame succeeded and updated reg_ctx_lldb_sp field of
-            // prev_frame. However, cfa field of prev_frame still needs to be updated. Hence updating it.
-            if ( !(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa)))
-                return nullptr;
-
-            return GetOneMoreFrame (abi);
-        }
-
-        if (log)
-            log->Printf("%*sFrame %d invalid RegisterContext for this frame, stopping stack walk", 
-                        cur_idx < 100 ? cur_idx : 100, "", cur_idx);
+    if (log)
+      log->Printf("%*sFrame %d did not get a RegisterContext, stopping.",
+                  cur_idx < 100 ? cur_idx : 100, "", cur_idx);
+    return nullptr;
+  }
+
+  if (!reg_ctx_sp->IsValid()) {
+    // We failed to get a valid RegisterContext.
+    // See if the regctx below this on the stack has a fallback unwind plan it
+    // can use.
+    // Subsequent calls to TryFallbackUnwindPlan() will return false.
+    if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) {
+      // TryFallbackUnwindPlan for prev_frame succeeded and updated
+      // reg_ctx_lldb_sp field of
+      // prev_frame. However, cfa field of prev_frame still needs to be updated.
+      // Hence updating it.
+      if (!(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa)))
         return nullptr;
+
+      return GetOneMoreFrame(abi);
     }
-    if (!reg_ctx_sp->GetCFA (cursor_sp->cfa))
-    {
-        // If the RegisterContextLLDB has a fallback UnwindPlan, it will switch to that and return
-        // true.  Subsequent calls to TryFallbackUnwindPlan() will return false.
-        if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan())
-        {
-            // TryFallbackUnwindPlan for prev_frame succeeded and updated reg_ctx_lldb_sp field of
-            // prev_frame. However, cfa field of prev_frame still needs to be updated. Hence updating it.
-            if ( !(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa)))
-                return nullptr;
-
-            return GetOneMoreFrame (abi);
-        }
 
-        if (log)
-            log->Printf("%*sFrame %d did not get CFA for this frame, stopping stack walk",
-                        cur_idx < 100 ? cur_idx : 100, "", cur_idx);
+    if (log)
+      log->Printf("%*sFrame %d invalid RegisterContext for this frame, "
+                  "stopping stack walk",
+                  cur_idx < 100 ? cur_idx : 100, "", cur_idx);
+    return nullptr;
+  }
+  if (!reg_ctx_sp->GetCFA(cursor_sp->cfa)) {
+    // If the RegisterContextLLDB has a fallback UnwindPlan, it will switch to
+    // that and return
+    // true.  Subsequent calls to TryFallbackUnwindPlan() will return false.
+    if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) {
+      // TryFallbackUnwindPlan for prev_frame succeeded and updated
+      // reg_ctx_lldb_sp field of
+      // prev_frame. However, cfa field of prev_frame still needs to be updated.
+      // Hence updating it.
+      if (!(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa)))
         return nullptr;
+
+      return GetOneMoreFrame(abi);
     }
-    if (abi && !abi->CallFrameAddressIsValid(cursor_sp->cfa))
-    {
-        // On Mac OS X, the _sigtramp asynchronous signal trampoline frame may not have
-        // its (constructed) CFA aligned correctly -- don't do the abi alignment check for
-        // these.
-        if (reg_ctx_sp->IsTrapHandlerFrame() == false)
-        {
-            // See if we can find a fallback unwind plan for THIS frame.  It may be
-            // that the UnwindPlan we're using for THIS frame was bad and gave us a
-            // bad CFA.  
-            // If that's not it, then see if we can change the UnwindPlan for the frame
-            // below us ("NEXT") -- see if using that other UnwindPlan gets us a better
-            // unwind state.
-            if (reg_ctx_sp->TryFallbackUnwindPlan() == false
-                || reg_ctx_sp->GetCFA (cursor_sp->cfa) == false
-                || abi->CallFrameAddressIsValid(cursor_sp->cfa) == false)
-            {
-                if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan())
-                {
-                    // TryFallbackUnwindPlan for prev_frame succeeded and updated reg_ctx_lldb_sp field of
-                    // prev_frame. However, cfa field of prev_frame still needs to be updated. Hence updating it.
-                    if ( !(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa)))
-                        return nullptr;
-
-                    return GetOneMoreFrame (abi);
-                }
-
-                if (log)
-                    log->Printf("%*sFrame %d did not get a valid CFA for this frame, stopping stack walk",
-                                cur_idx < 100 ? cur_idx : 100, "", cur_idx);
-                return nullptr;
-            }
-            else
-            {
-                if (log)
-                    log->Printf("%*sFrame %d had a bad CFA value but we switched the UnwindPlan being used and got one that looks more realistic.",
-                                cur_idx < 100 ? cur_idx : 100, "", cur_idx);
-            }
-        }
-    }
-    if (!reg_ctx_sp->ReadPC (cursor_sp->start_pc))
-    {
-        // If the RegisterContextLLDB has a fallback UnwindPlan, it will switch to that and return
-        // true.  Subsequent calls to TryFallbackUnwindPlan() will return false.
-        if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan())
-        {
-            // TryFallbackUnwindPlan for prev_frame succeeded and updated reg_ctx_lldb_sp field of
-            // prev_frame. However, cfa field of prev_frame still needs to be updated. Hence updating it.
-            if ( !(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa)))
-                return nullptr;
-
-            return GetOneMoreFrame (abi);
+
+    if (log)
+      log->Printf(
+          "%*sFrame %d did not get CFA for this frame, stopping stack walk",
+          cur_idx < 100 ? cur_idx : 100, "", cur_idx);
+    return nullptr;
+  }
+  if (abi && !abi->CallFrameAddressIsValid(cursor_sp->cfa)) {
+    // On Mac OS X, the _sigtramp asynchronous signal trampoline frame may not
+    // have
+    // its (constructed) CFA aligned correctly -- don't do the abi alignment
+    // check for
+    // these.
+    if (reg_ctx_sp->IsTrapHandlerFrame() == false) {
+      // See if we can find a fallback unwind plan for THIS frame.  It may be
+      // that the UnwindPlan we're using for THIS frame was bad and gave us a
+      // bad CFA.
+      // If that's not it, then see if we can change the UnwindPlan for the
+      // frame
+      // below us ("NEXT") -- see if using that other UnwindPlan gets us a
+      // better
+      // unwind state.
+      if (reg_ctx_sp->TryFallbackUnwindPlan() == false ||
+          reg_ctx_sp->GetCFA(cursor_sp->cfa) == false ||
+          abi->CallFrameAddressIsValid(cursor_sp->cfa) == false) {
+        if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) {
+          // TryFallbackUnwindPlan for prev_frame succeeded and updated
+          // reg_ctx_lldb_sp field of
+          // prev_frame. However, cfa field of prev_frame still needs to be
+          // updated. Hence updating it.
+          if (!(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa)))
+            return nullptr;
+
+          return GetOneMoreFrame(abi);
         }
 
         if (log)
-            log->Printf("%*sFrame %d did not get PC for this frame, stopping stack walk",
-                        cur_idx < 100 ? cur_idx : 100, "", cur_idx);
+          log->Printf("%*sFrame %d did not get a valid CFA for this frame, "
+                      "stopping stack walk",
+                      cur_idx < 100 ? cur_idx : 100, "", cur_idx);
         return nullptr;
-    }
-    if (abi && !abi->CodeAddressIsValid (cursor_sp->start_pc))
-    {
-        // If the RegisterContextLLDB has a fallback UnwindPlan, it will switch to that and return
-        // true.  Subsequent calls to TryFallbackUnwindPlan() will return false.
-        if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan())
-        {
-            // TryFallbackUnwindPlan for prev_frame succeeded and updated reg_ctx_lldb_sp field of
-            // prev_frame. However, cfa field of prev_frame still needs to be updated. Hence updating it.
-            if ( !(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa)))
-                return nullptr;
-
-            return GetOneMoreFrame (abi);
-        }
-
+      } else {
         if (log)
-            log->Printf("%*sFrame %d did not get a valid PC, stopping stack walk",
-                        cur_idx < 100 ? cur_idx : 100, "", cur_idx);
+          log->Printf("%*sFrame %d had a bad CFA value but we switched the "
+                      "UnwindPlan being used and got one that looks more "
+                      "realistic.",
+                      cur_idx < 100 ? cur_idx : 100, "", cur_idx);
+      }
+    }
+  }
+  if (!reg_ctx_sp->ReadPC(cursor_sp->start_pc)) {
+    // If the RegisterContextLLDB has a fallback UnwindPlan, it will switch to
+    // that and return
+    // true.  Subsequent calls to TryFallbackUnwindPlan() will return false.
+    if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) {
+      // TryFallbackUnwindPlan for prev_frame succeeded and updated
+      // reg_ctx_lldb_sp field of
+      // prev_frame. However, cfa field of prev_frame still needs to be updated.
+      // Hence updating it.
+      if (!(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa)))
         return nullptr;
+
+      return GetOneMoreFrame(abi);
     }
-    // Infinite loop where the current cursor is the same as the previous one...
-    if (prev_frame->start_pc == cursor_sp->start_pc && prev_frame->cfa == cursor_sp->cfa)
-    {
-        if (log)
-            log->Printf ("th%d pc of this frame is the same as the previous frame and CFAs for both frames are identical -- stopping unwind", m_thread.GetIndexID());
+
+    if (log)
+      log->Printf(
+          "%*sFrame %d did not get PC for this frame, stopping stack walk",
+          cur_idx < 100 ? cur_idx : 100, "", cur_idx);
+    return nullptr;
+  }
+  if (abi && !abi->CodeAddressIsValid(cursor_sp->start_pc)) {
+    // If the RegisterContextLLDB has a fallback UnwindPlan, it will switch to
+    // that and return
+    // true.  Subsequent calls to TryFallbackUnwindPlan() will return false.
+    if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) {
+      // TryFallbackUnwindPlan for prev_frame succeeded and updated
+      // reg_ctx_lldb_sp field of
+      // prev_frame. However, cfa field of prev_frame still needs to be updated.
+      // Hence updating it.
+      if (!(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa)))
         return nullptr;
+
+      return GetOneMoreFrame(abi);
     }
 
-    cursor_sp->reg_ctx_lldb_sp = reg_ctx_sp;
-    return cursor_sp;
+    if (log)
+      log->Printf("%*sFrame %d did not get a valid PC, stopping stack walk",
+                  cur_idx < 100 ? cur_idx : 100, "", cur_idx);
+    return nullptr;
+  }
+  // Infinite loop where the current cursor is the same as the previous one...
+  if (prev_frame->start_pc == cursor_sp->start_pc &&
+      prev_frame->cfa == cursor_sp->cfa) {
+    if (log)
+      log->Printf("th%d pc of this frame is the same as the previous frame and "
+                  "CFAs for both frames are identical -- stopping unwind",
+                  m_thread.GetIndexID());
+    return nullptr;
+  }
+
+  cursor_sp->reg_ctx_lldb_sp = reg_ctx_sp;
+  return cursor_sp;
 }
 
-void
-UnwindLLDB::UpdateUnwindPlanForFirstFrameIfInvalid (ABI *abi)
-{
-    // This function is called for First Frame only.
-    assert (m_frames.size() == 1 && "No. of cursor frames are not 1");
-
-    bool old_m_unwind_complete = m_unwind_complete;
-    CursorSP old_m_candidate_frame = m_candidate_frame;
-
-    // Try to unwind 2 more frames using the Unwinder. It uses Full UnwindPlan
-    // and if Full UnwindPlan fails, then uses FallBack UnwindPlan. Also
-    // update the cfa of Frame 0 (if required).
-    AddOneMoreFrame(abi);
-
-    // Remove all the frames added by above function as the purpose of
-    // using above function was just to check whether Unwinder of Frame 0
-    // works or not.
-    for(uint32_t i=1; i<m_frames.size(); i++)
-        m_frames.pop_back();
-
-    // Restore status after calling AddOneMoreFrame
-    m_unwind_complete = old_m_unwind_complete;
-    m_candidate_frame = old_m_candidate_frame;
-    return;
-}
+void UnwindLLDB::UpdateUnwindPlanForFirstFrameIfInvalid(ABI *abi) {
+  // This function is called for First Frame only.
+  assert(m_frames.size() == 1 && "No. of cursor frames are not 1");
 
+  bool old_m_unwind_complete = m_unwind_complete;
+  CursorSP old_m_candidate_frame = m_candidate_frame;
 
-bool
-UnwindLLDB::AddOneMoreFrame (ABI *abi)
-{
-    Log *log(GetLogIfAllCategoriesSet (LIBLLDB_LOG_UNWIND));
+  // Try to unwind 2 more frames using the Unwinder. It uses Full UnwindPlan
+  // and if Full UnwindPlan fails, then uses FallBack UnwindPlan. Also
+  // update the cfa of Frame 0 (if required).
+  AddOneMoreFrame(abi);
 
-    // Frame zero is a little different
-    if (m_frames.empty())
-        return false;
+  // Remove all the frames added by above function as the purpose of
+  // using above function was just to check whether Unwinder of Frame 0
+  // works or not.
+  for (uint32_t i = 1; i < m_frames.size(); i++)
+    m_frames.pop_back();
 
-    // If we've already gotten to the end of the stack, don't bother to try again...
-    if (m_unwind_complete)
-        return false;
+  // Restore status after calling AddOneMoreFrame
+  m_unwind_complete = old_m_unwind_complete;
+  m_candidate_frame = old_m_candidate_frame;
+  return;
+}
 
-    CursorSP new_frame = m_candidate_frame;
-    if (new_frame == nullptr)
-        new_frame = GetOneMoreFrame(abi);
+bool UnwindLLDB::AddOneMoreFrame(ABI *abi) {
+  Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
 
-    if (new_frame == nullptr)
-    {
-        if (log)
-            log->Printf ("th%d Unwind of this thread is complete.", m_thread.GetIndexID());
-        m_unwind_complete = true;
-        return false;
-    }
+  // Frame zero is a little different
+  if (m_frames.empty())
+    return false;
 
-    m_frames.push_back(new_frame);
+  // If we've already gotten to the end of the stack, don't bother to try
+  // again...
+  if (m_unwind_complete)
+    return false;
 
-    // If we can get one more frame further then accept that we get back a correct frame.
-    m_candidate_frame = GetOneMoreFrame(abi);
-    if (m_candidate_frame)
-        return true;
-
-    // We can't go further from the frame returned by GetOneMore frame. Lets try to get a
-    // different frame with using the fallback unwind plan.
-    if (!m_frames[m_frames.size() - 2]->reg_ctx_lldb_sp->TryFallbackUnwindPlan())
-    {
-        // We don't have a valid fallback unwind plan. Accept the frame as it is. This is a
-        // valid situation when we are at the bottom of the stack.
-        return true;
-    }
+  CursorSP new_frame = m_candidate_frame;
+  if (new_frame == nullptr)
+    new_frame = GetOneMoreFrame(abi);
 
-    // Remove the possibly incorrect frame from the frame list and try to add a different one with
-    // the newly selected fallback unwind plan.
-    m_frames.pop_back();
-    CursorSP new_frame_v2 = GetOneMoreFrame(abi);
-    if (new_frame_v2 == nullptr)
-    {
-        // We haven't got a new frame from the fallback unwind plan. Accept the frame from the
-        // original unwind plan. This is a valid situation when we are at the bottom of the stack.
-        m_frames.push_back(new_frame);
-        return true;
-    }
+  if (new_frame == nullptr) {
+    if (log)
+      log->Printf("th%d Unwind of this thread is complete.",
+                  m_thread.GetIndexID());
+    m_unwind_complete = true;
+    return false;
+  }
 
-    // Push the new frame to the list and try to continue from this frame. If we can get a new frame
-    // then accept it as the correct one.
-    m_frames.push_back(new_frame_v2);
-    m_candidate_frame = GetOneMoreFrame(abi);
-    if (m_candidate_frame)
-    {
-        // If control reached here then TryFallbackUnwindPlan had succeeded for Cursor::m_frames[m_frames.size() - 2].
-        // It also succeeded to Unwind next 2 frames i.e. m_frames[m_frames.size() - 1] and a frame after that.
-        // For Cursor::m_frames[m_frames.size() - 2], reg_ctx_lldb_sp field was already updated during TryFallbackUnwindPlan
-        // call above. However, cfa field still needs to be updated. Hence updating it here and then returning.
-        if ( !(m_frames[m_frames.size() - 2]->reg_ctx_lldb_sp->GetCFA(m_frames[m_frames.size() - 2]->cfa)))
-            return false;
-        return true;
-    }
+  m_frames.push_back(new_frame);
 
-    // The new frame hasn't helped in unwinding. Fall back to the original one as the default unwind
-    // plan is usually more reliable then the fallback one.
-    m_frames.pop_back();
+  // If we can get one more frame further then accept that we get back a correct
+  // frame.
+  m_candidate_frame = GetOneMoreFrame(abi);
+  if (m_candidate_frame)
+    return true;
+
+  // We can't go further from the frame returned by GetOneMore frame. Lets try
+  // to get a
+  // different frame with using the fallback unwind plan.
+  if (!m_frames[m_frames.size() - 2]
+           ->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) {
+    // We don't have a valid fallback unwind plan. Accept the frame as it is.
+    // This is a
+    // valid situation when we are at the bottom of the stack.
+    return true;
+  }
+
+  // Remove the possibly incorrect frame from the frame list and try to add a
+  // different one with
+  // the newly selected fallback unwind plan.
+  m_frames.pop_back();
+  CursorSP new_frame_v2 = GetOneMoreFrame(abi);
+  if (new_frame_v2 == nullptr) {
+    // We haven't got a new frame from the fallback unwind plan. Accept the
+    // frame from the
+    // original unwind plan. This is a valid situation when we are at the bottom
+    // of the stack.
     m_frames.push_back(new_frame);
     return true;
+  }
+
+  // Push the new frame to the list and try to continue from this frame. If we
+  // can get a new frame
+  // then accept it as the correct one.
+  m_frames.push_back(new_frame_v2);
+  m_candidate_frame = GetOneMoreFrame(abi);
+  if (m_candidate_frame) {
+    // If control reached here then TryFallbackUnwindPlan had succeeded for
+    // Cursor::m_frames[m_frames.size() - 2].
+    // It also succeeded to Unwind next 2 frames i.e. m_frames[m_frames.size() -
+    // 1] and a frame after that.
+    // For Cursor::m_frames[m_frames.size() - 2], reg_ctx_lldb_sp field was
+    // already updated during TryFallbackUnwindPlan
+    // call above. However, cfa field still needs to be updated. Hence updating
+    // it here and then returning.
+    if (!(m_frames[m_frames.size() - 2]->reg_ctx_lldb_sp->GetCFA(
+            m_frames[m_frames.size() - 2]->cfa)))
+      return false;
+    return true;
+  }
+
+  // The new frame hasn't helped in unwinding. Fall back to the original one as
+  // the default unwind
+  // plan is usually more reliable then the fallback one.
+  m_frames.pop_back();
+  m_frames.push_back(new_frame);
+  return true;
 }
 
-bool
-UnwindLLDB::DoGetFrameInfoAtIndex (uint32_t idx, addr_t& cfa, addr_t& pc)
-{
-    if (m_frames.size() == 0)
-    {
-        if (!AddFirstFrame())
-            return false;
-    }
+bool UnwindLLDB::DoGetFrameInfoAtIndex(uint32_t idx, addr_t &cfa, addr_t &pc) {
+  if (m_frames.size() == 0) {
+    if (!AddFirstFrame())
+      return false;
+  }
 
-    ProcessSP process_sp (m_thread.GetProcess());
-    ABI *abi = process_sp ? process_sp->GetABI().get() : NULL;
+  ProcessSP process_sp(m_thread.GetProcess());
+  ABI *abi = process_sp ? process_sp->GetABI().get() : NULL;
 
-    while (idx >= m_frames.size() && AddOneMoreFrame (abi))
-        ;
+  while (idx >= m_frames.size() && AddOneMoreFrame(abi))
+    ;
 
-    if (idx < m_frames.size ())
-    {
-        cfa = m_frames[idx]->cfa;
-        pc = m_frames[idx]->start_pc;
-        return true;
-    }
-    return false;
+  if (idx < m_frames.size()) {
+    cfa = m_frames[idx]->cfa;
+    pc = m_frames[idx]->start_pc;
+    return true;
+  }
+  return false;
 }
 
 lldb::RegisterContextSP
-UnwindLLDB::DoCreateRegisterContextForFrame (StackFrame *frame)
-{
-    lldb::RegisterContextSP reg_ctx_sp;
-    uint32_t idx = frame->GetConcreteFrameIndex ();
-
-    if (idx == 0)
-    {
-        return m_thread.GetRegisterContext();
-    }
-
-    if (m_frames.size() == 0)
-    {
-        if (!AddFirstFrame())
-            return reg_ctx_sp;
-    }
-
-    ProcessSP process_sp (m_thread.GetProcess());
-    ABI *abi = process_sp ? process_sp->GetABI().get() : NULL;
-
-    while (idx >= m_frames.size())
-    {
-        if (!AddOneMoreFrame (abi))
-            break;
-    }
-
-    const uint32_t num_frames = m_frames.size();
-    if (idx < num_frames)
-    {
-        Cursor *frame_cursor = m_frames[idx].get();
-        reg_ctx_sp = frame_cursor->reg_ctx_lldb_sp;
-    }
-    return reg_ctx_sp;
+UnwindLLDB::DoCreateRegisterContextForFrame(StackFrame *frame) {
+  lldb::RegisterContextSP reg_ctx_sp;
+  uint32_t idx = frame->GetConcreteFrameIndex();
+
+  if (idx == 0) {
+    return m_thread.GetRegisterContext();
+  }
+
+  if (m_frames.size() == 0) {
+    if (!AddFirstFrame())
+      return reg_ctx_sp;
+  }
+
+  ProcessSP process_sp(m_thread.GetProcess());
+  ABI *abi = process_sp ? process_sp->GetABI().get() : NULL;
+
+  while (idx >= m_frames.size()) {
+    if (!AddOneMoreFrame(abi))
+      break;
+  }
+
+  const uint32_t num_frames = m_frames.size();
+  if (idx < num_frames) {
+    Cursor *frame_cursor = m_frames[idx].get();
+    reg_ctx_sp = frame_cursor->reg_ctx_lldb_sp;
+  }
+  return reg_ctx_sp;
 }
 
 UnwindLLDB::RegisterContextLLDBSP
-UnwindLLDB::GetRegisterContextForFrameNum (uint32_t frame_num)
-{
-    RegisterContextLLDBSP reg_ctx_sp;
-    if (frame_num < m_frames.size())
-        reg_ctx_sp = m_frames[frame_num]->reg_ctx_lldb_sp;
-    return reg_ctx_sp;
+UnwindLLDB::GetRegisterContextForFrameNum(uint32_t frame_num) {
+  RegisterContextLLDBSP reg_ctx_sp;
+  if (frame_num < m_frames.size())
+    reg_ctx_sp = m_frames[frame_num]->reg_ctx_lldb_sp;
+  return reg_ctx_sp;
 }
 
-bool
-UnwindLLDB::SearchForSavedLocationForRegister (uint32_t lldb_regnum, lldb_private::UnwindLLDB::RegisterLocation &regloc, uint32_t starting_frame_num, bool pc_reg)
-{
-    int64_t frame_num = starting_frame_num;
-    if (static_cast<size_t>(frame_num) >= m_frames.size())
-        return false;
-
-    // Never interrogate more than one level while looking for the saved pc value.  If the value
-    // isn't saved by frame_num, none of the frames lower on the stack will have a useful value.
-    if (pc_reg)
-    {
-        UnwindLLDB::RegisterSearchResult result;
-        result = m_frames[frame_num]->reg_ctx_lldb_sp->SavedLocationForRegister (lldb_regnum, regloc);
-        if (result == UnwindLLDB::RegisterSearchResult::eRegisterFound)
-          return true;
-        else
-          return false;
-    }
-    while (frame_num >= 0)
-    {
-        UnwindLLDB::RegisterSearchResult result;
-        result = m_frames[frame_num]->reg_ctx_lldb_sp->SavedLocationForRegister (lldb_regnum, regloc);
-
-        // We descended down to the live register context aka stack frame 0 and are reading the value
-        // out of a live register.
-        if (result == UnwindLLDB::RegisterSearchResult::eRegisterFound
-            && regloc.type == UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext)
-        {
-            return true;
-        }
+bool UnwindLLDB::SearchForSavedLocationForRegister(
+    uint32_t lldb_regnum, lldb_private::UnwindLLDB::RegisterLocation &regloc,
+    uint32_t starting_frame_num, bool pc_reg) {
+  int64_t frame_num = starting_frame_num;
+  if (static_cast<size_t>(frame_num) >= m_frames.size())
+    return false;
 
-        // If we have unwind instructions saying that register N is saved in register M in the middle of
-        // the stack (and N can equal M here, meaning the register was not used in this function), then
-        // change the register number we're looking for to M and keep looking for a concrete  location 
-        // down the stack, or an actual value from a live RegisterContext at frame 0.
-        if (result == UnwindLLDB::RegisterSearchResult::eRegisterFound
-            && regloc.type == UnwindLLDB::RegisterLocation::eRegisterInRegister
-            && frame_num > 0)
-        {
-            result = UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
-            lldb_regnum = regloc.location.register_number;
-        }
+  // Never interrogate more than one level while looking for the saved pc value.
+  // If the value
+  // isn't saved by frame_num, none of the frames lower on the stack will have a
+  // useful value.
+  if (pc_reg) {
+    UnwindLLDB::RegisterSearchResult result;
+    result = m_frames[frame_num]->reg_ctx_lldb_sp->SavedLocationForRegister(
+        lldb_regnum, regloc);
+    if (result == UnwindLLDB::RegisterSearchResult::eRegisterFound)
+      return true;
+    else
+      return false;
+  }
+  while (frame_num >= 0) {
+    UnwindLLDB::RegisterSearchResult result;
+    result = m_frames[frame_num]->reg_ctx_lldb_sp->SavedLocationForRegister(
+        lldb_regnum, regloc);
+
+    // We descended down to the live register context aka stack frame 0 and are
+    // reading the value
+    // out of a live register.
+    if (result == UnwindLLDB::RegisterSearchResult::eRegisterFound &&
+        regloc.type ==
+            UnwindLLDB::RegisterLocation::eRegisterInLiveRegisterContext) {
+      return true;
+    }
 
-        if (result == UnwindLLDB::RegisterSearchResult::eRegisterFound)
-            return true;
-        if (result == UnwindLLDB::RegisterSearchResult::eRegisterIsVolatile)
-            return false;
-        frame_num--;
+    // If we have unwind instructions saying that register N is saved in
+    // register M in the middle of
+    // the stack (and N can equal M here, meaning the register was not used in
+    // this function), then
+    // change the register number we're looking for to M and keep looking for a
+    // concrete  location
+    // down the stack, or an actual value from a live RegisterContext at frame
+    // 0.
+    if (result == UnwindLLDB::RegisterSearchResult::eRegisterFound &&
+        regloc.type == UnwindLLDB::RegisterLocation::eRegisterInRegister &&
+        frame_num > 0) {
+      result = UnwindLLDB::RegisterSearchResult::eRegisterNotFound;
+      lldb_regnum = regloc.location.register_number;
     }
-    return false;
+
+    if (result == UnwindLLDB::RegisterSearchResult::eRegisterFound)
+      return true;
+    if (result == UnwindLLDB::RegisterSearchResult::eRegisterIsVolatile)
+      return false;
+    frame_num--;
+  }
+  return false;
 }
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindLLDB.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindLLDB.h
index d3c0707..b932303 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindLLDB.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindLLDB.h
@@ -16,148 +16,150 @@
 
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-public.h"
 #include "lldb/Core/ConstString.h"
 #include "lldb/Symbol/FuncUnwinders.h"
 #include "lldb/Symbol/UnwindPlan.h"
 #include "lldb/Target/RegisterContext.h"
 #include "lldb/Target/Unwind.h"
+#include "lldb/lldb-public.h"
 
 namespace lldb_private {
 
 class RegisterContextLLDB;
 
-class UnwindLLDB : public lldb_private::Unwind
-{
-public: 
-    UnwindLLDB (lldb_private::Thread &thread);
+class UnwindLLDB : public lldb_private::Unwind {
+public:
+  UnwindLLDB(lldb_private::Thread &thread);
 
-    ~UnwindLLDB() override = default;
+  ~UnwindLLDB() override = default;
 
-    enum RegisterSearchResult
-    {
-        eRegisterFound = 0,
-        eRegisterNotFound,
-        eRegisterIsVolatile
-    };
+  enum RegisterSearchResult {
+    eRegisterFound = 0,
+    eRegisterNotFound,
+    eRegisterIsVolatile
+  };
 
 protected:
-    friend class lldb_private::RegisterContextLLDB;
-
-    struct RegisterLocation {
-        enum RegisterLocationTypes
-        {
-            eRegisterNotSaved = 0,              // register was not preserved by callee.  If volatile reg, is unavailable
-            eRegisterSavedAtMemoryLocation,     // register is saved at a specific word of target mem (target_memory_location)
-            eRegisterInRegister,                // register is available in a (possible other) register (register_number)
-            eRegisterSavedAtHostMemoryLocation, // register is saved at a word in lldb's address space
-            eRegisterValueInferred,             // register val was computed (and is in inferred_value)
-            eRegisterInLiveRegisterContext      // register value is in a live (stack frame #0) register
-        };
-        int type;
-        union
-        {
-            lldb::addr_t target_memory_location;
-            uint32_t     register_number;       // in eRegisterKindLLDB register numbering system
-            void*        host_memory_location;
-            uint64_t     inferred_value;        // eRegisterValueInferred - e.g. stack pointer == cfa + offset
-        } location;
+  friend class lldb_private::RegisterContextLLDB;
+
+  struct RegisterLocation {
+    enum RegisterLocationTypes {
+      eRegisterNotSaved = 0, // register was not preserved by callee.  If
+                             // volatile reg, is unavailable
+      eRegisterSavedAtMemoryLocation, // register is saved at a specific word of
+                                      // target mem (target_memory_location)
+      eRegisterInRegister, // register is available in a (possible other)
+                           // register (register_number)
+      eRegisterSavedAtHostMemoryLocation, // register is saved at a word in
+                                          // lldb's address space
+      eRegisterValueInferred,        // register val was computed (and is in
+                                     // inferred_value)
+      eRegisterInLiveRegisterContext // register value is in a live (stack frame
+                                     // #0) register
     };
+    int type;
+    union {
+      lldb::addr_t target_memory_location;
+      uint32_t
+          register_number; // in eRegisterKindLLDB register numbering system
+      void *host_memory_location;
+      uint64_t inferred_value; // eRegisterValueInferred - e.g. stack pointer ==
+                               // cfa + offset
+    } location;
+  };
+
+  void DoClear() override {
+    m_frames.clear();
+    m_candidate_frame.reset();
+    m_unwind_complete = false;
+  }
+
+  uint32_t DoGetFrameCount() override;
+
+  bool DoGetFrameInfoAtIndex(uint32_t frame_idx, lldb::addr_t &cfa,
+                             lldb::addr_t &start_pc) override;
+
+  lldb::RegisterContextSP
+  DoCreateRegisterContextForFrame(lldb_private::StackFrame *frame) override;
+
+  typedef std::shared_ptr<RegisterContextLLDB> RegisterContextLLDBSP;
+
+  // Needed to retrieve the "next" frame (e.g. frame 2 needs to retrieve frame
+  // 1's RegisterContextLLDB)
+  // The RegisterContext for frame_num must already exist or this returns an
+  // empty shared pointer.
+  RegisterContextLLDBSP GetRegisterContextForFrameNum(uint32_t frame_num);
+
+  // Iterate over the RegisterContextLLDB's in our m_frames vector, look for the
+  // first one that
+  // has a saved location for this reg.
+  bool SearchForSavedLocationForRegister(
+      uint32_t lldb_regnum, lldb_private::UnwindLLDB::RegisterLocation &regloc,
+      uint32_t starting_frame_num, bool pc_register);
+
+  //------------------------------------------------------------------
+  /// Provide the list of user-specified trap handler functions
+  ///
+  /// The Platform is one source of trap handler function names; that
+  /// may be augmented via a setting.  The setting needs to be converted
+  /// into an array of ConstStrings before it can be used - we only want
+  /// to do that once per thread so it's here in the UnwindLLDB object.
+  ///
+  /// @return
+  ///     Vector of ConstStrings of trap handler function names.  May be
+  ///     empty.
+  //------------------------------------------------------------------
+  const std::vector<ConstString> &GetUserSpecifiedTrapHandlerFunctionNames() {
+    return m_user_supplied_trap_handler_functions;
+  }
 
-    void
-    DoClear() override
-    {
-        m_frames.clear();
-        m_candidate_frame.reset();
-        m_unwind_complete = false;
-    }
-
-    uint32_t
-    DoGetFrameCount() override;
-
-    bool
-    DoGetFrameInfoAtIndex(uint32_t frame_idx,
-                          lldb::addr_t& cfa,
-                          lldb::addr_t& start_pc) override;
-    
-    lldb::RegisterContextSP
-    DoCreateRegisterContextForFrame(lldb_private::StackFrame *frame) override;
-
-    typedef std::shared_ptr<RegisterContextLLDB> RegisterContextLLDBSP;
-
-    // Needed to retrieve the "next" frame (e.g. frame 2 needs to retrieve frame 1's RegisterContextLLDB)
-    // The RegisterContext for frame_num must already exist or this returns an empty shared pointer.
+private:
+  struct Cursor {
+    lldb::addr_t start_pc; // The start address of the function/symbol for this
+                           // frame - current pc if unknown
+    lldb::addr_t cfa;      // The canonical frame address for this stack frame
+    lldb_private::SymbolContext sctx; // A symbol context we'll contribute to &
+                                      // provide to the StackFrame creation
     RegisterContextLLDBSP
-    GetRegisterContextForFrameNum (uint32_t frame_num);
-
-    // Iterate over the RegisterContextLLDB's in our m_frames vector, look for the first one that
-    // has a saved location for this reg.
-    bool
-    SearchForSavedLocationForRegister (uint32_t lldb_regnum, lldb_private::UnwindLLDB::RegisterLocation &regloc, uint32_t starting_frame_num, bool pc_register);
-
-
-    //------------------------------------------------------------------
-    /// Provide the list of user-specified trap handler functions
-    ///
-    /// The Platform is one source of trap handler function names; that
-    /// may be augmented via a setting.  The setting needs to be converted
-    /// into an array of ConstStrings before it can be used - we only want
-    /// to do that once per thread so it's here in the UnwindLLDB object.
-    ///
-    /// @return
-    ///     Vector of ConstStrings of trap handler function names.  May be
-    ///     empty.
-    //------------------------------------------------------------------
-    const std::vector<ConstString> &
-    GetUserSpecifiedTrapHandlerFunctionNames ()
-    {
-        return m_user_supplied_trap_handler_functions;
-    }
+        reg_ctx_lldb_sp; // These are all RegisterContextLLDB's
 
-private:
-    struct Cursor
-    {
-        lldb::addr_t start_pc;  // The start address of the function/symbol for this frame - current pc if unknown
-        lldb::addr_t cfa;       // The canonical frame address for this stack frame
-        lldb_private::SymbolContext sctx;  // A symbol context we'll contribute to & provide to the StackFrame creation
-        RegisterContextLLDBSP reg_ctx_lldb_sp; // These are all RegisterContextLLDB's
-
-        Cursor () : start_pc (LLDB_INVALID_ADDRESS), cfa (LLDB_INVALID_ADDRESS), sctx(), reg_ctx_lldb_sp() { }
-    private:
-        DISALLOW_COPY_AND_ASSIGN (Cursor);
-    };
+    Cursor()
+        : start_pc(LLDB_INVALID_ADDRESS), cfa(LLDB_INVALID_ADDRESS), sctx(),
+          reg_ctx_lldb_sp() {}
+
+  private:
+    DISALLOW_COPY_AND_ASSIGN(Cursor);
+  };
+
+  typedef std::shared_ptr<Cursor> CursorSP;
+  std::vector<CursorSP> m_frames;
+  CursorSP m_candidate_frame;
+  bool m_unwind_complete; // If this is true, we've enumerated all the frames in
+                          // the stack, and m_frames.size() is the
+  // number of frames, etc.  Otherwise we've only gone as far as directly asked,
+  // and m_frames.size()
+  // is how far we've currently gone.
+
+  std::vector<ConstString> m_user_supplied_trap_handler_functions;
+
+  //-----------------------------------------------------------------
+  // Check if Full UnwindPlan of First frame is valid or not.
+  // If not then try Fallback UnwindPlan of the frame. If Fallback
+  // UnwindPlan succeeds then update the Full UnwindPlan with the
+  // Fallback UnwindPlan.
+  //-----------------------------------------------------------------
+  void UpdateUnwindPlanForFirstFrameIfInvalid(ABI *abi);
+
+  CursorSP GetOneMoreFrame(ABI *abi);
+
+  bool AddOneMoreFrame(ABI *abi);
+
+  bool AddFirstFrame();
 
-    typedef std::shared_ptr<Cursor> CursorSP;
-    std::vector<CursorSP> m_frames;
-    CursorSP m_candidate_frame;
-    bool m_unwind_complete; // If this is true, we've enumerated all the frames in the stack, and m_frames.size() is the 
-                            // number of frames, etc.  Otherwise we've only gone as far as directly asked, and m_frames.size()
-                            // is how far we've currently gone.
- 
-    std::vector<ConstString> m_user_supplied_trap_handler_functions;
-
-    //-----------------------------------------------------------------
-    // Check if Full UnwindPlan of First frame is valid or not.
-    // If not then try Fallback UnwindPlan of the frame. If Fallback
-    // UnwindPlan succeeds then update the Full UnwindPlan with the
-    // Fallback UnwindPlan.
-    //-----------------------------------------------------------------
-    void
-    UpdateUnwindPlanForFirstFrameIfInvalid (ABI* abi);
-
-    CursorSP
-    GetOneMoreFrame (ABI* abi);
-
-    bool
-    AddOneMoreFrame (ABI *abi);
-
-    bool
-    AddFirstFrame ();
-
-    //------------------------------------------------------------------
-    // For UnwindLLDB only
-    //------------------------------------------------------------------
-    DISALLOW_COPY_AND_ASSIGN (UnwindLLDB);
+  //------------------------------------------------------------------
+  // For UnwindLLDB only
+  //------------------------------------------------------------------
+  DISALLOW_COPY_AND_ASSIGN(UnwindLLDB);
 };
 
 } // namespace lldb_private
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.cpp b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.cpp
index d011314..e2691be 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.cpp
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.cpp
@@ -13,8 +13,8 @@
 // Project includes
 #include "lldb/Core/ArchSpec.h"
 #include "lldb/Symbol/Function.h"
-#include "lldb/Symbol/Symbol.h"
 #include "lldb/Symbol/ObjectFile.h"
+#include "lldb/Symbol/Symbol.h"
 #include "lldb/Target/ExecutionContext.h"
 #include "lldb/Target/Process.h"
 #include "lldb/Target/Target.h"
@@ -25,251 +25,230 @@
 using namespace lldb;
 using namespace lldb_private;
 
-UnwindMacOSXFrameBackchain::UnwindMacOSXFrameBackchain (Thread &thread) :
-    Unwind (thread),
-    m_cursors()
-{
-}
-
-uint32_t
-UnwindMacOSXFrameBackchain::DoGetFrameCount()
-{
-    if (m_cursors.empty())
-    {
-        ExecutionContext exe_ctx (m_thread.shared_from_this());
-        Target *target = exe_ctx.GetTargetPtr();
-        if (target)
-        {
-            const ArchSpec& target_arch = target->GetArchitecture ();
-            // Frame zero should always be supplied by the thread...
-            exe_ctx.SetFrameSP (m_thread.GetStackFrameAtIndex (0));
-            
-            if (target_arch.GetAddressByteSize() == 8)
-                GetStackFrameData_x86_64 (exe_ctx);
-            else
-                GetStackFrameData_i386 (exe_ctx);
-        }
+UnwindMacOSXFrameBackchain::UnwindMacOSXFrameBackchain(Thread &thread)
+    : Unwind(thread), m_cursors() {}
+
+uint32_t UnwindMacOSXFrameBackchain::DoGetFrameCount() {
+  if (m_cursors.empty()) {
+    ExecutionContext exe_ctx(m_thread.shared_from_this());
+    Target *target = exe_ctx.GetTargetPtr();
+    if (target) {
+      const ArchSpec &target_arch = target->GetArchitecture();
+      // Frame zero should always be supplied by the thread...
+      exe_ctx.SetFrameSP(m_thread.GetStackFrameAtIndex(0));
+
+      if (target_arch.GetAddressByteSize() == 8)
+        GetStackFrameData_x86_64(exe_ctx);
+      else
+        GetStackFrameData_i386(exe_ctx);
     }
-    return m_cursors.size();
+  }
+  return m_cursors.size();
 }
 
-bool
-UnwindMacOSXFrameBackchain::DoGetFrameInfoAtIndex (uint32_t idx, addr_t& cfa, addr_t& pc)
-{
-    const uint32_t frame_count = GetFrameCount();
-    if (idx < frame_count)
-    {
-        if (m_cursors[idx].pc == LLDB_INVALID_ADDRESS)
-            return false;
-        if (m_cursors[idx].fp == LLDB_INVALID_ADDRESS)
-            return false;
-
-        pc = m_cursors[idx].pc;
-        cfa = m_cursors[idx].fp;
-
-        return true;
-    }
-    return false;
+bool UnwindMacOSXFrameBackchain::DoGetFrameInfoAtIndex(uint32_t idx,
+                                                       addr_t &cfa,
+                                                       addr_t &pc) {
+  const uint32_t frame_count = GetFrameCount();
+  if (idx < frame_count) {
+    if (m_cursors[idx].pc == LLDB_INVALID_ADDRESS)
+      return false;
+    if (m_cursors[idx].fp == LLDB_INVALID_ADDRESS)
+      return false;
+
+    pc = m_cursors[idx].pc;
+    cfa = m_cursors[idx].fp;
+
+    return true;
+  }
+  return false;
 }
-    
+
 lldb::RegisterContextSP
-UnwindMacOSXFrameBackchain::DoCreateRegisterContextForFrame (StackFrame *frame)
-{
-    lldb::RegisterContextSP reg_ctx_sp;
-    uint32_t concrete_idx = frame->GetConcreteFrameIndex ();
-    const uint32_t frame_count = GetFrameCount();
-    if (concrete_idx < frame_count)
-        reg_ctx_sp.reset (new RegisterContextMacOSXFrameBackchain (m_thread, concrete_idx, m_cursors[concrete_idx]));
-    return reg_ctx_sp;
+UnwindMacOSXFrameBackchain::DoCreateRegisterContextForFrame(StackFrame *frame) {
+  lldb::RegisterContextSP reg_ctx_sp;
+  uint32_t concrete_idx = frame->GetConcreteFrameIndex();
+  const uint32_t frame_count = GetFrameCount();
+  if (concrete_idx < frame_count)
+    reg_ctx_sp.reset(new RegisterContextMacOSXFrameBackchain(
+        m_thread, concrete_idx, m_cursors[concrete_idx]));
+  return reg_ctx_sp;
 }
 
-size_t
-UnwindMacOSXFrameBackchain::GetStackFrameData_i386 (const ExecutionContext &exe_ctx)
-{
-    m_cursors.clear();
-    
-    StackFrame *first_frame = exe_ctx.GetFramePtr();
-
-    Process *process = exe_ctx.GetProcessPtr();
-    if (process == NULL)
-        return 0;
-    
-    std::pair<lldb::addr_t, lldb::addr_t> fp_pc_pair;
-
-    struct Frame_i386
-    {
-        uint32_t fp;
-        uint32_t pc;
-    };
-
-    RegisterContext *reg_ctx = m_thread.GetRegisterContext().get();
-    assert (reg_ctx);
-
-    Cursor cursor;
-    cursor.pc = reg_ctx->GetPC (LLDB_INVALID_ADDRESS);
-    cursor.fp = reg_ctx->GetFP (0);
-    
-    Frame_i386 frame = { static_cast<uint32_t>(cursor.fp), static_cast<uint32_t>(cursor.pc) };
-
-    m_cursors.push_back(cursor);
-
-    const size_t k_frame_size = sizeof(frame);
-    Error error;
-    while (frame.fp != 0 && frame.pc != 0 && ((frame.fp & 7) == 0))
-    {
-        // Read both the FP and PC (8 bytes)
-        if (process->ReadMemory (frame.fp, &frame.fp, k_frame_size, error) != k_frame_size)
-            break;
-        if (frame.pc >= 0x1000)
-        {
-            cursor.pc = frame.pc;
-            cursor.fp = frame.fp;
-            m_cursors.push_back (cursor);
-        }
+size_t UnwindMacOSXFrameBackchain::GetStackFrameData_i386(
+    const ExecutionContext &exe_ctx) {
+  m_cursors.clear();
+
+  StackFrame *first_frame = exe_ctx.GetFramePtr();
+
+  Process *process = exe_ctx.GetProcessPtr();
+  if (process == NULL)
+    return 0;
+
+  std::pair<lldb::addr_t, lldb::addr_t> fp_pc_pair;
+
+  struct Frame_i386 {
+    uint32_t fp;
+    uint32_t pc;
+  };
+
+  RegisterContext *reg_ctx = m_thread.GetRegisterContext().get();
+  assert(reg_ctx);
+
+  Cursor cursor;
+  cursor.pc = reg_ctx->GetPC(LLDB_INVALID_ADDRESS);
+  cursor.fp = reg_ctx->GetFP(0);
+
+  Frame_i386 frame = {static_cast<uint32_t>(cursor.fp),
+                      static_cast<uint32_t>(cursor.pc)};
+
+  m_cursors.push_back(cursor);
+
+  const size_t k_frame_size = sizeof(frame);
+  Error error;
+  while (frame.fp != 0 && frame.pc != 0 && ((frame.fp & 7) == 0)) {
+    // Read both the FP and PC (8 bytes)
+    if (process->ReadMemory(frame.fp, &frame.fp, k_frame_size, error) !=
+        k_frame_size)
+      break;
+    if (frame.pc >= 0x1000) {
+      cursor.pc = frame.pc;
+      cursor.fp = frame.fp;
+      m_cursors.push_back(cursor);
     }
-    if (!m_cursors.empty())
-    {
-        lldb::addr_t first_frame_pc = m_cursors.front().pc;
-        if (first_frame_pc != LLDB_INVALID_ADDRESS)
-        {
-            const uint32_t resolve_scope = eSymbolContextModule |
-                                           eSymbolContextCompUnit |
-                                           eSymbolContextFunction |
-                                           eSymbolContextSymbol;
-
-            SymbolContext first_frame_sc (first_frame->GetSymbolContext(resolve_scope));
-            const AddressRange *addr_range_ptr = NULL;
-            AddressRange range;
-            if (first_frame_sc.function)
-                addr_range_ptr = &first_frame_sc.function->GetAddressRange();
-            else if (first_frame_sc.symbol)
-            {
-                range.GetBaseAddress() = first_frame_sc.symbol->GetAddress();
-                range.SetByteSize (first_frame_sc.symbol->GetByteSize());
-                addr_range_ptr = &range;
-            }
-
-            if (addr_range_ptr)
-            {
-                if (first_frame->GetFrameCodeAddress() == addr_range_ptr->GetBaseAddress())
-                {
-                    // We are at the first instruction, so we can recover the
-                    // previous PC by dereferencing the SP
-                    lldb::addr_t first_frame_sp = reg_ctx->GetSP (0);
-                    // Read the real second frame return address into frame.pc
-                    if (first_frame_sp && process->ReadMemory (first_frame_sp, &frame.pc, sizeof(frame.pc), error) == sizeof(frame.pc))
-                    {
-                        cursor.fp = m_cursors.front().fp;
-                        cursor.pc = frame.pc;           // Set the new second frame PC
-
-                        // Insert the second frame
-                        m_cursors.insert(m_cursors.begin()+1, cursor);
-                        
-                        m_cursors.front().fp = first_frame_sp;
-                    }
-                }
-            }
+  }
+  if (!m_cursors.empty()) {
+    lldb::addr_t first_frame_pc = m_cursors.front().pc;
+    if (first_frame_pc != LLDB_INVALID_ADDRESS) {
+      const uint32_t resolve_scope =
+          eSymbolContextModule | eSymbolContextCompUnit |
+          eSymbolContextFunction | eSymbolContextSymbol;
+
+      SymbolContext first_frame_sc(
+          first_frame->GetSymbolContext(resolve_scope));
+      const AddressRange *addr_range_ptr = NULL;
+      AddressRange range;
+      if (first_frame_sc.function)
+        addr_range_ptr = &first_frame_sc.function->GetAddressRange();
+      else if (first_frame_sc.symbol) {
+        range.GetBaseAddress() = first_frame_sc.symbol->GetAddress();
+        range.SetByteSize(first_frame_sc.symbol->GetByteSize());
+        addr_range_ptr = &range;
+      }
+
+      if (addr_range_ptr) {
+        if (first_frame->GetFrameCodeAddress() ==
+            addr_range_ptr->GetBaseAddress()) {
+          // We are at the first instruction, so we can recover the
+          // previous PC by dereferencing the SP
+          lldb::addr_t first_frame_sp = reg_ctx->GetSP(0);
+          // Read the real second frame return address into frame.pc
+          if (first_frame_sp &&
+              process->ReadMemory(first_frame_sp, &frame.pc, sizeof(frame.pc),
+                                  error) == sizeof(frame.pc)) {
+            cursor.fp = m_cursors.front().fp;
+            cursor.pc = frame.pc; // Set the new second frame PC
+
+            // Insert the second frame
+            m_cursors.insert(m_cursors.begin() + 1, cursor);
+
+            m_cursors.front().fp = first_frame_sp;
+          }
         }
+      }
     }
-//    uint32_t i=0;
-//    printf("      PC                 FP\n");
-//    printf("      ------------------ ------------------ \n");
-//    for (i=0; i<m_cursors.size(); ++i)
-//    {
-//        printf("[%3u] 0x%16.16" PRIx64 " 0x%16.16" PRIx64 "\n", i, m_cursors[i].pc, m_cursors[i].fp);
-//    }
-    return m_cursors.size();
+  }
+  //    uint32_t i=0;
+  //    printf("      PC                 FP\n");
+  //    printf("      ------------------ ------------------ \n");
+  //    for (i=0; i<m_cursors.size(); ++i)
+  //    {
+  //        printf("[%3u] 0x%16.16" PRIx64 " 0x%16.16" PRIx64 "\n", i,
+  //        m_cursors[i].pc, m_cursors[i].fp);
+  //    }
+  return m_cursors.size();
 }
 
+size_t UnwindMacOSXFrameBackchain::GetStackFrameData_x86_64(
+    const ExecutionContext &exe_ctx) {
+  m_cursors.clear();
 
-size_t
-UnwindMacOSXFrameBackchain::GetStackFrameData_x86_64 (const ExecutionContext &exe_ctx)
-{
-    m_cursors.clear();
-
-    Process *process = exe_ctx.GetProcessPtr();
-    if (process == NULL)
-        return 0;
-    
-    StackFrame *first_frame = exe_ctx.GetFramePtr();
-
-    std::pair<lldb::addr_t, lldb::addr_t> fp_pc_pair;
-
-    struct Frame_x86_64
-    {
-        uint64_t fp;
-        uint64_t pc;
-    };
-
-    RegisterContext *reg_ctx = m_thread.GetRegisterContext().get();
-    assert (reg_ctx);
-
-    Cursor cursor;
-    cursor.pc = reg_ctx->GetPC (LLDB_INVALID_ADDRESS);
-    cursor.fp = reg_ctx->GetFP (0);
-    
-    Frame_x86_64 frame = { cursor.fp, cursor.pc };
-
-    m_cursors.push_back(cursor);
-    Error error;
-    const size_t k_frame_size = sizeof(frame);
-    while (frame.fp != 0 && frame.pc != 0 && ((frame.fp & 7) == 0))
-    {
-        // Read both the FP and PC (16 bytes)
-        if (process->ReadMemory (frame.fp, &frame.fp, k_frame_size, error) != k_frame_size)
-            break;
-
-        if (frame.pc >= 0x1000)
-        {
-            cursor.pc = frame.pc;
-            cursor.fp = frame.fp;
-            m_cursors.push_back (cursor);
-        }
+  Process *process = exe_ctx.GetProcessPtr();
+  if (process == NULL)
+    return 0;
+
+  StackFrame *first_frame = exe_ctx.GetFramePtr();
+
+  std::pair<lldb::addr_t, lldb::addr_t> fp_pc_pair;
+
+  struct Frame_x86_64 {
+    uint64_t fp;
+    uint64_t pc;
+  };
+
+  RegisterContext *reg_ctx = m_thread.GetRegisterContext().get();
+  assert(reg_ctx);
+
+  Cursor cursor;
+  cursor.pc = reg_ctx->GetPC(LLDB_INVALID_ADDRESS);
+  cursor.fp = reg_ctx->GetFP(0);
+
+  Frame_x86_64 frame = {cursor.fp, cursor.pc};
+
+  m_cursors.push_back(cursor);
+  Error error;
+  const size_t k_frame_size = sizeof(frame);
+  while (frame.fp != 0 && frame.pc != 0 && ((frame.fp & 7) == 0)) {
+    // Read both the FP and PC (16 bytes)
+    if (process->ReadMemory(frame.fp, &frame.fp, k_frame_size, error) !=
+        k_frame_size)
+      break;
+
+    if (frame.pc >= 0x1000) {
+      cursor.pc = frame.pc;
+      cursor.fp = frame.fp;
+      m_cursors.push_back(cursor);
     }
-    if (!m_cursors.empty())
-    {
-        lldb::addr_t first_frame_pc = m_cursors.front().pc;
-        if (first_frame_pc != LLDB_INVALID_ADDRESS)
-        {
-            const uint32_t resolve_scope = eSymbolContextModule |
-                                           eSymbolContextCompUnit |
-                                           eSymbolContextFunction |
-                                           eSymbolContextSymbol;
-
-            SymbolContext first_frame_sc(first_frame->GetSymbolContext(resolve_scope));
-            const AddressRange *addr_range_ptr = NULL;
-            AddressRange range;
-            if (first_frame_sc.function)
-                addr_range_ptr = &first_frame_sc.function->GetAddressRange();
-            else if (first_frame_sc.symbol)
-            {
-                range.GetBaseAddress() = first_frame_sc.symbol->GetAddress();
-                range.SetByteSize (first_frame_sc.symbol->GetByteSize());
-                addr_range_ptr = &range;
-            }
-
-            if (addr_range_ptr)
-            {
-                if (first_frame->GetFrameCodeAddress() == addr_range_ptr->GetBaseAddress())
-                {
-                    // We are at the first instruction, so we can recover the
-                    // previous PC by dereferencing the SP
-                    lldb::addr_t first_frame_sp = reg_ctx->GetSP (0);
-                    // Read the real second frame return address into frame.pc
-                    if (process->ReadMemory (first_frame_sp, &frame.pc, sizeof(frame.pc), error) == sizeof(frame.pc))
-                    {
-                        cursor.fp = m_cursors.front().fp;
-                        cursor.pc = frame.pc;           // Set the new second frame PC
-
-                        // Insert the second frame
-                        m_cursors.insert(m_cursors.begin()+1, cursor);
-                        
-                        m_cursors.front().fp = first_frame_sp;
-                    }
-                }
-            }
+  }
+  if (!m_cursors.empty()) {
+    lldb::addr_t first_frame_pc = m_cursors.front().pc;
+    if (first_frame_pc != LLDB_INVALID_ADDRESS) {
+      const uint32_t resolve_scope =
+          eSymbolContextModule | eSymbolContextCompUnit |
+          eSymbolContextFunction | eSymbolContextSymbol;
+
+      SymbolContext first_frame_sc(
+          first_frame->GetSymbolContext(resolve_scope));
+      const AddressRange *addr_range_ptr = NULL;
+      AddressRange range;
+      if (first_frame_sc.function)
+        addr_range_ptr = &first_frame_sc.function->GetAddressRange();
+      else if (first_frame_sc.symbol) {
+        range.GetBaseAddress() = first_frame_sc.symbol->GetAddress();
+        range.SetByteSize(first_frame_sc.symbol->GetByteSize());
+        addr_range_ptr = &range;
+      }
+
+      if (addr_range_ptr) {
+        if (first_frame->GetFrameCodeAddress() ==
+            addr_range_ptr->GetBaseAddress()) {
+          // We are at the first instruction, so we can recover the
+          // previous PC by dereferencing the SP
+          lldb::addr_t first_frame_sp = reg_ctx->GetSP(0);
+          // Read the real second frame return address into frame.pc
+          if (process->ReadMemory(first_frame_sp, &frame.pc, sizeof(frame.pc),
+                                  error) == sizeof(frame.pc)) {
+            cursor.fp = m_cursors.front().fp;
+            cursor.pc = frame.pc; // Set the new second frame PC
+
+            // Insert the second frame
+            m_cursors.insert(m_cursors.begin() + 1, cursor);
+
+            m_cursors.front().fp = first_frame_sp;
+          }
         }
+      }
     }
-    return m_cursors.size();
+  }
+  return m_cursors.size();
 }
-
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.h
index f195514..328117a 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.h
@@ -16,55 +16,45 @@
 
 // Other libraries and framework includes
 // Project includes
-#include "lldb/lldb-private.h"
 #include "lldb/Target/Unwind.h"
+#include "lldb/lldb-private.h"
 
-class UnwindMacOSXFrameBackchain : public lldb_private::Unwind
-{
-public: 
-    UnwindMacOSXFrameBackchain (lldb_private::Thread &thread);
+class UnwindMacOSXFrameBackchain : public lldb_private::Unwind {
+public:
+  UnwindMacOSXFrameBackchain(lldb_private::Thread &thread);
 
-    ~UnwindMacOSXFrameBackchain() override = default;
+  ~UnwindMacOSXFrameBackchain() override = default;
 
 protected:
-    void
-    DoClear() override
-    {
-        m_cursors.clear();
-    }
-
-    uint32_t
-    DoGetFrameCount() override;
-
-    bool
-    DoGetFrameInfoAtIndex(uint32_t frame_idx,
-                          lldb::addr_t& cfa,
-                          lldb::addr_t& pc) override;
-    
-    lldb::RegisterContextSP
-    DoCreateRegisterContextForFrame(lldb_private::StackFrame *frame) override;
-
-    friend class RegisterContextMacOSXFrameBackchain;
-
-    struct Cursor
-    {
-        lldb::addr_t pc;    // Program counter
-        lldb::addr_t fp;    // Frame pointer for us with backchain
-    };
+  void DoClear() override { m_cursors.clear(); }
+
+  uint32_t DoGetFrameCount() override;
+
+  bool DoGetFrameInfoAtIndex(uint32_t frame_idx, lldb::addr_t &cfa,
+                             lldb::addr_t &pc) override;
+
+  lldb::RegisterContextSP
+  DoCreateRegisterContextForFrame(lldb_private::StackFrame *frame) override;
+
+  friend class RegisterContextMacOSXFrameBackchain;
+
+  struct Cursor {
+    lldb::addr_t pc; // Program counter
+    lldb::addr_t fp; // Frame pointer for us with backchain
+  };
 
 private:
-    std::vector<Cursor> m_cursors;
+  std::vector<Cursor> m_cursors;
 
-    size_t
-    GetStackFrameData_i386 (const lldb_private::ExecutionContext &exe_ctx);
+  size_t GetStackFrameData_i386(const lldb_private::ExecutionContext &exe_ctx);
 
-    size_t
-    GetStackFrameData_x86_64 (const lldb_private::ExecutionContext &exe_ctx);
+  size_t
+  GetStackFrameData_x86_64(const lldb_private::ExecutionContext &exe_ctx);
 
-    //------------------------------------------------------------------
-    // For UnwindMacOSXFrameBackchain only
-    //------------------------------------------------------------------
-    DISALLOW_COPY_AND_ASSIGN (UnwindMacOSXFrameBackchain);
+  //------------------------------------------------------------------
+  // For UnwindMacOSXFrameBackchain only
+  //------------------------------------------------------------------
+  DISALLOW_COPY_AND_ASSIGN(UnwindMacOSXFrameBackchain);
 };
 
 #endif // lldb_UnwindMacOSXFrameBackchain_h_
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-arm-register-enums.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-arm-register-enums.h
index 4d82c10..49473bb 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-arm-register-enums.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-arm-register-enums.h
@@ -10,192 +10,193 @@
 #ifndef lldb_arm_register_enums_h
 #define lldb_arm_register_enums_h
 
-namespace lldb_private
-{
-    // LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
+namespace lldb_private {
+// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
 
-    //---------------------------------------------------------------------------
-    // Internal codes for all ARM registers.
-    //---------------------------------------------------------------------------
-    enum
-    {
-        k_first_gpr_arm = 0,
-        gpr_r0_arm = k_first_gpr_arm,
-        gpr_r1_arm,
-        gpr_r2_arm,
-        gpr_r3_arm,
-        gpr_r4_arm,
-        gpr_r5_arm,
-        gpr_r6_arm,
-        gpr_r7_arm,
-        gpr_r8_arm,
-        gpr_r9_arm,
-        gpr_r10_arm,
-        gpr_r11_arm,
-        gpr_r12_arm,
-        gpr_r13_arm, gpr_sp_arm = gpr_r13_arm,
-        gpr_r14_arm, gpr_lr_arm = gpr_r14_arm,
-        gpr_r15_arm, gpr_pc_arm = gpr_r15_arm,
-        gpr_cpsr_arm,
+//---------------------------------------------------------------------------
+// Internal codes for all ARM registers.
+//---------------------------------------------------------------------------
+enum {
+  k_first_gpr_arm = 0,
+  gpr_r0_arm = k_first_gpr_arm,
+  gpr_r1_arm,
+  gpr_r2_arm,
+  gpr_r3_arm,
+  gpr_r4_arm,
+  gpr_r5_arm,
+  gpr_r6_arm,
+  gpr_r7_arm,
+  gpr_r8_arm,
+  gpr_r9_arm,
+  gpr_r10_arm,
+  gpr_r11_arm,
+  gpr_r12_arm,
+  gpr_r13_arm,
+  gpr_sp_arm = gpr_r13_arm,
+  gpr_r14_arm,
+  gpr_lr_arm = gpr_r14_arm,
+  gpr_r15_arm,
+  gpr_pc_arm = gpr_r15_arm,
+  gpr_cpsr_arm,
 
-        k_last_gpr_arm = gpr_cpsr_arm,
+  k_last_gpr_arm = gpr_cpsr_arm,
 
-        k_first_fpr_arm,
-        fpu_s0_arm = k_first_fpr_arm,
-        fpu_s1_arm,
-        fpu_s2_arm,
-        fpu_s3_arm,
-        fpu_s4_arm,
-        fpu_s5_arm,
-        fpu_s6_arm,
-        fpu_s7_arm,
-        fpu_s8_arm,
-        fpu_s9_arm,
-        fpu_s10_arm,
-        fpu_s11_arm,
-        fpu_s12_arm,
-        fpu_s13_arm,
-        fpu_s14_arm,
-        fpu_s15_arm,
-        fpu_s16_arm,
-        fpu_s17_arm,
-        fpu_s18_arm,
-        fpu_s19_arm,
-        fpu_s20_arm,
-        fpu_s21_arm,
-        fpu_s22_arm,
-        fpu_s23_arm,
-        fpu_s24_arm,
-        fpu_s25_arm,
-        fpu_s26_arm,
-        fpu_s27_arm,
-        fpu_s28_arm,
-        fpu_s29_arm,
-        fpu_s30_arm,
-        fpu_s31_arm,
-        fpu_fpscr_arm,
-        fpu_d0_arm,
-        fpu_d1_arm,
-        fpu_d2_arm,
-        fpu_d3_arm,
-        fpu_d4_arm,
-        fpu_d5_arm,
-        fpu_d6_arm,
-        fpu_d7_arm,
-        fpu_d8_arm,
-        fpu_d9_arm,
-        fpu_d10_arm,
-        fpu_d11_arm,
-        fpu_d12_arm,
-        fpu_d13_arm,
-        fpu_d14_arm,
-        fpu_d15_arm,
-        fpu_d16_arm,
-        fpu_d17_arm,
-        fpu_d18_arm,
-        fpu_d19_arm,
-        fpu_d20_arm,
-        fpu_d21_arm,
-        fpu_d22_arm,
-        fpu_d23_arm,
-        fpu_d24_arm,
-        fpu_d25_arm,
-        fpu_d26_arm,
-        fpu_d27_arm,
-        fpu_d28_arm,
-        fpu_d29_arm,
-        fpu_d30_arm,
-        fpu_d31_arm,
-        fpu_q0_arm,
-        fpu_q1_arm,
-        fpu_q2_arm,
-        fpu_q3_arm,
-        fpu_q4_arm,
-        fpu_q5_arm,
-        fpu_q6_arm,
-        fpu_q7_arm,
-        fpu_q8_arm,
-        fpu_q9_arm,
-        fpu_q10_arm,
-        fpu_q11_arm,
-        fpu_q12_arm,
-        fpu_q13_arm,
-        fpu_q14_arm,
-        fpu_q15_arm,
-        k_last_fpr_arm = fpu_q15_arm,
-        exc_exception_arm,
-        exc_fsr_arm,
-        exc_far_arm,
+  k_first_fpr_arm,
+  fpu_s0_arm = k_first_fpr_arm,
+  fpu_s1_arm,
+  fpu_s2_arm,
+  fpu_s3_arm,
+  fpu_s4_arm,
+  fpu_s5_arm,
+  fpu_s6_arm,
+  fpu_s7_arm,
+  fpu_s8_arm,
+  fpu_s9_arm,
+  fpu_s10_arm,
+  fpu_s11_arm,
+  fpu_s12_arm,
+  fpu_s13_arm,
+  fpu_s14_arm,
+  fpu_s15_arm,
+  fpu_s16_arm,
+  fpu_s17_arm,
+  fpu_s18_arm,
+  fpu_s19_arm,
+  fpu_s20_arm,
+  fpu_s21_arm,
+  fpu_s22_arm,
+  fpu_s23_arm,
+  fpu_s24_arm,
+  fpu_s25_arm,
+  fpu_s26_arm,
+  fpu_s27_arm,
+  fpu_s28_arm,
+  fpu_s29_arm,
+  fpu_s30_arm,
+  fpu_s31_arm,
+  fpu_fpscr_arm,
+  fpu_d0_arm,
+  fpu_d1_arm,
+  fpu_d2_arm,
+  fpu_d3_arm,
+  fpu_d4_arm,
+  fpu_d5_arm,
+  fpu_d6_arm,
+  fpu_d7_arm,
+  fpu_d8_arm,
+  fpu_d9_arm,
+  fpu_d10_arm,
+  fpu_d11_arm,
+  fpu_d12_arm,
+  fpu_d13_arm,
+  fpu_d14_arm,
+  fpu_d15_arm,
+  fpu_d16_arm,
+  fpu_d17_arm,
+  fpu_d18_arm,
+  fpu_d19_arm,
+  fpu_d20_arm,
+  fpu_d21_arm,
+  fpu_d22_arm,
+  fpu_d23_arm,
+  fpu_d24_arm,
+  fpu_d25_arm,
+  fpu_d26_arm,
+  fpu_d27_arm,
+  fpu_d28_arm,
+  fpu_d29_arm,
+  fpu_d30_arm,
+  fpu_d31_arm,
+  fpu_q0_arm,
+  fpu_q1_arm,
+  fpu_q2_arm,
+  fpu_q3_arm,
+  fpu_q4_arm,
+  fpu_q5_arm,
+  fpu_q6_arm,
+  fpu_q7_arm,
+  fpu_q8_arm,
+  fpu_q9_arm,
+  fpu_q10_arm,
+  fpu_q11_arm,
+  fpu_q12_arm,
+  fpu_q13_arm,
+  fpu_q14_arm,
+  fpu_q15_arm,
+  k_last_fpr_arm = fpu_q15_arm,
+  exc_exception_arm,
+  exc_fsr_arm,
+  exc_far_arm,
 
-        dbg_bvr0_arm,
-        dbg_bvr1_arm,
-        dbg_bvr2_arm,
-        dbg_bvr3_arm,
-        dbg_bvr4_arm,
-        dbg_bvr5_arm,
-        dbg_bvr6_arm,
-        dbg_bvr7_arm,
-        dbg_bvr8_arm,
-        dbg_bvr9_arm,
-        dbg_bvr10_arm,
-        dbg_bvr11_arm,
-        dbg_bvr12_arm,
-        dbg_bvr13_arm,
-        dbg_bvr14_arm,
-        dbg_bvr15_arm,
-        dbg_bcr0_arm,
-        dbg_bcr1_arm,
-        dbg_bcr2_arm,
-        dbg_bcr3_arm,
-        dbg_bcr4_arm,
-        dbg_bcr5_arm,
-        dbg_bcr6_arm,
-        dbg_bcr7_arm,
-        dbg_bcr8_arm,
-        dbg_bcr9_arm,
-        dbg_bcr10_arm,
-        dbg_bcr11_arm,
-        dbg_bcr12_arm,
-        dbg_bcr13_arm,
-        dbg_bcr14_arm,
-        dbg_bcr15_arm,
-        dbg_wvr0_arm,
-        dbg_wvr1_arm,
-        dbg_wvr2_arm,
-        dbg_wvr3_arm,
-        dbg_wvr4_arm,
-        dbg_wvr5_arm,
-        dbg_wvr6_arm,
-        dbg_wvr7_arm,
-        dbg_wvr8_arm,
-        dbg_wvr9_arm,
-        dbg_wvr10_arm,
-        dbg_wvr11_arm,
-        dbg_wvr12_arm,
-        dbg_wvr13_arm,
-        dbg_wvr14_arm,
-        dbg_wvr15_arm,
-        dbg_wcr0_arm,
-        dbg_wcr1_arm,
-        dbg_wcr2_arm,
-        dbg_wcr3_arm,
-        dbg_wcr4_arm,
-        dbg_wcr5_arm,
-        dbg_wcr6_arm,
-        dbg_wcr7_arm,
-        dbg_wcr8_arm,
-        dbg_wcr9_arm,
-        dbg_wcr10_arm,
-        dbg_wcr11_arm,
-        dbg_wcr12_arm,
-        dbg_wcr13_arm,
-        dbg_wcr14_arm,
-        dbg_wcr15_arm,
+  dbg_bvr0_arm,
+  dbg_bvr1_arm,
+  dbg_bvr2_arm,
+  dbg_bvr3_arm,
+  dbg_bvr4_arm,
+  dbg_bvr5_arm,
+  dbg_bvr6_arm,
+  dbg_bvr7_arm,
+  dbg_bvr8_arm,
+  dbg_bvr9_arm,
+  dbg_bvr10_arm,
+  dbg_bvr11_arm,
+  dbg_bvr12_arm,
+  dbg_bvr13_arm,
+  dbg_bvr14_arm,
+  dbg_bvr15_arm,
+  dbg_bcr0_arm,
+  dbg_bcr1_arm,
+  dbg_bcr2_arm,
+  dbg_bcr3_arm,
+  dbg_bcr4_arm,
+  dbg_bcr5_arm,
+  dbg_bcr6_arm,
+  dbg_bcr7_arm,
+  dbg_bcr8_arm,
+  dbg_bcr9_arm,
+  dbg_bcr10_arm,
+  dbg_bcr11_arm,
+  dbg_bcr12_arm,
+  dbg_bcr13_arm,
+  dbg_bcr14_arm,
+  dbg_bcr15_arm,
+  dbg_wvr0_arm,
+  dbg_wvr1_arm,
+  dbg_wvr2_arm,
+  dbg_wvr3_arm,
+  dbg_wvr4_arm,
+  dbg_wvr5_arm,
+  dbg_wvr6_arm,
+  dbg_wvr7_arm,
+  dbg_wvr8_arm,
+  dbg_wvr9_arm,
+  dbg_wvr10_arm,
+  dbg_wvr11_arm,
+  dbg_wvr12_arm,
+  dbg_wvr13_arm,
+  dbg_wvr14_arm,
+  dbg_wvr15_arm,
+  dbg_wcr0_arm,
+  dbg_wcr1_arm,
+  dbg_wcr2_arm,
+  dbg_wcr3_arm,
+  dbg_wcr4_arm,
+  dbg_wcr5_arm,
+  dbg_wcr6_arm,
+  dbg_wcr7_arm,
+  dbg_wcr8_arm,
+  dbg_wcr9_arm,
+  dbg_wcr10_arm,
+  dbg_wcr11_arm,
+  dbg_wcr12_arm,
+  dbg_wcr13_arm,
+  dbg_wcr14_arm,
+  dbg_wcr15_arm,
 
-        k_num_registers_arm,
-        k_num_gpr_registers_arm = k_last_gpr_arm - k_first_gpr_arm + 1,
-        k_num_fpr_registers_arm = k_last_fpr_arm - k_first_fpr_arm + 1
-    };
+  k_num_registers_arm,
+  k_num_gpr_registers_arm = k_last_gpr_arm - k_first_gpr_arm + 1,
+  k_num_fpr_registers_arm = k_last_fpr_arm - k_first_fpr_arm + 1
+};
 }
 
 #endif // #ifndef lldb_arm64_register_enums_h
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h
index a0c0db0..7181ce4 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h
@@ -10,163 +10,258 @@
 #ifndef lldb_arm64_register_enums_h
 #define lldb_arm64_register_enums_h
 
-namespace lldb_private
-{
-    // LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
+namespace lldb_private {
+// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
 
-    //---------------------------------------------------------------------------
-    // Internal codes for all ARM64 registers.
-    //---------------------------------------------------------------------------
-    enum
-    {
-        k_first_gpr_arm64,
-        gpr_x0_arm64 = k_first_gpr_arm64,
-        gpr_x1_arm64,
-        gpr_x2_arm64,
-        gpr_x3_arm64,
-        gpr_x4_arm64,
-        gpr_x5_arm64,
-        gpr_x6_arm64,
-        gpr_x7_arm64,
-        gpr_x8_arm64,
-        gpr_x9_arm64,
-        gpr_x10_arm64,
-        gpr_x11_arm64,
-        gpr_x12_arm64,
-        gpr_x13_arm64,
-        gpr_x14_arm64,
-        gpr_x15_arm64,
-        gpr_x16_arm64,
-        gpr_x17_arm64,
-        gpr_x18_arm64,
-        gpr_x19_arm64,
-        gpr_x20_arm64,
-        gpr_x21_arm64,
-        gpr_x22_arm64,
-        gpr_x23_arm64,
-        gpr_x24_arm64,
-        gpr_x25_arm64,
-        gpr_x26_arm64,
-        gpr_x27_arm64,
-        gpr_x28_arm64,
-        gpr_fp_arm64,
-        gpr_lr_arm64,
-        gpr_sp_arm64,
-        gpr_pc_arm64,
-        gpr_cpsr_arm64,
+//---------------------------------------------------------------------------
+// Internal codes for all ARM64 registers.
+//---------------------------------------------------------------------------
+enum {
+  k_first_gpr_arm64,
+  gpr_x0_arm64 = k_first_gpr_arm64,
+  gpr_x1_arm64,
+  gpr_x2_arm64,
+  gpr_x3_arm64,
+  gpr_x4_arm64,
+  gpr_x5_arm64,
+  gpr_x6_arm64,
+  gpr_x7_arm64,
+  gpr_x8_arm64,
+  gpr_x9_arm64,
+  gpr_x10_arm64,
+  gpr_x11_arm64,
+  gpr_x12_arm64,
+  gpr_x13_arm64,
+  gpr_x14_arm64,
+  gpr_x15_arm64,
+  gpr_x16_arm64,
+  gpr_x17_arm64,
+  gpr_x18_arm64,
+  gpr_x19_arm64,
+  gpr_x20_arm64,
+  gpr_x21_arm64,
+  gpr_x22_arm64,
+  gpr_x23_arm64,
+  gpr_x24_arm64,
+  gpr_x25_arm64,
+  gpr_x26_arm64,
+  gpr_x27_arm64,
+  gpr_x28_arm64,
+  gpr_fp_arm64,
+  gpr_lr_arm64,
+  gpr_sp_arm64,
+  gpr_pc_arm64,
+  gpr_cpsr_arm64,
 
-        k_last_gpr_arm64 = gpr_cpsr_arm64,
+  gpr_w0_arm64,
+  gpr_w1_arm64,
+  gpr_w2_arm64,
+  gpr_w3_arm64,
+  gpr_w4_arm64,
+  gpr_w5_arm64,
+  gpr_w6_arm64,
+  gpr_w7_arm64,
+  gpr_w8_arm64,
+  gpr_w9_arm64,
+  gpr_w10_arm64,
+  gpr_w11_arm64,
+  gpr_w12_arm64,
+  gpr_w13_arm64,
+  gpr_w14_arm64,
+  gpr_w15_arm64,
+  gpr_w16_arm64,
+  gpr_w17_arm64,
+  gpr_w18_arm64,
+  gpr_w19_arm64,
+  gpr_w20_arm64,
+  gpr_w21_arm64,
+  gpr_w22_arm64,
+  gpr_w23_arm64,
+  gpr_w24_arm64,
+  gpr_w25_arm64,
+  gpr_w26_arm64,
+  gpr_w27_arm64,
+  gpr_w28_arm64,
 
-        k_first_fpr_arm64,
-        fpu_v0_arm64 = k_first_fpr_arm64,
-        fpu_v1_arm64,
-        fpu_v2_arm64,
-        fpu_v3_arm64,
-        fpu_v4_arm64,
-        fpu_v5_arm64,
-        fpu_v6_arm64,
-        fpu_v7_arm64,
-        fpu_v8_arm64,
-        fpu_v9_arm64,
-        fpu_v10_arm64,
-        fpu_v11_arm64,
-        fpu_v12_arm64,
-        fpu_v13_arm64,
-        fpu_v14_arm64,
-        fpu_v15_arm64,
-        fpu_v16_arm64,
-        fpu_v17_arm64,
-        fpu_v18_arm64,
-        fpu_v19_arm64,
-        fpu_v20_arm64,
-        fpu_v21_arm64,
-        fpu_v22_arm64,
-        fpu_v23_arm64,
-        fpu_v24_arm64,
-        fpu_v25_arm64,
-        fpu_v26_arm64,
-        fpu_v27_arm64,
-        fpu_v28_arm64,
-        fpu_v29_arm64,
-        fpu_v30_arm64,
-        fpu_v31_arm64,
-        fpu_fpsr_arm64,
-        fpu_fpcr_arm64,
-        k_last_fpr_arm64 = fpu_fpcr_arm64,
+  k_last_gpr_arm64 = gpr_w28_arm64,
 
-        exc_far_arm64,
-        exc_esr_arm64,
-        exc_exception_arm64,
+  k_first_fpr_arm64,
+  fpu_v0_arm64 = k_first_fpr_arm64,
+  fpu_v1_arm64,
+  fpu_v2_arm64,
+  fpu_v3_arm64,
+  fpu_v4_arm64,
+  fpu_v5_arm64,
+  fpu_v6_arm64,
+  fpu_v7_arm64,
+  fpu_v8_arm64,
+  fpu_v9_arm64,
+  fpu_v10_arm64,
+  fpu_v11_arm64,
+  fpu_v12_arm64,
+  fpu_v13_arm64,
+  fpu_v14_arm64,
+  fpu_v15_arm64,
+  fpu_v16_arm64,
+  fpu_v17_arm64,
+  fpu_v18_arm64,
+  fpu_v19_arm64,
+  fpu_v20_arm64,
+  fpu_v21_arm64,
+  fpu_v22_arm64,
+  fpu_v23_arm64,
+  fpu_v24_arm64,
+  fpu_v25_arm64,
+  fpu_v26_arm64,
+  fpu_v27_arm64,
+  fpu_v28_arm64,
+  fpu_v29_arm64,
+  fpu_v30_arm64,
+  fpu_v31_arm64,
 
-        dbg_bvr0_arm64,
-        dbg_bvr1_arm64,
-        dbg_bvr2_arm64,
-        dbg_bvr3_arm64,
-        dbg_bvr4_arm64,
-        dbg_bvr5_arm64,
-        dbg_bvr6_arm64,
-        dbg_bvr7_arm64,
-        dbg_bvr8_arm64,
-        dbg_bvr9_arm64,
-        dbg_bvr10_arm64,
-        dbg_bvr11_arm64,
-        dbg_bvr12_arm64,
-        dbg_bvr13_arm64,
-        dbg_bvr14_arm64,
-        dbg_bvr15_arm64,
-        dbg_bcr0_arm64,
-        dbg_bcr1_arm64,
-        dbg_bcr2_arm64,
-        dbg_bcr3_arm64,
-        dbg_bcr4_arm64,
-        dbg_bcr5_arm64,
-        dbg_bcr6_arm64,
-        dbg_bcr7_arm64,
-        dbg_bcr8_arm64,
-        dbg_bcr9_arm64,
-        dbg_bcr10_arm64,
-        dbg_bcr11_arm64,
-        dbg_bcr12_arm64,
-        dbg_bcr13_arm64,
-        dbg_bcr14_arm64,
-        dbg_bcr15_arm64,
-        dbg_wvr0_arm64,
-        dbg_wvr1_arm64,
-        dbg_wvr2_arm64,
-        dbg_wvr3_arm64,
-        dbg_wvr4_arm64,
-        dbg_wvr5_arm64,
-        dbg_wvr6_arm64,
-        dbg_wvr7_arm64,
-        dbg_wvr8_arm64,
-        dbg_wvr9_arm64,
-        dbg_wvr10_arm64,
-        dbg_wvr11_arm64,
-        dbg_wvr12_arm64,
-        dbg_wvr13_arm64,
-        dbg_wvr14_arm64,
-        dbg_wvr15_arm64,
-        dbg_wcr0_arm64,
-        dbg_wcr1_arm64,
-        dbg_wcr2_arm64,
-        dbg_wcr3_arm64,
-        dbg_wcr4_arm64,
-        dbg_wcr5_arm64,
-        dbg_wcr6_arm64,
-        dbg_wcr7_arm64,
-        dbg_wcr8_arm64,
-        dbg_wcr9_arm64,
-        dbg_wcr10_arm64,
-        dbg_wcr11_arm64,
-        dbg_wcr12_arm64,
-        dbg_wcr13_arm64,
-        dbg_wcr14_arm64,
-        dbg_wcr15_arm64,
+  fpu_s0_arm64,
+  fpu_s1_arm64,
+  fpu_s2_arm64,
+  fpu_s3_arm64,
+  fpu_s4_arm64,
+  fpu_s5_arm64,
+  fpu_s6_arm64,
+  fpu_s7_arm64,
+  fpu_s8_arm64,
+  fpu_s9_arm64,
+  fpu_s10_arm64,
+  fpu_s11_arm64,
+  fpu_s12_arm64,
+  fpu_s13_arm64,
+  fpu_s14_arm64,
+  fpu_s15_arm64,
+  fpu_s16_arm64,
+  fpu_s17_arm64,
+  fpu_s18_arm64,
+  fpu_s19_arm64,
+  fpu_s20_arm64,
+  fpu_s21_arm64,
+  fpu_s22_arm64,
+  fpu_s23_arm64,
+  fpu_s24_arm64,
+  fpu_s25_arm64,
+  fpu_s26_arm64,
+  fpu_s27_arm64,
+  fpu_s28_arm64,
+  fpu_s29_arm64,
+  fpu_s30_arm64,
+  fpu_s31_arm64,
 
-        k_num_registers_arm64,
-        k_num_gpr_registers_arm64 = k_last_gpr_arm64 - k_first_gpr_arm64 + 1,
-        k_num_fpr_registers_arm64 = k_last_fpr_arm64 - k_first_fpr_arm64 + 1
-    };
+  fpu_d0_arm64,
+  fpu_d1_arm64,
+  fpu_d2_arm64,
+  fpu_d3_arm64,
+  fpu_d4_arm64,
+  fpu_d5_arm64,
+  fpu_d6_arm64,
+  fpu_d7_arm64,
+  fpu_d8_arm64,
+  fpu_d9_arm64,
+  fpu_d10_arm64,
+  fpu_d11_arm64,
+  fpu_d12_arm64,
+  fpu_d13_arm64,
+  fpu_d14_arm64,
+  fpu_d15_arm64,
+  fpu_d16_arm64,
+  fpu_d17_arm64,
+  fpu_d18_arm64,
+  fpu_d19_arm64,
+  fpu_d20_arm64,
+  fpu_d21_arm64,
+  fpu_d22_arm64,
+  fpu_d23_arm64,
+  fpu_d24_arm64,
+  fpu_d25_arm64,
+  fpu_d26_arm64,
+  fpu_d27_arm64,
+  fpu_d28_arm64,
+  fpu_d29_arm64,
+  fpu_d30_arm64,
+  fpu_d31_arm64,
+
+  fpu_fpsr_arm64,
+  fpu_fpcr_arm64,
+  k_last_fpr_arm64 = fpu_fpcr_arm64,
+
+  exc_far_arm64,
+  exc_esr_arm64,
+  exc_exception_arm64,
+
+  dbg_bvr0_arm64,
+  dbg_bvr1_arm64,
+  dbg_bvr2_arm64,
+  dbg_bvr3_arm64,
+  dbg_bvr4_arm64,
+  dbg_bvr5_arm64,
+  dbg_bvr6_arm64,
+  dbg_bvr7_arm64,
+  dbg_bvr8_arm64,
+  dbg_bvr9_arm64,
+  dbg_bvr10_arm64,
+  dbg_bvr11_arm64,
+  dbg_bvr12_arm64,
+  dbg_bvr13_arm64,
+  dbg_bvr14_arm64,
+  dbg_bvr15_arm64,
+  dbg_bcr0_arm64,
+  dbg_bcr1_arm64,
+  dbg_bcr2_arm64,
+  dbg_bcr3_arm64,
+  dbg_bcr4_arm64,
+  dbg_bcr5_arm64,
+  dbg_bcr6_arm64,
+  dbg_bcr7_arm64,
+  dbg_bcr8_arm64,
+  dbg_bcr9_arm64,
+  dbg_bcr10_arm64,
+  dbg_bcr11_arm64,
+  dbg_bcr12_arm64,
+  dbg_bcr13_arm64,
+  dbg_bcr14_arm64,
+  dbg_bcr15_arm64,
+  dbg_wvr0_arm64,
+  dbg_wvr1_arm64,
+  dbg_wvr2_arm64,
+  dbg_wvr3_arm64,
+  dbg_wvr4_arm64,
+  dbg_wvr5_arm64,
+  dbg_wvr6_arm64,
+  dbg_wvr7_arm64,
+  dbg_wvr8_arm64,
+  dbg_wvr9_arm64,
+  dbg_wvr10_arm64,
+  dbg_wvr11_arm64,
+  dbg_wvr12_arm64,
+  dbg_wvr13_arm64,
+  dbg_wvr14_arm64,
+  dbg_wvr15_arm64,
+  dbg_wcr0_arm64,
+  dbg_wcr1_arm64,
+  dbg_wcr2_arm64,
+  dbg_wcr3_arm64,
+  dbg_wcr4_arm64,
+  dbg_wcr5_arm64,
+  dbg_wcr6_arm64,
+  dbg_wcr7_arm64,
+  dbg_wcr8_arm64,
+  dbg_wcr9_arm64,
+  dbg_wcr10_arm64,
+  dbg_wcr11_arm64,
+  dbg_wcr12_arm64,
+  dbg_wcr13_arm64,
+  dbg_wcr14_arm64,
+  dbg_wcr15_arm64,
+
+  k_num_registers_arm64,
+  k_num_gpr_registers_arm64 = k_last_gpr_arm64 - k_first_gpr_arm64 + 1,
+  k_num_fpr_registers_arm64 = k_last_fpr_arm64 - k_first_fpr_arm64 + 1
+};
 }
 
 #endif // #ifndef lldb_arm64_register_enums_h
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h
index 69dc9ef..6192936 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h
@@ -1,4 +1,4 @@
-//===-- lldb-mips-frebsd-register-enums.h -------------------------------*- C++ -*-===//
+//===-- lldb-mips-freebsd-register-enums.h ----------------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -10,61 +10,59 @@
 #ifndef lldb_mips_freebsd_register_enums_h
 #define lldb_mips_freebsd_register_enums_h
 
-namespace lldb_private
-{
-    // LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
+namespace lldb_private {
+// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
 
-    //---------------------------------------------------------------------------
-    // Internal codes for all mips registers.
-    //---------------------------------------------------------------------------
-    enum
-    {
-        k_first_gpr_mips64,
-        gpr_zero_mips64 = k_first_gpr_mips64,
-        gpr_r1_mips64,
-        gpr_r2_mips64,
-        gpr_r3_mips64,
-        gpr_r4_mips64,
-        gpr_r5_mips64,
-        gpr_r6_mips64,
-        gpr_r7_mips64,
-        gpr_r8_mips64,
-        gpr_r9_mips64,
-        gpr_r10_mips64,
-        gpr_r11_mips64,
-        gpr_r12_mips64,
-        gpr_r13_mips64,
-        gpr_r14_mips64,
-        gpr_r15_mips64,
-        gpr_r16_mips64,
-        gpr_r17_mips64,
-        gpr_r18_mips64,
-        gpr_r19_mips64,
-        gpr_r20_mips64,
-        gpr_r21_mips64,
-        gpr_r22_mips64,
-        gpr_r23_mips64,
-        gpr_r24_mips64,
-        gpr_r25_mips64,
-        gpr_r26_mips64,
-        gpr_r27_mips64,
-        gpr_gp_mips64,
-        gpr_sp_mips64,
-        gpr_r30_mips64,
-        gpr_ra_mips64,
-        gpr_sr_mips64,
-        gpr_mullo_mips64,
-        gpr_mulhi_mips64,
-        gpr_badvaddr_mips64,
-        gpr_cause_mips64,
-        gpr_pc_mips64,
-        gpr_ic_mips64,
-        gpr_dummy_mips64,
-        k_last_gpr_mips64 = gpr_dummy_mips64,
+//---------------------------------------------------------------------------
+// Internal codes for all mips registers.
+//---------------------------------------------------------------------------
+enum {
+  k_first_gpr_mips64,
+  gpr_zero_mips64 = k_first_gpr_mips64,
+  gpr_r1_mips64,
+  gpr_r2_mips64,
+  gpr_r3_mips64,
+  gpr_r4_mips64,
+  gpr_r5_mips64,
+  gpr_r6_mips64,
+  gpr_r7_mips64,
+  gpr_r8_mips64,
+  gpr_r9_mips64,
+  gpr_r10_mips64,
+  gpr_r11_mips64,
+  gpr_r12_mips64,
+  gpr_r13_mips64,
+  gpr_r14_mips64,
+  gpr_r15_mips64,
+  gpr_r16_mips64,
+  gpr_r17_mips64,
+  gpr_r18_mips64,
+  gpr_r19_mips64,
+  gpr_r20_mips64,
+  gpr_r21_mips64,
+  gpr_r22_mips64,
+  gpr_r23_mips64,
+  gpr_r24_mips64,
+  gpr_r25_mips64,
+  gpr_r26_mips64,
+  gpr_r27_mips64,
+  gpr_gp_mips64,
+  gpr_sp_mips64,
+  gpr_r30_mips64,
+  gpr_ra_mips64,
+  gpr_sr_mips64,
+  gpr_mullo_mips64,
+  gpr_mulhi_mips64,
+  gpr_badvaddr_mips64,
+  gpr_cause_mips64,
+  gpr_pc_mips64,
+  gpr_ic_mips64,
+  gpr_dummy_mips64,
+  k_last_gpr_mips64 = gpr_dummy_mips64,
 
-        k_num_registers_mips64,
+  k_num_registers_mips64,
 
-        k_num_gpr_registers_mips64 = k_last_gpr_mips64 - k_first_gpr_mips64 + 1
-    };
+  k_num_gpr_registers_mips64 = k_last_gpr_mips64 - k_first_gpr_mips64 + 1
+};
 }
 #endif // #ifndef lldb_mips_freebsd_register_enums_h
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h
index 46ebf4b..0ecf3e3 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h
@@ -1,4 +1,5 @@
-//===-- lldb-mips-linux-register-enums.h -------------------------------*- C++ -*-===//
+//===-- lldb-mips-linux-register-enums.h -------------------------------*- C++
+//-*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -10,276 +11,277 @@
 #ifndef lldb_mips_linux_register_enums_h
 #define lldb_mips_linux_register_enums_h
 
-namespace lldb_private
-{
-    // LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
+namespace lldb_private {
+// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
 
-    //---------------------------------------------------------------------------
-    // Internal codes for all mips registers.
-    //---------------------------------------------------------------------------
-    enum
-    {
-        k_first_gpr_mips,
-        gpr_zero_mips = k_first_gpr_mips,
-        gpr_r1_mips,
-        gpr_r2_mips,
-        gpr_r3_mips,
-        gpr_r4_mips,
-        gpr_r5_mips,
-        gpr_r6_mips,
-        gpr_r7_mips,
-        gpr_r8_mips,
-        gpr_r9_mips,
-        gpr_r10_mips,
-        gpr_r11_mips,
-        gpr_r12_mips,
-        gpr_r13_mips,
-        gpr_r14_mips,
-        gpr_r15_mips,
-        gpr_r16_mips,
-        gpr_r17_mips,
-        gpr_r18_mips,
-        gpr_r19_mips,
-        gpr_r20_mips,
-        gpr_r21_mips,
-        gpr_r22_mips,
-        gpr_r23_mips,
-        gpr_r24_mips,
-        gpr_r25_mips,
-        gpr_r26_mips,
-        gpr_r27_mips,
-        gpr_gp_mips,
-        gpr_sp_mips,
-        gpr_r30_mips,
-        gpr_ra_mips,
-        gpr_sr_mips,
-        gpr_mullo_mips,
-        gpr_mulhi_mips,
-        gpr_badvaddr_mips,
-        gpr_cause_mips,
-        gpr_pc_mips,
-        gpr_config5_mips,
+//---------------------------------------------------------------------------
+// Internal codes for all mips registers.
+//---------------------------------------------------------------------------
+enum {
+  k_first_gpr_mips,
+  gpr_zero_mips = k_first_gpr_mips,
+  gpr_r1_mips,
+  gpr_r2_mips,
+  gpr_r3_mips,
+  gpr_r4_mips,
+  gpr_r5_mips,
+  gpr_r6_mips,
+  gpr_r7_mips,
+  gpr_r8_mips,
+  gpr_r9_mips,
+  gpr_r10_mips,
+  gpr_r11_mips,
+  gpr_r12_mips,
+  gpr_r13_mips,
+  gpr_r14_mips,
+  gpr_r15_mips,
+  gpr_r16_mips,
+  gpr_r17_mips,
+  gpr_r18_mips,
+  gpr_r19_mips,
+  gpr_r20_mips,
+  gpr_r21_mips,
+  gpr_r22_mips,
+  gpr_r23_mips,
+  gpr_r24_mips,
+  gpr_r25_mips,
+  gpr_r26_mips,
+  gpr_r27_mips,
+  gpr_gp_mips,
+  gpr_sp_mips,
+  gpr_r30_mips,
+  gpr_ra_mips,
+  gpr_sr_mips,
+  gpr_mullo_mips,
+  gpr_mulhi_mips,
+  gpr_badvaddr_mips,
+  gpr_cause_mips,
+  gpr_pc_mips,
+  gpr_config5_mips,
 
-        k_last_gpr_mips = gpr_config5_mips,
+  k_last_gpr_mips = gpr_config5_mips,
 
-        k_first_fpr_mips,
-        fpr_f0_mips = k_first_fpr_mips,
-        fpr_f1_mips,
-        fpr_f2_mips,
-        fpr_f3_mips,
-        fpr_f4_mips,
-        fpr_f5_mips,
-        fpr_f6_mips,
-        fpr_f7_mips,
-        fpr_f8_mips,
-        fpr_f9_mips,
-        fpr_f10_mips,
-        fpr_f11_mips,
-        fpr_f12_mips,
-        fpr_f13_mips,
-        fpr_f14_mips,
-        fpr_f15_mips,
-        fpr_f16_mips,
-        fpr_f17_mips,
-        fpr_f18_mips,
-        fpr_f19_mips,
-        fpr_f20_mips,
-        fpr_f21_mips,
-        fpr_f22_mips,
-        fpr_f23_mips,
-        fpr_f24_mips,
-        fpr_f25_mips,
-        fpr_f26_mips,
-        fpr_f27_mips,
-        fpr_f28_mips,
-        fpr_f29_mips,
-        fpr_f30_mips,
-        fpr_f31_mips,
-        fpr_fcsr_mips,
-        fpr_fir_mips,
-        fpr_config5_mips,
-        k_last_fpr_mips = fpr_config5_mips,
+  k_first_fpr_mips,
+  fpr_f0_mips = k_first_fpr_mips,
+  fpr_f1_mips,
+  fpr_f2_mips,
+  fpr_f3_mips,
+  fpr_f4_mips,
+  fpr_f5_mips,
+  fpr_f6_mips,
+  fpr_f7_mips,
+  fpr_f8_mips,
+  fpr_f9_mips,
+  fpr_f10_mips,
+  fpr_f11_mips,
+  fpr_f12_mips,
+  fpr_f13_mips,
+  fpr_f14_mips,
+  fpr_f15_mips,
+  fpr_f16_mips,
+  fpr_f17_mips,
+  fpr_f18_mips,
+  fpr_f19_mips,
+  fpr_f20_mips,
+  fpr_f21_mips,
+  fpr_f22_mips,
+  fpr_f23_mips,
+  fpr_f24_mips,
+  fpr_f25_mips,
+  fpr_f26_mips,
+  fpr_f27_mips,
+  fpr_f28_mips,
+  fpr_f29_mips,
+  fpr_f30_mips,
+  fpr_f31_mips,
+  fpr_fcsr_mips,
+  fpr_fir_mips,
+  fpr_config5_mips,
+  k_last_fpr_mips = fpr_config5_mips,
 
-        k_first_msa_mips,
-        msa_w0_mips = k_first_msa_mips,
-        msa_w1_mips,
-        msa_w2_mips,
-        msa_w3_mips,
-        msa_w4_mips,
-        msa_w5_mips,
-        msa_w6_mips,
-        msa_w7_mips,
-        msa_w8_mips,
-        msa_w9_mips,
-        msa_w10_mips,
-        msa_w11_mips,
-        msa_w12_mips,
-        msa_w13_mips,
-        msa_w14_mips,
-        msa_w15_mips,
-        msa_w16_mips,
-        msa_w17_mips,
-        msa_w18_mips,
-        msa_w19_mips,
-        msa_w20_mips,
-        msa_w21_mips,
-        msa_w22_mips,
-        msa_w23_mips,
-        msa_w24_mips,
-        msa_w25_mips,
-        msa_w26_mips,
-        msa_w27_mips,
-        msa_w28_mips,
-        msa_w29_mips,
-        msa_w30_mips,
-        msa_w31_mips,
-        msa_fcsr_mips,
-        msa_fir_mips,
-        msa_mcsr_mips,
-        msa_mir_mips,
-        msa_config5_mips,
-        k_last_msa_mips = msa_config5_mips,
+  k_first_msa_mips,
+  msa_w0_mips = k_first_msa_mips,
+  msa_w1_mips,
+  msa_w2_mips,
+  msa_w3_mips,
+  msa_w4_mips,
+  msa_w5_mips,
+  msa_w6_mips,
+  msa_w7_mips,
+  msa_w8_mips,
+  msa_w9_mips,
+  msa_w10_mips,
+  msa_w11_mips,
+  msa_w12_mips,
+  msa_w13_mips,
+  msa_w14_mips,
+  msa_w15_mips,
+  msa_w16_mips,
+  msa_w17_mips,
+  msa_w18_mips,
+  msa_w19_mips,
+  msa_w20_mips,
+  msa_w21_mips,
+  msa_w22_mips,
+  msa_w23_mips,
+  msa_w24_mips,
+  msa_w25_mips,
+  msa_w26_mips,
+  msa_w27_mips,
+  msa_w28_mips,
+  msa_w29_mips,
+  msa_w30_mips,
+  msa_w31_mips,
+  msa_fcsr_mips,
+  msa_fir_mips,
+  msa_mcsr_mips,
+  msa_mir_mips,
+  msa_config5_mips,
+  k_last_msa_mips = msa_config5_mips,
 
-        k_num_registers_mips,
+  k_num_registers_mips,
 
-        k_num_gpr_registers_mips = k_last_gpr_mips - k_first_gpr_mips + 1,
-        k_num_fpr_registers_mips = k_last_fpr_mips - k_first_fpr_mips + 1,
-        k_num_msa_registers_mips = k_last_msa_mips - k_first_msa_mips + 1,
-        k_num_user_registers_mips = k_num_gpr_registers_mips + k_num_fpr_registers_mips + k_num_msa_registers_mips
-    };
+  k_num_gpr_registers_mips = k_last_gpr_mips - k_first_gpr_mips + 1,
+  k_num_fpr_registers_mips = k_last_fpr_mips - k_first_fpr_mips + 1,
+  k_num_msa_registers_mips = k_last_msa_mips - k_first_msa_mips + 1,
+  k_num_user_registers_mips = k_num_gpr_registers_mips +
+                              k_num_fpr_registers_mips +
+                              k_num_msa_registers_mips
+};
 
-    //---------------------------------------------------------------------------
-    // Internal codes for all mips64 registers.
-    //---------------------------------------------------------------------------
-    enum
-    {
-        k_first_gpr_mips64,
-        gpr_zero_mips64 = k_first_gpr_mips64,
-        gpr_r1_mips64,
-        gpr_r2_mips64,
-        gpr_r3_mips64,
-        gpr_r4_mips64,
-        gpr_r5_mips64,
-        gpr_r6_mips64,
-        gpr_r7_mips64,
-        gpr_r8_mips64,
-        gpr_r9_mips64,
-        gpr_r10_mips64,
-        gpr_r11_mips64,
-        gpr_r12_mips64,
-        gpr_r13_mips64,
-        gpr_r14_mips64,
-        gpr_r15_mips64,
-        gpr_r16_mips64,
-        gpr_r17_mips64,
-        gpr_r18_mips64,
-        gpr_r19_mips64,
-        gpr_r20_mips64,
-        gpr_r21_mips64,
-        gpr_r22_mips64,
-        gpr_r23_mips64,
-        gpr_r24_mips64,
-        gpr_r25_mips64,
-        gpr_r26_mips64,
-        gpr_r27_mips64,
-        gpr_gp_mips64,
-        gpr_sp_mips64,
-        gpr_r30_mips64,
-        gpr_ra_mips64,
-        gpr_sr_mips64,
-        gpr_mullo_mips64,
-        gpr_mulhi_mips64,
-        gpr_badvaddr_mips64,
-        gpr_cause_mips64,
-        gpr_pc_mips64,
-        gpr_config5_mips64,
-        k_last_gpr_mips64 = gpr_config5_mips64,
+//---------------------------------------------------------------------------
+// Internal codes for all mips64 registers.
+//---------------------------------------------------------------------------
+enum {
+  k_first_gpr_mips64,
+  gpr_zero_mips64 = k_first_gpr_mips64,
+  gpr_r1_mips64,
+  gpr_r2_mips64,
+  gpr_r3_mips64,
+  gpr_r4_mips64,
+  gpr_r5_mips64,
+  gpr_r6_mips64,
+  gpr_r7_mips64,
+  gpr_r8_mips64,
+  gpr_r9_mips64,
+  gpr_r10_mips64,
+  gpr_r11_mips64,
+  gpr_r12_mips64,
+  gpr_r13_mips64,
+  gpr_r14_mips64,
+  gpr_r15_mips64,
+  gpr_r16_mips64,
+  gpr_r17_mips64,
+  gpr_r18_mips64,
+  gpr_r19_mips64,
+  gpr_r20_mips64,
+  gpr_r21_mips64,
+  gpr_r22_mips64,
+  gpr_r23_mips64,
+  gpr_r24_mips64,
+  gpr_r25_mips64,
+  gpr_r26_mips64,
+  gpr_r27_mips64,
+  gpr_gp_mips64,
+  gpr_sp_mips64,
+  gpr_r30_mips64,
+  gpr_ra_mips64,
+  gpr_sr_mips64,
+  gpr_mullo_mips64,
+  gpr_mulhi_mips64,
+  gpr_badvaddr_mips64,
+  gpr_cause_mips64,
+  gpr_pc_mips64,
+  gpr_config5_mips64,
+  k_last_gpr_mips64 = gpr_config5_mips64,
 
-        k_first_fpr_mips64,
-        fpr_f0_mips64 = k_first_fpr_mips64,
-        fpr_f1_mips64,
-        fpr_f2_mips64,
-        fpr_f3_mips64,
-        fpr_f4_mips64,
-        fpr_f5_mips64,
-        fpr_f6_mips64,
-        fpr_f7_mips64,
-        fpr_f8_mips64,
-        fpr_f9_mips64,
-        fpr_f10_mips64,
-        fpr_f11_mips64,
-        fpr_f12_mips64,
-        fpr_f13_mips64,
-        fpr_f14_mips64,
-        fpr_f15_mips64,
-        fpr_f16_mips64,
-        fpr_f17_mips64,
-        fpr_f18_mips64,
-        fpr_f19_mips64,
-        fpr_f20_mips64,
-        fpr_f21_mips64,
-        fpr_f22_mips64,
-        fpr_f23_mips64,
-        fpr_f24_mips64,
-        fpr_f25_mips64,
-        fpr_f26_mips64,
-        fpr_f27_mips64,
-        fpr_f28_mips64,
-        fpr_f29_mips64,
-        fpr_f30_mips64,
-        fpr_f31_mips64,
-        fpr_fcsr_mips64,
-        fpr_fir_mips64,
-        fpr_config5_mips64,
-        k_last_fpr_mips64 = fpr_config5_mips64,
+  k_first_fpr_mips64,
+  fpr_f0_mips64 = k_first_fpr_mips64,
+  fpr_f1_mips64,
+  fpr_f2_mips64,
+  fpr_f3_mips64,
+  fpr_f4_mips64,
+  fpr_f5_mips64,
+  fpr_f6_mips64,
+  fpr_f7_mips64,
+  fpr_f8_mips64,
+  fpr_f9_mips64,
+  fpr_f10_mips64,
+  fpr_f11_mips64,
+  fpr_f12_mips64,
+  fpr_f13_mips64,
+  fpr_f14_mips64,
+  fpr_f15_mips64,
+  fpr_f16_mips64,
+  fpr_f17_mips64,
+  fpr_f18_mips64,
+  fpr_f19_mips64,
+  fpr_f20_mips64,
+  fpr_f21_mips64,
+  fpr_f22_mips64,
+  fpr_f23_mips64,
+  fpr_f24_mips64,
+  fpr_f25_mips64,
+  fpr_f26_mips64,
+  fpr_f27_mips64,
+  fpr_f28_mips64,
+  fpr_f29_mips64,
+  fpr_f30_mips64,
+  fpr_f31_mips64,
+  fpr_fcsr_mips64,
+  fpr_fir_mips64,
+  fpr_config5_mips64,
+  k_last_fpr_mips64 = fpr_config5_mips64,
 
-        k_first_msa_mips64,
-        msa_w0_mips64 = k_first_msa_mips64,
-        msa_w1_mips64,
-        msa_w2_mips64,
-        msa_w3_mips64,
-        msa_w4_mips64,
-        msa_w5_mips64,
-        msa_w6_mips64,
-        msa_w7_mips64,
-        msa_w8_mips64,
-        msa_w9_mips64,
-        msa_w10_mips64,
-        msa_w11_mips64,
-        msa_w12_mips64,
-        msa_w13_mips64,
-        msa_w14_mips64,
-        msa_w15_mips64,
-        msa_w16_mips64,
-        msa_w17_mips64,
-        msa_w18_mips64,
-        msa_w19_mips64,
-        msa_w20_mips64,
-        msa_w21_mips64,
-        msa_w22_mips64,
-        msa_w23_mips64,
-        msa_w24_mips64,
-        msa_w25_mips64,
-        msa_w26_mips64,
-        msa_w27_mips64,
-        msa_w28_mips64,
-        msa_w29_mips64,
-        msa_w30_mips64,
-        msa_w31_mips64,
-        msa_fcsr_mips64,
-        msa_fir_mips64,
-        msa_mcsr_mips64,
-        msa_mir_mips64,
-        msa_config5_mips64,
-        k_last_msa_mips64 = msa_config5_mips64,
+  k_first_msa_mips64,
+  msa_w0_mips64 = k_first_msa_mips64,
+  msa_w1_mips64,
+  msa_w2_mips64,
+  msa_w3_mips64,
+  msa_w4_mips64,
+  msa_w5_mips64,
+  msa_w6_mips64,
+  msa_w7_mips64,
+  msa_w8_mips64,
+  msa_w9_mips64,
+  msa_w10_mips64,
+  msa_w11_mips64,
+  msa_w12_mips64,
+  msa_w13_mips64,
+  msa_w14_mips64,
+  msa_w15_mips64,
+  msa_w16_mips64,
+  msa_w17_mips64,
+  msa_w18_mips64,
+  msa_w19_mips64,
+  msa_w20_mips64,
+  msa_w21_mips64,
+  msa_w22_mips64,
+  msa_w23_mips64,
+  msa_w24_mips64,
+  msa_w25_mips64,
+  msa_w26_mips64,
+  msa_w27_mips64,
+  msa_w28_mips64,
+  msa_w29_mips64,
+  msa_w30_mips64,
+  msa_w31_mips64,
+  msa_fcsr_mips64,
+  msa_fir_mips64,
+  msa_mcsr_mips64,
+  msa_mir_mips64,
+  msa_config5_mips64,
+  k_last_msa_mips64 = msa_config5_mips64,
 
-        k_num_registers_mips64,
+  k_num_registers_mips64,
 
-        k_num_gpr_registers_mips64 = k_last_gpr_mips64 - k_first_gpr_mips64 + 1,
-        k_num_fpr_registers_mips64 = k_last_fpr_mips64 - k_first_fpr_mips64 + 1,
-        k_num_msa_registers_mips64 = k_last_msa_mips64 - k_first_msa_mips64 + 1,
-        k_num_user_registers_mips64 = k_num_gpr_registers_mips64 + k_num_fpr_registers_mips64 + k_num_msa_registers_mips64
-    };
+  k_num_gpr_registers_mips64 = k_last_gpr_mips64 - k_first_gpr_mips64 + 1,
+  k_num_fpr_registers_mips64 = k_last_fpr_mips64 - k_first_fpr_mips64 + 1,
+  k_num_msa_registers_mips64 = k_last_msa_mips64 - k_first_msa_mips64 + 1,
+  k_num_user_registers_mips64 = k_num_gpr_registers_mips64 +
+                                k_num_fpr_registers_mips64 +
+                                k_num_msa_registers_mips64
+};
 
 // Register no. for RegisterKind = eRegisterKindProcessPlugin
 // The ptrace request PTRACE_PEEKUSER/PTRACE_POKEUSER used this number
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-s390x-register-enums.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-s390x-register-enums.h
index 174daa2..65ff92f 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-s390x-register-enums.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-s390x-register-enums.h
@@ -10,84 +10,83 @@
 #ifndef lldb_s390x_register_enums_h
 #define lldb_s390x_register_enums_h
 
-namespace lldb_private
-{
+namespace lldb_private {
 // LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
 
 //---------------------------------------------------------------------------
 // Internal codes for all s390x registers.
 //---------------------------------------------------------------------------
-enum
-{
-    k_first_gpr_s390x,
-    lldb_r0_s390x = k_first_gpr_s390x,
-    lldb_r1_s390x,
-    lldb_r2_s390x,
-    lldb_r3_s390x,
-    lldb_r4_s390x,
-    lldb_r5_s390x,
-    lldb_r6_s390x,
-    lldb_r7_s390x,
-    lldb_r8_s390x,
-    lldb_r9_s390x,
-    lldb_r10_s390x,
-    lldb_r11_s390x,
-    lldb_r12_s390x,
-    lldb_r13_s390x,
-    lldb_r14_s390x,
-    lldb_r15_s390x,
-    lldb_acr0_s390x,
-    lldb_acr1_s390x,
-    lldb_acr2_s390x,
-    lldb_acr3_s390x,
-    lldb_acr4_s390x,
-    lldb_acr5_s390x,
-    lldb_acr6_s390x,
-    lldb_acr7_s390x,
-    lldb_acr8_s390x,
-    lldb_acr9_s390x,
-    lldb_acr10_s390x,
-    lldb_acr11_s390x,
-    lldb_acr12_s390x,
-    lldb_acr13_s390x,
-    lldb_acr14_s390x,
-    lldb_acr15_s390x,
-    lldb_pswm_s390x,
-    lldb_pswa_s390x,
-    k_last_gpr_s390x = lldb_pswa_s390x,
+enum {
+  k_first_gpr_s390x,
+  lldb_r0_s390x = k_first_gpr_s390x,
+  lldb_r1_s390x,
+  lldb_r2_s390x,
+  lldb_r3_s390x,
+  lldb_r4_s390x,
+  lldb_r5_s390x,
+  lldb_r6_s390x,
+  lldb_r7_s390x,
+  lldb_r8_s390x,
+  lldb_r9_s390x,
+  lldb_r10_s390x,
+  lldb_r11_s390x,
+  lldb_r12_s390x,
+  lldb_r13_s390x,
+  lldb_r14_s390x,
+  lldb_r15_s390x,
+  lldb_acr0_s390x,
+  lldb_acr1_s390x,
+  lldb_acr2_s390x,
+  lldb_acr3_s390x,
+  lldb_acr4_s390x,
+  lldb_acr5_s390x,
+  lldb_acr6_s390x,
+  lldb_acr7_s390x,
+  lldb_acr8_s390x,
+  lldb_acr9_s390x,
+  lldb_acr10_s390x,
+  lldb_acr11_s390x,
+  lldb_acr12_s390x,
+  lldb_acr13_s390x,
+  lldb_acr14_s390x,
+  lldb_acr15_s390x,
+  lldb_pswm_s390x,
+  lldb_pswa_s390x,
+  k_last_gpr_s390x = lldb_pswa_s390x,
 
-    k_first_fpr_s390x,
-    lldb_f0_s390x = k_first_fpr_s390x,
-    lldb_f1_s390x,
-    lldb_f2_s390x,
-    lldb_f3_s390x,
-    lldb_f4_s390x,
-    lldb_f5_s390x,
-    lldb_f6_s390x,
-    lldb_f7_s390x,
-    lldb_f8_s390x,
-    lldb_f9_s390x,
-    lldb_f10_s390x,
-    lldb_f11_s390x,
-    lldb_f12_s390x,
-    lldb_f13_s390x,
-    lldb_f14_s390x,
-    lldb_f15_s390x,
-    lldb_fpc_s390x,
-    k_last_fpr_s390x = lldb_fpc_s390x,
+  k_first_fpr_s390x,
+  lldb_f0_s390x = k_first_fpr_s390x,
+  lldb_f1_s390x,
+  lldb_f2_s390x,
+  lldb_f3_s390x,
+  lldb_f4_s390x,
+  lldb_f5_s390x,
+  lldb_f6_s390x,
+  lldb_f7_s390x,
+  lldb_f8_s390x,
+  lldb_f9_s390x,
+  lldb_f10_s390x,
+  lldb_f11_s390x,
+  lldb_f12_s390x,
+  lldb_f13_s390x,
+  lldb_f14_s390x,
+  lldb_f15_s390x,
+  lldb_fpc_s390x,
+  k_last_fpr_s390x = lldb_fpc_s390x,
 
-    // These are only available on Linux.
-    k_first_linux_s390x,
-    lldb_orig_r2_s390x = k_first_linux_s390x,
-    lldb_last_break_s390x,
-    lldb_system_call_s390x,
-    k_last_linux_s390x = lldb_system_call_s390x,
+  // These are only available on Linux.
+  k_first_linux_s390x,
+  lldb_orig_r2_s390x = k_first_linux_s390x,
+  lldb_last_break_s390x,
+  lldb_system_call_s390x,
+  k_last_linux_s390x = lldb_system_call_s390x,
 
-    k_num_registers_s390x,
-    k_num_gpr_registers_s390x = k_last_gpr_s390x - k_first_gpr_s390x + 1,
-    k_num_fpr_registers_s390x = k_last_fpr_s390x - k_first_fpr_s390x + 1,
-    k_num_linux_registers_s390x = k_last_linux_s390x - k_first_linux_s390x + 1,
-    k_num_user_registers_s390x = k_num_gpr_registers_s390x + k_num_fpr_registers_s390x,
+  k_num_registers_s390x,
+  k_num_gpr_registers_s390x = k_last_gpr_s390x - k_first_gpr_s390x + 1,
+  k_num_fpr_registers_s390x = k_last_fpr_s390x - k_first_fpr_s390x + 1,
+  k_num_linux_registers_s390x = k_last_linux_s390x - k_first_linux_s390x + 1,
+  k_num_user_registers_s390x =
+      k_num_gpr_registers_s390x + k_num_fpr_registers_s390x,
 };
 }
 
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-x86-register-enums.h b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-x86-register-enums.h
index 63027b4..770ec5a 100644
--- a/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-x86-register-enums.h
+++ b/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-x86-register-enums.h
@@ -10,286 +10,314 @@
 #ifndef lldb_x86_register_enums_h
 #define lldb_x86_register_enums_h
 
-namespace lldb_private
-{
-    // LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
+namespace lldb_private {
+// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
 
-    //---------------------------------------------------------------------------
-    // Internal codes for all i386 registers.
-    //---------------------------------------------------------------------------
-    enum
-    {
-        k_first_gpr_i386,
-        lldb_eax_i386 = k_first_gpr_i386,
-        lldb_ebx_i386,
-        lldb_ecx_i386,
-        lldb_edx_i386,
-        lldb_edi_i386,
-        lldb_esi_i386,
-        lldb_ebp_i386,
-        lldb_esp_i386,
-        lldb_eip_i386,
-        lldb_eflags_i386,
-        lldb_cs_i386,
-        lldb_fs_i386,
-        lldb_gs_i386,
-        lldb_ss_i386,
-        lldb_ds_i386,
-        lldb_es_i386,
+//---------------------------------------------------------------------------
+// Internal codes for all i386 registers.
+//---------------------------------------------------------------------------
+enum {
+  k_first_gpr_i386,
+  lldb_eax_i386 = k_first_gpr_i386,
+  lldb_ebx_i386,
+  lldb_ecx_i386,
+  lldb_edx_i386,
+  lldb_edi_i386,
+  lldb_esi_i386,
+  lldb_ebp_i386,
+  lldb_esp_i386,
+  lldb_eip_i386,
+  lldb_eflags_i386,
+  lldb_cs_i386,
+  lldb_fs_i386,
+  lldb_gs_i386,
+  lldb_ss_i386,
+  lldb_ds_i386,
+  lldb_es_i386,
 
-        k_first_alias_i386,
-        lldb_ax_i386 = k_first_alias_i386,
-        lldb_bx_i386,
-        lldb_cx_i386,
-        lldb_dx_i386,
-        lldb_di_i386,
-        lldb_si_i386,
-        lldb_bp_i386,
-        lldb_sp_i386,
-        lldb_ah_i386,
-        lldb_bh_i386,
-        lldb_ch_i386,
-        lldb_dh_i386,
-        lldb_al_i386,
-        lldb_bl_i386,
-        lldb_cl_i386,
-        lldb_dl_i386,
-        k_last_alias_i386 = lldb_dl_i386,
+  k_first_alias_i386,
+  lldb_ax_i386 = k_first_alias_i386,
+  lldb_bx_i386,
+  lldb_cx_i386,
+  lldb_dx_i386,
+  lldb_di_i386,
+  lldb_si_i386,
+  lldb_bp_i386,
+  lldb_sp_i386,
+  lldb_ah_i386,
+  lldb_bh_i386,
+  lldb_ch_i386,
+  lldb_dh_i386,
+  lldb_al_i386,
+  lldb_bl_i386,
+  lldb_cl_i386,
+  lldb_dl_i386,
+  k_last_alias_i386 = lldb_dl_i386,
 
-        k_last_gpr_i386 = k_last_alias_i386,
+  k_last_gpr_i386 = k_last_alias_i386,
 
-        k_first_fpr_i386,
-        lldb_fctrl_i386 = k_first_fpr_i386,
-        lldb_fstat_i386,
-        lldb_ftag_i386,
-        lldb_fop_i386,
-        lldb_fiseg_i386,
-        lldb_fioff_i386,
-        lldb_foseg_i386,
-        lldb_fooff_i386,
-        lldb_mxcsr_i386,
-        lldb_mxcsrmask_i386,
-        lldb_st0_i386,
-        lldb_st1_i386,
-        lldb_st2_i386,
-        lldb_st3_i386,
-        lldb_st4_i386,
-        lldb_st5_i386,
-        lldb_st6_i386,
-        lldb_st7_i386,
-        lldb_mm0_i386,
-        lldb_mm1_i386,
-        lldb_mm2_i386,
-        lldb_mm3_i386,
-        lldb_mm4_i386,
-        lldb_mm5_i386,
-        lldb_mm6_i386,
-        lldb_mm7_i386,
-        lldb_xmm0_i386,
-        lldb_xmm1_i386,
-        lldb_xmm2_i386,
-        lldb_xmm3_i386,
-        lldb_xmm4_i386,
-        lldb_xmm5_i386,
-        lldb_xmm6_i386,
-        lldb_xmm7_i386,
-        k_last_fpr_i386 = lldb_xmm7_i386,
+  k_first_fpr_i386,
+  lldb_fctrl_i386 = k_first_fpr_i386,
+  lldb_fstat_i386,
+  lldb_ftag_i386,
+  lldb_fop_i386,
+  lldb_fiseg_i386,
+  lldb_fioff_i386,
+  lldb_foseg_i386,
+  lldb_fooff_i386,
+  lldb_mxcsr_i386,
+  lldb_mxcsrmask_i386,
+  lldb_st0_i386,
+  lldb_st1_i386,
+  lldb_st2_i386,
+  lldb_st3_i386,
+  lldb_st4_i386,
+  lldb_st5_i386,
+  lldb_st6_i386,
+  lldb_st7_i386,
+  lldb_mm0_i386,
+  lldb_mm1_i386,
+  lldb_mm2_i386,
+  lldb_mm3_i386,
+  lldb_mm4_i386,
+  lldb_mm5_i386,
+  lldb_mm6_i386,
+  lldb_mm7_i386,
+  lldb_xmm0_i386,
+  lldb_xmm1_i386,
+  lldb_xmm2_i386,
+  lldb_xmm3_i386,
+  lldb_xmm4_i386,
+  lldb_xmm5_i386,
+  lldb_xmm6_i386,
+  lldb_xmm7_i386,
+  k_last_fpr_i386 = lldb_xmm7_i386,
 
-        k_first_avx_i386,
-        lldb_ymm0_i386 = k_first_avx_i386,
-        lldb_ymm1_i386,
-        lldb_ymm2_i386,
-        lldb_ymm3_i386,
-        lldb_ymm4_i386,
-        lldb_ymm5_i386,
-        lldb_ymm6_i386,
-        lldb_ymm7_i386,
-        k_last_avx_i386 = lldb_ymm7_i386,
+  k_first_avx_i386,
+  lldb_ymm0_i386 = k_first_avx_i386,
+  lldb_ymm1_i386,
+  lldb_ymm2_i386,
+  lldb_ymm3_i386,
+  lldb_ymm4_i386,
+  lldb_ymm5_i386,
+  lldb_ymm6_i386,
+  lldb_ymm7_i386,
+  k_last_avx_i386 = lldb_ymm7_i386,
 
-        lldb_dr0_i386,
-        lldb_dr1_i386,
-        lldb_dr2_i386,
-        lldb_dr3_i386,
-        lldb_dr4_i386,
-        lldb_dr5_i386,
-        lldb_dr6_i386,
-        lldb_dr7_i386,
+  k_first_mpxr_i386,
+  lldb_bnd0_i386 = k_first_mpxr_i386,
+  lldb_bnd1_i386,
+  lldb_bnd2_i386,
+  lldb_bnd3_i386,
+  k_last_mpxr = lldb_bnd3_i386,
 
-        k_num_registers_i386,
-        k_num_gpr_registers_i386 = k_last_gpr_i386 - k_first_gpr_i386 + 1,
-        k_num_fpr_registers_i386 = k_last_fpr_i386 - k_first_fpr_i386 + 1,
-        k_num_avx_registers_i386 = k_last_avx_i386 - k_first_avx_i386 + 1,
-        k_num_user_registers_i386 = k_num_gpr_registers_i386 + k_num_fpr_registers_i386 + k_num_avx_registers_i386,
-    };
+  k_first_mpxc_i386,
+  lldb_bndcfgu_i386 = k_first_mpxc_i386,
+  lldb_bndstatus_i386,
+  k_last_mpxc_i386 = lldb_bndstatus_i386,
 
-    //---------------------------------------------------------------------------
-    // Internal codes for all x86_64 registers.
-    //---------------------------------------------------------------------------
-    enum
-    {
-        k_first_gpr_x86_64,
-        lldb_rax_x86_64 = k_first_gpr_x86_64,
-        lldb_rbx_x86_64,
-        lldb_rcx_x86_64,
-        lldb_rdx_x86_64,
-        lldb_rdi_x86_64,
-        lldb_rsi_x86_64,
-        lldb_rbp_x86_64,
-        lldb_rsp_x86_64,
-        lldb_r8_x86_64,
-        lldb_r9_x86_64,
-        lldb_r10_x86_64,
-        lldb_r11_x86_64,
-        lldb_r12_x86_64,
-        lldb_r13_x86_64,
-        lldb_r14_x86_64,
-        lldb_r15_x86_64,
-        lldb_rip_x86_64,
-        lldb_rflags_x86_64,
-        lldb_cs_x86_64,
-        lldb_fs_x86_64,
-        lldb_gs_x86_64,
-        lldb_ss_x86_64,
-        lldb_ds_x86_64,
-        lldb_es_x86_64,
+  lldb_dr0_i386,
+  lldb_dr1_i386,
+  lldb_dr2_i386,
+  lldb_dr3_i386,
+  lldb_dr4_i386,
+  lldb_dr5_i386,
+  lldb_dr6_i386,
+  lldb_dr7_i386,
 
-        k_first_alias_x86_64,
-        lldb_eax_x86_64 = k_first_alias_x86_64,
-        lldb_ebx_x86_64,
-        lldb_ecx_x86_64,
-        lldb_edx_x86_64,
-        lldb_edi_x86_64,
-        lldb_esi_x86_64,
-        lldb_ebp_x86_64,
-        lldb_esp_x86_64,
-        lldb_r8d_x86_64,    // Low 32 bits of r8
-        lldb_r9d_x86_64,    // Low 32 bits of r9
-        lldb_r10d_x86_64,   // Low 32 bits of r10
-        lldb_r11d_x86_64,   // Low 32 bits of r11
-        lldb_r12d_x86_64,   // Low 32 bits of r12
-        lldb_r13d_x86_64,   // Low 32 bits of r13
-        lldb_r14d_x86_64,   // Low 32 bits of r14
-        lldb_r15d_x86_64,   // Low 32 bits of r15
-        lldb_ax_x86_64,
-        lldb_bx_x86_64,
-        lldb_cx_x86_64,
-        lldb_dx_x86_64,
-        lldb_di_x86_64,
-        lldb_si_x86_64,
-        lldb_bp_x86_64,
-        lldb_sp_x86_64,
-        lldb_r8w_x86_64,    // Low 16 bits of r8
-        lldb_r9w_x86_64,    // Low 16 bits of r9
-        lldb_r10w_x86_64,   // Low 16 bits of r10
-        lldb_r11w_x86_64,   // Low 16 bits of r11
-        lldb_r12w_x86_64,   // Low 16 bits of r12
-        lldb_r13w_x86_64,   // Low 16 bits of r13
-        lldb_r14w_x86_64,   // Low 16 bits of r14
-        lldb_r15w_x86_64,   // Low 16 bits of r15
-        lldb_ah_x86_64,
-        lldb_bh_x86_64,
-        lldb_ch_x86_64,
-        lldb_dh_x86_64,
-        lldb_al_x86_64,
-        lldb_bl_x86_64,
-        lldb_cl_x86_64,
-        lldb_dl_x86_64,
-        lldb_dil_x86_64,
-        lldb_sil_x86_64,
-        lldb_bpl_x86_64,
-        lldb_spl_x86_64,
-        lldb_r8l_x86_64,    // Low 8 bits of r8
-        lldb_r9l_x86_64,    // Low 8 bits of r9
-        lldb_r10l_x86_64,   // Low 8 bits of r10
-        lldb_r11l_x86_64,   // Low 8 bits of r11
-        lldb_r12l_x86_64,   // Low 8 bits of r12
-        lldb_r13l_x86_64,   // Low 8 bits of r13
-        lldb_r14l_x86_64,   // Low 8 bits of r14
-        lldb_r15l_x86_64,   // Low 8 bits of r15
-        k_last_alias_x86_64 = lldb_r15l_x86_64,
+  k_num_registers_i386,
+  k_num_gpr_registers_i386 = k_last_gpr_i386 - k_first_gpr_i386 + 1,
+  k_num_fpr_registers_i386 = k_last_fpr_i386 - k_first_fpr_i386 + 1,
+  k_num_avx_registers_i386 = k_last_avx_i386 - k_first_avx_i386 + 1,
+  k_num_mpx_registers_i386 = k_last_mpxc_i386 - k_first_mpxr_i386 + 1,
+  k_num_user_registers_i386 = k_num_gpr_registers_i386 +
+                              k_num_fpr_registers_i386 +
+                              k_num_avx_registers_i386 +
+                              k_num_mpx_registers_i386,
+};
 
-        k_last_gpr_x86_64 = k_last_alias_x86_64,
+//---------------------------------------------------------------------------
+// Internal codes for all x86_64 registers.
+//---------------------------------------------------------------------------
+enum {
+  k_first_gpr_x86_64,
+  lldb_rax_x86_64 = k_first_gpr_x86_64,
+  lldb_rbx_x86_64,
+  lldb_rcx_x86_64,
+  lldb_rdx_x86_64,
+  lldb_rdi_x86_64,
+  lldb_rsi_x86_64,
+  lldb_rbp_x86_64,
+  lldb_rsp_x86_64,
+  lldb_r8_x86_64,
+  lldb_r9_x86_64,
+  lldb_r10_x86_64,
+  lldb_r11_x86_64,
+  lldb_r12_x86_64,
+  lldb_r13_x86_64,
+  lldb_r14_x86_64,
+  lldb_r15_x86_64,
+  lldb_rip_x86_64,
+  lldb_rflags_x86_64,
+  lldb_cs_x86_64,
+  lldb_fs_x86_64,
+  lldb_gs_x86_64,
+  lldb_ss_x86_64,
+  lldb_ds_x86_64,
+  lldb_es_x86_64,
 
-        k_first_fpr_x86_64,
-        lldb_fctrl_x86_64 = k_first_fpr_x86_64,
-        lldb_fstat_x86_64,
-        lldb_ftag_x86_64,
-        lldb_fop_x86_64,
-        lldb_fiseg_x86_64,
-        lldb_fioff_x86_64,
-        lldb_foseg_x86_64,
-        lldb_fooff_x86_64,
-        lldb_mxcsr_x86_64,
-        lldb_mxcsrmask_x86_64,
-        lldb_st0_x86_64,
-        lldb_st1_x86_64,
-        lldb_st2_x86_64,
-        lldb_st3_x86_64,
-        lldb_st4_x86_64,
-        lldb_st5_x86_64,
-        lldb_st6_x86_64,
-        lldb_st7_x86_64,
-        lldb_mm0_x86_64,
-        lldb_mm1_x86_64,
-        lldb_mm2_x86_64,
-        lldb_mm3_x86_64,
-        lldb_mm4_x86_64,
-        lldb_mm5_x86_64,
-        lldb_mm6_x86_64,
-        lldb_mm7_x86_64,
-        lldb_xmm0_x86_64,
-        lldb_xmm1_x86_64,
-        lldb_xmm2_x86_64,
-        lldb_xmm3_x86_64,
-        lldb_xmm4_x86_64,
-        lldb_xmm5_x86_64,
-        lldb_xmm6_x86_64,
-        lldb_xmm7_x86_64,
-        lldb_xmm8_x86_64,
-        lldb_xmm9_x86_64,
-        lldb_xmm10_x86_64,
-        lldb_xmm11_x86_64,
-        lldb_xmm12_x86_64,
-        lldb_xmm13_x86_64,
-        lldb_xmm14_x86_64,
-        lldb_xmm15_x86_64,
-        k_last_fpr_x86_64 = lldb_xmm15_x86_64,
+  k_first_alias_x86_64,
+  lldb_eax_x86_64 = k_first_alias_x86_64,
+  lldb_ebx_x86_64,
+  lldb_ecx_x86_64,
+  lldb_edx_x86_64,
+  lldb_edi_x86_64,
+  lldb_esi_x86_64,
+  lldb_ebp_x86_64,
+  lldb_esp_x86_64,
+  lldb_r8d_x86_64,  // Low 32 bits of r8
+  lldb_r9d_x86_64,  // Low 32 bits of r9
+  lldb_r10d_x86_64, // Low 32 bits of r10
+  lldb_r11d_x86_64, // Low 32 bits of r11
+  lldb_r12d_x86_64, // Low 32 bits of r12
+  lldb_r13d_x86_64, // Low 32 bits of r13
+  lldb_r14d_x86_64, // Low 32 bits of r14
+  lldb_r15d_x86_64, // Low 32 bits of r15
+  lldb_ax_x86_64,
+  lldb_bx_x86_64,
+  lldb_cx_x86_64,
+  lldb_dx_x86_64,
+  lldb_di_x86_64,
+  lldb_si_x86_64,
+  lldb_bp_x86_64,
+  lldb_sp_x86_64,
+  lldb_r8w_x86_64,  // Low 16 bits of r8
+  lldb_r9w_x86_64,  // Low 16 bits of r9
+  lldb_r10w_x86_64, // Low 16 bits of r10
+  lldb_r11w_x86_64, // Low 16 bits of r11
+  lldb_r12w_x86_64, // Low 16 bits of r12
+  lldb_r13w_x86_64, // Low 16 bits of r13
+  lldb_r14w_x86_64, // Low 16 bits of r14
+  lldb_r15w_x86_64, // Low 16 bits of r15
+  lldb_ah_x86_64,
+  lldb_bh_x86_64,
+  lldb_ch_x86_64,
+  lldb_dh_x86_64,
+  lldb_al_x86_64,
+  lldb_bl_x86_64,
+  lldb_cl_x86_64,
+  lldb_dl_x86_64,
+  lldb_dil_x86_64,
+  lldb_sil_x86_64,
+  lldb_bpl_x86_64,
+  lldb_spl_x86_64,
+  lldb_r8l_x86_64,  // Low 8 bits of r8
+  lldb_r9l_x86_64,  // Low 8 bits of r9
+  lldb_r10l_x86_64, // Low 8 bits of r10
+  lldb_r11l_x86_64, // Low 8 bits of r11
+  lldb_r12l_x86_64, // Low 8 bits of r12
+  lldb_r13l_x86_64, // Low 8 bits of r13
+  lldb_r14l_x86_64, // Low 8 bits of r14
+  lldb_r15l_x86_64, // Low 8 bits of r15
+  k_last_alias_x86_64 = lldb_r15l_x86_64,
 
-        k_first_avx_x86_64,
-        lldb_ymm0_x86_64 = k_first_avx_x86_64,
-        lldb_ymm1_x86_64,
-        lldb_ymm2_x86_64,
-        lldb_ymm3_x86_64,
-        lldb_ymm4_x86_64,
-        lldb_ymm5_x86_64,
-        lldb_ymm6_x86_64,
-        lldb_ymm7_x86_64,
-        lldb_ymm8_x86_64,
-        lldb_ymm9_x86_64,
-        lldb_ymm10_x86_64,
-        lldb_ymm11_x86_64,
-        lldb_ymm12_x86_64,
-        lldb_ymm13_x86_64,
-        lldb_ymm14_x86_64,
-        lldb_ymm15_x86_64,
-        k_last_avx_x86_64 = lldb_ymm15_x86_64,
+  k_last_gpr_x86_64 = k_last_alias_x86_64,
 
-        lldb_dr0_x86_64,
-        lldb_dr1_x86_64,
-        lldb_dr2_x86_64,
-        lldb_dr3_x86_64,
-        lldb_dr4_x86_64,
-        lldb_dr5_x86_64,
-        lldb_dr6_x86_64,
-        lldb_dr7_x86_64,
+  k_first_fpr_x86_64,
+  lldb_fctrl_x86_64 = k_first_fpr_x86_64,
+  lldb_fstat_x86_64,
+  lldb_ftag_x86_64,
+  lldb_fop_x86_64,
+  lldb_fiseg_x86_64,
+  lldb_fioff_x86_64,
+  lldb_foseg_x86_64,
+  lldb_fooff_x86_64,
+  lldb_mxcsr_x86_64,
+  lldb_mxcsrmask_x86_64,
+  lldb_st0_x86_64,
+  lldb_st1_x86_64,
+  lldb_st2_x86_64,
+  lldb_st3_x86_64,
+  lldb_st4_x86_64,
+  lldb_st5_x86_64,
+  lldb_st6_x86_64,
+  lldb_st7_x86_64,
+  lldb_mm0_x86_64,
+  lldb_mm1_x86_64,
+  lldb_mm2_x86_64,
+  lldb_mm3_x86_64,
+  lldb_mm4_x86_64,
+  lldb_mm5_x86_64,
+  lldb_mm6_x86_64,
+  lldb_mm7_x86_64,
+  lldb_xmm0_x86_64,
+  lldb_xmm1_x86_64,
+  lldb_xmm2_x86_64,
+  lldb_xmm3_x86_64,
+  lldb_xmm4_x86_64,
+  lldb_xmm5_x86_64,
+  lldb_xmm6_x86_64,
+  lldb_xmm7_x86_64,
+  lldb_xmm8_x86_64,
+  lldb_xmm9_x86_64,
+  lldb_xmm10_x86_64,
+  lldb_xmm11_x86_64,
+  lldb_xmm12_x86_64,
+  lldb_xmm13_x86_64,
+  lldb_xmm14_x86_64,
+  lldb_xmm15_x86_64,
+  k_last_fpr_x86_64 = lldb_xmm15_x86_64,
 
-        k_num_registers_x86_64,
-        k_num_gpr_registers_x86_64 = k_last_gpr_x86_64 - k_first_gpr_x86_64 + 1,
-        k_num_fpr_registers_x86_64 = k_last_fpr_x86_64 - k_first_fpr_x86_64 + 1,
-        k_num_avx_registers_x86_64 = k_last_avx_x86_64 - k_first_avx_x86_64 + 1,
-        k_num_user_registers_x86_64 = k_num_gpr_registers_x86_64 + k_num_fpr_registers_x86_64 + k_num_avx_registers_x86_64,
-    };
+  k_first_avx_x86_64,
+  lldb_ymm0_x86_64 = k_first_avx_x86_64,
+  lldb_ymm1_x86_64,
+  lldb_ymm2_x86_64,
+  lldb_ymm3_x86_64,
+  lldb_ymm4_x86_64,
+  lldb_ymm5_x86_64,
+  lldb_ymm6_x86_64,
+  lldb_ymm7_x86_64,
+  lldb_ymm8_x86_64,
+  lldb_ymm9_x86_64,
+  lldb_ymm10_x86_64,
+  lldb_ymm11_x86_64,
+  lldb_ymm12_x86_64,
+  lldb_ymm13_x86_64,
+  lldb_ymm14_x86_64,
+  lldb_ymm15_x86_64,
+  k_last_avx_x86_64 = lldb_ymm15_x86_64,
 
+  k_first_mpxr_x86_64,
+  lldb_bnd0_x86_64 = k_first_mpxr_x86_64,
+  lldb_bnd1_x86_64,
+  lldb_bnd2_x86_64,
+  lldb_bnd3_x86_64,
+  k_last_mpxr_x86_64 = lldb_bnd3_x86_64,
+
+  k_first_mpxc_x86_64,
+  lldb_bndcfgu_x86_64 = k_first_mpxc_x86_64,
+  lldb_bndstatus_x86_64,
+  k_last_mpxc_x86_64 = lldb_bndstatus_x86_64,
+
+  lldb_dr0_x86_64,
+  lldb_dr1_x86_64,
+  lldb_dr2_x86_64,
+  lldb_dr3_x86_64,
+  lldb_dr4_x86_64,
+  lldb_dr5_x86_64,
+  lldb_dr6_x86_64,
+  lldb_dr7_x86_64,
+
+  k_num_registers_x86_64,
+  k_num_gpr_registers_x86_64 = k_last_gpr_x86_64 - k_first_gpr_x86_64 + 1,
+  k_num_fpr_registers_x86_64 = k_last_fpr_x86_64 - k_first_fpr_x86_64 + 1,
+  k_num_avx_registers_x86_64 = k_last_avx_x86_64 - k_first_avx_x86_64 + 1,
+  k_num_mpx_registers_x86_64 = k_last_mpxc_x86_64 - k_first_mpxr_x86_64 + 1,
+  k_num_user_registers_x86_64 = k_num_gpr_registers_x86_64 +
+                                k_num_fpr_registers_x86_64 +
+                                k_num_avx_registers_x86_64 +
+                                k_num_mpx_registers_x86_64,
+};
 }
 
 #endif // #ifndef lldb_x86_register_enums_h