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FreeBSD-ports
RELENG_2_3
RELENG_2_3_0
RELENG_2_3_1
RELENG_2_3_2
RELENG_2_3_3
RELENG_2_3_4
RELENG_2_4_0
RELENG_2_4_4
branches/2015Q4
branches/2016Q1
branches/2016Q2
branches/2016Q3
branches/2016Q4
branches/2017Q1
branches/2017Q2
branches/2017Q3
branches/2017Q4
devel
master
Raptor Engineering's fork of pfsense FreeBSD ports tree with pfSense changes
Raptor Engineering, LLC
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iverilog
Commit message (
Expand
)
Author
Age
Files
Lines
*
Update to 0.8.1
mnag
2005-11-09
2
-5
/
+8
*
Update maintainer's email address.
linimon
2005-10-12
1
-1
/
+1
*
Update to 0.8
arved
2004-11-05
3
-5
/
+6
*
Update to 0.7.20040606.
nobutaka
2004-07-04
2
-4
/
+4
*
- Update to version 20040220
krion
2004-03-18
2
-4
/
+4
*
Bump PORTREVISION on all ports that depend on gettext to aid with upgrading.
marcus
2004-02-04
1
-0
/
+1
*
Unbreak on 4.x.
linimon
2004-01-30
2
-7
/
+26
*
Update to 20031202 snapshot. Summary of changes listed on
linimon
2003-12-17
3
-8
/
+20
*
Mark as broken while we muddle through the compile problem with
linimon
2003-11-20
1
-0
/
+2
*
Maintainer Update to latest snapshot. Changes: add AMD64 support
linimon
2003-10-27
3
-5
/
+4
*
Maintainer update to snapshot version. In addition to fixing the port
linimon
2003-10-17
2
-4
/
+6
*
Partial fix for builds with gcc 3.3. This still blows up later on.
kris
2003-07-18
1
-0
/
+10
*
Change the Maintainer to someone who uses this port more than I do.
keichii
2003-05-19
1
-1
/
+1
*
Fix MAN. This commit completes changes submitted in the PR. I made
will
2003-05-17
1
-4
/
+3
*
Fix this port and remove BROKEN.
will
2003-05-16
2
-18
/
+4
*
BROKEN: Does not install
kris
2003-05-06
1
-0
/
+2
*
Clear moonlight beckons.
ade
2003-03-07
2
-1
/
+1
*
Update to iverilog 0.7
keichii
2003-01-31
6
-43
/
+8
*
Fix build with bison 1.75.
marcus
2002-12-02
3
-0
/
+41
*
Add missing files
kris
2002-09-19
2
-1
/
+5
*
Update to 0.6 after my long absence
keichii
2002-03-04
2
-2
/
+2
*
pass maintainership to keichii
ijliao
2001-05-18
1
-1
/
+1
*
forgot bison dependence
ijliao
2001-02-22
1
-0
/
+1
*
add iverilog, a Verilog simulation and synthesis tool
ijliao
2001-02-13
5
-0
/
+59