blob: 8686c970e43274024368b3da13ae7bbe0f3ffa53 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
|
library = techmap
rtl_files = ../rtl/gencomp.vhd \
../rtl/allddr.vhd \
../rtl/allmem.vhd \
../rtl/allpads.vhd \
../rtl/generic_syncram.vhd \
../rtl/syncram_2p.vhd \
../rtl/syncram_dp.vhd \
../rtl/memory_unisim.vhd \
../rtl/netcomp.vhd \
../rtl/ddrphy.vhd \
../rtl/outpad.vhd \
../rtl/unisim_inpad.vhd \
../rtl/unisim_iddr_reg.vhd \
../rtl/spartan3e_ddr_phy.vhd \
../rtl/clkpad.vhd \
../rtl/iopad.vhd \
../rtl/syncram.vhd \
rtl_tb_files = ../rtl_tb/*.vhd
vhdlfiles = $(rtl_files)
vhdltargets := $(foreach n, $(vhdlfiles), ./$(library)/$(basename $(notdir $n))/_primary.dat)
all: compile
remake: lib compile
compile: dependlib lib $(vhdltargets)
$(vhdltargets): $(vhdlfiles)
vcom -quiet -2008 -work $(library) $(vhdlfiles)
dependlib:
make compile --directory ../../grlib/sim
clean:
rm -f transcript
rm -f *.wlf
rm -f wlf*
rm -rf $(library)
rm -f Makefile.$(library)
# default patterns
lib: $(library)
$(library):
vlib $(library)
|
