summaryrefslogtreecommitdiffstats
path: root/s3estarter
Commit message (Collapse)AuthorAgeFilesLines
* beautify: use beter variable namesBert Lange2011-01-141-7/+7
|
* change: switch for fzd to hzdrBert Lange2011-01-142-3/+3
|
* add: and test irq functionalityBert Lange2011-01-117-18/+62
|
* update: filesBert Lange2011-01-073-55/+76
|
* change: color to nostalgic greenBert Lange2011-01-071-1/+1
|
* change: turn unbound warning to errorBert Lange2011-01-071-0/+5
|
* add: default to minimize warnings (sim+syn)Bert Lange2011-01-073-35/+60
| | | | fix: fpga io pins
* add: UART with debug functionalitiyBert Lange2011-01-071-34/+82
|
* renamed: to make fast flow possibleBert Lange2011-01-071-0/+0
|
* change: speed up the make flowBert Lange2011-01-072-30/+37
|
* add: dependency to libhalBert Lange2010-12-061-1/+6
|
* fix: time measurementBert Lange2010-12-063-31/+32
|
* add: putpfloat (pseudo float) functionBert Lange2010-12-062-7/+15
|
* add: get_time functionBert Lange2010-12-063-5/+26
|
* cleanupBert Lange2010-12-023-99/+51
|
* switch: to ethernet speed testBert Lange2010-12-021-2/+2
|
* demo: working ethernet speed testBert Lange2010-12-024-83/+151
|
* change: put debug_putchar to better placeBert Lange2010-12-021-42/+37
| | | | change: puthex without 0x
* change: put putchar (and debug_putchar) to better placeBert Lange2010-12-024-10/+23
| | | | change: puthex without 0x
* fix: the tb led stuffBert Lange2010-12-022-5/+2
|
* change: add one timer (chain mode) for secondsBert Lange2010-12-023-8/+27
|
* change: ethernet softwareBert Lange2010-11-263-88/+120
|
* change: test softwareBert Lange2010-11-264-48/+31
|
* change: to test softwareBert Lange2010-11-261-2/+2
|
* fix: for synthesisBert Lange2010-11-261-0/+14
|
* fix: for synthesisBert Lange2010-11-261-0/+2
|
* improve: ZPU wrapperBert Lange2010-11-261-1/+4
|
* change: try to switch to vmake generated makefilesBert Lange2010-11-261-8/+15
|
* change: to more general wayBert Lange2010-11-181-2/+4
|
* add: debug console (fast simulation output)Bert Lange2010-11-187-26/+234
|
* change: output redirect (putchar)Bert Lange2010-11-1810-435/+209
|
* fix: dependenciesBert Lange2010-11-181-1/+1
|
* updateBert Lange2010-11-182-342/+684
|
* change: commented out verilog modelBert Lange2010-11-182-20/+24
|
* beautifyBert Lange2010-11-181-3/+5
|
* beautifyBert Lange2010-11-181-42/+66
|
* change: software file structureBert Lange2010-11-0217-56/+967
|
* add: memory size checkBert Lange2010-10-272-20/+73
|
* fix: timing (x. try)Bert Lange2010-10-264-89/+115
|
* clean upBert Lange2010-10-252-27/+2
|
* cleanupBert Lange2010-10-211-0/+0
|
* add: verilog simulation modelBert Lange2010-10-216-97/+1786
|
* change: pathsBert Lange2010-10-211-2/+2
|
* sort: software folder, change mem initBert Lange2010-10-2114-28/+255
|
* change: unknowd devices to fzdBert Lange2010-10-181-2/+2
|
* add: isim simulationBert Lange2010-10-157-6/+422
|
* fix: modbits?Bert Lange2010-10-152-0/+0
|
* after mergeBert Lange2010-10-1416-0/+0
|
* MergeBert Lange2010-10-1417-0/+0
|\
* | add: some clks to la podsBert Lange2010-10-143-3/+11
| |
OpenPOWER on IntegriCloud