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Diffstat (limited to 'zpu/hdl/index.html')
| -rw-r--r-- | zpu/hdl/index.html | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/zpu/hdl/index.html b/zpu/hdl/index.html index 271d46a..d5bc256 100644 --- a/zpu/hdl/index.html +++ b/zpu/hdl/index.html @@ -4,7 +4,8 @@ The simplest version of the ZPU uses BRAM. When getting accustomed to the ZPU, a BRAM ZPU with a UART is a good place to start. <p> -You'll find a working simulation script in hdl/example/simzpu.do. +You'll find a working simulation script in hdl/example/simzpu_small.do and hdl/zpu4/src/simzpu_medium.do, which +show simulation of the small(zpu_core_small.vhd) and medium sized ZPU(zpu_core.vhd). <p> When implementing the ZPU, copy the following files and modify them to your needs: <ol> @@ -23,10 +24,10 @@ java -classpath ../simulator/zpusim.jar com.zylin.zpu.simulator.tools.MakeRam he The hdl/example directory has a simulation written for Xilinx WebPack ModelSim. From the ModelSim command prompt: <ol> <li>cd c:/<installfolder>/hdl/example -<li>do zpusim.do +<li>do zpusim_small.do </ol> <p> -After running the hello world simulation (see zpusim.do), two files are written to the hdl/exmaple directory: +After running the hello world simulation (see zpusim.do), two files are written to the hdl/example directory: <ol> <li>log.txt - contains the "Hello world!" text written to the debug channel/simplified UART. <li>trace.txt - a trace file for the CPU. The instruction set simulator has the capability of taking |
