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-rw-r--r--zpu/hdl/example_ghdl/dmipstrace_ghdl.sh21
1 files changed, 10 insertions, 11 deletions
diff --git a/zpu/hdl/example_ghdl/dmipstrace_ghdl.sh b/zpu/hdl/example_ghdl/dmipstrace_ghdl.sh
index 3be392f..53474d4 100644
--- a/zpu/hdl/example_ghdl/dmipstrace_ghdl.sh
+++ b/zpu/hdl/example_ghdl/dmipstrace_ghdl.sh
@@ -1,21 +1,20 @@
#!/bin/sh
-UNISIM_DIR="'location of GHDL objects for unisim library'/unisim_v93"
-IMPORT_OPTIONS="--std=93 --ieee=synopsys --workdir=work -P${UNISIM_DIR}"
+IMPORT_OPTIONS="--std=93 --ieee=synopsys --workdir=work"
MAKE_OPTIONS="${IMPORT_OPTIONS} -Wl,-s -fexplicit --syn-binding"
if test ! -e work; then
echo "Building work library..."
mkdir work
- ghdl -i ${IMPORT_OPTIONS} zpu_config_trace.vhd
- ghdl -i ${IMPORT_OPTIONS} zpupkg.vhd
- ghdl -i ${IMPORT_OPTIONS} txt_util.vhd
- ghdl -i ${IMPORT_OPTIONS} sim_fpga_top.vhd
- ghdl -i ${IMPORT_OPTIONS} zpu_core.vhd
- ghdl -i ${IMPORT_OPTIONS} dram_dmips.vhd
- ghdl -i ${IMPORT_OPTIONS} timer.vhd
- ghdl -i ${IMPORT_OPTIONS} io.vhd
- ghdl -i ${IMPORT_OPTIONS} trace.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/example_medium/zpu_config_trace.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/core/zpupkg.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/src/txt_util.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/example_medium/sim_fpga_top.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/core/zpu_core.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/example_medium/dram_dmips.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/src/timer.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/src/io.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/src/trace.vhd
fi
echo "Compiling design..."
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