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| author | Bert Lange <b.lange@hzdr.de> | 2011-10-13 12:37:49 +0200 |
|---|---|---|
| committer | Bert Lange <b.lange@hzdr.de> | 2011-10-13 12:37:49 +0200 |
| commit | 0bf783475d6610a14f71884737aeae33246bb9be (patch) | |
| tree | 8545a4d2e76761131f4945db6eeca7b563f7161e /zpu/hdl/zealot/fpga/digilent-starter-xc3s500e/simulation_config/run.do | |
| parent | bf4405c61a9c010a8e888da678436a282b9551a3 (diff) | |
| download | zpu-0bf783475d6610a14f71884737aeae33246bb9be.zip zpu-0bf783475d6610a14f71884737aeae33246bb9be.tar.gz | |
add: ZPU reference designs for zealot
Diffstat (limited to 'zpu/hdl/zealot/fpga/digilent-starter-xc3s500e/simulation_config/run.do')
| -rw-r--r-- | zpu/hdl/zealot/fpga/digilent-starter-xc3s500e/simulation_config/run.do | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/zpu/hdl/zealot/fpga/digilent-starter-xc3s500e/simulation_config/run.do b/zpu/hdl/zealot/fpga/digilent-starter-xc3s500e/simulation_config/run.do new file mode 100644 index 0000000..7c5e18f --- /dev/null +++ b/zpu/hdl/zealot/fpga/digilent-starter-xc3s500e/simulation_config/run.do @@ -0,0 +1,4 @@ +add wave tb_rot_center +add wave tb_clk_50mhz +add wave tb_rs232_dce* +run -all |
