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authorBert Lange <b.lange@hzdr.de>2012-02-22 11:12:09 +0100
committerBert Lange <b.lange@hzdr.de>2012-02-22 11:12:09 +0100
commit8b6ba55effe041027e4f156a54dcbefdaf69a2e2 (patch)
tree200fa289bcbbf89a0eba1bfc4b44bad45c3297db
parent541bbe8e6f7dfdf5cecb1fdace798a30cbd8aaae (diff)
downloadzpu-8b6ba55effe041027e4f156a54dcbefdaf69a2e2.zip
zpu-8b6ba55effe041027e4f156a54dcbefdaf69a2e2.tar.gz
change: to working bsp example
-rw-r--r--hw_sp601/bsp_zpuahb/rtl/box.vhd16
-rw-r--r--hw_sp601/bsp_zpuahb/rtl/led_control_ahb.vhd137
-rw-r--r--hw_sp601/bsp_zpuahb/simulation/Makefile6
-rw-r--r--hw_sp601/bsp_zpuahb/simulation/vhdl_files.txt144
-rw-r--r--hw_sp601/bsp_zpuahb/synthesis/Makefile2
5 files changed, 223 insertions, 82 deletions
diff --git a/hw_sp601/bsp_zpuahb/rtl/box.vhd b/hw_sp601/bsp_zpuahb/rtl/box.vhd
index ca0e5f5..8f8378c 100644
--- a/hw_sp601/bsp_zpuahb/rtl/box.vhd
+++ b/hw_sp601/bsp_zpuahb/rtl/box.vhd
@@ -28,10 +28,6 @@ use grlib.amba.all;
library techmap;
use techmap.gencomp.all; -- constants
-library work;
---use work.types.all;
---use board_sp601.components.chipscope;
-
entity box is
generic (
@@ -131,21 +127,13 @@ begin
ahbo => ahbmo(1) -- : out ahb_mst_out_type
);
---------------------------------------------------------------------
-
--- chipscope_i0 : chipscope
--- port map (
--- clk => clk, --: in std_ulogic;
--- data => std_ulogic_vector( ahbmo(0).haddr), --: in std_ulogic_vector(31 downto 0);
--- trig => ahbmo(0).hbusreq --: in std_ulogic
--- );
-
---------------------------------------------------------------------
-- AHB CONTROLLER
- --ahbmo(0) <= (ahbm_none);
- --ahbmo(1) <= (ahbm_none);
+ --ahbmo(0) <= (ahbm_none); -- led_control_ahb_i0
+ --ahbmo(1) <= (ahbm_none); -- led_control_ahb_i1
ahbmo(2) <= (ahbm_none);
ahbmo(3) <= (ahbm_none);
--
diff --git a/hw_sp601/bsp_zpuahb/rtl/led_control_ahb.vhd b/hw_sp601/bsp_zpuahb/rtl/led_control_ahb.vhd
new file mode 100644
index 0000000..b1105a1
--- /dev/null
+++ b/hw_sp601/bsp_zpuahb/rtl/led_control_ahb.vhd
@@ -0,0 +1,137 @@
+--------------------------------------------------------------------------------
+-- $Date$
+-- $Author$
+-- $Revision$
+--------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+library grlib;
+use grlib.amba.all;
+use grlib.stdlib.all;
+use grlib.devices.all;
+
+library hzdr;
+use hzdr.devices_hzdr.all;
+
+
+entity led_control_ahb is
+ generic(
+ hindex : integer := 0;
+ count : natural := 0;
+ gpio_data : std_logic_vector(31 downto 0)
+ );
+ port (
+ -- system
+ clk : in std_ulogic;
+ -- ahb
+ ahbi : in ahb_mst_in_type;
+ ahbo : out ahb_mst_out_type
+ );
+end entity led_control_ahb;
+
+
+architecture rtl of led_control_ahb is
+
+ constant revision_c : integer := 0;
+ constant hconfig_c : ahb_config_type := (
+ 0 => ahb_device_reg ( VENDOR_HZDR, 255, 0, revision_c, 0),
+ others => (others => '0')
+ );
+
+ constant gpio_addr_c : std_ulogic_vector(31 downto 0) := x"80000404";
+
+ constant default_ahb_mst_out_c : ahb_mst_out_type := (
+ hbusreq => '0',
+ hlock => '0',
+ htrans => HTRANS_IDLE,
+ haddr => (others => '0'),
+ hwrite => '0',
+ hsize => HSIZE_WORD,
+ hburst => HBURST_SINGLE,
+ hprot => "0001",
+ hwdata => (others => '0'),
+ hirq => (others => '0'),
+ hconfig => hconfig_c,
+ hindex => hindex
+ );
+
+ type state_t is (IDLE, ADDR_PHASE, DATA_PHASE);
+
+ type reg_t is record
+ state : state_t;
+ counter : natural;
+ ahbo : ahb_mst_out_type;
+ end record;
+ constant default_reg_c : reg_t := (
+ state => IDLE,
+ counter => 0,
+ ahbo => default_ahb_mst_out_c
+ );
+
+ signal r : reg_t := default_reg_c;
+ signal r_in : reg_t;
+
+begin
+
+ comb: process(r, ahbi)
+ variable v : reg_t;
+ begin
+ ahbo <= r.ahbo;
+ v := r;
+
+ case v.state is
+ when IDLE =>
+ -- have reach right time?
+ if v.counter < count then
+ v.counter := v.counter + 1;
+ else
+ -- bus write request
+ v.ahbo.hbusreq := '1';
+ v.ahbo.htrans := HTRANS_NONSEQ;
+ v.ahbo.haddr := std_logic_vector( gpio_addr_c);
+ v.ahbo.hwrite := '1';
+ -- have grant?
+ if ahbi.hgrant( hindex) = '1' then
+ v.state := ADDR_PHASE;
+ end if;
+ end if;
+
+ when ADDR_PHASE =>
+ v.ahbo.hbusreq := '0';
+ v.ahbo.htrans := HTRANS_IDLE;
+ v.ahbo.haddr := (others => '0');
+ v.ahbo.hwrite := '0';
+ v.ahbo.hwdata := gpio_data;
+ v.state := DATA_PHASE;
+
+
+ when DATA_PHASE =>
+ v.ahbo.hwdata := (others => '0');
+ v.counter := 0;
+ v.state := IDLE;
+
+ end case;
+
+ r_in <= v;
+ end process comb;
+
+
+ seq: process
+ begin
+ wait until rising_edge( clk);
+ r <= r_in;
+ end process seq;
+
+
+ -- pragma translate_off
+ bootmsg : report_version
+ generic map (
+ "led_control_ahb" & tost( hindex) & ": rev " & tost( revision_c) & ", gpio_data: " & tost( gpio_data)
+ );
+ -- pragma translate_on
+
+
+end architecture rtl;
+
diff --git a/hw_sp601/bsp_zpuahb/simulation/Makefile b/hw_sp601/bsp_zpuahb/simulation/Makefile
index 30d75c7..721587d 100644
--- a/hw_sp601/bsp_zpuahb/simulation/Makefile
+++ b/hw_sp601/bsp_zpuahb/simulation/Makefile
@@ -5,7 +5,7 @@
# $Revision$
#
-library = test_rrobin
+library = work
top = top_tb
software_dir = ../software
@@ -14,7 +14,7 @@ software_dir = ../software
VMK = vmk
# generate list of used libs
-library_list = $(shell cut --field 1 --delimiter=" " --only-delimited vhdl_files.txt | sort --unique)
+library_list = $(shell cut --field 1 --delimiter=" " --only-delimited vhdl_files.txt | grep --invert "\#" | sort --unique)
all: compile simulate
@@ -39,7 +39,7 @@ clean:
rm -f *.wlf
rm -f wlf*
@# vmk stuff
- make -f Makefile.msim clean
+ -make -f Makefile.msim clean
rm -f Makefile.msim
rm -rf $(library_list)
diff --git a/hw_sp601/bsp_zpuahb/simulation/vhdl_files.txt b/hw_sp601/bsp_zpuahb/simulation/vhdl_files.txt
index 7bcb659..a932a86 100644
--- a/hw_sp601/bsp_zpuahb/simulation/vhdl_files.txt
+++ b/hw_sp601/bsp_zpuahb/simulation/vhdl_files.txt
@@ -1,67 +1,83 @@
+#zpu ../rtl/dualport_ram.vhd
+gaisler ../../../gaisler/rtl/ahbdpram.vhd
+gaisler ../../../gaisler/rtl/ahbmst.vhd
+gaisler ../../../gaisler/rtl/ahbram.vhd
+gaisler ../../../gaisler/rtl/ahbrom.vhd
+gaisler ../../../gaisler/rtl/ahbstat.vhd
+gaisler ../../../gaisler/rtl/ahbuart.vhd
+gaisler ../../../gaisler/rtl/apbuart.vhd
+gaisler ../../../gaisler/rtl/apbvga.vhd
+gaisler ../../../gaisler/rtl/charrom.vhd
+gaisler ../../../gaisler/rtl/charrom_package.vhd
+gaisler ../../../gaisler/rtl/dcom.vhd
+gaisler ../../../gaisler/rtl/dcom_uart.vhd
+#gaisler ../../../gaisler/rtl/ddr_phy.vhd
+gaisler ../../../gaisler/rtl/ddrsp16a.vhd
+gaisler ../../../gaisler/rtl/ddrspa.vhd
+gaisler ../../../gaisler/rtl/eth_ahb_mst.vhd
+gaisler ../../../gaisler/rtl/eth_rstgen.vhd
+gaisler ../../../gaisler/rtl/ethcomp.vhd
+gaisler ../../../gaisler/rtl/ethernet_mac.vhd
+gaisler ../../../gaisler/rtl/gptimer.vhd
+gaisler ../../../gaisler/rtl/greth.vhd
+gaisler ../../../gaisler/rtl/greth_pkg.vhd
+gaisler ../../../gaisler/rtl/greth_rx.vhd
+gaisler ../../../gaisler/rtl/greth_tx.vhd
+gaisler ../../../gaisler/rtl/grethc.vhd
+gaisler ../../../gaisler/rtl/grgpio.vhd
+gaisler ../../../gaisler/rtl/i2cmst.vhd
+gaisler ../../../gaisler/rtl/irqmp.vhd
+gaisler ../../../gaisler/rtl/leon3.vhd
+gaisler ../../../gaisler/rtl/libdcom.vhd
+gaisler ../../../gaisler/rtl/mctrl.vhd
+gaisler ../../../gaisler/rtl/memctrl.vhd
+gaisler ../../../gaisler/rtl/memoryctrl.vhd
+gaisler ../../../gaisler/rtl/misc.vhd
+gaisler ../../../gaisler/rtl/net.vhd
+gaisler ../../../gaisler/rtl/spictrl.vhd
+gaisler ../../../gaisler/rtl/spimctrl.vhd
+gaisler ../../../gaisler/rtl/uart.vhd
+gaisler ../../../gaisler/rtl_tb/sim.vhd
+grlib ../../../grlib/rtl/ahbctrl.vhd
+grlib ../../../grlib/rtl/amba.vhd
+grlib ../../../grlib/rtl/apbctrl.vhd
+grlib ../../../grlib/rtl/config.vhd
+grlib ../../../grlib/rtl/devices.vhd
+grlib ../../../grlib/rtl/stdlib.vhd
+grlib ../../../grlib/rtl/testlib.vhd
+grlib ../../../grlib/rtl/util.vhd
+grlib ../../../grlib/rtl/version.vhd
+grlib ../../../grlib/rtl_tb/stdio.vhd
+hzdr ../../../hzdr/rtl/component_package.vhd
+hzdr ../../../hzdr/rtl/debug_con_apb.vhd
+hzdr ../../../hzdr/rtl/devices_hzdr.vhd
+opencores ../../../opencores/rtl/8b10_dec.vhd
+opencores ../../../opencores/rtl/8b10_enc.vhd
+opencores ../../../opencores/rtl/i2c_master_bit_ctrl.vhd
+opencores ../../../opencores/rtl/i2c_master_byte_ctrl.vhd
+opencores ../../../opencores/rtl/i2coc.vhd
+techmap ../../../techmap/rtl/allmem.vhd
+techmap ../../../techmap/rtl/gencomp.vhd
+techmap ../../../techmap/rtl/memory_inferred.vhd
+techmap ../../../techmap/rtl/memory_unisim.vhd
+techmap ../../../techmap/rtl/netcomp.vhd
+techmap ../../../techmap/rtl/syncram_2p.vhd
+techmap ../../../techmap/rtl/syncram_dp.vhd
+tools ../../../tools/rtl/edge_detect_synchronizer.vhd
+tools ../../../tools/rtl/level_synchronizer.vhd
+tools ../../../tools/rtl/synchronizer_package.vhd
+tools ../../../tools/rtl_tb/fio_pck_body.vhd
+tools ../../../tools/rtl_tb/fio_pkg.vhd
+tools ../../../tools/rtl_tb/image_pkg.vhd
work ../rtl/box.vhd
+work ../rtl/led_control_ahb.vhd
work ../rtl/top.vhd
work ../rtl_tb/top_tb.vhd
-grlib ../../grlib/rtl/ahbctrl.vhd
-grlib ../../grlib/rtl/amba.vhd
-grlib ../../grlib/rtl/apbctrl.vhd
-grlib ../../grlib/rtl/devices.vhd
-grlib ../../grlib/rtl/report_version.vhd
-grlib ../../grlib/rtl/stdlib.vhd
-grlib ../../grlib/rtl/version.vhd
-techmap ../../techmap/rtl/generic_syncram.vhd
-techmap ../../techmap/rtl/gencomp.vhd
-techmap ../../techmap/rtl/allmem.vhd
-techmap ../../techmap/rtl/syncram_2p.vhd
-techmap ../../techmap/rtl/syncram_dp.vhd
-techmap ../../techmap/rtl/memory_unisim.vhd
-gaisler ../../gaisler/rtl/ahbdpram.vhd
-gaisler ../../gaisler/rtl/ahbmst.vhd
-gaisler ../../gaisler/rtl/ahbram.vhd
-gaisler ../../gaisler/rtl/ahbrom.vhd
-gaisler ../../gaisler/rtl/ahbstat.vhd
-gaisler ../../gaisler/rtl/ahbuart.vhd
-gaisler ../../gaisler/rtl/apbuart.vhd
-gaisler ../../gaisler/rtl/apbvga.vhd
-gaisler ../../gaisler/rtl/charrom.vhd
-gaisler ../../gaisler/rtl/charrom_package.vhd
-gaisler ../../gaisler/rtl/dcom.vhd
-gaisler ../../gaisler/rtl/dcom_uart.vhd
-gaisler ../../gaisler/rtl/ddr_phy.vhd
-gaisler ../../gaisler/rtl/ddrsp16a.vhd
-gaisler ../../gaisler/rtl/ddrspa.vhd
-gaisler ../../gaisler/rtl/eth_ahb_mst.vhd
-gaisler ../../gaisler/rtl/eth_rstgen.vhd
-gaisler ../../gaisler/rtl/ethcomp.vhd
-gaisler ../../gaisler/rtl/ethernet_mac.vhd
-gaisler ../../gaisler/rtl/gptimer.vhd
-gaisler ../../gaisler/rtl/greth.vhd
-gaisler ../../gaisler/rtl/greth_rx.vhd
-gaisler ../../gaisler/rtl/greth_tx.vhd
-gaisler ../../gaisler/rtl/grethc.vhd
-gaisler ../../gaisler/rtl/grethpkg.vhd
-gaisler ../../gaisler/rtl/grgpio.vhd
-gaisler ../../gaisler/rtl/i2cmst.vhd
-gaisler ../../gaisler/rtl/irqmp.vhd
-gaisler ../../gaisler/rtl/leon3.vhd
-gaisler ../../gaisler/rtl/libdcom.vhd
-gaisler ../../gaisler/rtl/mctrl.vhd
-gaisler ../../gaisler/rtl/memctrl.vhd
-gaisler ../../gaisler/rtl/memoryctrl.vhd
-gaisler ../../gaisler/rtl/misc.vhd
-gaisler ../../gaisler/rtl/net.vhd
-gaisler ../../gaisler/rtl/spimctrl.vhd
-gaisler ../../gaisler/rtl/spictrl.vhd
-gaisler ../../gaisler/rtl/uart.vhd
-opencores ../../opencores/rtl/i2c_master_bit_ctrl.vhd
-opencores ../../opencores/rtl/i2c_master_byte_ctrl.vhd
-opencores ../../opencores/rtl/i2coc.vhd
-opencores ../../opencores/rtl/8b10_enc.vhd
-opencores ../../opencores/rtl/8b10_dec.vhd
-tools ../../tools/rtl/edge_detect_synchronizer.vhd
-tools ../../tools/rtl/level_synchronizer.vhd
-tools ../../tools/rtl/synchronizer_package.vhd
-tools ../../tools/rtl_tb/fio_pck_body.vhd
-tools ../../tools/rtl_tb/fio_pkg.vhd
-tools ../../tools/rtl_tb/image_pkg.vhd
-hzdr ../../hzdr/rtl/component_package.vhd
-hzdr ../../hzdr/rtl/debug_con_apb.vhd
+zpu ../../../zpu/rtl/dualport_ram_ahb_wrapper.vhd
+zpu ../../../zpu/rtl/zpu_ahb.vhd
+zpu ../../../zpu/rtl/zpu_bus_trace.vhd
+zpu ../../../zpu/rtl/zpu_config.vhd
+zpu ../../../zpu/rtl/zpu_core_medium.vhd
+zpu ../../../zpu/rtl/zpu_wrapper_package.vhd
+zpu ../../../zpu/rtl/zpupkg.vhd
+zpu ../../../zpu/rtl_tb/txt_util.vhd
diff --git a/hw_sp601/bsp_zpuahb/synthesis/Makefile b/hw_sp601/bsp_zpuahb/synthesis/Makefile
index 9c7df12..d95ae96 100644
--- a/hw_sp601/bsp_zpuahb/synthesis/Makefile
+++ b/hw_sp601/bsp_zpuahb/synthesis/Makefile
@@ -119,7 +119,7 @@ $(MODULE).prj: ../simulation/vhdl_files.txt
#############################################################################
### generate project file
###
- grep --invert rtl_tb ../simulation/vhdl_files.txt | awk '{printf "vhdl %s %s\n",$$1,$$2}' > $(MODULE).prj
+ grep --invert rtl_tb ../simulation/vhdl_files.txt | grep --invert "\#" | awk '{printf "vhdl %s %s\n",$$1,$$2}' > $(MODULE).prj
xst: $(MODULE).ngc
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